Intelligent detection device and system

Abstract

According to the intelligent detection device provided by the invention, adjustment in NFC or other modes is not needed, and the detection of the output port can be carried out once every time the alternating current is switched on. If a load is connected to the output port and the current flowing through the first resistor is greater than a set value, the output port outputs; and if the output port has no load access or the current flowing through the first resistor is smaller than a set value, the output port closes the output and locks the output port. After the alternating current is turned off, the power-on is carried out again, the load access condition of the output port is detected again, the purpose of detecting whether the load is accessed to the output port of the intelligent detection device or not is achieved, and the accuracy of detecting whether the load is accessed to the output port or not is improved.

Description

Technical Field

[0001] The present invention relates to the field of intelligent detection technology, and in particular to an intelligent detection device and system. Background Art

[0002] The prior art generally detects whether an output port is connected to a load by using near-field communication (NFC) or other methods of regulation.

[0003] Figure 1 This is a schematic diagram of the detection principle of using NFC to adjust the output port to detect whether the load is connected, as provided by the prior art. Figure 1 As shown, the output port (CV+, CV-) controls the connected load (for example, a three-way output light-emitting diode (LED) dimming device), and the original output sequence is: output 1+output 2+output 3→output 1→output 2→output 3→output 1+output 2+output 3 cycle, and the device can be adjusted to output one, two or three outputs through NFC; when NFC is not adjusted, the device will default to a certain set output number for output; assuming that three outputs are defaulted, but only two outputs are needed at this time, when the switch is switched, there will be no output at a certain time when the output is switched, resulting in false detection of whether the output port is connected to the load, thereby resulting in low accuracy of detection of whether the output port is connected to the load. Summary of the invention

[0004] The intelligent detection device and system provided by the present invention are used to solve the problem in the prior art that the accuracy of detecting whether an output port is connected to a load is low in an NFC-based adjustment method.

[0005] The present invention provides an intelligent detection device, comprising:

[0006] Output port, used to connect the load;

[0007] A voltage detection module, connected to the first resistor, and configured to detect a first voltage signal of the first resistor;

[0008] A voltage divider circuit, used for dividing the first power supply signal to obtain a second voltage signal;

[0009] a comparator, connected to the voltage detection module and the voltage divider circuit respectively, for comparing the amplitude of the first voltage signal with the amplitude of the second voltage signal, and outputting a first level;

[0010] an interlock circuit connected to the comparator and the base of the first target transistor, and used to determine a second level input to the base of the first target transistor according to the first level, wherein the second level is used to determine a gate voltage of the field effect transistor, and the gate voltage is used to determine whether the output port is connected to the load;

[0011] The gate of the field effect tube is connected to the collector of the first target transistor, the drain of the field effect tube is connected to the output port, and the source of the field effect tube is connected to the first resistor.

[0012] According to an intelligent detection device provided by the present invention, the voltage detection module includes:

[0013] an amplification module, connected to the first resistor, and used to amplify the detected current signal of the first resistor, wherein the current signal is determined according to a pulse width modulation signal input to the gate of the field effect transistor;

[0014] The rectifier module is connected to the amplification module and is used to adjust the amplified current signal to obtain a target current signal, and the first voltage signal is determined according to the target current signal.

[0015] According to an intelligent detection device provided by the present invention, the amplification module includes:

[0016] A first amplifier, used to amplify the current signal of the first resistor;

[0017] The second amplifier is connected to the first amplifier and is used to amplify the amplified current signal of the first resistor input to the first amplifier again to obtain the target current signal.

[0018] According to an intelligent detection device provided by the present invention, the rectifier module includes:

[0019] A first branch, connected to the amplification module, includes a first capacitor, a second resistor and a first target diode, wherein the first capacitor is connected in series with the second resistor and then connected in parallel with the first target diode;

[0020] The second branch is connected to the first branch, and includes a second capacitor, a third resistor, a second target diode and a fourth resistor, the second target diode is connected in series with the third resistor, the second capacitor is connected in parallel with the fourth resistor, and the third resistor is connected in series with the fourth resistor.

[0021] According to an intelligent detection device provided by the present invention, the voltage divider circuit comprises:

[0022] A first power supply module, used for providing the first power supply signal to the voltage divider circuit;

[0023] The voltage-dividing resistor is connected to the first power module and the comparator respectively, and is used to divide the first power signal to obtain the second voltage signal.

[0024] According to an intelligent detection device provided by the present invention, the comparator is further used to: output a low level when it is determined that the amplitude of the first voltage signal is greater than the amplitude of the second voltage signal;

[0025] The interlock circuit is also used to: determine that the second level input to the base of the first target transistor is a low level based on the low level input by the comparator, and, when the second level is a low level, the gate voltage of the field effect transistor remains at a high level and the output port is connected to the load.

[0026] According to an intelligent detection device provided by the present invention, the comparator is further used to: output a high level when it is determined that the amplitude of the first voltage signal is smaller than the amplitude of the second voltage signal;

[0027] The interlock circuit is also used to: determine that the second level input to the base of the first target transistor is a high level based on the high level input by the comparator, and, when the second level is a high level, the gate voltage of the field effect transistor is pulled from a high level to a low level, and the output port is not connected to the load.

[0028] According to an intelligent detection device provided by the present invention, the interlocking circuit comprises:

[0029] a third branch, comprising a third target diode, a second target transistor, a fifth resistor, a sixth resistor, a seventh resistor and an eighth resistor, wherein the third target diode is connected to the comparator, the fifth resistor is respectively connected to the collector of the third target diode and the second target transistor, the sixth resistor is respectively connected to the fifth resistor and the base of the second target transistor, the seventh resistor is connected to the emitter of the second target transistor, and the eighth resistor is connected to the collector of the second target transistor;

[0030] The fourth branch is connected to the third branch, and includes a fourth target diode, a third target transistor, a ninth resistor and a tenth resistor. The ninth resistor is respectively connected to the collector of the second target transistor and the base of the third target transistor, the tenth resistor is respectively connected to the emitter of the second target transistor and the emitter of the third target transistor, the collector of the third target transistor is connected to the eighth resistor, and the fourth target diode is respectively connected to the emitter of the third target transistor and the base of the first target transistor.

[0031] According to an intelligent detection device provided by the present invention, the amplification module further includes:

[0032] an eleventh resistor, connected to the first amplifier and then grounded,

[0033] a twelfth resistor, connected to the first amplifier;

[0034] a thirteenth resistor, connected to the second amplifier and then grounded;

[0035] A fourteenth resistor is connected to the second amplifier.

[0036] According to an intelligent detection device provided by the present invention, the intelligent detection device also includes:

[0037] The second power supply module is connected to the comparator and is used to provide a second power supply signal for the comparator.

[0038] The intelligent detection device provided by the present invention obtains a second voltage signal by detecting a first voltage signal flowing through a first resistor based on a voltage detection module and dividing a first power supply signal based on a voltage divider circuit, and compares the amplitudes of the first voltage signal and the second voltage signal using a comparator to determine the level of the base of a transistor connected to the comparator. According to the level, the gate voltage of the field effect transistor connected to the transistor can be determined, and according to the gate voltage, it can be determined whether the circuit of the intelligent detection device is open, and thereby determine whether the output port turns off the output, thereby achieving the purpose of intelligent detection of whether the output port is connected to a load, and improving the accuracy of detecting whether the output port is connected to a load. BRIEF DESCRIPTION OF THE DRAWINGS

[0039] In order to more clearly illustrate the technical solutions in the present invention or the prior art, the following briefly introduces the drawings required for use in the embodiments or the description of the prior art. Obviously, the drawings described below are some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0040] Figure 1 It is a schematic diagram of the detection principle of using NFC adjustment method to detect whether the output port is connected to the load provided by the prior art;

[0041] Figure 2 It is a structural schematic diagram of the intelligent detection device provided by the present invention. DETAILED DESCRIPTION

[0042] In order to make the purpose, technical solution and advantages of the present invention clearer, the technical solution of the present invention will be clearly and completely described below in conjunction with the drawings of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0043] Figure 2 is a schematic diagram of the structure of the intelligent detection device provided by the present invention, such as Figure 2 As shown, including:

[0044] Output port, used to connect the load;

[0045] A voltage detection module, connected to the first resistor, and configured to detect a first voltage signal of the first resistor;

[0046] A voltage divider circuit, used for dividing the first power supply signal to obtain a second voltage signal;

[0047] a comparator, connected to the voltage detection module and the voltage divider circuit respectively, for comparing the amplitude of the first voltage signal with the amplitude of the second voltage signal, and outputting a first level;

[0048] an interlock circuit connected to the comparator and the base of the first target transistor, and used to determine a second level input to the base of the first target transistor according to the first level, wherein the second level is used to determine a gate voltage of the field effect transistor, and the gate voltage is used to determine whether the output port is connected to the load;

[0049] The gate of the field effect tube is connected to the collector of the first target transistor, the drain of the field effect tube is connected to the output port, and the source of the field effect tube is connected to the first resistor.

[0050] Optionally, the intelligent detection device can be specifically composed of an output port (CV+, CV-), a voltage detection module, a voltage divider circuit, a comparator and an interlocking circuit, wherein the output port is used to connect the load, the voltage detection module is electrically connected to the first resistor, and the voltage detection module can be specifically used to detect the voltage signal of the first resistor, that is, the first voltage signal, and the load can be used as follows Figure 2 The three-way output LED dimming device shown can also be other loads.

[0051] The first power supply signal may specifically be a power supply signal of a voltage divider circuit, and the voltage divider circuit may specifically be used to divide the first power supply signal to obtain a second voltage signal.

[0052] The comparator U1 may specifically include a first input pin PIN6, a second input pin PIN5, a first output pin PIN7, a positive power terminal PIN8 and a negative power terminal PIN4, wherein the first input pin PIN6 is connected to a rectifier module, and the second input pin PIN5 is connected to a voltage divider circuit, which may be specifically used to input a voltage signal obtained by dividing a first power signal (direct current power (DC power, DC)) of the intelligent detection device into the second input pin PIN5.

[0053] The comparator can be specifically used to determine the level output by the first output terminal PIN7, i.e., the first level, according to the amplitude of the voltage (i.e., the first voltage) input to the first input terminal PIN6 and the amplitude of the voltage (i.e., the second voltage) input to the second input terminal PIN5, by comparing the amplitudes of the first voltage and the second voltage. The amplitude of the first voltage can be specifically obtained according to the amplitude of the voltage signal obtained by dividing the first power supply signal by a voltage divider circuit and input to the second input terminal PIN5 of the comparator U1. The amplitude of the second voltage can be specifically obtained according to the target current signal and the resistance value of the first resistor R1.

[0054] The interlock circuit is connected to the comparator U1 and is also connected to the base of the first target transistor Q4.

[0055] The interlock circuit can be specifically used to determine the level of the base input to the first target transistor Q4, ie, the second level, according to whether the first level input to the comparator U1 is a high level or a low level.

[0056] The field effect transistor Q1 (for example, an NMOS transistor and a PMOS transistor, for example) can be determined according to whether the second level is a high level or a low level. Figure 2 , Q1 uses an NMOS tube) and the gate voltage is high or low, and then the intelligent detection device is judged whether it is open-circuited according to whether the gate voltage is high or low. When the intelligent detection device is open-circuited, the output port turns off the output, and it is determined that the output port is not connected to the load. When the circuit of the intelligent detection device continues to run (not open-circuited), the output port has output, and it is determined that the output port is connected to the load.

[0057] The intelligent detection device provided by the present invention obtains a second voltage signal by detecting a first voltage signal flowing through a first resistor based on a voltage detection module and dividing a first power supply signal based on a voltage divider circuit, and compares the amplitudes of the first voltage signal and the second voltage signal using a comparator to determine the level of the base of a transistor connected to the comparator. According to the level, the gate voltage of the field effect transistor connected to the transistor can be determined, and according to the gate voltage, it can be determined whether the circuit of the intelligent detection device is open, and thereby determine whether the output port turns off the output, thereby achieving the purpose of intelligent detection of whether the output port is connected to a load, and improving the accuracy of detecting whether the output port is connected to a load.

[0058] Furthermore, in one embodiment, the voltage detection module may specifically include:

[0059] an amplification module, connected to the first resistor, and used to amplify the detected current signal of the first resistor, wherein the current signal is determined according to a pulse width modulation signal input to the gate of the field effect transistor;

[0060] The rectifier module is connected to the amplification module and is used to adjust the amplified current signal to obtain a target current signal, and the first voltage signal is determined according to the target current signal.

[0061] Optionally, the voltage detection module may specifically consist of an amplification module and a rectification module.

[0062] The amplifying module is electrically connected to the first resistor R1 , and can be specifically used to amplify the current signal flowing through the first resistor R1 , and input the amplified current signal to the rectifier module connected thereto.

[0063] The source of the field effect transistor Q1 is electrically connected to the first resistor R1 and then connected to the ground terminal. The pulse width modulation signal is provided to the gate of the field effect transistor Q1 after passing through the resistor R18. The intelligent detection device starts to work. At this time, the current signal flowing through the first resistor R1 is detected by the amplification module.

[0064] The rectifier module can be specifically used to adjust the amplified current signal flowing through the first resistor R1 input by the amplifier module to obtain an adjusted current signal, that is, a target current signal. Since the target current signal is obtained by amplifying and adjusting the current signal flowing through the first resistor R1, it can effectively avoid the comparator's incorrect judgment on the amplitude of the first voltage and the second voltage due to the detected circuit signal of the first resistor R1 being too small, resulting in false detection of whether the output port is connected to a load.

[0065] The first voltage signal can be obtained according to the target current signal and the resistance value of the first resistor R1.

[0066] Furthermore, in one embodiment, the amplification module may specifically include:

[0067] A first amplifier, used to amplify the current signal of the first resistor;

[0068] The second amplifier is connected to the first amplifier and is used to amplify the amplified current signal of the first resistor input to the first amplifier again to obtain the target current signal.

[0069] Furthermore, in one embodiment, the amplification module may further specifically include:

[0070] an eleventh resistor, connected to the first amplifier and then grounded,

[0071] a twelfth resistor, connected to the first amplifier;

[0072] a thirteenth resistor, connected to the second amplifier and then grounded;

[0073] A fourteenth resistor is connected to the second amplifier.

[0074] Optionally, the amplification module adopts two-stage amplification to amplify the current signal flowing through the first resistor R1.

[0075] The amplification module may specifically include a first amplifier U2B and a second amplifier U2A, wherein the first amplifier U2B includes a third input terminal PIN5, a fourth input terminal PIN6, a second output terminal PIN7, a positive power terminal PIN8 and a negative power terminal PIN4, and the second amplifier U2A includes a sixth input terminal PIN2, a fifth input terminal PIN3 and a third output terminal PIN1.

[0076] The first resistor R1 is connected to the third input terminal PIN5 of the first amplifier U2B, the fourth input terminal PIN6 of the first amplifier U2B is connected to the eleventh resistor R2 and then grounded, the fourth input terminal PIN6 of the first amplifier U2B is connected to the twelfth resistor R5 and then connected to the second output terminal PIN7.

[0077] The second output terminal PIN7 of the first amplifier U2B is connected to the fifth input terminal PIN3 of the second amplifier U2A, the sixth input terminal PIN2 of the second amplifier U2A is connected to the thirteenth resistor R4 and then grounded, and the sixth input terminal PIN2 of the second amplifier U2A is connected to the fourteenth resistor R5 and then connected to the third output terminal PIN1 of the second amplifier U2A.

[0078] The first amplifier U2B can be specifically used to amplify the current signal of the first resistor R1 and input the amplified current signal to the second amplifier U2A.

[0079] The second amplifier U2A can be specifically used to amplify the amplified current signal of the first resistor input by the first amplifier U2B again, and the current signal after two amplifications is input to the rectifier module to obtain the target current signal.

[0080] Furthermore, in one embodiment, the rectifier module may specifically include:

[0081] A first branch, connected to the amplification module, includes a first capacitor, a second resistor and a first target diode, wherein the first capacitor is connected in series with the second resistor and then connected in parallel with the first target diode;

[0082] The second branch is connected to the first branch, and includes a second capacitor, a third resistor, a second target diode and a fourth resistor, the second target diode is connected in series with the third resistor, the second capacitor is connected in parallel with the fourth resistor, and the third resistor is connected in series with the fourth resistor.

[0083] Optionally, the rectifier module may specifically include a first branch and a second branch, the first branch may specifically include a first capacitor C1, a second resistor R6 and a first target diode D1, and the second branch may specifically include a second capacitor C2, a third resistor R7, a second target diode D2 and a fourth resistor R8.

[0084] The first capacitor C1 in the first branch is connected in series with the second resistor R6 and then connected in parallel with the first target diode D1 .

[0085] The second target diode D2 in the second branch is connected in series with the third resistor R7, the second capacitor C2 is connected in parallel with the fourth resistor R8, and the third resistor R7 is connected in series with the fourth resistor R8.

[0086] The first branch is connected to the amplifying module, and more specifically, is connected to the output terminal PIN1 of the second amplifier in the amplifying module.

[0087] Furthermore, in one embodiment, the voltage divider circuit may specifically include:

[0088] A first power supply module, used for providing the first power supply signal to the voltage divider circuit;

[0089] The voltage-dividing resistor is connected to the first power module and the comparator respectively, and is used to divide the first power signal to obtain the second voltage signal.

[0090] Optionally, the voltage divider circuit may specifically include a first power supply module and a voltage divider resistor (a first voltage divider resistor R10 and a second voltage divider resistor R9) connected in series with the first power supply module, the first voltage divider resistor R10 being connected to the second input terminal PIN5, and the second voltage divider resistor R9 being connected in series with the second resistor R11 and then connected to the first output terminal PIN7 of the comparator U1.

[0091] The first power supply module can be specifically configured to provide a first power supply signal (DC) for the voltage divider circuit.

[0092] The voltage-dividing resistor can be specifically used to divide the first power supply signal to obtain a second voltage signal.

[0093] The intelligent detection device provided by the present invention obtains the target current signal by performing two-stage amplification and rectification adjustment on the current signal flowing through the first resistor, thereby avoiding the situation in which the output port is misdetected as to whether the load is connected due to an error in the comparison of the amplitudes of the first voltage and the second voltage caused by the current flowing through the first resistor being too small, further improving the accuracy of detecting whether the output port is connected to the load, and being able to effectively avoid the problem of misdetection of whether the output port is connected to the load caused by the current signal flowing through the first resistor being too small.

[0094] Furthermore, in one embodiment, the comparator is further configured to: output a low level when it is determined that the amplitude of the first voltage signal is greater than the amplitude of the second voltage signal;

[0095] The interlock circuit is also used to: determine that the second level input to the base of the first target transistor is a low level based on the low level input by the comparator, and, when the second level is a low level, the gate voltage of the field effect transistor remains at a high level and the output port is connected to the load.

[0096] Optionally, the comparator U1 may be specifically configured to output a low level when it is determined that the amplitude of the first voltage signal is greater than the amplitude of the second voltage signal.

[0097] The interlock circuit can also be specifically used to determine that the second level input to the base of the first target transistor Q4 is a continuous low level according to the low level output by the comparator U1, and when the second level is a low level, the field effect transistor Q1 (such as Figure 2 The gate voltage of the NMOS tube in the circuit is maintained at a high level. At this time, the circuit of the intelligent detection device continues to operate, the output port has output, and it is determined that the output port is connected to a load.

[0098] Furthermore, in one embodiment, the comparator may be specifically used for:

[0099] When it is determined that the amplitude of the first voltage signal is smaller than the amplitude of the second voltage signal, outputting a high level;

[0100] The interlock circuit is also used to: determine that the second level input to the base of the first target transistor is a high level based on the high level input by the comparator, and, when the second level is a high level, the gate voltage of the field effect transistor is pulled from a high level to a low level, and the output port is not connected to the load.

[0101] Optionally, the comparator U1 may be specifically configured to output a high level when it is determined that the amplitude of the first voltage signal is smaller than the amplitude of the second voltage.

[0102] Correspondingly, the interlock circuit can also be specifically used to determine that the second level input to the base of the first target transistor Q4 is a continuous high level based on the high level output by the comparator U1. When the second level is a high level, the gate voltage of the NMOS tube is pulled from a high level to a low level. At this time, the intelligent detection device is opened, the output port turns off the output, and it is determined that the output port is not connected to the load.

[0103] Furthermore, in one embodiment, the interlock circuit may specifically include:

[0104] a third branch, comprising a third target diode, a second target transistor, a fifth resistor, a sixth resistor, a seventh resistor and an eighth resistor, wherein the third target diode is connected to the comparator, the fifth resistor is respectively connected to the collector of the third target diode and the second target transistor, the sixth resistor is respectively connected to the fifth resistor and the base of the second target transistor, the seventh resistor is connected to the emitter of the second target transistor, and the eighth resistor is connected to the collector of the second target transistor;

[0105] The fourth branch is connected to the third branch, and includes a fourth target diode, a third target transistor, a ninth resistor and a tenth resistor. The ninth resistor is respectively connected to the collector of the second target transistor and the base of the third target transistor, the tenth resistor is respectively connected to the emitter of the second target transistor and the emitter of the third target transistor, the collector of the third target transistor is connected to the eighth resistor, and the fourth target diode is respectively connected to the emitter of the third target transistor and the base of the first target transistor.

[0106] Optionally, the interlocking circuit may be specifically composed of a third branch and a fourth branch, wherein the third branch and the fourth branch are electrically connected.

[0107] The third branch may specifically include a third target diode D3, a second target transistor Q2, a fifth resistor R12, a sixth resistor R13, a seventh resistor R14 and an eighth resistor R15.

[0108] The fourth branch may specifically include a fourth target diode D4, a ninth resistor R16, a tenth resistor R17 and a third target transistor Q3.

[0109] Among them, the third target diode D3 is connected to the first output terminal PIN7 of the comparator U1, the third target diode D3 is connected to the fifth resistor R12, the fifth resistor R12 is connected to the ninth resistor R16 and then connected to the base of the third target transistor Q3, the fifth resistor R12 is connected to the eighth resistor R15 and then connected to the collector of the third target transistor Q3 and the positive power supply terminal PIN8 of the comparator U1, the fifth resistor R12 and the eighth resistor R15 are both connected to the collector of the second target transistor Q2, the third target diode Q2 is connected to the sixth resistor R13 and then connected to the base of the second target transistor Q2, the third target diode Q3 is connected to the seventh resistor R14 and then connected to the emitter of the second target transistor Q2, the emitter of the second target transistor Q2 is connected to the tenth resistor R17 and then connected to the emitter of the third target transistor Q3, and the fourth target diode D4 is respectively connected to the emitter of the third target transistor Q3 and the base of the first target transistor Q4.

[0110] Furthermore, in one embodiment, the intelligent detection device may further specifically include:

[0111] The second power supply module, connected to the positive power supply terminal of the comparator, is used to provide a second power supply signal for the comparator.

[0112] Optionally, the intelligent detection device may further specifically include a second power supply module, which is connected to the positive power supply terminal PIN8 of the comparator U1 and is used to provide a power supply signal, ie, a second power supply signal, for the comparator U1.

[0113] The intelligent detection device provided by the present invention does not need to use NFC or other methods of adjustment, and will perform an output port detection every time the AC power is turned on. If a load is connected to the output port and the amplitude of the first voltage is greater than the amplitude of the second voltage, the output port has an output; if no load is connected to the output port or the amplitude of the first voltage is less than the amplitude of the second voltage, the output port turns off the output and locks the output port. After turning off the AC power and turning it on again, the connected load status of the output port will be re-detected, so as to achieve the purpose of detecting whether the output port of the intelligent detection device is connected to the load, and improve the accuracy of detecting whether the output port is connected to the load.

[0114] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit it. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or make equivalent replacements for some of the technical features therein. However, these modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims

1. An intelligent detection device, characterized in that: include: Output port, used to connect the load; A voltage detection module, connected to the first resistor, and configured to detect a first voltage signal of the first resistor; A voltage divider circuit, used for dividing the first power supply signal to obtain a second voltage signal; a comparator, connected to the voltage detection module and the voltage divider circuit respectively, for comparing the amplitude of the first voltage signal with the amplitude of the second voltage signal, and outputting a first level; an interlock circuit connected to the comparator and the base of the first target transistor, and used to determine a second level input to the base of the first target transistor according to the first level, wherein the second level is used to determine a gate voltage of the field effect transistor, and the gate voltage is used to determine whether the output port is connected to the load; The gate of the field effect tube is connected to the collector of the first target transistor, the drain of the field effect tube is connected to the output port, and the source of the field effect tube is connected to the first resistor.

2. The intelligent detection device according to claim 1, characterized in that: The voltage detection module comprises: an amplification module, connected to the first resistor, and used to amplify the detected current signal of the first resistor, wherein the current signal is determined according to a pulse width modulation signal input to the gate of the field effect transistor; The rectifier module is connected to the amplification module and is used to adjust the amplified current signal to obtain a target current signal, and the first voltage signal is determined according to the target current signal.

3. The intelligent detection device according to claim 2, characterized in that: The amplification module comprises: A first amplifier, used to amplify the current signal of the first resistor; The second amplifier is connected to the first amplifier and is used to amplify the amplified current signal of the first resistor input to the first amplifier again to obtain the target current signal.

4. The intelligent detection device according to claim 2 or 3, characterized in that: The rectifier module comprises: A first branch, connected to the amplification module, includes a first capacitor, a second resistor and a first target diode, wherein the first capacitor is connected in series with the second resistor and then connected in parallel with the first target diode; The second branch is connected to the first branch, and includes a second capacitor, a third resistor, a second target diode and a fourth resistor, the second target diode is connected in series with the third resistor, the second capacitor is connected in parallel with the fourth resistor, and the third resistor is connected in series with the fourth resistor.

5. The intelligent detection device according to claim 1, characterized in that: The voltage divider circuit comprises: A first power supply module, used for providing the first power supply signal to the voltage divider circuit; The voltage-dividing resistor is connected to the first power module and the comparator respectively, and is used to divide the first power signal to obtain the second voltage signal.

6. The intelligent detection device according to claim 1, characterized in that: The comparator is further configured to: output a low level when determining that the amplitude of the first voltage signal is greater than the amplitude of the second voltage signal; The interlock circuit is also used to: determine that the second level input to the base of the first target transistor is a low level based on the low level input by the comparator, and, when the second level is a low level, the gate voltage of the field effect transistor remains at a high level and the output port is connected to the load.

7. The intelligent detection device according to claim 6, characterized in that: The comparator is further configured to: output a high level when it is determined that the amplitude of the first voltage signal is smaller than the amplitude of the second voltage signal; The interlock circuit is also used to: determine that the second level input to the base of the first target transistor is a high level based on the high level input by the comparator, and, when the second level is a high level, the gate voltage of the field effect transistor is pulled from a high level to a low level, and the output port is not connected to the load.

8. The intelligent detection device according to claim 1, 6 or 7, characterized in that: The interlock circuit comprises: a third branch, comprising a third target diode, a second target transistor, a fifth resistor, a sixth resistor, a seventh resistor and an eighth resistor, wherein the third target diode is connected to the comparator, the fifth resistor is respectively connected to the collector of the third target diode and the second target transistor, the sixth resistor is respectively connected to the fifth resistor and the base of the second target transistor, the seventh resistor is connected to the emitter of the second target transistor, and the eighth resistor is connected to the collector of the second target transistor; The fourth branch is connected to the third branch, and includes a fourth target diode, a third target transistor, a ninth resistor and a tenth resistor. The ninth resistor is respectively connected to the collector of the second target transistor and the base of the third target transistor, the tenth resistor is respectively connected to the emitter of the second target transistor and the emitter of the third target transistor, the collector of the third target transistor is connected to the eighth resistor, and the fourth target diode is respectively connected to the emitter of the third target transistor and the base of the first target transistor.

9. The intelligent detection device according to claim 3, characterized in that: The amplification module also includes: an eleventh resistor, connected to the first amplifier and then grounded, a twelfth resistor, connected to the first amplifier; a thirteenth resistor, connected to the second amplifier and then grounded; A fourteenth resistor is connected to the second amplifier.

10. The intelligent detection device according to claim 1, 2, 3, 5, 6 or 7, characterized in that: The intelligent detection device also includes: The second power supply module is connected to the comparator and is used to provide a second power supply signal for the comparator.

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