Circuit board via hole simulation modeling simplification method compatible with electromagnetic and thermal characteristics

Abstract

The embodiment of the invention discloses a circuit board via hole simulation modeling simplification method compatible with electromagnetic and thermal characteristics. The method comprises the following steps: in response to a target test instruction of a target circuit board, obtaining first attribute information of each via hole structure of the target circuit board; determining whether the target via hole structure meets a model simplification condition or not according to the first attribute information; if it is determined that the target via hole structure meets the model simplification condition, determining second attribute information of the target via hole structure according to the first attribute information of the target via hole structure; and determining a simplified via hole model matched with the target via hole structure according to the second attribute information, and connecting the simplified via hole model with a circuit board layer model of the target circuit board to obtain a target circuit board model to be subjected to target testing. According to the scheme of the embodiment of the invention, the via hole model of the circuit board can be simplified, the test efficiency of the circuit board is improved, and a basis is provided for improving the development efficiency of the circuit board and shortening the development period.

Description

Technical Field

[0001] The invention relates to the technical field of circuit board development, and in particular to a simplified method for circuit board via simulation modeling compatible with electromagnetic and thermal characteristics. Background Art

[0002] Vias are also called metalized holes. In double-sided and multi-layer circuit boards, in order to connect the printed wires between the layers, a common hole is drilled at the intersection of the wires that need to be connected in each layer. Vias can be not only through holes, but also buried ones.

[0003] At present, in the development process of circuit boards, it is necessary to perform electromagnetic simulation tests on the circuit boards. Before the electromagnetic simulation tests, the stacking structure of the circuit board and each via need to be modeled. Usually, the modeling is performed directly based on the stacking structure of the circuit board and the physical form of each via. For example, the stacking structure of the circuit board is modeled as a cube, and the via is modeled as a cylinder. However, in the simulation process, complex models such as cylinders with curved boundaries require complex calculations such as finite element analysis, which results in low test efficiency and occupies a large amount of computing resources.

[0004] How to simplify the via model, improve the testing efficiency of the circuit board, and further improve the development efficiency of the circuit board is the main research issue in the industry. Summary of the invention

[0005] The present invention provides a simplified method for circuit board via simulation modeling that is compatible with electromagnetic and thermal characteristics, so as to simplify the via model of the circuit board, improve the testing efficiency of the circuit board, and provide a basis for improving the development efficiency of the circuit board and shortening the development cycle.

[0006] According to one aspect of the present invention, a method for simplifying a circuit board via model is provided, the method comprising:

[0007] In response to a target test instruction of a target circuit board, obtaining first attribute information of each via structure of the target circuit board;

[0008] Determining whether the target via structure meets the model simplification condition according to the first attribute information;

[0009] If it is determined that the target via structure satisfies the model simplification condition, determining second attribute information of the target via structure according to the first attribute information of the target via structure;

[0010] A simplified via model matching the target via structure is determined according to the second attribute information, and the simplified via model is connected with the circuit board layer model of the target circuit board to obtain a target circuit board model to be subjected to target testing.

[0011] According to another aspect of the present invention, a simplified device for a circuit board via model is provided, the device comprising:

[0012] An acquisition module, configured to acquire first attribute information of each via structure of the target circuit board in response to a target test instruction of the target circuit board;

[0013] A first determination module, used to determine whether the target via structure meets the model simplification condition according to the first attribute information;

[0014] A second determination module is used to determine second attribute information of the target via structure according to the first attribute information of the target via structure if it is determined that the target via structure meets the model simplification condition;

[0015] A simplified via model determination module is used to determine a simplified via model matching the target via structure according to the second attribute information, and connect the simplified via model with the circuit board layer model of the target circuit board to obtain a target circuit board model to be tested.

[0016] According to another aspect of the present invention, there is provided an electronic device, the electronic device comprising:

[0017] at least one processor; and

[0018] a memory communicatively connected to the at least one processor; wherein,

[0019] The memory stores a computer program executable by the at least one processor, and the computer program is executed by the at least one processor so that the at least one processor can execute the method for simplifying the circuit board via model described in any embodiment of the present invention.

[0020] According to another aspect of the present invention, a computer-readable storage medium is provided, wherein the computer-readable storage medium stores computer instructions, wherein the computer instructions are used to enable a processor to implement the method for simplifying a circuit board via model as described in any embodiment of the present invention when executed.

[0021] According to another aspect of the present invention, a computer program product is provided, comprising a computer program, wherein when the computer program is executed by a processor, the method for simplifying a circuit board via model as described in any embodiment of the present invention is implemented.

[0022] The technical solution of the embodiment of the present invention obtains the first attribute information of each via structure of the target circuit board in response to the target test instruction of the target circuit board; determines whether the target via structure meets the model simplification condition according to the first attribute information; if it is determined that the target via structure meets the model simplification condition, determines the second attribute information of the target via structure according to the first attribute information of the target via structure; determines a simplified via model matching the target via structure according to the second attribute information, and connects the simplified via model with the circuit board layer model of the target circuit board to obtain the target circuit board model to be tested, which can simplify the via model of the circuit board, improve the test efficiency of the circuit board, and provide a basis for improving the development efficiency of the circuit board and shortening the development cycle.

[0023] It should be understood that the contents described in this section are not intended to identify the key or important features of the embodiments of the present invention, nor are they intended to limit the scope of the present invention. Other features of the present invention will become easily understood through the following description. BRIEF DESCRIPTION OF THE DRAWINGS

[0024] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0025] Figure 1 is a flow chart of a method for simplifying a circuit board via model provided according to Embodiment 1 of the present invention;

[0026] Figure 2 is a flow chart of a simplified method for a circuit board via model provided according to Embodiment 2 of the present invention;

[0027] Figure 3 is a flow chart of another method for simplifying a circuit board via model provided according to the second embodiment of the present invention;

[0028] Figure 4 is a schematic structural diagram of a simplified device of a circuit board via model provided according to Embodiment 3 of the present invention;

[0029] Figure 5 It is a structural schematic diagram of an electronic device for implementing the simplified method of the circuit board via model according to an embodiment of the present invention. DETAILED DESCRIPTION

[0030] In order to enable those skilled in the art to better understand the scheme of the present invention, the technical scheme in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work should fall within the scope of protection of the present invention.

[0031] It should be noted that the terms "first", "second", etc. in the specification and claims of the present invention and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence. It should be understood that the data used in this way can be interchanged where appropriate, so that the embodiments of the present invention described herein can be implemented in an order other than those illustrated or described herein. In addition, the terms "including" and "having" and any variations thereof are intended to cover non-exclusive inclusions, for example, a process, method, system, product or device that includes a series of steps or units is not necessarily limited to those steps or units that are clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products or devices.

[0032] It should also be mentioned before discussing the exemplary embodiments in more detail that some exemplary embodiments are described as processes or methods depicted as flow charts. Although the flow charts describe the operations (or steps) as sequential processes, many of the operations therein can be implemented in parallel, concurrently or simultaneously. In addition, the order of the operations can be rearranged. The process can be terminated when its operation is completed, but can also have additional steps not included in the accompanying drawings. The process can correspond to a method, function, procedure, subroutine, subprogram, etc.

[0033] Embodiment 1

[0034] Figure 1 This is a flow chart of a method for simplifying a via model of a circuit board according to the first embodiment of the present invention. This embodiment is applicable to simplifying a via model in a circuit board when performing electromagnetic simulation testing on the circuit board. The method can be performed by a simplified device for a via model of a circuit board. The simplified device for a via model of a circuit board can be implemented in the form of hardware and / or software. The simplified device for a via model of a circuit board can be configured in an electronic device such as a computer, a server or a tablet computer. Figure 1 As shown, the method includes:

[0035] Step 110: In response to a target test instruction of a target circuit board, first attribute information of each via structure of the target circuit board is obtained.

[0036] The target circuit board can be any development circuit board, for example, a development circuit board for any electronic device, any single-chip microcomputer development board, etc. The target test instruction can be an electromagnetic simulation test instruction, or a thermal characteristic test instruction of a circuit board, which is not limited in this embodiment. It is understandable that the target circuit board can include multiple via structures, for example, 10, 50 or 100, etc., which is not limited in this embodiment.

[0037] It can be understood that the via structure is not a solid structure, and its cross section along the horizontal direction can be a circular ring.

[0038] In an optional implementation of this embodiment, after receiving the target test instruction for the target circuit board, each via structure of the target circuit board may be further determined, and first attribute information of each via structure may be acquired.

[0039] In this embodiment, the first attribute information of the via structure may include the length of the outer diameter, the length of the inner diameter, the outer circumference or the inner circumference of the via structure, etc., which is not limited in this embodiment.

[0040] Optionally, in this embodiment, after receiving an electromagnetic simulation test instruction for a target circuit board, the circuit structure of the target circuit board can be obtained, the via structures of the target circuit board can be determined, and the outer radius length and inner radius length of each via structure can be determined, or the outer circumference and inner circumference of each via structure can be obtained.

[0041] In an optional implementation of the present embodiment, obtaining the first attribute information of each via structure of the target circuit board may include: obtaining a circuit diagram of the target circuit board and identifying each via structure in the circuit diagram; and measuring the inner radius and / or outer radius of each via structure respectively to obtain the first attribute information of each via structure.

[0042] Optionally, in this embodiment, after receiving the target test instruction of the target circuit board, the circuit diagram of the target circuit board can be further obtained. For example, the circuit diagram file of the target circuit board can be obtained, and each via structure of the target circuit board can be identified in the circuit diagram file; further, the length of the inner radius and the length of the outer radius of each via structure can be measured to obtain the first attribute information of each via structure.

[0043] In another optional implementation of the present embodiment, after identifying each via structure of the target circuit board, the inner circumference and outer circumference of each via structure can be further measured, and the inner radius of the target via structure can be determined based on the inner circumference of the target via structure, and the outer radius of the target via structure can be determined based on the outer circumference of the target via structure, thereby obtaining the first attribute information of each via structure.

[0044] Step 120: Determine whether the target via structure meets the model simplification condition according to the first attribute information.

[0045] In an optional implementation of this embodiment, after the first attribute information of each via structure of the target circuit board is obtained, it can be further determined whether the target via structure meets the model simplification condition based on the obtained first attribute information of the target via structure.

[0046] The target via structure may be any via structure among the via structures of the target circuit board, which is not limited in this embodiment.

[0047] Optionally, in this embodiment, test conditions that match the target test instructions can be obtained. For example, if the target test is an electromagnetic simulation test, the frequency of the electromagnetic wave tested in the electromagnetic simulation test can be obtained. Furthermore, based on the relationship between the first attribute information and the frequency of the electromagnetic wave, it can be determined whether the target via structure meets the model simplification condition.

[0048] Step 130: If it is determined that the target via structure meets the model simplification condition, determine the second attribute information of the target via structure according to the first attribute information of the target via structure.

[0049] In an optional implementation of this embodiment, if it is determined that the target via structure meets the model simplification condition, the second attribute information of the target via structure may be further determined according to the first attribute information of the target via structure.

[0050] In this embodiment, the second attribute information of the target via structure may be the area of ​​a cross section of the target via structure along a horizontal direction.

[0051] Optionally, in this embodiment, the area of ​​the cross-section of the target via structure along the horizontal direction can be determined based on the inner radius and the outer radius in the first attribute information of the target via structure, and the area can be determined as the second attribute information; exemplarily, if the calculated area of ​​the cross-section of the target via structure along the horizontal direction is 0.1 square centimeters, 0.1 square centimeters can be determined as the second attribute information.

[0052] In another optional implementation of this embodiment, if it is determined that the target via structure does not meet the model simplification condition, the model of the target via structure may not be simplified, and other via structures in the target circuit board may continue to be processed.

[0053] Step 140: determine a simplified via model matching the target via structure according to the second attribute information, and connect the simplified via model with the circuit board layer model of the target circuit board to obtain a target circuit board model to be tested.

[0054] In this embodiment, after determining the second attribute information of the target via structure based on the first attribute information of the target via structure, a simplified via model matching the target via structure can be further determined based on the second attribute information; further, the simplified via model can be connected to the circuit board layer model of the target circuit board to obtain the target circuit board model to be tested.

[0055] In an optional implementation of the present embodiment, after determining the second attribute information of the target via structure based on the first attribute information of the target via structure, that is, obtaining the area of ​​the cross section of the target via structure along the horizontal direction, the area of ​​the cross section of the simplified via structure can be determined based on the area of ​​the cross section, and further, the side length of the simplified via structure can be determined based on the area of ​​the cross section of the simplified via structure.

[0056] Exemplarily, if the cross-section of the simplified via structure is a regular hexagon, then the area of ​​the cross-section of the target via structure can be determined as the area of ​​the regular hexagon, and the side length of the regular hexagon can be determined based on the relationship between the area and the side length of the regular hexagon; if the cross-section of the simplified via structure is a regular octagon, then the area of ​​the cross-section of the target via structure can be determined as the area of ​​the regular octagon, and the side length of the regular octagon can be determined based on the relationship between the area and the side length of the regular octagon.

[0057] Furthermore, the simplified via model may be connected to a circuit board layer model of a target circuit board, thereby obtaining a target circuit board model to be subjected to a target test.

[0058] The technical solution of this embodiment obtains the first attribute information of each via structure of the target circuit board in response to the target test instruction of the target circuit board; determines whether the target via structure meets the model simplification condition according to the first attribute information; if it is determined that the target via structure meets the model simplification condition, determines the second attribute information of the target via structure according to the first attribute information of the target via structure; determines a simplified via model matching the target via structure according to the second attribute information, and connects the simplified via model with the circuit board layer model of the target circuit board to obtain the target circuit board model to be tested, which can simplify the via model of the circuit board, improve the testing efficiency of the circuit board, and provide a basis for improving the development efficiency of the circuit board and shortening the development cycle.

[0059] Embodiment 2

[0060] Figure 2 1 is a flow chart of a simplified method for a circuit board via model provided according to the second embodiment of the present invention. This embodiment is a further refinement of the above technical solution. The technical solution in this embodiment can be combined with various optional solutions in one or more of the above embodiments. Figure 2 As shown, the method includes:

[0061] Step 210: In response to a target test instruction of a target circuit board, first attribute information of each via structure of the target circuit board is obtained.

[0062] Step 220: Determine a test condition that matches the target test instruction, and determine whether the target via structure satisfies a model simplification condition based on the test condition and the first attribute information.

[0063] Exemplarily, if the target test instruction is to perform an electromagnetic simulation test on the target circuit board, then the test conditions matching the target test instruction may be the target frequencies of the electromagnetic waves during the test process.

[0064] In this embodiment, after receiving the target test instructions for the target circuit board, the target test instructions can be further parsed to determine the test conditions. Furthermore, it can be determined whether the target via structure meets the model simplification conditions based on the test conditions and the first attribute information of the target via structure.

[0065] Optionally, in this embodiment, determining the test conditions that match the target test instructions, and determining whether the target via structure meets the model simplification conditions based on the test conditions and the first attribute information, may include: parsing the target test instructions to determine the test conditions that match the circuit board; the test conditions include: at least one target frequency of the electromagnetic wave in the electromagnetic simulation test; determining the wavelength of the electromagnetic wave that matches the target frequency; and determining that the target via structure meets the model simplification conditions when the first attribute information and the wavelength of the electromagnetic wave meet preset conditions.

[0066] Among them, the preset condition may be that the outer radius of the target via structure is less than or equal to a set threshold times the wavelength. For example, the set threshold may be 1 / 20, or 1 / 30 or other values ​​less than 1, which is not limited in this embodiment.

[0067] In a specific example of this embodiment, the preset condition can be Wherein, R is the outer radius of the target via structure, and λ is the wavelength of the electromagnetic wave.

[0068] In an optional implementation of this embodiment, after receiving the target test instruction for the target circuit board, the target test instruction can be further parsed to obtain the target frequency of the electromagnetic wave in the electromagnetic simulation test; further, the wavelength of the electromagnetic wave can be determined according to the relationship between the frequency and the wavelength; further, it can be determined whether the outer radius of the target via structure and the wavelength of the electromagnetic wave meet the above-mentioned preset conditions, and if so, It can be determined that the target via structure meets the model simplification conditions.

[0069] Step 230: If it is determined that the target via structure meets the model simplification condition, determine the second attribute information of the target via structure according to the first attribute information of the target via structure.

[0070] In an optional implementation of this embodiment, when it is determined that the target via structure meets the model simplification condition, the second attribute information of the target via structure may be further determined according to the first attribute information of the target via structure.

[0071] Optionally, in this embodiment, determining the second attribute information of the target via structure based on the first attribute information of the target via structure may include: determining the cross-sectional area of ​​the target via structure based on the inner radius and the outer radius in the first attribute information; and determining the cross-sectional area as the second attribute information of the target via structure.

[0072] The cross-sectional area of ​​the target via structure is the cross-sectional area of ​​the target via structure along the horizontal direction. It can be understood that the cross-sectional area of ​​the target via structure along the horizontal direction is a circular ring structure.

[0073] In a specific example of this embodiment, the cross-sectional area of ​​the target via structure can be determined according to the following formula: A = πR 2 -πr 2 , where A is the cross-sectional area of ​​the target via structure, R is the outer radius of the target via structure, and r is the inner radius of the target via structure.

[0074] Step 240, determine the cross-sectional area of ​​the target via structure as the target cross-sectional area of ​​the simplified target structure; determine the test accuracy that matches the target test instruction, and determine the number of sides of the target structure according to the test accuracy; determine the side length of the target structure according to the target cross-sectional area and the number of sides of the target structure, and determine the simplified via model according to each side length.

[0075] In an optional implementation of the present embodiment, after determining the second attribute information of the target via structure based on the first attribute information of the target via structure, that is, after determining the cross-sectional area of ​​the target via structure, the cross-sectional area of ​​the target via structure can be determined as the target cross-sectional area of ​​the simplified target structure.

[0076] Furthermore, the test accuracy that matches the target test instruction can be determined; illustratively, the target test instruction can be parsed to determine the test accuracy, and further, the number of edges of the target structure can be determined based on the relationship between the test accuracy and the number of edges of the target structure; wherein the test accuracy can be 85%, 90%, or 96%, etc., which is not limited in this embodiment.

[0077] It should be noted that, in the present embodiment, the test accuracy is associated with the number of edges of the target structure; the higher the test accuracy, the more edges the target structure has; illustratively, if the test accuracy is 85%-90%, the number of edges of the target structure can be 4; if the test accuracy is 90%-93%, the number of edges of the target structure can be 6; if the test accuracy is 93%-95%, the number of edges of the target structure can be 8; if the test accuracy is greater than or equal to 95%, the number of edges of the target structure can be infinite, that is, the target via structure model cannot be simplified at this time, that is, the simplified target via structure model is still a cylinder.

[0078] Furthermore, the side length of the target structure can be determined according to the area of ​​the target cross section and the number of sides of the target structure, and a simplified via model can be obtained according to each side length.

[0079] For example, in this embodiment, if the number of sides of the target structure is determined to be 4 according to the test accuracy, and the area of ​​the target cross section is A, then according to d 2 =A determines the side length of the target structure, where d is the side length of the target structure; if the number of sides of the target structure is determined to be 4 (i.e., the target structure is a square) according to the test accuracy, and the area of ​​the target cross section is A, then d can be used to determine the side length of the target structure. 2 =A determines the side length of the target structure, where d is the side length of the target structure; if the number of sides of the target structure is determined to be 6 (i.e., the target structure is a regular hexagon) according to the test accuracy, and the area of ​​the target cross section is A, then (2 / 3)√3d 2 =A determines the side length of the target structure, where d is the side length of the target structure.

[0080] Optionally, in this embodiment, after obtaining the side length of the target structure, the target structure is determined, that is, a simplified via model matching the target via structure is determined; in this embodiment, the complex cylindrical model is simplified into a simple regular polygon model.

[0081] Step 250: Connect the simplified via model with the circuit board layer model of the target circuit board to obtain a target circuit board model to be subjected to target testing.

[0082] Step 260: perform preset processing on the target circuit board model, and perform target testing on the target circuit board model after the preset processing.

[0083] The preset processing includes at least one of the following: adding radiation space, boundary conditions, excitation, analysis settings and parameter optimization.

[0084] In an optional implementation of the present embodiment, after the simplified via model is connected to the circuit board layer model of the target circuit board to obtain the target circuit board model to be subjected to target testing, the target circuit model can be further subjected to preset processing such as adding radiation space, boundary conditions, excitation, analysis settings, and parameter optimization, and after the preset processing is completed, the target circuit board can be subjected to target testing.

[0085] The scheme of this embodiment, after determining the second attribute information of the target via structure according to the first attribute information of the target via structure, that is, after determining the area of ​​the cross section of the target via structure, the area of ​​the cross section of the target via structure can be further determined as the area of ​​the target cross section of the simplified target structure; the test accuracy matching the target test instruction is determined, and the number of sides of the target structure is determined according to the test accuracy; the side length of the target structure is determined according to the area of ​​the target cross section and the number of sides of the target structure, and the simplified via model is determined according to each of the side lengths, so that the via model of the target via structure can be quickly simplified, thereby improving the testing efficiency of the circuit board and providing a basis for improving the development efficiency of the circuit board and shortening the development cycle.

[0086] In order to better understand the simplified method of a circuit board via model involved in this embodiment, Figure 3 FIG. 1 is a flow chart of another simplified method of a circuit board via model provided according to Embodiment 2 of the present invention. Figure 3 As shown, it mainly includes:

[0087] start.

[0088] Step 310: Obtain the frequency of electromagnetic simulation.

[0089] Step 320: Calculate the wavelength based on the relationship between wavelength and frequency.

[0090] Exemplarily, the wavelength λ may be calculated according to λ=u / f, where f is the frequency of the electromagnetic simulation.

[0091] Step 330, determining whether the wavelength meets a preset condition;

[0092] The preset conditions can be Wherein, R is the outer radius of the target via structure.

[0093] If yes, execute step 340;

[0094] Otherwise, end.

[0095] Step 340, calculating the cross-sectional area of ​​the target via structure;

[0096] For example, it can be based on the formula A=πR 2 -πr 2 The area of ​​the cross section of the target via structure is calculated, where R is the outer radius of the target via structure and r is the inner radius of the target via structure.

[0097] Step 350: The cross-sectional area of ​​the simplified cuboid is equal to the cross-sectional area of ​​the target via structure.

[0098] Step 360: Calculate the side length of the cross section of the cuboid.

[0099] Step 370: Perform simulation test.

[0100] Finish.

[0101] The solution of this embodiment determines whether the via model can be simplified without affecting the electromagnetic simulation results based on the simulation frequency and the outer radius of the via structure. If it can be simplified, an algorithm that takes into account the electromagnetic and thermal characteristics of the circuit board via is used to simplify the cylindrical model of the via into a rectangular model with the same side area and height, and then simulation calculations are performed, thereby improving the simulation verification efficiency and providing a basis for improving the development efficiency of circuit boards and shortening the development cycle.

[0102] Embodiment 3

[0103] Figure 4 Schematic diagram of a simplified device of a circuit board via model according to Embodiment 3 of the present invention. Figure 4 As shown, the device includes: an acquisition module 410 , a first determination module 420 , a second determination module 430 and a simplified via model determination module 440 .

[0104] The acquisition module 410 is used to acquire first attribute information of each via structure of the target circuit board in response to a target test instruction of the target circuit board;

[0105] A first determination module 420, configured to determine whether a target via structure satisfies a model simplification condition according to the first attribute information;

[0106] A second determination module 430 is configured to determine second attribute information of the target via structure according to the first attribute information of the target via structure if it is determined that the target via structure satisfies the model simplification condition;

[0107] The simplified via model determination module 440 is used to determine a simplified via model matching the target via structure according to the second attribute information, and connect the simplified via model with the circuit board layer model of the target circuit board to obtain the target circuit board model to be tested.

[0108] The solution of this embodiment is to obtain the first attribute information of each via structure of the target circuit board in response to the target test instruction of the target circuit board through the acquisition module; determine whether the target via structure meets the model simplification condition according to the first attribute information through the first determination module; determine the second attribute information of the target via structure according to the first attribute information of the target via structure through the second determination module; determine the simplified via model matching the target via structure according to the second attribute information through the simplified via model determination module, and connect the simplified via model with the circuit board layer model of the target circuit board to obtain the target circuit board model to be tested, which can simplify the via model of the circuit board, improve the test efficiency of the circuit board, and provide a basis for improving the development efficiency of the circuit board and shortening the development cycle.

[0109] In an optional implementation of this embodiment, the first attribute information includes: an inner radius and / or an outer radius;

[0110] Accordingly, the acquisition module 410 is specifically used to acquire the circuit diagram of the target circuit board and identify each via structure in the circuit diagram;

[0111] The inner radius and / or the outer radius of each of the via structures are measured respectively to obtain the first attribute information of each of the via structures.

[0112] In an optional implementation of this embodiment, the first determination module 420 is specifically used to determine the test conditions that match the target test instruction, and determine whether the target via structure meets the model simplification condition based on the test conditions and the first attribute information.

[0113] In an optional implementation of this embodiment, the first determination module 420 is specifically used to parse the target test instruction to determine the test conditions matching the circuit board; the test conditions include: at least one target frequency of the electromagnetic wave in the electromagnetic simulation test;

[0114] determining a wavelength of an electromagnetic wave that matches the target frequency;

[0115] When the first attribute information and the wavelength of the electromagnetic wave satisfy a preset condition, it is determined that the target via structure satisfies a model simplification condition.

[0116] In an optional implementation of this embodiment, the second attribute information is the area of ​​the cross section of the via structure;

[0117] Correspondingly, the second determination module 430 is specifically configured to determine the cross-sectional area of ​​the target via structure according to the inner radius and the outer radius in the first attribute information;

[0118] The area of ​​the cross section is determined as second attribute information of the target via structure.

[0119] In an optional implementation of this embodiment, the simplified via model determination module 440 is specifically configured to determine the area of ​​the cross section of the target via structure as the area of ​​the target cross section of the simplified target structure;

[0120] Determine a test accuracy that matches the target test instruction, and determine the number of edges of the target structure according to the test accuracy;

[0121] The side length of the target structure is determined according to the area of ​​the target cross section and the number of sides of the target structure, and the simplified via model is determined according to each of the side lengths.

[0122] In an optional implementation of this embodiment, the simplified device for a circuit board via model further includes: a preset processing module, configured to perform preset processing on the target circuit board model, and perform a target test on the target circuit board model after the preset processing;

[0123] The preset processing includes at least one of the following:

[0124] Add radiation spaces, boundary conditions, excitations, analysis settings, and parameter optimization.

[0125] The simplified device for a circuit board via model provided in an embodiment of the present invention can execute the simplified method for a circuit board via model provided in any embodiment of the present invention, and has the corresponding functional modules and beneficial effects of the execution method.

[0126] Embodiment 4

[0127] Figure 5A schematic diagram of the structure of an electronic device 10 that can be used to implement an embodiment of the present invention is shown. The electronic device is intended to represent various forms of digital computers, such as laptop computers, desktop computers, workstations, personal digital assistants, servers, blade servers, mainframe computers, and other suitable computers. The electronic device can also represent various forms of mobile devices, such as personal digital processing, cellular phones, smart phones, wearable devices (such as helmets, glasses, watches, etc.) and other similar computing devices. The components shown herein, their connections and relationships, and their functions are merely examples and are not intended to limit the implementation of the present invention described and / or required herein.

[0128] like Figure 5 As shown, the electronic device 10 includes at least one processor 11, and a memory connected to the at least one processor 11, such as a read-only memory (ROM) 12, a random access memory (RAM) 13, etc., wherein the memory stores a computer program that can be executed by at least one processor, and the processor 11 can perform various appropriate actions and processes according to the computer program stored in the read-only memory (ROM) 12 or the computer program loaded from the storage unit 18 to the random access memory (RAM) 13. In the RAM 13, various programs and data required for the operation of the electronic device 10 can also be stored. The processor 11, the ROM 12, and the RAM 13 are connected to each other through a bus 14. An input / output (I / O) interface 15 is also connected to the bus 14.

[0129] A number of components in the electronic device 10 are connected to the I / O interface 15, including: an input unit 16, such as a keyboard, a mouse, etc.; an output unit 17, such as various types of displays, speakers, etc.; a storage unit 18, such as a disk, an optical disk, etc.; and a communication unit 19, such as a network card, a modem, a wireless communication transceiver, etc. The communication unit 19 allows the electronic device 10 to exchange information / data with other devices through a computer network such as the Internet and / or various telecommunication networks.

[0130] The processor 11 may be a variety of general and / or special processing components with processing and computing capabilities. Some examples of the processor 11 include, but are not limited to, a central processing unit (CPU), a graphics processing unit (GPU), various special artificial intelligence (AI) computing chips, various processors running machine learning model algorithms, a digital signal processor (DSP), and any appropriate processor, controller, microcontroller, etc. The processor 11 performs the various methods and processes described above, such as a simplified method for a circuit board via model.

[0131] In some embodiments, the simplified method of the circuit board via model can be implemented as a computer program, which is tangibly contained in a computer-readable storage medium, such as a storage unit 18. In some embodiments, part or all of the computer program can be loaded and / or installed on the electronic device 10 via the ROM 12 and / or the communication unit 19. When the computer program is loaded into the RAM 13 and executed by the processor 11, one or more steps of the simplified method of the circuit board via model described above can be performed. Alternatively, in other embodiments, the processor 11 can be configured to execute the simplified method of the circuit board via model in any other appropriate manner (for example, by means of firmware).

[0132] Various implementations of the systems and techniques described above herein can be implemented in digital electronic circuit systems, integrated circuit systems, field programmable gate arrays (FPGAs), application specific integrated circuits (ASICs), application specific standard products (ASSPs), systems on chips (SOCs), load programmable logic devices (CPLDs), computer hardware, firmware, software, and / or combinations thereof. These various implementations can include: being implemented in one or more computer programs that can be executed and / or interpreted on a programmable system including at least one programmable processor, which can be a special purpose or general purpose programmable processor that can receive data and instructions from a storage system, at least one input device, and at least one output device, and transmit data and instructions to the storage system, the at least one input device, and the at least one output device.

[0133] Computer programs for implementing the methods of the present invention may be written in any combination of one or more programming languages. These computer programs may be provided to a processor of a general-purpose computer, a special-purpose computer, or other programmable data processing device, so that when the computer program is executed by the processor, the functions / operations specified in the flow chart and / or block diagram are implemented. The computer program may be executed entirely on the machine, partially on the machine, partially on the machine and partially on a remote machine as a stand-alone software package, or entirely on a remote machine or server.

[0134] In the context of the present invention, a computer-readable storage medium may be a tangible medium that may contain or store a computer program for use by or in combination with an instruction execution system, device or equipment. A computer-readable storage medium may include, but is not limited to, electronic, magnetic, optical, electromagnetic, infrared, or semiconductor systems, devices or equipment, or any suitable combination of the foregoing. Alternatively, a computer-readable storage medium may be a machine-readable signal medium. A more specific example of a machine-readable storage medium may include an electrical connection based on one or more lines, a portable computer disk, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disk read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing.

[0135] To provide interaction with a user, the systems and techniques described herein may be implemented on an electronic device having: a display device (e.g., a CRT (cathode ray tube) or LCD (liquid crystal display) monitor) for displaying information to the user; and a keyboard and a pointing device (e.g., a mouse or trackball) through which the user can provide input to the electronic device. Other types of devices may also be used to provide interaction with the user; for example, the feedback provided to the user may be any form of sensory feedback (e.g., visual feedback, auditory feedback, or tactile feedback); and input from the user may be received in any form (including acoustic input, voice input, or tactile input).

[0136] The systems and techniques described herein may be implemented in a computing system that includes backend components (e.g., as a data server), or a computing system that includes middleware components (e.g., an application server), or a computing system that includes frontend components (e.g., a user computer with a graphical user interface or a web browser through which a user can interact with implementations of the systems and techniques described herein), or a computing system that includes any combination of such backend components, middleware components, or frontend components. The components of the system may be interconnected by any form or medium of digital data communication (e.g., a communication network). Examples of communication networks include: a local area network (LAN), a wide area network (WAN), a blockchain network, and the Internet.

[0137] A computing system may include a client and a server. The client and the server are generally remote from each other and usually interact through a communication network. The client and server relationship is generated by computer programs running on the corresponding computers and having a client-server relationship with each other. The server may be a cloud server, also known as a cloud computing server or cloud host, which is a host product in the cloud computing service system to solve the defects of difficult management and weak business scalability in traditional physical hosts and VPS services.

[0138] It should be understood that the various forms of processes shown above can be used to reorder, add or delete steps. For example, the steps described in the present invention can be executed in parallel, sequentially or in different orders, as long as the desired results of the technical solution of the present invention can be achieved, and this document does not limit this.

[0139] The above specific implementations do not constitute a limitation on the protection scope of the present invention. It should be understood by those skilled in the art that various modifications, combinations, sub-combinations and substitutions can be made according to design requirements and other factors. Any modification, equivalent substitution and improvement made within the spirit and principle of the present invention should be included in the protection scope of the present invention.

Claims

1. A method for simplifying a circuit board via model, characterized in that: include: In response to a target test instruction of a target circuit board, obtaining first attribute information of each via structure of the target circuit board; Determining whether the target via structure meets the model simplification condition according to the first attribute information; If it is determined that the target via structure satisfies the model simplification condition, determining second attribute information of the target via structure according to the first attribute information of the target via structure; A simplified via model matching the target via structure is determined according to the second attribute information, and the simplified via model is connected with the circuit board layer model of the target circuit board to obtain a target circuit board model to be subjected to target testing.

2. The method for simplifying a circuit board via model according to claim 1, characterized in that: The first attribute information includes: inner radius and / or outer radius; Correspondingly, the obtaining of first attribute information of each via structure of the target circuit board includes: Obtaining a circuit diagram of the target circuit board, and identifying each via structure in the circuit diagram; The inner radius and / or the outer radius of each of the via structures are measured respectively to obtain the first attribute information of each of the via structures.

3. The method for simplifying a circuit board via model according to claim 2, characterized in that: The determining, according to the first attribute information, whether the target via structure meets the model simplification condition includes: A test condition matching the target test instruction is determined, and whether the target via structure satisfies a model simplification condition is determined according to the test condition and the first attribute information.

4. The method for simplifying a circuit board via model according to claim 3, characterized in that: The determining of a test condition matching the target test instruction, and determining whether the target via structure satisfies a model simplification condition according to the test condition and the first attribute information, includes: Parsing the target test instruction to determine a test condition matching the circuit board; the test condition includes: at least one target frequency of electromagnetic waves in an electromagnetic simulation test; determining a wavelength of an electromagnetic wave that matches the target frequency; When the first attribute information and the wavelength of the electromagnetic wave satisfy a preset condition, it is determined that the target via structure satisfies a model simplification condition.

5. The method for simplifying a circuit board via model according to claim 1, characterized in that: The second attribute information is the area of ​​the cross section of the via structure; Correspondingly, determining the second attribute information of the target via structure according to the first attribute information of the target via structure includes: Determine the area of ​​the cross section of the target via structure according to the inner radius and the outer radius in the first attribute information; The area of ​​the cross section is determined as second attribute information of the target via structure.

6. The method for simplifying a circuit board via model according to claim 5, characterized in that: The determining, according to the second attribute information, a simplified via model matching the target via structure includes: Determining the area of ​​the cross section of the target via structure as the area of ​​the target cross section of the simplified target structure; Determine a test accuracy that matches the target test instruction, and determine the number of edges of the target structure according to the test accuracy; The side length of the target structure is determined according to the area of ​​the target cross section and the number of sides of the target structure, and the simplified via model is determined according to each of the side lengths.

7. The method for simplifying a circuit board via model according to claim 1, characterized in that: After obtaining the target circuit board model to be tested, it also includes: Performing preset processing on the target circuit board model, and performing target testing on the target circuit board model after the preset processing; The preset processing includes at least one of the following: Add radiation spaces, boundary conditions, excitations, analysis settings, and parameter optimization.

8. A simplified device for a circuit board via model, characterized in that: include: An acquisition module, configured to acquire first attribute information of each via structure of the target circuit board in response to a target test instruction of the target circuit board; A first determination module, used to determine whether the target via structure meets the model simplification condition according to the first attribute information; A second determination module is used to determine second attribute information of the target via structure according to the first attribute information of the target via structure if it is determined that the target via structure meets the model simplification condition; A simplified via model determination module is used to determine a simplified via model matching the target via structure according to the second attribute information, and connect the simplified via model with the circuit board layer model of the target circuit board to obtain a target circuit board model to be tested.

9. An electronic device, characterized in that: The electronic device comprises: at least one processor; and a memory communicatively connected to the at least one processor; wherein, The memory stores a computer program executable by the at least one processor, and the computer program is executed by the at least one processor so that the at least one processor can execute the method for simplifying a circuit board via model according to any one of claims 1 to 7.

10. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores computer instructions, and the computer instructions are used to enable a processor to implement the method for simplifying a circuit board via model according to any one of claims 1 to 7 when executed.

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