Printed circuit board assembly sheet and method for manufacturing same

Abstract

A method for manufacturing a printed circuit board assembly sheet (1) includes a first step, a second step, and a third step. In the first step, a metal support layer (2) having a mark part (6) on one surface in the thickness direction is prepared. In the second step, a base insulating layer (3) is formed on one surface of the metal support layer (2) in the thickness direction. In the third step, a conductor layer (4) is formed on one surface of the base insulating layer (3) in the thickness direction. The first step includes an eleventh step and a twelfth step. In the twelfth step, after the eleventh step, a second metal layer (22) is formed on one surface of the first metal layer (21) in the thickness direction. The second step is performed after the twelfth step.

Description

Technical Field

[0001] The present invention relates to a wiring circuit board assembly sheet and a method for producing the same. Background Art

[0002] A method for producing a wired circuit board assembly sheet including a marking step and an insulating layer forming step is known (see, for example, Patent Document 1 listed below).

[0003] In the marking step described in Patent Document 1, a recess is formed in the metal supporting layer. The recess is a mark. After the marking step, an insulating layer forming step is performed. In the insulating layer forming step, an insulating layer is formed on one side of the metal supporting substrate in the thickness direction on which the mark is formed.

[0004] In the method described in Patent Document 1, the insulating layer is formed with high accuracy using the mark as a position alignment mark.

[0005] Prior art literature

[0006] Patent Literature

[0007] Patent Document 1: Japanese Patent Application Publication No. 2022-176628 Summary of the invention

[0008] Problem that the invention aims to solve

[0009] In the wired circuit board assembly sheet described in Patent Document 1, since the metal supporting layer is a single layer, there is a disadvantage that the function of the metal supporting layer cannot be sufficiently improved.

[0010] Therefore, a scheme has been tried to sequentially provide the metal supporting layer with the first metal layer and the second metal layer in the thickness direction. In this scheme, when forming a mark, from the viewpoint of the visibility of the mark, the mark is formed on the second metal layer in contact with the insulating layer. However, in this case, the position alignment between the first metal layer and the insulating layer cannot be fully achieved. In other words, the management of the insulating layer becomes insufficient relative to the first metal layer.

[0011] The present invention provides a wiring circuit board assembly sheet having a metal supporting layer with improved functions and a base insulating layer and / or a conductor layer that are sufficiently managed relative to a first metal layer, and a method for producing the same.

[0012] Solutions for solving problems

[0013] The present invention [1] provides a method for manufacturing a wiring circuit substrate assembly sheet, wherein the manufacturing method includes: a first step of preparing a metal supporting layer having a marking portion on one side of the surface in the thickness direction; a second step of forming a base insulating layer on one side of the surface in the thickness direction of the metal supporting layer; and a third step of forming a conductor layer on one side of the surface in the thickness direction of the base insulating layer, wherein the first step includes: an eleventh step of forming a marking having a recessed portion on one side of the surface in the thickness direction of the first metal layer; and a twelfth step of forming a second metal layer on one side of the surface in the thickness direction of the first metal layer after the eleventh step, and performing the second step after the twelfth step.

[0014] In this manufacturing method, the first step includes: an 11th step of forming a mark on the first metal layer; and a 12th step of forming a second metal layer on the first metal layer. After the 12th step, the second step of forming a base insulating layer is performed.

[0015] Therefore, by providing the metal supporting layer with the first metal layer and the second metal layer, the function of the metal supporting layer can be improved.

[0016] Furthermore, in the eleventh step, the mark is formed on the first metal layer instead of the second metal layer, so that the base insulating layer and / or the conductive layer can be formed which is sufficiently managed with respect to the mark on the first metal layer and has excellent reliability.

[0017] The present invention [2] is based on the method for manufacturing a wiring circuit substrate assembly sheet described in [1], wherein the surface of one side of the first metal layer has a flat surface located outside the recess, and the ratio of the thickness T of the second metal layer to the length L from the deepest part of the recess to the flat surface is less than 5.0.

[0018] In this production method, since the ratio (T / L) is 5.0 or less, the visibility of the marking portion is improved.

[0019] The present invention [3] is based on the method for manufacturing a wiring circuit substrate assembly sheet described in [1], wherein the marking portion has a bottom and a raised portion arranged around the bottom, and the length in the thickness direction from the bottom of the bottom to the top of the raised portion, that is, the depth D of the marking portion is greater than 1 μm.

[0020] In this manufacturing method, the depth D of the marking portion is as deep as 1 μm or more, so the visibility of the marking portion is improved.

[0021] The present invention [4] is based on the method for manufacturing a wiring circuit substrate assembly sheet described in any one of [1] to [3], wherein the wiring circuit substrate assembly sheet has a marking area and a circuit area adjacent to the thickness direction, the plurality of wiring circuit substrates are arranged in the circuit area, the 11th step and the 12th step are implemented in the marking area, and the 2nd step and the 3rd step are implemented in the circuit area.

[0022] In this manufacturing method, in the second step, when a base insulating layer and a conductor layer are formed in a circuit region that is a region different from the mark region using a marking portion formed in the mark region, the marking portion in the mark region is less likely to hinder the formation of each of the base insulating layer and the conductor layer.

[0023] The present invention [5] provides a wiring circuit substrate assembly sheet, wherein the wiring circuit substrate assembly sheet has a metal support layer having a marking portion, a base insulating layer and a conductor layer in sequence toward one side in the thickness direction, and the metal support layer has a first metal layer having a marking having a recessed portion, and a second metal layer in sequence toward one side in the thickness direction.

[0024] The present invention [6] is based on the wiring circuit substrate assembly sheet described in [5], wherein the marking portion has a bottom and a raised portion arranged around the bottom, and the length in the thickness direction from the bottom of the bottom to the top of the raised portion, that is, the depth D of the marking portion is greater than 1 μm.

[0025] Effects of the Invention

[0026] The wired circuit board assembly sheet produced by the method for producing a wired circuit board assembly sheet of the present invention includes a metal supporting layer with improved functionality and a base insulating layer and / or a conductor layer with excellent reliability. BRIEF DESCRIPTION OF THE DRAWINGS

[0027] Figure 1 A plan view showing one embodiment of a wired circuit board assembly sheet.

[0028] Figure 2 express Figure 1 A cross-sectional view taken along line AA of the wired circuit board assembly sheet is shown.

[0029] Figure 3A to Figure 3E yes Figure 2 FIG. 2 is a process diagram of a method for producing a wired circuit board assembly sheet. Figure 3A This is a step of preparing the first metal layer. Figure 3B It is the 11th process. Figure 3C It is the 12th step. Figure 3D It is the second process. Figure 3E It is the third process.

[0030] Figure 4A to Figure 4C This is a process diagram that explains the second process in detail. Figure 4A This is the process of forming a photosensitive layer. Figure 4B This is a step of placing a mask using the marking portion and exposing the photosensitive layer to light. Figure 4C This is a step of developing the photosensitive layer.

[0031] Figure 5 It is a cross-sectional view of the first modified example.

[0032] Description of Reference Numerals

[0033] 1. Assembly sheet (wiring circuit substrate assembly sheet); 111. Marking area; 12. Circuit area; 121. Wiring circuit substrate; 2. Metal supporting layer; 21. First metal layer; 211. Marking; 212. Recess; 213. First protrusion; 214. Flat surface; L. Length from the deepest part of the recess to the flat surface; 22. Second metal layer; T. Thickness of the second metal layer 22; 3. Base insulating layer; 4. Conductive layer; 5. Cover insulating layer; 6. Marking part; 61. Bottom; 611. Bottom; 62. Protrusion; 621. Top; D. Depth of the marking part (length in the thickness direction from the bottom of the bottom to the top of the protrusion). DETAILED DESCRIPTION

[0034] 1. Wired circuit board assembly sheet 1

[0035] Reference Figure 1 and Figure 2 An embodiment of the wiring circuit board assembly sheet of the present invention is described below. It should be noted that the wiring circuit board assembly sheet is sometimes referred to as an "assembly sheet". Figure 2 As shown in FIG. 1 , the aggregate sheet 1 has a thickness. The aggregate sheet 1 extends in the plane direction. Figure 1 As shown in FIG. 1 , in this embodiment, the assembly sheet 1 has a rectangular shape. The assembly sheet 1 includes a support region 11 and a circuit region 12 .

[0036] 1.1 Support area 11

[0037] In the present embodiment, the support region 11 has a substantially lattice-like shape in a plan view.

[0038] 1.2 Circuit Area 12

[0039] The circuit region 12 is arranged inside the support region 11. A plurality of circuit regions 12 are arranged at intervals in the plane direction. Each of the plurality of circuit regions 12 includes a wiring circuit substrate 121. Specifically, the wiring circuit substrate 121 is arranged in the circuit region 12. The wiring circuit substrate 121 is supported by the support region 11.

[0040] 1.3 Layer Structure

[0041] like Figure 2 As shown, the assembly sheet 1 includes a metal supporting layer 2, a base insulating layer 3, a conductive layer 4, and a cover insulating layer 5 in this order toward one side in the thickness direction.

[0042] 1.3.1 Metal support layer 2

[0043] The metal supporting layer 2 is arranged at the other end in the thickness direction of the assembly sheet 1. The surface on the other side in the thickness direction of the metal supporting layer 2 forms the surface on the other side in the thickness direction of the assembly sheet 1. The metal supporting layer 2 extends in the surface direction. The metal supporting layer 2 includes a first flat surface 23. The first flat surface 23 is located on one side of the surface in the thickness direction of the metal supporting layer 2. The metal supporting layer 2 is included in the support region 11 and the circuit region 12 (wiring circuit substrate 121).

[0044] 1.3.2 Marking section 6

[0045] The metal supporting layer 2 has a marking portion 6 in addition to the first flat surface 23. Figure 1 As shown, the marking portion 6 is provided in the marking region 111. The marking region 111 is included in the support region 11. The marking portion 6 is formed on one side of the metal support layer 2 in the thickness direction in the marking region 111. The marking portion 6 has a structure that can be visually recognized from one side in the thickness direction. Figure 2 As shown, the marking portion 6 has a bottom portion 61 and a raised portion 62 .

[0046] 1.3.2.1 Bottom 61

[0047] The bottom 61 is recessed toward the other side relative to one side of the surrounding of the marking portion 6. The recess 61 has a shape that is roughly circular when viewed from above. In the present embodiment, the bottom 61 has a shape that is roughly semicircular when viewed in section. The center of the arc is located on one side in the thickness direction relative to the bottom surface of the bottom 61 in section. The bottom 611 of the bottom 61 is located at the center of gravity (or central part) of the marking portion 6 when viewed from above. The bottom 611 is located at the part of the marking portion 6 that is closest to the other side in the thickness direction.

[0048] The length L1 of the concave portion 61 in the thickness direction is, for example, 0.5 μm or more, preferably 1 μm or more, more preferably 1.5 μm or more, further preferably 3 μm or more, particularly preferably 5 μm or more, and for example, 20 μm or less. The length L1 of the concave portion 61 is the length in the thickness direction from the bottom 611 to the first flat surface 23. The length L1 of the concave portion 61 is measured by observing the cross-sectional image.

[0049] When the length L1 of the recessed portion 61 in the thickness direction is equal to or greater than the above lower limit, the visibility of the marking portion 6 is improved.

[0050] 1.3.2.2 Raised portion 62

[0051] The raised portion 62 and the recessed portion 61 together constitute the marking portion 6, and improve the visibility of the marking portion 6 including the recessed portion 61. The raised portion 62 is arranged around the bottom portion 61. In the present embodiment, the raised portion 62 has a shape that is roughly annular when viewed from above. The raised portion 62 rises from the peripheral edge of the bottom portion 61 toward one side in the thickness direction. The raised portion 62 includes a top portion 621. The top portion 621 is located at the part closest to one side in the thickness direction when viewed in section. It should be noted that the top portion 621 has a shape that is roughly annular when viewed from above.

[0052] The length L2 of the raised portion 62 in the thickness direction is, for example, 1 μm or more, preferably 2 μm or more, more preferably 2.5 μm or more, further preferably 4.5 μm or more, particularly preferably 5 μm or more, and for example, 20 μm or less. The length L2 of the raised portion 62 is the length in the thickness direction from the first flat surface 23 to the top 621. The length L2 of the raised portion 62 is measured by observing the cross-sectional image.

[0053] When the length L2 of the raised portion 62 is equal to or greater than the lower limit, the visibility of the marking portion 6 can be further improved.

[0054] The ratio (L1 / L2) of the length L1 of the recessed portion 61 in the thickness direction to the length L2 of the raised portion 62 in the thickness direction is, for example, 0.3 or more, preferably 0.5 or more, more preferably 1 or more, and for example, 3 or less, preferably 2 or less, more preferably 1.5 or less. When the ratio (L1 / L2) is within the above range, the visibility of the marking portion 6 can be significantly improved.

[0055] 1.3.2.3 Depth D of Marking 6

[0056] The depth D of the marking portion 6 is, for example, 0.3 μm or more, preferably 0.5 μm or more, more preferably 1 μm or more, further preferably 4 μm or more, particularly preferably 5 μm or more, most preferably 9 μm or more, and ideally 10 μm or more. The depth D of the marking portion 6 is the length in the thickness direction from the bottom 611 of the bottom portion 61 to the top 621 of the raised portion 62.

[0057] When the depth D of the marker portion 6 is equal to or greater than the above lower limit, the marker portion 6 can be reliably visually recognized. The depth D of the marker portion 6 is measured by observing a cross-sectional image.

[0058] 1.3.3 Layer structure of the metal support layer 2

[0059] The metal supporting layer 2 includes a first metal layer 21 and a second metal layer 22 in this order toward one side in the thickness direction.

[0060] 1.3.3.1 1st metal layer 21

[0061] The first metal layer 21 is a portion on the other side in the thickness direction of the metal supporting layer 2. The first metal layer 21 is a main layer of the metal supporting layer 2. The first metal layer 21 has toughness. The first metal layer 21 extends in the surface direction. The first metal layer 21 in the supporting region 11 has a mark 211 (see also Figure 3B ). The mark 211 has a recessed portion 212 , a first protrusion 213 , and a flat surface 214 .

[0062] The concave portion 212 of the first metal layer 21 corresponds to the bottom 61 of the above-mentioned marking portion 6. The concave portion 212 is recessed toward the other side relative to the surface (flat surface 214) on one side around the marking 211. In the present embodiment, the concave portion 212 has a shape that is roughly a semi-arc when viewed in section. The center of the arc is located on one side of the concave surface of the concave portion 212 in the thickness direction when viewed in section.

[0063] The first protrusion 213 of the first metal layer 21 corresponds to the protrusion 62 of the marking portion 6. The first protrusion 213 is arranged around the recess 212. The first protrusion 213 protrudes from the peripheral edge of the recess 212 toward one side in the thickness direction.

[0064] The flat surface 214 of the first metal layer 21 is located outside the recessed portion 212. In the present embodiment, the flat surface 214 extends outward from the peripheral edge of the first protrusion 213. The flat surface 214 is located between the support region 11 and the circuit region 12.

[0065] The length L from the deepest part of the concave portion 212 to the flat surface 214 is adjusted to satisfy the ratio (T / L) described below. Specifically, the length L from the deepest part of the concave portion 212 to the flat surface 214 is, for example, 1 μm or more, preferably 2 μm or more, more preferably 3 μm or more, and for example, 20 μm or less.

[0066] Examples of the material of the first metal layer 21 include metals. Examples of the metal include copper, copper alloys, and stainless steel alloys, and preferably copper and copper alloys are used.

[0067] The thickness of the first metal layer 21 is, for example, greater than or equal to 10 μm, or preferably greater than or equal to 20 μm, and is, for example, less than or equal to 500 μm, or preferably less than or equal to 250 μm.

[0068] 1.3.3.2 Second Metal Layer 22

[0069] like Figure 2As shown, the second metal layer 22 is a portion on one side of the metal supporting layer 2 in the thickness direction. The second metal layer 22 is arranged on a surface on one side of the first metal layer 21 in the thickness direction. The second metal layer 22 is in contact with a surface on one side of the first metal layer 21 in the thickness direction. In detail, the second metal layer 22 follows a surface on one side of the first metal layer 21 in the thickness direction. The second metal layer 22 is formed on at least one side of the mark 211. Specifically, the second metal layer 22 is recessed together with the recess 212 and is raised together with the first protrusion 213. The second metal layer 22 is flat along the flat surface 214. Therefore, in the present embodiment, the second metal layer 22 has the same thickness in the entire surface direction.

[0070] The electrical conductivity of the second metal layer 22 is, for example, higher than the electrical conductivity of the first metal layer 21. In the present embodiment, the second metal layer 22 is a ground layer (ground plane).

[0071] Examples of the material of the second metal layer 22 include gold, silver, copper, and alloys thereof.

[0072] The thickness T of the second metal layer 22 is adjusted so that the ratio (T / L) described below is within a desired range. Specifically, the thickness T of the second metal layer 22 is, for example, 0.5 μm or more, preferably 1 μm or more, and for example, 25 μm or less, preferably 20 μm or less, more preferably 15 μm or less, further preferably 10 μm or less, and particularly preferably 5 μm or less. The thickness T of the second metal layer 22 is measured by observing a cross-sectional image.

[0073] The ratio (T / L) of the thickness T of the second metal layer 22 to the length L (the length L related to the mark 211) from the deepest part of the recess 212 to the flat surface 214 is, for example, less than 10, preferably less than 5.0, more preferably less than 4, further preferably less than 3, particularly preferably less than 2.5, further preferably less than 2, less than 1.3, less than 1, and less than 0.5 is ideal.

[0074] When the ratio (T / L) is equal to or less than the upper limit, the visibility of the marking portion 6 can be improved. Specifically, by increasing the length L of the first metal layer 21 related to the marking 211 and / or reducing the thickness T of the second metal layer 22, the visibility of the marking portion 6 is significantly improved.

[0075] 1.3.3 Base insulation layer 3

[0076] The base insulating layer 3 is arranged on one side of the surface in the thickness direction of the metal supporting layer 2. In the present embodiment, the base insulating layer 3 is included in the circuit region 12 (wiring circuit substrate 121). Specifically, the base insulating layer 3 is arranged on one side of the surface of the metal supporting layer 2 in the circuit region 12. In addition, the base insulating layer 3 is not arranged on the metal supporting layer 2 in the supporting region 11. The base insulating layer 3 is in contact with one side of the surface in the thickness direction of the metal supporting layer 2.

[0077] As a material of the base insulating layer 3, an insulating resin can be cited, for example. As an insulating resin, for example, polyimide can be cited. The thickness of the base insulating layer 3 is, for example, 1 μm or more, preferably 3 μm or more, and for example, 35 μm or less, preferably 25 μm or less.

[0078] 1.3.4 Conductor layer 4

[0079] The conductor layer 4 is arranged on one side of the base insulating layer 3 in the thickness direction. In the present embodiment, the conductor layer 4 is included in the circuit region 12 (wiring circuit substrate 121). Specifically, the conductor layer 4 is arranged on one side of the base insulating layer 3 in the circuit region 12. In addition, the conductor layer 4 is not arranged in the support region 11. The conductor layer 4 is in contact with one side of the base insulating layer 3 in the thickness direction. Figure 1 As shown in FIG. 1 , the conductor layer 4 includes a wiring 41 and a terminal 42 . The wiring 41 extends in the plane direction. The terminal 42 is continuous with the end of the wiring 41 .

[0080] The conductor layer 4 may be made of metal, for example. The metal may be copper or copper alloy. The conductor layer 4 may have a thickness of, for example, 1 μm or more, preferably 3 μm or more, and, for example, 50 μm or less, preferably 30 μm or less.

[0081] 1.3.5 Covering insulation layer 5

[0082] like Figure 2 As shown, the cover insulating layer 5 is arranged on one side of the surface in the thickness direction of the base insulating layer 3. In the present embodiment, the cover insulating layer 5 is included in the circuit area 12 (wiring circuit substrate 121). Specifically, the cover insulating layer 5 is arranged on one side of the surface of the base insulating layer 3 in the circuit area 12. In addition, the cover insulating layer 5 is not arranged in the support area 11. The cover insulating layer 5 covers the wiring 41. The cover insulating layer 5 exposes the terminal 42. The material of the cover insulating layer 5 is the same as that of the base insulating layer 3. The thickness of the cover insulating layer 5 is 2 μm or more, preferably 3 μm or more, and for example, 60 μm or less, preferably 40 μm or less.

[0083] 2. Method for manufacturing the aggregate sheet 1

[0084] The method for producing the assembly sheet 1 includes a first step, a second step, a third step, and a fourth step. The first step, the second step, the third step, and the fourth step are performed in sequence.

[0085] 2.1 Step 1

[0086] like Figure 3A As shown, in the first step, a metal supporting layer 2 having a marking portion 6 on one surface in the thickness direction is prepared. The first step includes an eleventh step and a twelfth step. The eleventh step and the twelfth step are performed sequentially.

[0087] 2.1.1 Step 11

[0088] In the eleventh step, the mark 211 having the recessed portion 212 and the first protrusion 213 is formed on one surface of the first metal layer 21 in the thickness direction.

[0089] In order to implement the 11th step, first, Figure 3A As shown in FIG. 1 , the first metal layer 21 is prepared. The entire surface of one side of the first metal layer 21 in the thickness direction is a flat surface 214 .

[0090] Then, if Figure 3B As shown, the mark 211 is formed on one surface in the thickness direction of the first metal layer 21. The eleventh step is performed in the mark region 111.

[0091] The mark 211 is formed by, for example, laser irradiation or etching. Laser irradiation is preferably used from the viewpoint of improving manufacturing efficiency. In laser irradiation, laser is irradiated from one side in the thickness direction of the first metal layer 21 to the surface of one side of the first metal layer 21. By laser irradiation, a concave portion 212 is formed on the surface of one side in the thickness direction of the first metal layer 21, and a first protrusion 213 is formed around the concave portion 212. The concave portion 212 and the first protrusion 213 form the mark 211 on the surface of one side of the first metal layer 21.

[0092] Alternatively, the first metal layer 21 on which the mark 211 is formed in advance may be prepared.

[0093] 2.1.2 Step 12

[0094] The 12th step is performed after the 11th step. Figure 3C As shown, in the twelfth step, the second metal layer 22 is formed on one surface in the thickness direction of the first metal layer 21. The twelfth step is performed in the mark region 111 and the circuit region 12.

[0095] The second metal layer 22 is formed by vacuum film formation or plating, for example. Plating is preferably used from the viewpoint of improving manufacturing efficiency. In the above method, the second metal layer 22 is formed on the entire surface of one side of the first metal layer 21 in the thickness direction.

[0096] In the twelfth step, the second metal layer 22 is formed on one side of the first metal layer 21 in the thickness direction including the mark 211, so that the mark 211 formed in the eleventh step is included in the mark portion 6 and the mark 6 can be identified. For example, the second metal layer 22 is formed on one side of the first metal layer 21 with a predetermined thickness T (e.g., a thin thickness T).

[0097] As a result, the marking portion 6 is formed in the supporting region 11 of the metal supporting layer 2 .

[0098] 2.2 Second process

[0099] The second step is performed after the twelfth step. In the second step, if Figure 3D As shown, the base insulating layer 3 is formed on one surface in the thickness direction of the metal supporting layer 2. The second step is performed in the circuit region 12.

[0100] In the second step, for example, photosensitive resin is photolithographically processed to form the base insulating layer 3 on the surface of the metal supporting layer 2 in the circuit region 12. In the second step, the photosensitive resin is photolithographically processed using the marking portion 6.

[0101] Specifically, if Figure 4A As shown in FIG. 1 , a photosensitive layer 31 made of a photosensitive resin is formed on one side of the metal supporting layer 2 in the thickness direction. Figure 4B As shown, the mask 32 is disposed on one side in the thickness direction of the photosensitive layer 31. At this time, the mask 32 is disposed corresponding to the base insulating layer 3 in the circuit region 12, using the mark portion 6 in the support region 11 as, for example, a position alignment mark (positioning mark).

[0102] Then, if Figure 4B As shown by the arrow, the photosensitive layer 31 is exposed through the mask 32 using a light source (not shown) disposed on one side in the thickness direction of the mask 32 .

[0103] Afterwards, if Figure 4C As shown, the photosensitive layer 31 is developed to dissolve the unexposed portion and leave the exposed portion. Thereafter, post-exposure heating is performed as required. Thus, a base insulating layer 3 having a predetermined pattern is formed on one surface of the metal supporting layer 2 in the circuit region 12.

[0104] 2.3 The third process

[0105] like Figure 3E As shown, next, in the third step, the conductor layer 4 is formed on one surface in the thickness direction of the base insulating layer 3. The third step is performed in the circuit region 12. The conductor layer 4 is formed by, for example, an additive method or a subtractive method.

[0106] In the additive method, first, a seed film (not shown) is formed on one side of the base insulating layer 3, then a plating resist is formed on one side of the seed film, and then a conductor layer 4 is formed on the portion of the seed film exposed from the plating resist. Photolithography using a mask is used for forming the plating resist. In the configuration of the mask, the mark portion 6 is used as a position alignment mark.

[0107] In the subtractive method, first, a conductor film (not shown) is formed on one side of the base insulating layer 3, then an etching resist is formed on one side of the conductor film, and then the portion of the conductor film exposed from the etching resist is etched. Photolithography using a mask is used to form the etching resist.

[0108] 2.4 Step 4

[0109] like Figure 2 As shown, in the fourth step, a cover insulating layer 5 is then formed on one side of the base insulating layer 3 in the thickness direction. The cover insulating layer 5 is formed into a pattern that covers the wiring 41 and exposes the terminal 42. The cover insulating layer 5 is formed in the same manner as the base insulating layer 3.

[0110] In this way, the assembly sheet 1 including a plurality of wired circuit boards 121 is obtained.

[0111] 3. Effects of an Implementation Method

[0112] In this manufacturing method, the first step includes: the 11th step of forming the mark 211 on the first metal layer 21; and the 12th step of forming the second metal layer 22 on the first metal layer 21. After the 12th step, the second step of forming the base insulating layer 3 is performed.

[0113] Therefore, the metal supporting layer 2 can be provided with the first metal layer 21 and the second metal layer 22 to improve the function of the metal supporting layer 2. For example, by making the conductivity of the second metal layer 22 higher than the conductivity of the first metal layer 21, the resistance of one surface of the metal supporting layer 2 can be reduced.

[0114] And, if Figure 3B As shown, in the 11th step, the mark 211 is not formed on the second metal layer 22 but on the first metal layer 21. Therefore, the base insulating layer 3, the conductive layer 4, and the cover insulating layer 5 can be formed so that the mark 211 of the first metal layer 21 is well managed and has excellent reliability.

[0115] Specifically, the marking portion 6 including the mark 211 can be used as a position alignment mark to form the base insulating layer 3, the conductive layer 4 and the cover insulating layer 5, respectively, thereby improving the reliability of the configuration and shape of the base insulating layer 3, the conductive layer 4 and the cover insulating layer 5.

[0116] Furthermore, by using the mark 6 as an identification mark, the wiring circuit board 121 with high reliability in which the base insulating layer 3 , the conductive layer 4 , and the cover insulating layer 5 are managed can be manufactured.

[0117] In addition, in the manufacturing method, in the second step, when the base insulating layer 3 and the conductor layer 4 are respectively formed in the circuit area 12 different from the marking area 111 using the marking portion 6 formed in the marking area 111, the marking portion 6 in the marking area 111 is not likely to hinder the formation of the base insulating layer 3 and the conductor layer 4 respectively.

[0118] In addition, in this manufacturing method, if the ratio (T / L) is 5.0 or less, the marking portion 6 can be reliably visually recognized. Specifically, by lengthening the length L of the first metal layer 21 related to the marking 211 and / or reducing the thickness T of the second metal layer 22, the visibility of the marking portion 6 is significantly improved.

[0119] In addition, in this manufacturing method, if the depth D of the marking portion 6 is 1.0 μm or more, the visibility of the marking portion 6 can be improved.

[0120] 4. Modifications

[0121] In the following variants, the same reference numerals are used for the same components and processes as those in the above-mentioned embodiment, and detailed description thereof is omitted. In addition, each variant can have the same effects as those in the embodiment except for special descriptions. Furthermore, an embodiment and its variants can be appropriately combined.

[0122] 4.1 First Modification

[0123] like Figure 5 As shown, in the first modification, the mark portion 6 does not have the protrusion 621. On the other hand, the mark 21 has the first protrusion 213. In the first modification, the thickness T of the second metal layer 22 exceeds 25 μm, and is further equal to or greater than 30 μm.

[0124] 4.2 Second Modification

[0125] In the second modification, the marking portion 6 does not have the protrusion 621 , and the marking 21 does not have the first protrusion 213 , although this is not shown.

[0126] Among the first embodiment, the first modification, and the second modification, from the viewpoint of improving the visibility of the recessed portion 6 , the first embodiment and the first modification are more preferable, and the first embodiment is more preferable.

[0127] 4.3 Other variations

[0128] The marking portion 6 may be a tracking mark. By using the tracking mark, the position of the assembly sheet 1 can be identified and the assembly sheet 1 can be managed.

[0129] [Example]

[0130] The following examples and comparative examples are shown to further specifically illustrate the present invention. It should be noted that the present invention is not limited to any examples and comparative examples. In addition, the specific numerical values ​​such as the blending ratio (containing ratio), physical property values, and parameters used in the following descriptions can replace the upper limit value (defined as "below", "less than") or the lower limit value (defined as "above", "exceeding") of the blending ratio (containing ratio), physical property values, and parameters corresponding thereto recorded in the above-mentioned "Specific Implementation Methods".

[0131] Example 1

[0132] The assembly sheet 1 is manufactured according to the manufacturing method of one embodiment.

[0133] In the 11th step, first, Figure 3A As described above, the first metal layer 21 was prepared. The first metal layer 21 had a thickness of 100 μm and was made of a copper alloy.

[0134] Then, if Figure 3B As shown, a mark 211 is formed on one surface of the first metal layer 21 in the thickness direction by laser irradiation.

[0135] The length L related to the mark 211 (the length L from the deepest part of the concave portion 212 to the flat surface 214 ) is 5.6 μm.

[0136] Then, if Figure 3C As shown, the second metal layer 22 is formed by plating on one surface in the thickness direction of the first metal layer 21. The material of the second metal layer 22 is gold.

[0137] The thickness T of the second metal layer 22 was 2 μm. The ratio (T / L) of the thickness T of the second metal layer 22 to the length L (the length related to the mark 211 ) from the deepest part of the recess 212 to the flat surface 214 was 0.36.

[0138] The length L1 of the recessed portion 61 in the thickness direction is 4.4 μm. The length L2 of the raised portion 62 in the thickness direction is 5.2 μm. The ratio (L1 / L2) is 1.2.

[0139] Thus, the marking portion 6 was formed in the support region 11. The depth D of the marking portion 6 was 9.53 μm.

[0140] Then, if Figure 3D As shown, in the second step, a photosensitive polyimide resin is subjected to photolithography processing to form the base insulating layer 3 on the surface on the second metal layer 22 side in the circuit region 12 .

[0141] Then, if Figure 3E As shown, in the third step, the conductive layer 4 is formed on one surface of the base insulating layer 3 in the thickness direction.

[0142] Then, if Figure 2 As shown, in the fourth step, the insulating cover layer 5 is formed on one surface of the insulating base layer 3 in the thickness direction.

[0143] In this way, the aggregate sheet 1 is manufactured.

[0144] In the assembly sheet 1 of Example 1, the thickness T of the second metal layer 22, the depth D of the marking portion 6, and the ratio (T / L) are shown in Table 1.

[0145] Embodiment 2 to Embodiment 6

[0146] The same treatment as in Example 1 was performed to produce an assembly sheet 1. However, as shown in Table 1, the thickness T of the second metal layer 22 was changed. In conjunction with the change in the thickness T of the second metal layer 22, the depth D of the marking portion 6, the ratio (T / L), the length L1 of the recess 61, the length L2 of the protrusion 62, and the ratio (L1 / L2) were changed. The depth D of the marking portion 6, the ratio (T / L), the length L1 of the recess 61, the length L2 of the protrusion 62, and the ratio (L1 / L2) were transferred.

[0147] It should be noted that Example 6 has Figure 5 The structure of the second modified example shown in FIG.

[0148] Table 1

[0149]

[0150] In addition, the above invention is provided as an exemplary embodiment of the present invention, but this is merely an example and should not be interpreted as limiting the present invention. Modifications of the present invention that are obvious to those skilled in the art are included in the claims.

[0151] Industrial Applicability

[0152] The method for producing a wired circuit board assembly sheet and the wired circuit board assembly sheet of the present invention can be used to produce a wired circuit board.

Claims

1. A method for producing a wiring circuit board assembly sheet, wherein: The manufacturing method comprises: a first step of preparing a metal support layer having a marking portion on one side of the surface in the thickness direction; a second step of forming a base insulating layer on one side of the surface in the thickness direction of the metal support layer; and a third step of forming a conductor layer on one side of the surface in the thickness direction of the base insulating layer. The first step includes: an eleventh step of forming a mark having a concave portion on one side of the surface of the first metal layer in the thickness direction; and a twelfth step of forming a second metal layer on one side of the surface of the first metal layer in the thickness direction after the eleventh step. After the twelfth step, the second step is performed.

2. The method for producing a wired circuit board assembly sheet according to claim 1, wherein: The one surface of the first metal layer has a flat surface located outside the recessed portion, A ratio of a thickness T of the second metal layer to a length L from the deepest portion of the recess to the flat surface is 5.0 or less.

3. The method for producing a wired circuit board assembly sheet according to claim 1, wherein: The marking portion has a bottom portion and a raised portion arranged around the bottom portion. The length in the thickness direction from the bottom of the bottom portion to the top of the raised portion, that is, the depth D of the marking portion is 1 μm or more.

4. The method for producing a wired circuit board assembly sheet according to any one of claims 1 to 3, wherein: The wiring circuit substrate assembly sheet includes a marking region and a circuit region adjacent to each other in a direction perpendicular to the thickness direction, and a plurality of wiring circuit substrates are arranged in the circuit region. performing the eleventh step and the twelfth step in the marking area, The second step and the third step are performed in the circuit region.

5. A wiring circuit board assembly sheet, wherein: The wiring circuit board assembly sheet includes a metal support layer having a marking portion, a base insulating layer, and a conductor layer in this order toward one side in the thickness direction. The metal supporting layer includes, in order toward one side in the thickness direction, a first metal layer on which a mark having a concave portion is formed, and a second metal layer.

6. The wired circuit board assembly sheet according to claim 5, wherein: The marking portion has a bottom portion and a raised portion arranged around the bottom portion. The length in the thickness direction from the bottom of the bottom portion to the top of the raised portion, that is, the depth D of the marking portion is 1 μm or more.

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