Bus clock frequency adjusting method and device, equipment and medium
By determining and adjusting the bus and peripheral device clock frequencies to minimum operating levels, the method reduces chip power consumption while maintaining performance.
Patent Information
- Application Number
- CN202411237676.2
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-09-04
- Publication Date
- 2025-01-03
AI Technical Summary
Existing technologies fail to turn off the bus clock frequency, leading to high chip power consumption even when peripheral devices are idle, as the bus clock maintains its original rate.
Determine the minimum operating clock frequency of each peripheral device, calculate the target clock frequency for the bus based on these frequencies, and adjust both the bus and peripheral devices to these minimum frequencies using configurable clock modules.
Dynamically adjusts the bus clock frequency to match peripheral device needs, reducing chip power consumption without affecting performance.
Smart Images
Figure CN119248100A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the field of bus clock frequency adjustment, and in particular to a bus clock frequency adjustment method, a bus clock frequency adjustment device, an electronic device and a computer-readable storage medium. Background Art
[0002] The main source of power consumption of a general chip is flip power consumption, and flip power consumption is directly related to the clock frequency of the chip. In order to reduce chip power consumption, the clock frequency of the chip is often reduced. In related technologies, the general practice is to turn off the power of the corresponding peripheral device, or stop the clock frequency of the clock interface corresponding to the peripheral device. However, this practice only stops the clock frequency of the corresponding peripheral device, but the bus clock corresponding to the chip still maintains the original rate. Unless all peripheral devices stop working, the bus clock can be turned off. The bus clock frequency in the related technology cannot be turned off, and the original clock frequency is always maintained, and the chip will generate relatively high power consumption. Summary of the invention
[0003] In view of the above problems, embodiments of the present invention are proposed to provide a bus clock frequency adjustment method, a bus clock frequency adjustment device, an electronic device and a computer-readable storage medium that overcome the above problems or at least partially solve the above problems.
[0004] In order to solve the above problem, in a first aspect, an embodiment of the present invention discloses a bus clock frequency adjustment method, the method comprising:
[0005] Determine a target peripheral device from a plurality of peripheral devices connected to the bus;
[0006] Obtaining the minimum operating clock frequency corresponding to each of the target peripheral devices;
[0007] Determining a target clock frequency of the bus according to the minimum operating clock frequency corresponding to each of the target peripheral devices;
[0008] The clock frequency of the bus is adjusted to the target clock frequency, and the working clock frequency of each of the target peripheral devices is respectively configured to be the corresponding minimum working clock frequency.
[0009] Optionally, determining the target clock frequency of the bus according to the minimum operating clock frequency corresponding to each of the target peripheral devices includes:
[0010] Calculating the target clock frequency of the bus according to a preset rule based on the minimum operating clock frequency corresponding to each target peripheral device;
[0011] The step of adjusting the clock frequency of the bus to the target clock frequency and configuring the working clock frequency of each of the target peripheral devices to the corresponding minimum working clock frequency includes:
[0012] Determining a frequency division coefficient corresponding to each of the target peripheral devices according to the target clock frequency of the bus and the minimum operating clock frequency corresponding to each of the target peripheral devices;
[0013] Allocating the frequency division coefficients corresponding to the respective target peripheral devices to the configurable clock modules corresponding to the respective target peripheral devices; the configurable clock modules are respectively connected to the bus and the target peripheral devices;
[0014] adjusting the clock frequency of the bus to the target clock frequency through an optional clock module connected to the bus;
[0015] The operating clock frequency of each of the target peripheral devices is configured to be the minimum operating clock frequency corresponding to each of the target peripheral devices through the configurable clock module and the frequency division coefficient corresponding to each of the target devices.
[0016] Optionally, the calculating the target clock frequency of the bus according to a preset rule based on the minimum operating clock frequency corresponding to each target peripheral device includes:
[0017] Calculating the least common multiple of all minimum operating clock frequencies according to the minimum operating clock frequencies corresponding to the target peripheral devices;
[0018] The lowest common multiple of all the minimum operating clock frequencies is determined as the target clock frequency of the bus.
[0019] Optionally, determining the frequency division coefficient corresponding to each target peripheral device according to the target clock frequency of the bus and the minimum operating clock frequency corresponding to each target peripheral device includes:
[0020] The target clock frequency of the bus is divided by the minimum operating clock frequency corresponding to each of the target peripheral devices to obtain a frequency division coefficient corresponding to each of the target peripheral devices.
[0021] Optionally, determining the target peripheral device from a plurality of peripheral devices connected to the bus includes:
[0022] The current working mode is obtained, and a target peripheral device in the working mode is determined from a plurality of peripheral devices connected to the bus.
[0023] Optionally, obtaining the minimum operating clock frequency corresponding to each of the target peripheral devices includes:
[0024] The minimum operating clock frequency corresponding to each of the target peripheral devices is obtained from a preset list; the preset list pre-stores the minimum operating clock frequency corresponding to each of the peripheral devices.
[0025] Optionally, after adjusting the clock frequency of the bus to the target clock frequency and configuring the working clock frequency of each of the target peripheral devices to the corresponding minimum working clock frequency, the method further includes:
[0026] Detect the current working mode;
[0027] When the current working mode changes, the target peripheral device under the changed working mode is determined again from the multiple peripheral devices connected to the bus, and the clock frequency of the bus is adjusted again according to the target peripheral device to configure the working clock of the target peripheral device.
[0028] In a second aspect, an embodiment of the present invention discloses a bus clock frequency adjustment device, the device comprising:
[0029] A first determining module, used to determine a target peripheral device from a plurality of peripheral devices connected to the bus;
[0030] An acquisition module, used for acquiring the minimum operating clock frequency corresponding to each of the target peripheral devices;
[0031] A second determination module, configured to determine a target clock frequency of the bus according to the minimum operating clock frequency corresponding to each of the target peripheral devices;
[0032] The first adjustment module is used to adjust the clock frequency of the bus to the target clock frequency, and configure the working clock frequency of each of the target peripheral devices to the corresponding minimum working clock frequency.
[0033] Optionally, the second determining module includes:
[0034] A calculation submodule, configured to calculate the target clock frequency of the bus according to a preset rule based on the minimum operating clock frequency corresponding to each target peripheral device;
[0035] The first adjustment module includes:
[0036] A first determination submodule, configured to determine a frequency division coefficient corresponding to each of the target peripheral devices according to the target clock frequency of the bus and the minimum operating clock frequency corresponding to each of the target peripheral devices;
[0037] A distribution submodule, used for distributing the frequency division coefficients corresponding to the respective target peripheral devices to the configurable clock modules corresponding to the respective target peripheral devices; the configurable clock modules are respectively connected to the bus and the target peripheral devices;
[0038] an adjusting submodule, configured to adjust the clock frequency of the bus to the target clock frequency through an optional clock module connected to the bus;
[0039] The configuration submodule is used to configure the working clock frequency of each of the target peripheral devices to the minimum working clock frequency corresponding to each of the target peripheral devices through the configurable clock module and the frequency division coefficient corresponding to each of the target peripheral devices.
[0040] Optionally, the computing submodule includes:
[0041] A first calculation unit, configured to calculate the least common multiple of all minimum operating clock frequencies according to the minimum operating clock frequencies corresponding to the target peripheral devices;
[0042] The determination unit is used to determine the lowest common multiple of all the minimum working clock frequencies as the target clock frequency of the bus.
[0043] Optionally, the first determining submodule includes:
[0044] The second calculation unit is used to divide the target clock frequency of the bus by the minimum working clock frequency corresponding to each of the target peripheral devices to obtain a frequency division coefficient corresponding to each of the target peripheral devices.
[0045] Optionally, the first determining module includes:
[0046] The second determination submodule is used to obtain the current working mode and determine the target peripheral device in the working mode from the multiple peripheral devices connected to the bus.
[0047] Optionally, the acquisition module includes:
[0048] The acquisition submodule is used to acquire the minimum operating clock frequency corresponding to each of the target peripheral devices from a preset list; the preset list pre-stores the minimum operating clock frequency corresponding to each of the peripheral devices.
[0049] Optionally, the device further comprises:
[0050] A detection module, used to detect the current working mode;
[0051] The second adjustment module is used to determine the target peripheral device under the changed working mode from the multiple peripheral devices connected to the bus again when the current working mode changes, and to adjust the clock frequency of the bus again according to the target peripheral device to configure the working clock of the target peripheral device.
[0052] In a third aspect, the present invention shows an electronic device, including a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor implements the steps of the above-mentioned bus clock frequency adjustment method when executing the computer program.
[0053] In a fourth aspect, the present invention shows a computer-readable storage medium, on which a computer program is stored, and when the computer program is executed by a processor, the steps of the above-mentioned bus clock frequency adjustment method are implemented.
[0054] The embodiments of the present invention include the following advantages:
[0055] In an embodiment of the present invention, a target peripheral device is first determined from a plurality of peripheral devices connected to a bus, and then the minimum operating clock frequency corresponding to each target peripheral device is obtained. Then, based on the minimum operating clock frequency corresponding to each target peripheral device, the target clock frequency of the bus is determined. Finally, the clock frequency of the bus is adjusted to the target clock frequency, and the operating clock frequency of each target peripheral device is respectively configured to the corresponding minimum operating clock frequency. Thus, the bus clock can be dynamically adjusted according to the minimum operating clock frequency corresponding to each target peripheral device, thereby achieving the purpose of reducing chip power consumption without reducing the basic performance of the peripheral device. BRIEF DESCRIPTION OF THE DRAWINGS
[0056] Figure 1 is a flowchart of a bus clock frequency adjustment method provided by an embodiment of the present invention;
[0057] Figure 2 It is a structural block diagram of a bus and a device connection provided by an embodiment of the present invention;
[0058] Figure 3 It is a structural block diagram of a bus clock frequency adjustment device provided by an embodiment of the present invention;
[0059] Figure 4 is a structural block diagram of an electronic device provided by an embodiment of the present invention;
[0060] Figure 5 It is a structural block diagram of a computer-readable storage medium provided by an embodiment of the present invention. DETAILED DESCRIPTION
[0061] In order to make the above-mentioned objects, features and advantages of the present invention more obvious and easy to understand, the present invention is further described in detail below with reference to the accompanying drawings and specific embodiments.
[0062] The bus clock in the related art cannot be shut down and always maintains the original working frequency, which will cause relatively high power consumption of the chip. In order to solve the above technical problems, the present invention provides a bus clock frequency adjustment method, which first determines the target peripheral device from multiple peripheral devices connected to the bus, then obtains the minimum working clock frequency corresponding to each target peripheral device, and then determines the target clock frequency of the bus according to the minimum working clock frequency corresponding to each target peripheral device, and finally adjusts the clock frequency of the bus to the target clock frequency, and configures the working clock frequency of each target peripheral device to the corresponding minimum working clock frequency, so that the bus clock can be dynamically adjusted according to the minimum working clock frequency corresponding to each target peripheral device, so as to achieve the purpose of reducing chip power consumption without reducing the basic performance of the peripheral device.
[0063] Reference Figure 1 , shows a flowchart of a bus clock frequency adjustment method provided by an embodiment of the present invention, and the method may specifically include the following steps:
[0064] Step 101: determine a target peripheral device from a plurality of peripheral devices connected to a bus.
[0065] In an embodiment of the present invention, a bus clock frequency adjustment method may be applied to a chip, which may be a processor. The processor may determine a target peripheral device from a plurality of peripheral devices connected to the bus.
[0066] like Figure 2 As shown, a structural block diagram of a bus and device connection provided by an embodiment of the present invention is shown, the processor is respectively connected to the optional clock module and the bus, the optional clock module is connected to the bus, multiple configurable clock modules are connected to the bus, and multiple configurable clock modules are respectively connected to corresponding peripheral devices, for example: configurable clock module 1 is connected to peripheral device 1, configurable clock module 2 is connected to peripheral device 2, and configurable clock module N is connected to peripheral device N. Figure 2 The solid line with an arrow in the figure is the clock line, and the hollow bidirectional or unidirectional arrows represent other contents in the bus, such as data lines, control lines, etc. When configuring and adjusting the clock frequency, it can be processed through the clock line, and when performing other data processing, it can be processed through other contents in the bus. It should be noted that the clock line of the configurable clock module in the present invention can come from the processor or other external sources. The source of the clock line of the clock module in the present invention can be set according to actual conditions, and the present invention does not make specific limitations here.
[0067] In one embodiment, determining a target peripheral device from a plurality of peripheral devices connected to a bus includes: acquiring a current working mode, and determining a target peripheral device in the working mode from the plurality of peripheral devices connected to the bus.
[0068] Specifically, the processor can obtain the current working mode. If the current working mode is the low power mode, the processor can determine the target peripheral device in the low power mode from the multiple peripheral devices connected to the bus. For example, there are peripheral devices 1, 2, 3, and 4. In the low power mode, as long as peripheral device 1 and peripheral device 2 need to work, peripheral device 1 and peripheral device 2 can be determined as target peripheral devices.
[0069] Step 102: Obtain the minimum operating clock frequency corresponding to each of the target peripheral devices.
[0070] In the implementation of the present invention, after the processor determines the target peripheral device from the plurality of peripheral devices connected to the bus, the processor can obtain the minimum operating clock frequency corresponding to each target peripheral device.
[0071] In one embodiment, obtaining the minimum operating clock frequency corresponding to each target peripheral device may include: obtaining the minimum operating clock frequency corresponding to each target peripheral device from a preset list; the preset list pre-stores the minimum operating clock frequency corresponding to each peripheral device.
[0072] Specifically, a preset list may be stored in the memory of the processor in the present invention, and the preset list may pre-store the minimum operating clock frequency corresponding to each peripheral device, for example: the minimum operating clock frequency of peripheral device 1 is 2MHz, the minimum operating clock frequency of peripheral device 2 is 3MHz, the minimum operating clock frequency of peripheral device 3 is 5MHz, etc. Then, after the target peripheral device is determined, the minimum operating clock frequency corresponding to each target device can be obtained from the preset list. The present invention can accurately and quickly determine the minimum operating clock frequency corresponding to each target device through the preset list pre-stored in the memory, so as to subsequently determine the target clock frequency of the bus according to the determined minimum operating clock frequency.
[0073] Step 103: Determine the target clock frequency of the bus according to the minimum operating clock frequency corresponding to each of the target peripheral devices.
[0074] In the embodiment of the present invention, after the minimum operating clock frequency corresponding to each target device is obtained, the target clock frequency of the bus can be determined according to the minimum operating clock frequency corresponding to each target peripheral device.
[0075] Step 104: adjust the clock frequency of the bus to the target clock frequency, and configure the operating clock frequency of each of the target peripheral devices to the corresponding minimum operating clock frequency.
[0076] In an embodiment of the present invention, after determining the target clock frequency of the bus, the clock frequency of the bus can be adjusted to the target clock frequency, and the operating video frequency of each target peripheral device can be configured to the corresponding minimum operating clock frequency. In the present invention, after determining the target clock frequency of the bus, the processor can send the target clock frequency to the optional clock module, so that the optional clock module adjusts the clock frequency of the bus to the target clock frequency. After determining the target clock frequency of the bus, the processor can send the minimum operating clock frequency corresponding to each target peripheral device to the corresponding configurable clock module, so that the configurable clock module corresponding to each target peripheral device configures the operating clock frequency of each target peripheral device to the corresponding minimum operating clock frequency.
[0077] In one embodiment, determining the target clock frequency of the bus according to the minimum working clock frequency corresponding to each target peripheral device may include: calculating the target clock frequency of the bus according to a preset rule according to the minimum working clock frequency corresponding to each target peripheral device; adjusting the clock frequency of the bus to the target clock frequency, and configuring the working clock frequencies of each target peripheral device to the corresponding minimum working clock frequencies, including: determining the division coefficient corresponding to each target peripheral device according to the target clock frequency of the bus and the minimum working clock frequency corresponding to each target peripheral device; allocating the division coefficient corresponding to each target peripheral device to a configurable clock module corresponding to each target peripheral device; the configurable clock module is respectively connected to the bus and the target peripheral device; adjusting the clock frequency of the bus to the target clock frequency through an optional clock module connected to the bus; configuring the working clock frequency of each target peripheral device to the minimum working clock frequency corresponding to each target peripheral device through the configurable clock module and the division coefficient corresponding to each target peripheral device.
[0078] Specifically, the processor can first calculate the target clock frequency of the bus according to the preset rules based on the minimum working clock frequency corresponding to each target peripheral device, and then determine the allocation coefficient corresponding to each target peripheral device according to the target clock frequency of the bus and the minimum working clock frequency corresponding to each target peripheral device, and then allocate the allocation coefficient corresponding to each target peripheral device to the configurable clock module corresponding to each device, wherein the configurable clock module is connected to the bus and the target peripheral device respectively, and one target peripheral device corresponds to one configurable clock module. After receiving the allocation coefficient corresponding to each target peripheral device, the configurable clock module can configure the working clock frequency of the target peripheral device to the minimum working clock frequency corresponding to each target peripheral device according to the frequency division coefficient of each target peripheral device. Compared with the prior art, the present invention adds an optional clock module, and adds a configurable clock module between the bus and the peripheral device, so that the clock frequency of the bus can be adjusted by the optional clock module, and the working clock frequency of the target peripheral device corresponding to the configurable clock module can be configured by the configurable clock module.
[0079] In one embodiment, the target clock frequency of the bus is calculated according to preset rules based on the minimum operating clock frequencies corresponding to each target peripheral device, including: calculating the least common multiple of all minimum operating clock frequencies based on the minimum operating clock frequencies corresponding to each target peripheral device; and determining the least common multiple of all minimum operating clock frequencies as the target clock frequency of the bus.
[0080] Specifically, the minimum operating clock frequency of the target peripheral device 1 is 2MHz, and the minimum operating clock frequency of the target peripheral device 2 is 3MHz, so the minimum operating clock frequency of the target peripheral device 1 and the minimum common multiple of the minimum operating clock frequency of the target peripheral device 2 can be calculated to be 6MHz. Then the least common multiple of all the minimum operating clock frequencies of the target devices, 6MHz, is used as the target clock frequency of the bus, that is, the target clock frequency of the bus is 6MHz. The present invention can determine the least common multiple of the minimum operating clock frequencies of all target peripheral devices through the calculation rule of the least common multiple, and then determine the least common multiple as the target clock frequency of the bus, which can not only ensure the working performance of the peripheral devices under the original bus clock frequency, but also ensure that the clock frequency of the bus is reduced from the original clock frequency to the target clock frequency, thereby achieving the purpose of reducing chip power consumption.
[0081] In one embodiment, the minimum operating clock frequency corresponding to each target peripheral device determines the division coefficient corresponding to each target peripheral device, including: dividing the target clock frequency of the bus by the minimum operating clock frequency corresponding to each target peripheral device to obtain the division coefficient corresponding to each target peripheral device.
[0082] Specifically, the target clock frequency of the bus is 6MHz, the minimum working clock frequency of the target peripheral device 1 is 2MHz, and the minimum working clock frequency of the target peripheral device 2 is 3MHz. Then, it can be determined that the frequency division coefficient corresponding to the target peripheral device 1 is 3, and the frequency division coefficient corresponding to the target peripheral device 2 is 2. The present invention can obtain the frequency division coefficient corresponding to each target peripheral device by dividing the target clock frequency of the bus by the minimum working clock frequency corresponding to each target peripheral device, and further enables the configurable clock module to configure the minimum working clock frequency for each target peripheral device according to the corresponding frequency division coefficient, so as to ensure the working performance of the peripheral device under the original bus clock frequency.
[0083] In an embodiment of the present invention, after adjusting the clock frequency of the bus to the target clock frequency and configuring the working clock frequencies of each target peripheral device to the corresponding minimum working clock frequency, it also includes: detecting the current working mode; when the current working mode changes, again determining the target peripheral device in the changed working mode from the multiple peripheral devices connected to the bus, and again adjusting the clock frequency of the bus according to the target peripheral device, and configuring the working clock of the target peripheral device.
[0084] Specifically, the processor can try to detect the current working mode. When it is detected that the current working mode has changed, for example, from the first working mode to the second working mode, the processor can again determine the target peripheral device in the second working mode from the multiple peripheral devices connected to the bus, and adjust the clock frequency of the bus according to the target peripheral device, and configure the working clock of the target peripheral device. Thus, the effect of dynamically adjusting the clock frequency of the bus when the working mode changes can be achieved.
[0085] In one embodiment, the working state of the current peripheral device can also be checked. When the working state of the current peripheral device changes, the target peripheral device that is working is determined from the multiple peripheral devices connected to the bus, and the clock frequency of the bus is adjusted again according to the target peripheral device, and the working clock of the target peripheral device is configured. Thus, the effect of dynamically adjusting the bus clock frequency can be achieved when the working state of the peripheral device changes.
[0086] In an embodiment of the present invention, a target peripheral device is determined from a plurality of peripheral devices connected to a bus; the minimum operating clock frequency corresponding to each target peripheral device is obtained; the target clock frequency of the bus is determined according to the minimum operating clock frequency corresponding to each target peripheral device; the clock frequency of the bus is adjusted to the target clock frequency, and the operating clock frequency of each target peripheral device is respectively configured to the corresponding minimum operating clock frequency. Thus, the bus clock can be dynamically adjusted according to the minimum operating clock frequency corresponding to each target peripheral device, so as to achieve the purpose of reducing chip power consumption without reducing the basic performance of the peripheral device.
[0087] It should be noted that, for the sake of simplicity, the method embodiments are described as a series of action combinations, but those skilled in the art should be aware that the embodiments of the present invention are not limited by the order of the actions described, because according to the embodiments of the present invention, certain steps can be performed in other orders or simultaneously. Secondly, those skilled in the art should also be aware that the embodiments described in the specification are all preferred embodiments, and the actions involved are not necessarily required by the embodiments of the present invention.
[0088] Reference Figure 3 , shows a structural block diagram of a bus clock frequency adjustment device provided by an embodiment of the present invention, and the device may specifically include the following modules:
[0089] A first determining module 301 is used to determine a target peripheral device from a plurality of peripheral devices connected to the bus;
[0090] An acquisition module 302 is used to acquire the minimum operating clock frequency corresponding to each of the target peripheral devices;
[0091] A second determination module 303, configured to determine a target clock frequency of the bus according to the minimum operating clock frequency corresponding to each of the target peripheral devices;
[0092] The first adjustment module 304 is used to adjust the clock frequency of the bus to the target clock frequency, and configure the working clock frequency of each of the target peripheral devices to the corresponding minimum working clock frequency.
[0093] Optionally, the second determining module 303 includes:
[0094] A calculation submodule, configured to calculate the target clock frequency of the bus according to a preset rule based on the minimum operating clock frequency corresponding to each target peripheral device;
[0095] The first adjustment module 304 includes:
[0096] A first determination submodule, configured to determine a frequency division coefficient corresponding to each of the target peripheral devices according to the target clock frequency of the bus and the minimum operating clock frequency corresponding to each of the target peripheral devices;
[0097] A distribution submodule, used for distributing the frequency division coefficients corresponding to the respective target peripheral devices to the configurable clock modules corresponding to the respective target peripheral devices; the configurable clock modules are respectively connected to the bus and the target peripheral devices;
[0098] an adjusting submodule, configured to adjust the clock frequency of the bus to the target clock frequency through an optional clock module connected to the bus;
[0099] The configuration submodule is used to configure the working clock frequency of each of the target peripheral devices to the minimum working clock frequency corresponding to each of the target peripheral devices through the configurable clock module and the frequency division coefficient corresponding to each of the target peripheral devices.
[0100] Optionally, the computing submodule includes:
[0101] A first calculation unit, configured to calculate the least common multiple of all minimum operating clock frequencies according to the minimum operating clock frequencies corresponding to the target peripheral devices;
[0102] The determination unit is used to determine the lowest common multiple of all the minimum working clock frequencies as the target clock frequency of the bus.
[0103] Optionally, the first determining submodule includes:
[0104] The second calculation unit is used to divide the target clock frequency of the bus by the minimum working clock frequency corresponding to each of the target peripheral devices to obtain a frequency division coefficient corresponding to each of the target peripheral devices.
[0105] Optionally, the first determining module 301 includes:
[0106] The second determination submodule is used to obtain the current working mode and determine the target peripheral device in the working mode from the multiple peripheral devices connected to the bus.
[0107] Optionally, the acquisition module 302 includes:
[0108] The acquisition submodule is used to acquire the minimum operating clock frequency corresponding to each of the target peripheral devices from a preset list; the preset list pre-stores the minimum operating clock frequency corresponding to each of the peripheral devices.
[0109] Optionally, the device further comprises:
[0110] A detection module, used to detect the current working mode;
[0111] The second adjustment module is used to determine the target peripheral device under the changed working mode from the multiple peripheral devices connected to the bus again when the current working mode changes, and to adjust the clock frequency of the bus again according to the target peripheral device to configure the working clock of the target peripheral device.
[0112] In the embodiment of the present invention, the first determination module is used to determine the target peripheral device from multiple peripheral devices connected to the bus; the acquisition module is used to obtain the minimum working clock frequency corresponding to each target peripheral device; the second determination module is used to determine the target clock frequency of the bus according to the minimum working clock frequency corresponding to each target peripheral device; the first adjustment module is used to adjust the clock frequency of the bus to the target clock frequency, and configure the working clock frequency of each target peripheral device to the corresponding minimum working clock frequency. Therefore, the bus clock can be dynamically adjusted according to the minimum working clock frequency corresponding to each target peripheral device, so as to achieve the purpose of reducing the power consumption of the chip without reducing the basic performance of the peripheral device.
[0113] As for the device embodiment, since it is basically similar to the method embodiment, the description is relatively simple, and the relevant parts can be referred to the partial description of the method embodiment.
[0114] like Figure 4 , showing a structural block diagram of an electronic device provided in an embodiment of the present invention, including:
[0115] It includes a processor, a memory, and a computer program stored in the memory and capable of running on the processor. When the computer program is executed by the processor, the various processes of the above-mentioned bus clock frequency adjustment method embodiment are implemented, and the same technical effect can be achieved. To avoid repetition, it will not be repeated here.
[0116] like Figure 5 , showing that an embodiment of the present invention also provides a structural block diagram of a computer-readable storage medium, on which a computer program is stored. When the computer program is executed by a processor, the various processes of the above-mentioned bus clock frequency adjustment method embodiment are implemented, and the same technical effect can be achieved. To avoid repetition, it will not be repeated here.
[0117] The various embodiments in this specification are described in a progressive manner, and each embodiment focuses on the differences from other embodiments. The same or similar parts between the various embodiments can be referenced to each other.
[0118] It will be appreciated by those skilled in the art that the embodiments of the present invention may be provided as methods, devices, or computer program products. Therefore, the embodiments of the present invention may take the form of a complete hardware embodiment, a complete software embodiment, or an embodiment combining software and hardware. Moreover, the embodiments of the present invention may take the form of a computer program product implemented on one or more computer-usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) containing computer-usable program codes.
[0119] The embodiments of the present invention are described with reference to the flowcharts and / or block diagrams of the methods, terminal devices (systems), and computer program products according to the embodiments of the present invention. It should be understood that each process and / or block in the flowchart and / or block diagram, as well as the combination of the processes and / or blocks in the flowchart and / or block diagram, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable data processing terminal device to generate a machine, so that the instructions executed by the processor of the computer or other programmable data processing terminal device generate instructions for implementing the processes in the flowchart and / or block diagram. Figure 1 A process or multiple processes and / or boxes Figure 1 A device that provides the functions specified in a block or multiple blocks.
[0120] These computer program instructions may also be stored in a computer readable memory capable of directing a computer or other programmable data processing terminal device to operate in a specific manner, so that the instructions stored in the computer readable memory produce a manufactured product including an instruction device, which implements the process Figure 1 A process or multiple processes and / or boxes Figure 1 A function specified in one or more boxes.
[0121] These computer program instructions can also be loaded onto a computer or other programmable data processing terminal device so that a series of operating steps are executed on the computer or other programmable terminal device to produce a computer-implemented process, thereby providing instructions for executing on the computer or other programmable terminal device to implement the process. Figure 1 A process or multiple processes and / or boxes Figure 1 A step that specifies a function in one or more boxes.
[0122] Although the preferred embodiments of the present invention have been described, those skilled in the art may make additional changes and modifications to these embodiments once they have learned the basic creative concept. Therefore, the appended claims are intended to be interpreted as including the preferred embodiments and all changes and modifications that fall within the scope of the embodiments of the present invention.
[0123] Finally, it should be noted that, in this article, relational terms such as first and second, etc. are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "include", "comprise" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or terminal device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or terminal device. In the absence of further restrictions, the elements defined by the sentence "comprise a ..." do not exclude the existence of other identical elements in the process, method, article or terminal device including the elements.
[0124] The bus clock frequency adjustment method, bus clock frequency adjustment device, electronic device and computer-readable storage medium provided by the present invention are introduced in detail above. Specific examples are used in this article to illustrate the principle and implementation mode of the present invention. The description of the above embodiments is only used to help understand the method of the present invention and its core idea. At the same time, for general technicians in this field, according to the idea of the present invention, there will be changes in the specific implementation mode and application scope. In summary, the content of this specification should not be understood as a limitation on the present invention.
Claims
1. A method for adjusting a bus clock frequency, characterized in that: The method comprises: Determine a target peripheral device from a plurality of peripheral devices connected to the bus; Obtaining the minimum operating clock frequency corresponding to each of the target peripheral devices; Determining a target clock frequency of the bus according to the minimum operating clock frequency corresponding to each of the target peripheral devices; The clock frequency of the bus is adjusted to the target clock frequency, and the working clock frequency of each of the target peripheral devices is respectively configured to be the corresponding minimum working clock frequency.
2. The method for adjusting the bus clock frequency according to claim 1, characterized in that: The step of determining the target clock frequency of the bus according to the minimum operating clock frequency corresponding to each of the target peripheral devices comprises: Calculating the target clock frequency of the bus according to a preset rule based on the minimum operating clock frequency corresponding to each target peripheral device; The step of adjusting the clock frequency of the bus to the target clock frequency and configuring the working clock frequency of each of the target peripheral devices to the corresponding minimum working clock frequency includes: Determining a frequency division coefficient corresponding to each of the target peripheral devices according to the target clock frequency of the bus and the minimum operating clock frequency corresponding to each of the target peripheral devices; Allocating the frequency division coefficients corresponding to the respective target peripheral devices to the configurable clock modules corresponding to the respective target peripheral devices; the configurable clock modules are respectively connected to the bus and the target peripheral devices; adjusting the clock frequency of the bus to the target clock frequency through an optional clock module connected to the bus; Through the configurable clock module and the frequency division coefficients corresponding to each of the target peripheral devices, The operating clock frequency of each of the target peripheral devices is configured to be a minimum operating clock frequency corresponding to each of the target peripheral devices.
3. The method for adjusting the bus clock frequency according to claim 2, characterized in that: The step of calculating the target clock frequency of the bus according to a preset rule based on the minimum operating clock frequency corresponding to each target peripheral device includes: Calculating the least common multiple of all minimum operating clock frequencies according to the minimum operating clock frequencies corresponding to the target peripheral devices; The lowest common multiple of all the minimum operating clock frequencies is determined as the target clock frequency of the bus.
4. The method for adjusting the bus clock frequency according to claim 2, characterized in that: The minimum operating clock frequency corresponding to each target peripheral device, and determining the frequency division coefficient corresponding to each target peripheral device, include: The target clock frequency of the bus is divided by the minimum operating clock frequency corresponding to each of the target peripheral devices to obtain a frequency division coefficient corresponding to each of the target peripheral devices.
5. The method for adjusting bus clock frequency according to claim 1, characterized in that: The step of determining a target peripheral device from a plurality of peripheral devices connected to the bus comprises: The current working mode is obtained, and a target peripheral device in the working mode is determined from a plurality of peripheral devices connected to the bus.
6. The method for adjusting bus clock frequency according to claim 1, characterized in that: The obtaining of the minimum operating clock frequency corresponding to each of the target peripheral devices includes: The minimum operating clock frequency corresponding to each of the target peripheral devices is obtained from a preset list; the preset list pre-stores the minimum operating clock frequency corresponding to each of the peripheral devices.
7. The method for adjusting bus clock frequency according to claim 5, characterized in that: After adjusting the clock frequency of the bus to the target clock frequency and configuring the working clock frequency of each of the target peripheral devices to the corresponding minimum working clock frequency, the method further includes: Detect the current working mode; When the current working mode changes, the target peripheral device under the changed working mode is determined again from the multiple peripheral devices connected to the bus, and the clock frequency of the bus is adjusted again according to the target peripheral device to configure the working clock of the target peripheral device.
8. A bus clock frequency adjustment device, characterized in that: The device comprises: A first determining module, used to determine a target peripheral device from a plurality of peripheral devices connected to the bus; An acquisition module, used for acquiring the minimum operating clock frequency corresponding to each of the target peripheral devices; A second determination module, configured to determine a target clock frequency of the bus according to the minimum operating clock frequency corresponding to each of the target peripheral devices; The adjustment module is used to adjust the clock frequency of the bus to the target clock frequency, and configure the working clock frequency of each of the target peripheral devices to the corresponding minimum working clock frequency.
9. An electronic device, characterized in that: include: A processor, a memory, and a computer program stored in the memory and capable of running on the processor, wherein when the computer program is executed by the processor, the steps of the bus clock frequency adjustment method according to any one of claims 1 to 7 are implemented.
10. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores a computer program, and when the computer program is executed by a processor, the steps of the bus clock frequency adjustment method according to any one of claims 1 to 7 are implemented.
Citation Information
Cited By
Chip power consumption control method and device, equipment and medium
CN119987525A