Integrated circuit stacking package heat dissipation structure

Abstract

The present invention belongs to the technical field of semiconductor chip packaging, and relates to an integrated circuit stacking packaging heat dissipation structure, comprising a substrate assembly, a chip assembly being arranged on the top of the substrate assembly, and a heat dissipation assembly being arranged on the top of the chip assembly. The present invention provides a first heat conductive sheet, staggeredly arranges a first chip, a second chip and a third chip, and respectively arranges the first heat conductive sheet and the second heat conductive sheet at non-overlapping parts between the chips, and applies silicone grease on the contact surfaces of the first heat conductive sheet, the second heat conductive sheet and the third heat conductive sheet with the chips, so that a large amount of heat generated during chip operation is promptly conducted to the inside of the first heat conductive sheet and the second heat conductive sheet, and is conducted to the heat dissipation sheet through a first heat conductive pipe, a second heat conductive pipe and a third heat conductive pipe, so as to achieve the purpose of rapid heat dissipation by absorbing the heat from the front and back sides of the chips.

Description

Technical Field

[0001] The present invention belongs to the technical field of semiconductor chip packaging, and in particular relates to an integrated circuit stacking packaging heat dissipation structure. Background Art

[0002] With the continuous development of integrated circuits, the integration and performance of chips are constantly improving, while the power consumption and heat generation of chips are also increasing. Traditional packaging heat dissipation technology can no longer meet the heat dissipation requirements of high-performance chips, so new packaging heat dissipation technology needs to be developed. Integrated circuit stacking packaging heat dissipation structure is a new type of packaging heat dissipation technology, which can effectively improve the heat dissipation performance of the chip, thereby improving the performance and reliability of the chip.

[0003] The existing technology lacks an effective heat dissipation structure. Since only silicone grease is used to conduct heat between chips, the chips will generate more heat when the heat dissipation load is large, and the silicone grease will be subjected to more thermal stress, and its performance will also decay faster. However, in the case of higher-density chip stacking, the silicone grease needs to work for a long time in a high-temperature environment, and higher quality requirements are placed on the silicone grease.

[0004] Therefore, a new integrated circuit stacking package heat dissipation structure is needed to improve the above device. Summary of the invention

[0005] In view of the deficiencies of the prior art, the present invention provides an integrated circuit stacking package heat dissipation structure, which solves the problem that when the prior device stacks and packages the chips, the heat between the chips is highly concentrated and cannot be dissipated in time.

[0006] To achieve the above object, the present invention provides the following technical solution: an integrated circuit stacking package heat dissipation structure, comprising a substrate assembly, a chip assembly is arranged on the top of the substrate assembly, and a heat dissipation assembly is arranged on the top of the chip assembly;

[0007] A heat dissipation assembly, the heat dissipation assembly comprising a first heat conductive sheet, a second heat conductive sheet, a heat sink, a third heat conductive sheet and a first heat conductive pipe, the first heat conductive sheet is fixedly mounted on the top of the substrate assembly, the second heat conductive sheet is fixedly mounted on one side of the chip assembly, the third heat conductive sheet is arranged on the top of the chip assembly, a heat sink is arranged on the top of the third heat conductive sheet, and the first heat conductive pipe is fixedly connected to the top of the first heat conductive sheet.

[0008] Furthermore, the substrate assembly includes a substrate body, a heat dissipation groove, a first support plate, a first pin, a second support plate, a second pin and a third pin. The substrate body is arranged at the bottom of the chip assembly, and a heat dissipation groove is opened on the top of the substrate body. A first support plate is fixedly installed on one side of the substrate body, a first pin is arranged on the top of the first support plate, a second support plate is fixedly installed on the other side of the substrate body, a second pin is arranged on one side of the second support plate, and a third pin is arranged on the other side of the second support plate. Solder balls are evenly arranged on the bottom of the substrate body.

[0009] Furthermore, the chip assembly includes a first chip, a second chip, a third chip and a bonding point. The first chip is arranged at the center of the top of the heat dissipation groove, and the width of the first chip is smaller than the heat dissipation groove. The second chip is fixedly installed on the top of the first chip, and the connection between the first chip and the second chip is coated with silicone grease. The third chip is fixedly installed on the top of the second chip, and the connection between the third chip and the second chip is coated with silicone grease. Bonding points are arranged on one side of the first chip, the second chip and the third chip, and the first chip, the second chip and the third chip are staggered.

[0010] Furthermore, the bonding point at the top of the first chip is connected to the third pin via a bonding wire, the bonding point at the top of the second chip is connected to the first pin at the top of the first support plate via a bonding wire, the bonding point at the top of the third chip is connected to the second pin via a bonding wire, the end of the second chip with the bonding point is placed aligned with the card slot opened on one side of the first support plate, and the end of the third chip with the bonding point is placed aligned with the second support plate.

[0011] Furthermore, the heat dissipation assembly also includes a heat conducting plate, a second heat conducting pipe, a fourth heat conducting sheet, a third heat conducting pipe and a cooling pipe sleeve. The heat conducting plate is fixedly installed inside the heat dissipation slot, and silicone grease is evenly coated between the bottom surface of the heat conducting plate and the heat dissipation slot. The thickness of the heat conducting plate is less than the height of the heat dissipation slot. The top of the heat conducting plate is fixedly connected to the second heat conducting pipe, the fourth heat conducting sheet is arranged on the top of the second chip, the third heat conducting pipe is fixedly installed on the top of the second heat conducting sheet, and the top of the third heat conducting pipe is fixedly connected to the cooling pipe sleeve.

[0012] Furthermore, the cooling sleeve is connected to the first heat pipe, the second heat pipe and the third heat pipe respectively, and a heat pipe is arranged inside the cooling sleeve, and both ends of the heat pipe are directly in contact with the left and right ends of the first heat pipe, the second heat pipe and the third heat pipe respectively.

[0013] Furthermore, the cooling pipe sleeve is fixedly installed between the heat sink and the third heat conductive sheet. The outer shell of the cooling pipe sleeve is a graphene tube, and the interior is a fully enclosed heat pipe. Holes are respectively opened on both sides of the bottom of the graphene tube, and the heat pipes are directly in contact with the first heat conductive pipe, the second heat conductive pipe and the third heat conductive pipe through the holes.

[0014] Furthermore, the number of heat pipes of the cooling jacket is configured according to the heat flow analysis result, specifically, the steps include:

[0015] Get the heat generation and heat flux distribution of each chip, calculate the required number of heat pipes based on the heat flux density and the maximum heat transfer capacity of each heat pipe, and define the maximum heat transfer capacity of each heat pipe as Q max , the total heat is Q total , then the required number of heat pipes N is expressed as:

[0016] ;

[0017] in, Indicates rounding up.

[0018] Furthermore, the structure of the heat sink (303) is optimized by CFD simulation, specifically, the steps include:

[0019] First, a three-dimensional geometric model of the heat sink (303) and its surroundings is established, the geometric model is meshed, boundary conditions are set, a laminar flow model and a coupled heat transfer model are used, straight fins, wavy fins or serrated fins are selected, the heat dissipation effects of different shapes are compared through CFD simulation, and the fin shape with the best heat dissipation effect is selected. The fin height is determined by simulating the heat dissipation effects of different fin heights, the fin spacing is determined by simulating the heat dissipation effects of different fin spacings, and the fin angle is determined by simulating heat sinks with different inclination angles. A prototype of the heat sink (303) is made, and the heat sink (303) is tested in an actual environment to measure its heat dissipation effect and verify the accuracy of the simulation results.

[0020] Furthermore, the laminar flow model includes:

[0021] ;

[0022] ;

[0023] Wherein, u represents the fluid velocity vector; ▽ represents the gradient operator; ρ represents the fluid density; t represents time; p represents pressure; μ represents dynamic viscosity; f represents external force;

[0024] Coupled heat transfer models include:

[0025] ;

[0026] ;

[0027] ;

[0028] The overall heat transfer equation is:

[0029] ;

[0030] In the formula,

[0031] q'' c represents the convective heat transfer heat flux density; h represents the convective heat transfer coefficient; T s represents the wall temperature; T ∞ Indicates the ambient temperature;

[0032] q'' k represents the heat flux density of conduction heat transfer; k represents thermal conductivity; ▽T represents temperature gradient; q'' r represents the heat flux density of radiation heat transfer; represents the emissivity; σ represents the Stefan-Boltzmann constant, σ=5.67*10 -8 W / m 2 K 4 ; T s represents the wall temperature; T ∞ Indicates the ambient temperature;

[0033] The simulation process using the laminar flow model and coupled heat transfer model includes:

[0034] Initialization: Set initial conditions, including fluid velocity and pressure;

[0035] Solution: Use CFD software to solve the equations of the laminar flow model and coupled heat transfer model, and calculate the velocity field, pressure field and temperature field of the fluid;

[0036] Convergence check: Check whether the simulation results have converged. If not, adjust the grid or time step and solve again until the simulation results converge.

[0037] Compared with the prior art, the present invention has the following beneficial effects:

[0038] The present application provides an integrated circuit stacking package heat dissipation structure, including a substrate assembly, a chip assembly and a heat dissipation assembly. The present application has multiple significant beneficial effects:

[0039] 1. Efficient heat conduction

[0040] Application of silicone grease: Applying silicone grease between chips and between the heat conducting plate and the heat sink effectively reduces the contact thermal resistance and improves the heat conduction efficiency.

[0041] Multi-stage heat conduction structure: Through the multi-stage heat conduction structure of the first heat conduction sheet, the second heat conduction sheet, the third heat conduction sheet, the heat conduction plate, the first heat conduction pipe, the second heat conduction pipe and the third heat conduction pipe, it is ensured that the heat can be quickly transferred from the chip to the cooling sleeve and then dissipated through the heat sink.

[0042] 2. Optimized heat pipe design

[0043] Determine the number of heat pipes: Through heat flux analysis and thermal simulation software simulation, accurately calculate the number of heat pipes required to ensure that the cooling system can handle the total heat generated by the chip components.

[0044] 3. Even heat distribution

[0045] Heat pipe arrangement: The arrangement of heat pipes in the cooling jacket is optimized to ensure even heat distribution. It can be arranged in parallel or staggered, depending on the heat flow distribution and space constraints, to improve heat dissipation.

[0046] Multi-channel flow design: The interior of the cooling sleeve is designed as a multi-channel structure, which increases the heat exchange area, ensures that the coolant can flow evenly, and avoids local overheating.

[0047] 4. Excellent heat transfer efficiency

[0048] Contact between the heat pipe and the cooling sleeve: Use thermal paste or thermal pads to reduce contact thermal resistance and ensure that the contact area between the heat pipe and the cooling sleeve is as large as possible, thereby improving heat transfer efficiency.

[0049] Application of graphene tubes: Graphene tubes have excellent thermal conductivity, and their good contact with heat pipes further improves the heat transfer efficiency, ensuring that heat can be dissipated quickly.

[0050] 5. Optimized heat sink design

[0051] Shape optimization: Through CFD simulation, wave-shaped fins were selected as the shape of the heat sink to increase the surface area and improve heat transfer efficiency.

[0052] Size optimization: By simulating the heat dissipation effects of different fin heights and spacings, the optimal fin height is determined to be 8mm and the spacing is 3mm, ensuring that the total area of ​​the heat sink is 1000 square centimeters to meet the heat dissipation requirements.

[0053] Optimized arrangement: The heat sinks are arranged vertically with a spacing of 3mm to ensure smooth airflow, reduce resistance and improve heat dissipation.

[0054] 6. Compact structure and reliability

[0055] Design of the support plate and the pins: The stability and reliability of the chip assembly are ensured by the arrangement of the first support plate and the second support plate, and the connection of the first pin, the second pin and the third pin.

[0056] 7. Reduce manufacturing costs

[0057] Material selection: The heat sink is made of aluminum alloy, which has good thermal conductivity and low cost, while reducing the overall weight.

[0058] Optimized design: Through mathematical models and CFD simulation, the number and length of heat pipes and the shape, size and arrangement of heat sinks are optimized, which reduces unnecessary materials and manufacturing processes and reduces manufacturing costs.

[0059] The integrated circuit stacking package heat dissipation structure of the present application can not only efficiently dissipate the heat of the chip components quickly and efficiently to ensure the normal operation of the chip in a high temperature environment, but also has the advantages of compact structure, easy installation, and low cost, and is suitable for the heat dissipation needs of various high-performance electronic devices. BRIEF DESCRIPTION OF THE DRAWINGS

[0060] The accompanying drawings are used to provide a further understanding of the present invention and constitute a part of the specification. Together with the embodiments of the present invention, they are used to explain the present invention and do not constitute a limitation of the present invention. In the accompanying drawings:

[0061] Figure 1 It is a schematic diagram of the main structure of the integrated circuit stacking package heat dissipation structure;

[0062] Figure 2 A schematic diagram of the substrate structure of the integrated circuit stacking package heat dissipation structure;

[0063] Figure 3 It is a schematic diagram of chip pin connection of the present invention;

[0064] Figure 4 It is a schematic diagram of the main structure of the heat dissipation component of the present invention;

[0065] Figure 5 It is a schematic diagram of the exploded structure of the heat dissipation component of the present invention;

[0066] Figure 6 It is a schematic diagram of the local structure of the heat dissipation component of the present invention;

[0067] Figure 7 It is a schematic diagram of the heat pipe structure of the heat dissipation assembly of the present invention.

[0068] In the figure: 1. substrate assembly; 101. substrate body; 102. heat sink; 103. first support plate; 104. first pin; 105. second support plate; 106. second pin; 107. third pin; 2. chip assembly; 201. first chip; 202. second chip; 203. third chip; 204. bonding point; 3. heat dissipation assembly; 301. first heat conductive sheet; 302. second heat conductive sheet; 303. heat sink; 304. third heat conductive sheet; 305. first heat pipe; 306. heat conductive plate; 307. second heat pipe; 308. fourth heat conductive sheet; 309. third heat pipe; 310. cooling sleeve. DETAILED DESCRIPTION

[0069] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0070] See also Figures 1 to 7 , the present invention provides a technical solution: an integrated circuit stacking package heat dissipation structure, comprising a substrate assembly 1, a chip assembly 2 is arranged on the top of the substrate assembly 1, and a heat dissipation assembly 3 is arranged on the top of the chip assembly 2;

[0071] The substrate assembly 1 includes a substrate body 101, a heat dissipation groove 102, a first support plate 103, a first pin 104, a second support plate 105, a second pin 106 and a third pin 107. The substrate body 101 is arranged at the bottom of the chip assembly 2, and a heat dissipation groove 102 is opened on the top of the substrate body 101. The first support plate 103 is fixedly installed on one side of the substrate body 101, and the first pin 104 is arranged on the top of the first support plate 103. The second support plate 105 is fixedly installed on the other side of the substrate body 101, and the second pin 106 is arranged on one side of the second support plate 105. The third pin 107 is arranged on the other side of the second support plate 105, and solder balls are evenly arranged on the bottom of the substrate body 101.

[0072] The chip assembly 2 includes a first chip 201, a second chip 202, a third chip 203 and a bonding point 204. The first chip 201 is arranged at the center of the top of the heat dissipation groove 102, and the width of the first chip 201 is smaller than the heat dissipation groove 102. The second chip 202 is fixedly installed on the top of the first chip 201, and the connection between the first chip 201 and the second chip 202 is coated with silicone grease. The third chip 203 is fixedly installed on the top of the second chip 202, and the connection between the third chip 203 and the second chip 202 is coated with silicone grease. A bonding point 204 is arranged on one side of the first chip 201, the second chip 202 and the third chip 203, and the first chip 201, the second chip 202 and the third chip 203 are staggered.

[0073] The bonding point 204 at the top of the first chip 201 is connected to the third pin 107 via a bonding wire, the bonding point 204 at the top of the second chip 202 is connected to the first pin 104 at the top of the first support plate 103 via a bonding wire, the bonding point 204 at the top of the third chip 203 is connected to the second pin 106 via a bonding wire, the end of the second chip 202 provided with the bonding point 204 is placed aligned with the card slot opened on one side of the first support plate 103, and the end of the third chip 203 provided with the bonding point 204 is placed aligned with the second support plate 105.

[0074] It needs to be further explained that: when stacking the chips, the first chip 201 needs to be placed at the center position of the first support plate 103 and the second support plate 105, and then the first heat conductive sheet 301 is placed on the side of the first chip 201 without the bonding point 204, and the side of the second chip 202 with the bonding point 204 is aligned with the card slot on the side of the first support plate 103 for placement. At this time, the bonding point 204 on one side of the first chip 201 is bonded to the third pin 107, and the bonding point 204 on one side of the second chip 202 is bonded to the first pin 104. Next, the second heat conductive sheet 302 is placed on the top of the first chip 201, located on the side of the second chip 202 without the bonding point 204. Finally, the third chip 203 is aligned with the top of the second support plate 105 for placement, and the second pin 106 is bonded to the bonding point 204 on one side of the third chip 203.

[0075] like Figure 4 , Figure 5 , Figure 6 and Figure 7As shown, the heat dissipation assembly 3 includes a first heat conductive sheet 301, a second heat conductive sheet 302, a heat sink 303, a third heat conductive sheet 304 and a first heat pipe 305. The first heat conductive sheet 301 is fixedly mounted on the top of the substrate assembly 1, the second heat conductive sheet 302 is fixedly mounted on one side of the chip assembly 2, the third heat conductive sheet 304 is arranged on the top of the chip assembly 2, the heat sink 303 is arranged on the top of the third heat conductive sheet 304, and the first heat pipe 305 is fixedly connected to the top of the first heat conductive sheet 301.

[0076] The heat dissipation component 3 also includes a heat conducting plate 306, a second heat conducting pipe 307, a fourth heat conducting sheet 308, a third heat conducting pipe 309 and a cooling pipe sleeve 310. The heat conducting plate 306 is fixedly installed inside the heat dissipation slot 102, and silicone grease is evenly coated between the bottom surface of the heat conducting plate 306 and the heat dissipation slot 102. The thickness of the heat conducting plate 306 is less than the height of the heat dissipation slot 102. The top of the heat conducting plate 306 is fixedly connected to the second heat conducting pipe 307, the fourth heat conducting sheet 308 is arranged on the top of the second chip 202, the third heat conducting pipe 309 is fixedly installed on the top of the second heat conducting sheet 302, and the top of the third heat conducting pipe 309 is fixedly connected to the cooling pipe sleeve 310.

[0077] The cooling sleeve 310 is connected to the first heat pipe 305, the second heat pipe 307 and the third heat pipe 309 respectively, and a heat pipe is arranged inside the cooling sleeve 310, and both ends of the heat pipe are in direct contact with the left and right ends of the first heat pipe 305, the second heat pipe 307 and the third heat pipe 309 respectively.

[0078] The cooling sleeve 310 is fixedly installed between the heat sink 303 and the third heat conducting sheet 304. The outer shell of the cooling sleeve 310 is a graphene tube, and the interior is a fully enclosed heat pipe. Holes are respectively opened on both sides of the bottom of the graphene tube, and the heat pipes are directly in contact with the first heat conducting pipe 305, the second heat conducting pipe 307 and the third heat conducting pipe 309 through the holes.

[0079] It needs to be further explained that after the chip is placed and the pins are welded, the first heat pipe 305, the heat conducting plate 306 and the second heat pipe 307 between the first heat conducting sheet 301, the second heat conducting sheet 302 and the third heat conducting sheet 304 are welded respectively using solder with the same thermal resistance coefficient. At this time, the heat dissipated by the chip is conducted to the first heat conducting sheet 301, the second heat conducting sheet 302 and the third heat conducting sheet 304 through the silicone grease coated on the surface, and then conducted to the inside of the cooling sleeve 310 through the first heat conducting sheet 301, the second heat conducting sheet 302 and the third heat conducting sheet 304 respectively connected to the first heat conducting sheet 301, the second heat conducting sheet 302 and the third heat conducting sheet 304. Under the action of the heat pipe inside the cooling sleeve 310, the heat is absorbed by the heat pipe inside the cooling sleeve 310 and the external graphene tube and is finally quickly dissipated through the heat sink 303.

[0080] The working principle of the above embodiment is: first, when stacking the chips, the first chip 201 needs to be placed at the center position of the first support plate 103 and the second support plate 105, and then the first heat conductive sheet 301 is placed on the side of the first chip 201 without the bonding point 204, and the side of the second chip 202 with the bonding point 204 is aligned with the card slot on the side of the first support plate 103 for placement, at this time, the bonding point 204 on one side of the first chip 201 is bonded to the third pin 107, and the bonding point 204 on one side of the second chip 202 is bonded to the first pin 104.

[0081] Next, place the second heat conductive sheet 302 on top of the first chip 201 , on the side of the second chip 202 without the bonding point 204 , and finally place the third chip 203 on top of the second support plate 105 , and bond the second pin 106 to the bonding point 204 on one side of the third chip 203 .

[0082] Finally, solder with the same thermal resistance coefficient is used to weld the first heat pipe 305, the heat conducting plate 306 and the second heat conducting pipe 307 between the first heat conducting sheet 301, the second heat conducting sheet 302 and the third heat conducting sheet 304 respectively. At this time, the heat dissipated by the chip is transferred to the first heat conducting sheet 301, the second heat conducting sheet 302 and the third heat conducting sheet 304 through the silicone grease coated on the surface, and then transferred to the inside of the cooling sleeve 310 through the first heat conducting pipe 305, the second heat conducting pipe 307 and the third heat conducting pipe 309 respectively connected to the first heat conducting sheet 301, the second heat conducting sheet 302 and the third heat conducting sheet 304. Under the action of the heat pipe inside the cooling sleeve 310, the heat is absorbed by the heat pipe inside the cooling sleeve 310 and the external graphene tube and finally quickly dissipated through the heat sink 303.

[0083] In the present invention, the number of heat pipes and the design of the internal structure of the cooling sleeve 310 need to be determined based on the results of heat flow analysis to achieve the best cooling effect.

[0084] In order to enable the cooling sleeve 310 to efficiently realize the heat dissipation function, it is configured by the following method:

[0085] Determination of the number of heat pipes:

[0086] Heat flux density analysis: First, the heat flux density of the chip assembly needs to be analyzed in detail to determine the heat generation of each chip (first chip 201, second chip 202, and third chip 203). The heat flux distribution of each chip is obtained by simulation using thermal simulation software (such as ANSYS Fluent).

[0087] Calculation of the number of heat pipes: Calculate the number of heat pipes required based on the heat flux density and the maximum heat transfer capacity of each heat pipe. Define the maximum heat transfer capacity of each heat pipe as Q max, the total heat output is Q_total, then the required number of heat pipes N is expressed as:

[0088] ;

[0089] in, Indicates rounding up.

[0090] Internal structure design:

[0091] Heat pipe arrangement: The heat pipes should be arranged as evenly as possible in the cooling jacket 310 to ensure even heat distribution. They can be arranged in parallel or staggered, depending on the heat flow distribution and space constraints.

[0092] Contact between the heat pipe and the cooling sleeve: Ensure that the heat pipe is in good contact with the inner wall of the cooling sleeve 310, and use thermal conductive paste or thermal conductive pads to reduce contact thermal resistance. At the same time, the contact area between the heat pipe and the cooling sleeve should be as large as possible to improve heat transfer efficiency.

[0093] Internal flow channel design: The interior of the cooling sleeve 310 is designed as a multi-channel structure to increase the heat exchange area. The flow channel design should ensure that the coolant can flow evenly to avoid local overheating.

[0094] In a preferred embodiment, the total heat generated by the chip assembly is measured to be 100W, the maximum heat transfer capacity of each heat pipe is 20W, and the reserved installation margin is 15mm, then:

[0095] Number of heat pipes:

[0096] ;

[0097] The cooling sleeve 310 is designed with 5 parallel heat pipes, and the contact surface between the heat pipe and the cooling sleeve is coated with thermal paste to ensure good heat transfer. The thickness of the graphene tube is 0.3mm, and holes with a diameter of 4mm are opened on both sides of the bottom to match the diameter of the heat pipe.

[0098] Through the above design, it is ensured that the cooling sleeve 310 can efficiently and quickly dissipate the heat of the chip components in actual applications, thereby achieving a better heat dissipation effect.

[0099] The shape, size and arrangement of the heat sink 303 are crucial to improving heat dissipation efficiency. CFD (computational fluid dynamics) simulation is used to optimize the design of the heat sink to ensure smooth airflow and maximize the heat dissipation area. The specific steps include:

[0100] Geometric model establishment: First, a three-dimensional geometric model of the heat sink 303 and its surroundings is established. The model includes the shape, size, and arrangement of the heat sink, as well as the related structures of the cooling sleeve 310 and the chip assembly.

[0101] Meshing: Mesh the geometry to ensure that the mesh is high quality and of appropriate resolution to obtain accurate simulation results. Use either structured or unstructured meshes.

[0102] Boundary condition settings:

[0103] Inlet boundary conditions: Set the inlet velocity and temperature of the cooling air. The inlet velocity is set to 1m / s and the temperature is set to 25°C.

[0104] Outlet boundary condition: Set the outlet pressure or temperature of the cooling air. The outlet pressure is set to atmospheric pressure.

[0105] Wall boundary conditions: Set the wall temperature of the heat sink 303 and the cooling jacket 310. Use constant temperature or heat flux as the boundary condition.

[0106] Select the physical model, select the laminar flow model for the fluid model, and select the coupled heat transfer model (considering convection, conduction and radiation heat transfer) for the heat transfer model.

[0107] Laminar flow models include:

[0108] ;

[0109] ;

[0110] Wherein, u represents the fluid velocity vector; ▽ represents the gradient operator; ρ represents the fluid density; t represents time; p represents pressure; μ represents dynamic viscosity; f represents external force;

[0111] Coupled heat transfer models include:

[0112] ;

[0113] ;

[0114] ;

[0115] The overall heat transfer equation is:

[0116] ;

[0117] In the formula,

[0118] q'' c represents the convective heat transfer heat flux density; h represents the convective heat transfer coefficient; T s represents the wall temperature; T ∞ Indicates the ambient temperature;

[0119] q'' k represents the heat flux density of conduction heat transfer; k represents thermal conductivity; ▽T represents temperature gradient; q'' rrepresents the heat flux density of radiation heat transfer; represents the emissivity; σ represents the Stefan-Boltzmann constant, σ=5.67*10 -8 W / m 2 K 4 ; T s represents the wall temperature; T ∞ Indicates the ambient temperature;

[0120] The simulation process using the laminar flow model and coupled heat transfer model includes:

[0121] Initialization: Set initial conditions, including fluid velocity and pressure;

[0122] Solution: Use CFD software to solve the equations of the laminar flow model and the coupled heat transfer model, and calculate the velocity field, pressure field, and temperature field of the fluid; Run CFD software to solve the equations of the laminar flow model and the coupled heat transfer model, and calculate the velocity field, pressure field, and temperature field of the fluid. For example, the CFD software to be run is ANSYS Fluent software (or TAR-CCM+ or open source software such as OpenFOAM), and the equations of the laminar flow model and the coupled heat transfer model are to be solved by setting the solver: For the laminar flow model, select the pressure correction method (such as the SIMPLE algorithm) to solve. For the coupled heat transfer model, select the implicit or explicit time integration method to solve, and calculate the velocity field, pressure field, and temperature field of the fluid;

[0123] The equations of the laminar flow model and the coupled heat transfer model can also be discretized using the finite volume method (FVM). FVM is a numerical method widely used in CFD that divides the computational domain into a series of control volumes (i.e., grid cells) and applies conservation laws on each control volume to solve partial differential equations.

[0124] In the prior art, the use of CFD software to solve the equations of laminar flow models and coupled heat transfer models is very mature. These technologies have been widely used in aerospace, automotive engineering, electronic cooling and other fields.

[0125] Convergence check: Check whether the simulation results have converged. If not, adjust the grid or time step and solve again until the simulation results converge.

[0126] Shape of heat sink 303:

[0127] Fin heat sink: Designed as straight fins, wavy fins or serrated fins. Compare the heat dissipation effects of different shapes through CFD simulation and select the best solution.

[0128] Microstructure design: Add microstructures (such as microgrooves and micropillars) to the surface of the heat sink to increase the surface area and improve heat transfer efficiency.

[0129] Size Optimization:

[0130] Fin height: Determine the optimal height by simulating the heat dissipation effect of different fin heights. Generally, the fin height between 5mm and 10mm works best.

[0131] Fin spacing: Determine the optimal spacing by simulating the heat dissipation effect of different fin spacings. Generally, the fin spacing between 2mm and 5mm is the best.

[0132] Total heat sink area: Calculate the total area of ​​the heat sink to ensure that it can meet the heat dissipation requirements. This can be achieved by increasing the number of heat sinks or increasing the area of ​​a single heat sink.

[0133] Optimize the arrangement:

[0134] Vertical arrangement: The heat sink is arranged vertically to ensure smooth airflow and reduce resistance. The optimal spacing is determined by simulating vertically arranged heat sinks with different spacing.

[0135] Inclined arrangement: The tilted arrangement of the heat sink increases the disturbance of the airflow and improves the heat dissipation effect. The optimal angle is determined by simulating heat sinks with different tilt angles.

[0136] Simulation results analysis:

[0137] Temperature distribution: Analyze the temperature distribution on the surface of the heat sink 303 and the chip assembly 2 to ensure that the temperature of key parts does not exceed the safe range.

[0138] Flow field analysis: Analyze the flow of air around the heat sink 303 to ensure smooth airflow and avoid local overheating.

[0139] Heat flux density: Analyze the heat flux density distribution of the heat sink 303 to ensure that the heat can be evenly distributed and improve the heat dissipation efficiency.

[0140] Experimental verification:

[0141] Prototype production: According to the CFD simulation results, a prototype of the heat sink 303 is produced.

[0142] Experimental test: The heat sink 303 is tested in an actual environment to measure its heat dissipation effect and verify the accuracy of the simulation results.

[0143] The following optimization results were obtained through CFD simulation:

[0144] Heat sink shape: wavy fins;

[0145] Fin height: 8mm;

[0146] Fin spacing: 3mm;

[0147] Total area of ​​heat sink: 1000 square centimeters;

[0148] Arrangement: vertical arrangement, spacing is 3mm;

[0149] The specific design is as follows:

[0150] Material selection: The heat sink 303 is made of aluminum alloy, which has good thermal conductivity and is lightweight.

[0151] Shape design: The heat sink 303 is designed as a wave-shaped fin to increase the surface area and improve the heat transfer efficiency.

[0152] Dimension design: fin height is 8mm, fin spacing is 3mm, and the total heat sink area is 1000 square centimeters.

[0153] Arrangement: The heat sinks are arranged vertically with a spacing of 3mm to ensure smooth airflow.

[0154] Through the above design, it is ensured that the heat sink 303 can efficiently and quickly dissipate the heat of the chip components in actual applications, achieving a better heat dissipation effect. At the same time, the results of CFD simulation provide a scientific basis for the design, ensuring the rationality and effectiveness of the design.

[0155] Finally, it should be noted that the above are only preferred embodiments of the present invention and are not intended to limit the present invention. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art can still modify the technical solutions described in the aforementioned embodiments or replace some of the technical features therein by equivalents. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present invention shall be included in the protection scope of the present invention.

Claims

1. An integrated circuit stacking package heat dissipation structure, characterized in that: It comprises a substrate assembly (1), a chip assembly (2) is arranged on the top of the substrate assembly (1), and a heat dissipation assembly (3) is arranged on the top of the chip assembly (2); A heat dissipation assembly (3), the heat dissipation assembly (3) comprising a first heat conductive sheet (301), a second heat conductive sheet (302), a heat sink (303), a third heat conductive sheet (304) and a first heat conducting pipe (305), the first heat conductive sheet (301) being fixedly mounted on the top of a substrate assembly (1), the second heat conductive sheet (302) being fixedly mounted on one side of a chip assembly (2), the third heat conductive sheet (304) being arranged on the top of the chip assembly (2), a heat sink (303) being arranged on the top of the third heat conductive sheet (304), and the first heat conducting pipe (305) being fixedly connected to the top of the first heat conductive sheet (301); the substrate assembly (1) comprising a substrate body (101), a heat dissipation slot (102), a first support plate (103), a first heat conducting sheet (304), and a first heat conducting pipe (305). The invention relates to a chip assembly (2) having a first pin (104), a second support plate (105), a second pin (106) and a third pin (107), wherein the substrate body (101) is arranged at the bottom of the chip assembly (2), a heat dissipation groove (102) is provided on the top of the substrate body (101), a first support plate (103) is fixedly mounted on one side of the substrate body (101), a first pin (104) is provided on the top of the first support plate (103), a second support plate (105) is fixedly mounted on the other side of the substrate body (101), a second pin (106) is provided on one side of the second support plate (105), a third pin (107) is provided on the other side of the second support plate (105), and solder balls are evenly arranged on the bottom of the substrate body (101).

2. The integrated circuit stack package heat dissipation structure according to claim 1, characterized in that: The chip assembly (2) comprises a first chip (201), a second chip (202), a third chip (203) and a bonding point (204); the first chip (201) is arranged at the exact center of the top of the heat dissipation slot (102), and the width of the first chip (201) is smaller than that of the heat dissipation slot (102); the second chip (202) is fixedly mounted on the top of the first chip (201), and the connection between the first chip (201) and the second chip (202) is coated with silicone grease; the third chip (203) is fixedly mounted on the top of the second chip (202), and the connection between the third chip (203) and the second chip (202) is coated with silicone grease; the first chip (201), the second chip (202) and the third chip (203) are all provided with a bonding point (204) on one side; and the first chip (201), the second chip (202) and the third chip (203) are arranged in an alternating manner.

3. The integrated circuit stack package heat dissipation structure according to claim 2, characterized in that: The bonding point (204) at the top of the first chip (201) is connected to the third pin (107) via a bonding wire, the bonding point (204) at the top of the second chip (202) is connected to the first pin (104) at the top of the first support plate (103) via a bonding wire, the bonding point (204) at the top of the third chip (203) is connected to the second pin (106) via a bonding wire, the end of the second chip (202) provided with the bonding point (204) is placed in alignment with a slot provided on one side of the first support plate (103), and the end of the third chip (203) provided with the bonding point (204) is placed in alignment with the second support plate (105).

4. The integrated circuit stack package heat dissipation structure according to claim 1, characterized in that: The heat dissipation component (3) further comprises a heat conducting plate (306), a second heat conducting pipe (307), a fourth heat conducting sheet (308), a third heat conducting pipe (309) and a cooling pipe sleeve (310); the heat conducting plate (306) is fixedly mounted inside the heat dissipation slot (102), and silicone grease is evenly coated between the bottom surface of the heat conducting plate (306) and the heat dissipation slot (102); the thickness of the heat conducting plate (306) is less than the height of the heat dissipation slot (102); the top of the heat conducting plate (306) is fixedly connected to the second heat conducting pipe (307); the fourth heat conducting sheet (308) is arranged on the top of the second chip (202); the third heat conducting pipe (309) is fixedly mounted on the top of the second heat conducting sheet (302); and the top of the third heat conducting pipe (309) is fixedly connected to the cooling pipe sleeve (310).

5. The integrated circuit stack package heat dissipation structure according to claim 4, characterized in that: The cooling pipe sleeve (310) is respectively connected to the first heat conducting pipe (305), the second heat conducting pipe (307) and the third heat conducting pipe (309), and a heat pipe is arranged inside the cooling pipe sleeve (310), and two ends of the heat pipe are respectively in direct contact with left and right ends of the first heat conducting pipe (305), the second heat conducting pipe (307) and the third heat conducting pipe (309).

6. The integrated circuit stack package heat dissipation structure according to claim 4, characterized in that: The cooling pipe sleeve (310) is fixedly installed between the heat sink (303) and the third heat conducting sheet (304); the outer shell of the cooling pipe sleeve (310) is a graphene tube, the interior of which is a fully enclosed heat pipe, and holes are respectively provided on both sides of the bottom of the graphene tube, through which the heat pipes are in direct contact with the first heat conducting pipe (305), the second heat conducting pipe (307) and the third heat conducting pipe (309).

7. The integrated circuit stack package heat dissipation structure according to claim 4, characterized in that: The structure of the heat sink (303) is optimized by CFD simulation, specifically, the steps include: First, a three-dimensional geometric model of the heat sink (303) and its surroundings is established, the geometric model is meshed, boundary conditions are set, a laminar flow model and a coupled heat transfer model are used, straight fins, wavy fins or serrated fins are selected, the heat dissipation effects of different shapes are compared through CFD simulation, and the fin shape with the best heat dissipation effect is selected. The fin height is determined by simulating the heat dissipation effects of different fin heights, the fin spacing is determined by simulating the heat dissipation effects of different fin spacings, and the fin angle is determined by simulating heat sinks with different inclination angles. A prototype of the heat sink (303) is made, and the heat sink (303) is tested in an actual environment to measure its heat dissipation effect and verify the accuracy of the simulation results.

8. The integrated circuit stack package heat dissipation structure according to claim 7, characterized in that: The laminar flow model and coupled heat transfer model are used as follows: Laminar flow models include: ； ； Wherein, u represents the fluid velocity vector; ▽ represents the gradient operator; ρ represents the fluid density; t represents time; p represents pressure; μ represents dynamic viscosity; f represents external force; Coupled heat transfer models include: ； ； ； The overall heat transfer equation is: ； In the formula, q'' c represents the convective heat transfer heat flux density; h represents the convective heat transfer coefficient; T s represents the wall temperature; T ∞ Indicates the ambient temperature; q'' k represents the heat flux density of conduction heat transfer; k represents thermal conductivity; ▽T represents temperature gradient; q'' r represents the heat flux density of radiation heat transfer; represents the emissivity; σ represents the Stefan-Boltzmann constant, σ=5.67*10 -8 W / m 2 K 4 ; T s represents the wall temperature; T ∞ Indicates the ambient temperature; The simulation process using the laminar flow model and coupled heat transfer model includes: Initialization: Set initial conditions, including fluid velocity and pressure; Solution: Use CFD software to solve the equations of the laminar flow model and coupled heat transfer model, and calculate the velocity field, pressure field and temperature field of the fluid; Convergence check: Check whether the simulation results have converged. If not, adjust the grid or time step and solve again until the simulation results converge.

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