Wiring structure, chip, and electronic device
By adopting interlaced layer replacement structures and via connections in circuit technology, the problem of connecting signal lines of adjacent layers is solved, a compact layout design is realized, and the flexibility of space utilization and signal transmission is improved.
Patent Information
- Application Number
- CN202411355327.0
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-09-26
- Publication Date
- 2025-01-03
- Estimated Expiration
- 2044-09-26
AI Technical Summary
In circuit technology, the overlapping parallel layout of signal lines of adjacent layers cannot meet the interconnection requirements between signal lines, resulting in inconvenient signal transmission and large space occupies, affecting the space utilization of the wiring structure.
A plurality of layer-changing structures arranged in the first direction are adopted, and the interlaced arrangement of the second direction is arranged to realize the interconnection between the signal lines, reduce the total height of the signal lines, and improve the space utilization rate. Specifically, the signal lines including the connection between the first trace layer and the second trace layer are connected to each other, signal transmission is performed through vias and connection lines, and folded area design is performed when necessary to optimize the layout.
A compact projection layout and interlaced layer replacement design are realized, reducing the total height required for signal lines and improving the space utilization of the wiring structure, especially in multi-layer metal wiring environments, which significantly reduces the height occupation and maintains the Clearness and flexibility of signal paths.
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Figure CN119252824A_ABST
Abstract
Description
Technical Field
[0001] The embodiments of the present application relate to the field of circuit technology, and in particular to a wiring structure, a chip, and an electronic device. Background Art
[0002] In the field of circuit technology, different devices are connected through signal lines to form circuits, which are used to transmit electrical signals, etc. In the layout of signal lines, in order to save wiring space, there are situations where adjacent layers of signal lines overlap and run in parallel. Adjacent layers of signal lines overlap and run in parallel, which means that the projection positions of adjacent layers of signal lines overlap.
[0003] However, in some scenarios, the signal lines in two adjacent routing layers need to be connected to each other, so that the signal in the signal line of one routing layer is transmitted to the signal line of another adjacent routing layer to achieve the corresponding function. For example, the signal in the signal line of two adjacent routing layers may need to be transmitted to one of the two adjacent routing layers to connect the device. Therefore, there is an urgent need for a wiring structure, which enables the signal in the wiring structure to change the routing layer where the signal is located through the mutual connection between the adjacent layer signal lines. Summary of the invention
[0004] The embodiment of the present application provides a wiring structure, a chip and an electronic device, wherein the signal in the wiring structure can change the wiring layer where the signal is located by connecting the adjacent layer signal lines to each other. The technical solution is as follows:
[0005] On the one hand, a wiring structure is provided, the wiring structure comprising: a plurality of layer-changing structures arranged along a first direction, the plurality of layer-changing structures arranged along the first direction are sequentially distributed in a second direction and two adjacent layer-changing structures are staggered, the first direction is a routing direction of the wiring structure, and the second direction is perpendicular to the first direction;
[0006] The layer-changing structure includes a first signal line and a third signal line located in a first routing layer, and a second signal line and a fourth signal line located in a second routing layer, wherein the first routing layer and the second routing layer are adjacent to each other;
[0007] The interval between the first projection of the first signal line on the reference routing layer and the second projection of the second signal line on the reference routing layer in the second direction is less than an interval threshold, and the interval between the third projection of the third signal line on the reference routing layer and the fourth projection of the fourth signal line on the reference routing layer in the second direction is less than the interval threshold, and the reference routing layer is any routing layer in the wiring structure;
[0008] The first signal line is connected to the fourth signal line, and the second signal line is connected to the third signal line.
[0009] In a possible implementation, the wiring structure further includes: a first wiring substructure and a second wiring substructure;
[0010] The first wiring substructure comprises a first extension line of the first signal line and a second extension line of the second signal line, the first extension line is used to transmit a first electrical signal in the first wiring substructure, and the second extension line is used to transmit a second electrical signal in the first wiring substructure;
[0011] The second wiring substructure includes a third extension line of the third signal line and a fourth extension line of the fourth signal line, the third extension line is used to transmit the second electrical signal in the second wiring substructure, and the fourth extension line is used to transmit the first electrical signal in the second wiring substructure.
[0012] In a possible implementation manner, the layer-changing structure further includes a first via hole and a second via hole, the first signal line is connected to the fourth signal line through the first via hole, and the second signal line is connected to the third signal line through the second via hole.
[0013] In a possible implementation manner, the first signal line is connected to a first connection line located in the first routing layer, the first connection line is connected to the fourth signal line through the first via hole, the second signal line is connected to a second connection line located in the first routing layer through the second via hole, and the second connection line is connected to the third signal line;
[0014] Alternatively, the first signal line is connected to a third connection line located on the second routing layer through the first via, the third connection line is connected to the fourth signal line, the second signal line is connected to a fourth connection line located on the second routing layer, and the fourth connection line is connected to the third signal line through the second via.
[0015] In a possible implementation manner, the first via includes a first sub-via and a second sub-via, and the first sub-via and the second sub-via are both used to connect the first signal line and the fourth signal line;
[0016] The second via includes a third sub-via and a fourth sub-via, and the third sub-via and the fourth sub-via are both used to connect the second signal line and the third signal line.
[0017] In a possible implementation, the second wiring substructure includes a folding area, and the third extension line and the fourth extension line in the folding area are folded at a reference distance so that the interval between the extended line of the fifth projection and the sixth projection in the second direction is less than the interval threshold, the fifth projection is the projection of the first extension line on the reference routing layer, and the sixth projection is the projection of the folded third extension line or the folded fourth extension line on the reference routing layer.
[0018] In a possible implementation, the folding area includes a first sub-folding area and a second sub-folding area, the third extension line folds the reference distance in the first sub-folding area, and the fourth extension line folds the reference distance in the second sub-folding area.
[0019] In a possible implementation, one layer-changing structure corresponds to one folding area, and a plurality of folding areas arranged along the first direction are distributed in sequence in the second direction, and two adjacent folding areas are arranged in an alternating manner.
[0020] In a possible implementation manner, the reference distance is the sum of a distance between two adjacent first signal lines and a width of the first signal line.
[0021] On the other hand, a chip is provided, the chip comprising any of the wiring structures described above, the wiring structure being used to connect at least two electronic devices.
[0022] On the other hand, an electronic device is provided, comprising any one of the chips described above.
[0023] The technical solution provided by the embodiments of the present application brings at least the following beneficial effects:
[0024] The technical solution provided by the present application arranges multiple layer-changing structures in sequence along the first direction, and reasonably utilizes the assembly space of the wiring structure in the first direction. On this basis, multiple layer-changing structures are staggered in the second direction, and the size of the combined structure formed by any two adjacent layer-changing structures in the second direction is smaller than the sum of the sizes of the two layer-changing structures in the second direction, thereby realizing a compact projection layout and staggered layer-changing design. Through the compact projection layout and staggered layer-changing design, the total height required for routing is effectively reduced, and the occupied space can be reduced on the basis of changing the routing layer where the signal is located, thereby improving the space utilization rate of the wiring structure. BRIEF DESCRIPTION OF THE DRAWINGS
[0025] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings required for use in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.
[0026] Figure 1 It is a schematic diagram of a layer-changing structure in the related art;
[0027] Figure 2 It is an application scenario of a layer-changing structure in the related technology;
[0028] Figure 3 It is a schematic diagram of a wiring structure provided in an embodiment of the present application;
[0029] Figure 4 This is another wiring structure schematic diagram provided in an embodiment of the present application;
[0030] Figure 5 This is another wiring structure schematic diagram provided in an embodiment of the present application;
[0031] Figure 6 This is another wiring structure schematic diagram provided in an embodiment of the present application;
[0032] Figure 7 This is another wiring structure schematic diagram provided in an embodiment of the present application;
[0033] Figure 8 This is another schematic diagram of a wiring structure provided in an embodiment of the present application. DETAILED DESCRIPTION
[0034] In order to make the objectives, technical solutions and advantages of the present application clearer, the implementation methods of the present application will be further described in detail below with reference to the accompanying drawings.
[0035] It should be noted that the terms "first", "second", etc. in the specification of the present application are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence. It should be understood that the data used in this way can be interchangeable where appropriate, so that the embodiments of the present application described here can be implemented in an order other than those illustrated or described here. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with the present application. On the contrary, they are merely examples of devices and methods consistent with some aspects of the present application.
[0036] In the field of circuit technology, the various components in the circuit are connected by wires (or signal lines) to form a complete circuit path, thereby realizing the transmission of electrical signals. Due to the limited space inside the circuit board or chip, it is necessary to reasonably layout the routing to save wiring space. For example, a routing layout method is adopted in which adjacent layers of signal lines overlap and run in parallel. That is, the circuit board or chip includes multiple routing layers, and signal lines are laid out on different routing layers. The vertical projections of the signal lines laid out on different routing layers on the same routing layer overlap, but no actual physical contact occurs, thereby increasing the density of the signal lines without increasing the additional space occupied, thereby saving the space occupied by the signal lines.
[0037] However, in some cases, simply relying on overlapping and parallel routing of signal lines in adjacent layers cannot meet design requirements. For example, when two signal lines originally located on different layers need to be connected to the same routing layer, the routing layers of signal lines on different routing layers need to be interchanged. This allows signal lines originally on one routing layer to be routed to another routing layer in a certain area.
[0038] See also Figure 1 A schematic diagram of a layer-changing structure in the related art shown, signal line A is in routing layer N-1, signal line B is in routing layer N, and N is a positive integer greater than 2. The routing layers are numbered in order from the bottom to the top, and the N-layer routing layer represents the upper layer relative to the N-1-layer routing layer. The N-layer routing layer and the N-1-layer routing layer are two adjacent routing layers. In the layer-changing area A, the left signal line B and the right signal line A are connected by vias, and the signal B from the left signal line B can be transmitted to the right signal line A through the vias. That is, in the layer-changing area A, signal B is transmitted from routing layer N to routing layer N-1. In the layer-changing area B, the left signal line A and the right signal line B are connected by vias, and the signal A from the left signal line A can be transmitted to the right signal line B through the vias. That is, in the layer-changing area B, signal A is transmitted from routing layer N-1 to routing layer N.
[0039] See also Figure 2 An application scenario of a layer-changing structure in the related technology shown in FIG. Figure 2 That is Figure 1 In the application scenario of the routing layer-changing structure shown in the figure, signal line C is in routing layer N-2. In the layer-changing area C, signal A is transmitted from the left signal line A to the left signal line C through the vias between routing layer N-1 and routing layer N-2. In the layer-changing area D, signal B is transmitted from the right signal line A to the right signal line C through the vias between routing layer N-1 and routing layer N-2. Thus, both signal A and signal B can be transmitted to signal line C, and signal line C may be connected to external devices.
[0040] Among them, signal A may be sent by component A, through the left signal line A, and transmitted to the left signal line C through the via between the routing layer N-1 and the routing layer N-2 in the layer change area C, and then transmitted to the external device through the left signal line C. In addition, signal A can also pass through the left signal line A, and be transmitted from the left signal line A to the right signal line B in the layer change area B, until it is transmitted to other devices connected to the right signal line B ( Figure 2 ). For example, the element A may be a temperature sensor, which transmits the signal A (that is, the temperature signal) to an external device (which may be a temperature regulating device, such as a fan), thereby achieving temperature regulation.
[0041] Signal B may be sent by component B, through the left signal line B, transmitted from the left signal line B to the right signal line A in the layer change area A, transmitted to the right signal line C through the via between the routing layer N-1 and the routing layer N-2 in the layer change area D, and transmitted to the external device through the right signal line C. In addition, signal B can also be transmitted to other devices connected to the right signal line A after being transmitted to the right signal line A ( Figure 2 ). Exemplarily, element B may be a light intensity sensor, which transmits signal B (e.g., a light intensity signal) to an external device (possibly a steering motor), thereby achieving steering, and the intensity of the received light is increased by steering until the received light intensity reaches a higher angle.
[0042] But in Figure 1 and Figure 2 In the related art shown, the layer-changing area A occupies a large space, which will affect the layout of other signal lines, and may increase the difficulty of the layout of the remaining signal lines, or cause a waste of routing layout space.
[0043] The embodiment of the present application provides a wiring structure that can reduce the space occupied by the signal line layer on the basis of replacing the signal routing layer, thereby improving the space utilization of the wiring structure. Figure 3 , Figure 3 This is a schematic diagram of a wiring structure provided in an embodiment of the present application. Figure 3 The wiring structure shown includes a layer-changing structure 301, in which the signal lines between two adjacent wiring layers are connected to each other, thereby changing the wiring layer where the signal is located. Figure 3 Based on Figure 4 Another wiring structure shown, Figure 4 for Figure 3 A partially enlarged schematic diagram of .
[0044] Figure 4The wiring structure shown includes: multiple layer-changing structures 301 arranged along a first direction; multiple layer-changing structures 301 arranged along the first direction are distributed in sequence in a second direction and two adjacent layer-changing structures 301 are arranged alternately. The first direction is the routing direction of the wiring structure, and the second direction is perpendicular to the first direction.
[0045] The layer-changing structure 301 includes a first signal line 3011, a second signal line 3012, a third signal line 3013 and a fourth signal line 3014. The first signal line 3011 and the third signal line 3013 are located in a first routing layer, the second signal line 3012 and the fourth signal line 3014 are located in a second routing layer, and the first routing layer and the second routing layer are adjacent. The interval in the second direction between the first projection of the first signal line 3011 on the reference routing layer and the second projection of the second signal line 3012 on the reference routing layer is less than the interval threshold, the interval in the second direction between the third projection of the third signal line 3013 on the reference routing layer and the fourth projection of the fourth signal line 3014 on the reference routing layer is less than the interval threshold, and the reference routing layer is any routing layer in the wiring structure. The first signal line 3011 is connected to the fourth signal line 3014, and the second signal line 3012 is connected to the third signal line 3013.
[0046] In the embodiment of the present application, the first signal line 3011 and the third signal line 3013 are both located in the first routing layer, for transmitting different signals or serving different circuit functions. The second signal line 3012 and the fourth signal line 3014 are located in the second routing layer adjacent to the first routing layer. The signal lines between the two adjacent routing layers of the first routing layer and the second routing layer can be changed. The embodiment of the present application does not limit the type of signal line, for example, it can be a bus (BUS), which is a public communication trunk line for transmitting information between various functional components, and is a transmission line bundle composed of wires. According to the type of information transmitted by the computer, the bus can be divided into a data bus, an address bus and a control bus, which are used to transmit data, data addresses and control signals respectively.
[0047] Among them, the interval threshold in the embodiment of the present application is the interval value of the routing layer where two signal lines selected according to the requirements cannot realize the exchange at the same time. Taking the first signal line 3011 and the second signal line 3012 as an example, the interval less than the interval threshold is used to indicate that the first signal line 3011 and the second signal line 3012 are basically free of interval in the second direction, that is, perpendicular to the routing direction, from the top view perspective. In other words, if the first signal line 3011 and the second signal line 3012 want to realize the layer change at the same time, it cannot be realized when the interval between the two in the second direction is less than the interval threshold. Optionally, the interval between the two in the second direction can be 0, that is, there is no interval.
[0048] In the second direction, the interval between the projection of the first signal line 3011 on the reference routing layer and the projection of the second signal line 3012 on the reference routing layer is less than the interval threshold, that is, from the top view of the wiring structure, the interval between the first signal line 3011 and the second signal line 3012 in the direction perpendicular to the extension of the signal lines (that is, the second direction) is less than the interval threshold, but they are located in different routing layers. The projection object of the embodiment of the present application is any routing layer. The interval between the projection of the third signal line 3013 on the reference routing layer and the projection of the fourth signal line 3014 on the reference routing layer is also less than the interval threshold.
[0049] The third projection of the third signal line 3013 is spaced apart from the first projection of the first signal line 3011 by a reference distance in the second direction, and the reference distance is also the distance by which the entire wiring structure is higher than before the layer-changing structure is laid out. Figure 3 The wiring structure shown is similar to Figure 1 or Figure 2 From the wiring structure provided by the related art shown in FIG. 1 , the reference distance is smaller than the sum of the widths of the plurality of signal lines and the spacings between the plurality of signal lines. That is, the reference distance is smaller than Figure 1 or Figure 2 The height of the layer change area A is shown.
[0050] In the wiring structure as described above, multiple layer-changing structures are arranged in sequence along the first direction, which reasonably utilizes the assembly space of the wiring structure in the first direction. On this basis, multiple layer-changing structures are staggered in the second direction, and the size of the combined structure formed by any two adjacent layer-changing structures in the second direction is smaller than the sum of the sizes of the two layer-changing structures in the second direction, thereby realizing a compact projection layout and staggered layer-changing design. Through the compact projection layout and staggered layer-changing design, the total height required for routing is effectively reduced, and the occupied space can be reduced on the basis of changing the routing layer where the signal is located, thereby improving the space utilization of the wiring structure, especially in a multi-layer metal wiring environment, where the reduced height is more obvious. In addition, the use of vias ensures that the signal is continuously transmitted between different metal layers without interruption. The embodiment of the present application reduces the space occupied by layer changes, and multiple signal lines can be flexibly arranged in a limited space while keeping the signal path clear.
[0051] In a possible implementation, the wiring structure further includes: a first wiring substructure 302 and a second wiring substructure 303. The first wiring substructure 302 includes a first extension line 3021 of the first signal line 3011 and a second extension line 3022 of the second signal line 3012, the first extension line 3021 is used to transmit a first electrical signal in the first wiring substructure 302, and the second extension line 3022 is used to transmit a second electrical signal in the first wiring substructure 302; the second wiring substructure 303 includes a third extension line 3033 of the third signal line 3013 and a fourth extension line 3034 of the fourth signal line 3014, the third extension line 3033 is used to transmit a second electrical signal in the second wiring substructure 303, and the fourth extension line 3034 is used to transmit a first electrical signal in the second wiring substructure 303.
[0052] The first wiring substructure 302 is composed of a first extension line 3021 of the first signal line 3011 and a second extension line 3022 of the second signal line 3012. The two extension lines are extended from the signal lines in the wiring structure. It can be understood that the first extension line 3021 and the first signal line 3011 are the same signal line, and the second extension line 3022 and the second signal line 3012 are the same signal line. Figure 4 The number of the overlapping part indicates only one signal line. For example, 3022 indicates only an extension line extending from the signal line located in the second routing layer.
[0053] Based on the above structure, the path of the first electrical signal may sequentially pass through the first extension line 3021, the first signal line 3011, the fourth signal line 3014 and the third extension line 3034. The path of the second electrical signal may sequentially pass through the second extension line 3022, the second signal line 3012, the third signal line 3013 and the third extension line 3033.
[0054] Optionally, the wiring structure also includes a third routing layer adjacent to the second routing layer, and the second extension line 3022 is used to connect the first device to the first wiring substructure 302 through a third via between the second routing layer and the third routing layer, and the second routing layer and the third routing layer are adjacent; the fourth extension line 3034 is used to connect the second device to the second wiring substructure 303 through a fourth via between the second routing layer and the third routing layer.
[0055] The second extension line 3022 can be connected to the first device in the first wiring substructure 302 through the third via between the second routing layer and the third routing layer. The second routing layer and the third routing layer are adjacent routing layers, and the vias between the adjacent routing layers allow the signal line to be vertically transmitted between different layers. This design allows the signal to flexibly cross multiple metal layers, thereby connecting to devices located on different layers. Among them, the above-mentioned first device and the second device can be flexibly adjusted according to the application scenario, and the embodiment of the present application does not limit the first device and the second device connected.
[0056] In addition, the second wiring substructure 303 is similar to the first wiring substructure 302, and the second wiring substructure 303 is composed of a third extension line 3033 of the third signal line 3013 and a fourth extension line 3034 of the fourth signal line 3014. It can also be understood that the third extension line 3033 and the third signal line 3013 are the same signal line, and the fourth extension line 3034 and the fourth signal line 3014 are the same signal line. The fourth extension line 3034 can establish a connection with the second device in the second wiring substructure 303 through a fourth via located between the second routing layer and the third routing layer.
[0057] The design of the second wiring substructure 303 corresponds to the first wiring substructure 302, so that the signal line can cross the metal layer as needed and connect to the devices located on different routing layers, thereby supporting more complex and diversified circuit designs.
[0058] In a possible implementation, the wiring structure includes a plurality of layer-changing structures 301 arranged along a first direction, and the plurality of layer-changing structures 301 arranged along the first direction are sequentially distributed in a second direction and two adjacent layer-changing structures 301 are arranged in an alternating manner. Figure 3 As shown, the layer-changing structures 301 are arranged in a stair-like manner perpendicular to the extension direction of the signal line, that is, each layer-changing structure 301 may be offset relative to its adjacent layer-changing structure in a direction perpendicular to the first direction (i.e., the second direction), forming a hierarchical structure similar to a staircase. In the application scenarios of the wiring structure, such as highly integrated chips, the wiring requirements are often very complex, and the stair-like arrangement provides more layout options and flexibility.
[0059] In a possible implementation, the first signal line 3011 is connected to the fourth signal line 3014 through the first via 3015, and the second signal line 3012 is connected to the third signal line 3013 through the second via 3016, including: the first signal line 3011 is connected to the first connecting line located in the first routing layer, the first connecting line is connected to the fourth signal line 3014 through the first via 3015, the second signal line 3012 is connected to the second connecting line located in the first routing layer through the second via 3016, and the second connecting line is connected to the third signal line 3013.
[0060] That is, the first signal line 3011 is first connected to a first connection line located in the first routing layer, and the first connection line vertically passes through the first via 3015 to the routing layer where the fourth signal line 3014 is located to establish a connection with the fourth signal line 3014. The second signal line 3012 is connected to the second connection line located in the first routing layer through the second via 3016, and the second connection line is connected to the third signal line 3013 in the same routing layer.
[0061] The use of connecting wires as intermediaries provides greater flexibility. In some cases, directly connecting signal lines may be subject to space limitations or wiring rules. By using connecting wires, space can be used more efficiently and wiring conflicts can be avoided. In some manufacturing processes, directly establishing via connections between different layers may increase difficulty and cost. By using connecting wires, the manufacturing process can be simplified and production costs can be reduced. The width, length and shape of the connecting wires in the embodiments of the present application need to be designed according to specific wiring requirements and process limitations so that the connecting wires can carry the required current and signals.
[0062] Alternatively, see Figure 5 Another wiring structure schematic diagram is shown, wherein the first signal line 3011 is connected to the third connection line located on the second routing layer through the first via 3015, the third connection line is connected to the fourth signal line 3014, the second signal line 3012 is connected to the fourth connection line located on the second routing layer, and the fourth connection line is connected to the third signal line 3013 through the second via 3016.
[0063] The first signal line 3011 vertically passes through the first via 3015 to the second routing layer. In the second routing layer, the first signal line 3011 is connected to the third connection line, and the third connection line is connected to the fourth signal line 3014 in the second routing layer. The second signal line 3012 is connected to a fourth connection line located in the second routing layer, and the fourth connection line vertically passes through the second via 3016 to the routing layer where the third signal line 3013 is located. In the routing layer where the third signal line 3013 is located, the fourth connection line or the extension of the fourth connection line after the second via is connected to the third signal line 3013.
[0064] In a possible implementation, the reference distance is the sum of the distance between two adjacent first signal lines 3011 and the width of the first signal line 3011. The distance between two adjacent first signal lines 3011 refers to the distance between any two adjacent first signal lines 3011 in the second direction in a multi-layer wiring or circuit board layout. Exemplarily, the distance between two adjacent first signal lines 3011 is the distance between the bottom side of one first signal line 3011 and the top side of another adjacent first signal line 3011. Figure 3As shown, the vertical distance between two adjacent first signal lines 3011 can be Figure 3 b in the figure. The distance between two adjacent first signal lines 3011 needs to ensure that the signal lines do not interfere with each other or short-circuit. Each first signal line 3011 has a certain width, and the width determines the current and signal quality that the signal line can carry. The reference distance provides a standardized measurement method, which makes it easier to compare the signal line spacing and width in different design schemes, so as to make reasonable layout decisions.
[0065] By controlling the reference distance, we can ensure that the interference between adjacent signal lines remains within an acceptable range, thereby protecting the integrity of the signal and the stability of the system. In multi-layer wiring design, space is a very valuable resource. By accurately calculating the reference distance, we can use space more effectively, avoid unnecessary waste, and meet complex wiring requirements. Figure 3 , the distance between two adjacent first signal lines 3011 is Figure 3 b in the figure, the width of the first signal line 3011 is Figure 3 a in. Figure 3 The width of the first signal line 3011 is equal to the width of the first extension line.
[0066] In a possible embodiment, the first via 3015 includes a first sub-via 30151 and a second sub-via 30152, and the first sub-via 30151 and the second sub-via 30152 are both used to connect the first signal line 3011 and the fourth signal line 3014, and the second via 3016 includes a third sub-via 30161 and a fourth sub-via 30162, and the third sub-via 30161 and the fourth sub-via 30162 are both used to connect the second signal line 3012 and the third signal line 3013.
[0067] The first via 3015 is used to connect signal lines between different layers. The first via 3015 is subdivided into two sub-vias, namely, a first sub-via 30151 and a second sub-via 30152. The two sub-vias may be arranged side by side or in other ways, depending on design requirements. The second via 3016 is similar to the first via 3015 and is subdivided into two sub-vias, namely, a third sub-via 30161 and a fourth sub-via 30162.
[0068] By using two sub-vias instead of a single via, the number of connection points can be increased, thereby improving the reliability of the connection. Even if one of the sub-vias fails, the other sub-via can still maintain the connection, reducing the risk of connection failure.
[0069] For example, see Figure 6 Another wiring structure diagram shown in FIG. Figure 6The first via hole 3015 and the second via hole 3016 have only one sub-via hole, and the embodiment of the present application does not limit the number of sub-via holes included in one via hole.
[0070] In one possible implementation, see Figure 7 Another wiring structure schematic diagram is shown, the second wiring substructure 303 includes a folding area 304, the third extension line 3033 and the fourth extension line 3034 in the folding area 304 are folded at a reference distance so that the interval between the extension line of the fifth projection and the sixth projection in the second direction is less than the interval threshold, the fifth projection is the projection of the first extension line 3021 on the reference routing layer, and the sixth projection is the projection of the folded third extension line 3033 or the folded fourth extension line 3034 on the reference routing layer.
[0071] The folding area 304 is a portion of the second wiring substructure 303, wherein the third extension line 3033 and the fourth extension line 3034 are folded. The folding process means that the third extension line 3033 and the fourth extension line 3034 are bent or folded in space to reduce the occupied space of the third extension line 3033 and the fourth extension line 3034 in the second direction.
[0072] The folding operation is performed based on the reference distance, which determines the position and shape that the third extension line 3033 and the fourth extension line 3034 should reach after folding. The projection of the third extension line 3033 and the fourth extension line 3034 on the reference routing layer after folding and the projection of the first extension line 3021 on the reference routing layer in the second direction are less than the spacing threshold. By folding the third extension line 3033 and the fourth extension line 3034, the third extension line 3033 and the fourth extension line 3034 can be arranged parallel to the first extension line 3021 in a specific direction without increasing the additional space occupation, thereby saving space and improving wiring density.
[0073] In one possible implementation, see Figure 8 Another wiring structure schematic diagram is shown, the folding area 304 includes a first sub-folding area 3041 and a second sub-folding area 3042, the third extension line 3033 is folded at a reference distance in the first sub-folding area 3041, and the fourth extension line 3034 is folded at a reference distance in the second sub-folding area 3042.
[0074] The folding area 304 may be subdivided into two sub-areas, a first sub-folding area 3041 and a second sub-folding area 3042. Different folding areas may be determined based on the arrangement of signal lines in the wiring structure, which is not limited in the embodiment of the present application.
[0075] In a possible implementation, the wiring structure includes a plurality of layer-changing structures 301 arranged along a first direction, one layer-changing structure 301 corresponds to one folding region 304, and the plurality of folding regions 304 arranged along the first direction are sequentially distributed in a second direction and two adjacent folding regions 304 are staggered.
[0076] When multiple folding areas 304 are distributed along the second direction, they present a step-like shape. Each section of the third extension line 3033 corresponds to a folding area 304, within which the third extension line performs a folding operation. In the stepped arrangement, different folding areas 304 will have different positions in the second direction. The folding areas will not be on the same horizontal line, but will be in a staggered state. This helps to optimize the wiring space so that more routing lines can be accommodated in a limited area. Secondly, the stepped arrangement may help reduce the crossing and interference between different routing lines and improve the reliability and stability of signal transmission.
[0077] When designing the stepped arrangement, it is necessary to plan the position and size of each folding area 304. This includes determining the relative height difference, spacing between them, and the shape and size of the overall layout. The overall layout of the circuit board, signal transmission requirements, and manufacturing process limitations should be fully considered during the design.
[0078] In summary, the wiring structure provided in the embodiment of the present application optimizes the signal line connection and space utilization in the multi-layer circuit board by arranging the positional relationship of the signal lines, that is, the staggered layout of the third signal line and the first signal line. The third signal line and the first signal line are staggered at a certain reference distance in the second direction, which provides the possibility for flexible connection of the signal lines. Due to the staggered position of the third signal line and the first signal line, the signal lines located in different routing layers (such as the third signal line of the first routing layer and the second signal line of the second routing layer) can be directly connected through vias without the need for a complex winding layout, thereby simplifying the wiring complexity. Compared with the situation in the related art where the signal lines need to make a lot of detours to avoid interference, the staggered layout design of the present application reduces the space occupied by the connecting lines.
[0079] An embodiment of the present application provides a chip, which includes any one of the above-mentioned wiring structures, and the wiring structure is used to connect at least two electronic devices. The wiring structure has a low space occupancy rate, which reduces the design and manufacturing cost of the chip.
[0080] Optionally, the chip provided in the embodiments of the present application may be applied to an electronic device. The embodiments of the present application also provide an electronic device, which includes the wiring structure provided in the above embodiments.
[0081] The embodiments of the present application do not limit the type of electronic device. For example, the electronic device can be a terminal or a server. The terminal can be a PC (Personal Computer), a mobile phone, a smart phone, a PDA (Personal Digital Assistant), a wearable device, a PPC (Pocket PC), a tablet computer, a smart car machine, a smart TV, a smart speaker, etc. The server can be a single server, a server cluster consisting of multiple servers, or a cloud computing service center.
[0082] Those skilled in the art should understand that the above-mentioned terminals and servers are examples, and other existing or future terminals and servers, if applicable to the present application, should also be included in the protection scope of the present application and are included here by reference.
[0083] It should be understood that the "plurality" mentioned in this article refers to two or more. "And / or" describes the association relationship of the associated objects, indicating that there can be three relationships. For example, A and / or B can mean: A exists alone, A and B exist at the same time, and B exists alone. The character " / " generally indicates that the associated objects are in an "or" relationship.
[0084] The above description is only an exemplary embodiment of the present application and is not intended to limit the present application. Any modifications, equivalent substitutions, improvements, etc. made within the principles of the present application shall be included in the protection scope of the present application.
Claims
1. A wiring structure, characterized in that: The wiring structure comprises: a plurality of layer-changing structures arranged along a first direction, the plurality of layer-changing structures arranged along the first direction are sequentially distributed in a second direction and two adjacent layer-changing structures are staggered, the first direction is the routing direction of the wiring structure, and the second direction is perpendicular to the first direction; The layer-changing structure includes a first signal line and a third signal line located in a first routing layer, and a second signal line and a fourth signal line located in a second routing layer, wherein the first routing layer and the second routing layer are adjacent to each other; The interval between the first projection of the first signal line on the reference routing layer and the second projection of the second signal line on the reference routing layer in the second direction is less than an interval threshold, and the interval between the third projection of the third signal line on the reference routing layer and the fourth projection of the fourth signal line on the reference routing layer in the second direction is less than the interval threshold, and the reference routing layer is any routing layer in the wiring structure; The first signal line is connected to the fourth signal line, and the second signal line is connected to the third signal line.
2. The wiring structure according to claim 1, characterized in that: The wiring structure further includes: a first wiring substructure and a second wiring substructure; The first wiring substructure comprises a first extension line of the first signal line and a second extension line of the second signal line, the first extension line is used to transmit a first electrical signal in the first wiring substructure, and the second extension line is used to transmit a second electrical signal in the first wiring substructure; The second wiring substructure includes a third extension line of the third signal line and a fourth extension line of the fourth signal line, the third extension line is used to transmit the second electrical signal in the second wiring substructure, and the fourth extension line is used to transmit the first electrical signal in the second wiring substructure.
3. The wiring structure according to claim 1 or 2, characterized in that: The layer-changing structure further includes a first via hole and a second via hole, the first signal line is connected to the fourth signal line through the first via hole, and the second signal line is connected to the third signal line through the second via hole.
4. The wiring structure according to claim 3, characterized in that: The first signal line is connected to a first connection line located in the first wiring layer, the first connection line is connected to the fourth signal line through the first via hole, the second signal line is connected to a second connection line located in the first wiring layer through the second via hole, and the second connection line is connected to the third signal line; Alternatively, the first signal line is connected to a third connection line located on the second routing layer through the first via, the third connection line is connected to the fourth signal line, the second signal line is connected to a fourth connection line located on the second routing layer, and the fourth connection line is connected to the third signal line through the second via.
5. The wiring structure according to claim 3, characterized in that: The first via hole includes a first sub-via hole and a second sub-via hole, and the first sub-via hole and the second sub-via hole are both used to connect the first signal line and the fourth signal line; The second via includes a third sub-via and a fourth sub-via, and the third sub-via and the fourth sub-via are both used to connect the second signal line and the third signal line.
6. The wiring structure according to claim 2, characterized in that: The second wiring substructure includes a folding area, and the third extension line and the fourth extension line in the folding area are folded at a reference distance so that the interval between the extended line of the fifth projection and the sixth projection in the second direction is less than the interval threshold, the fifth projection is the projection of the first extension line on the reference routing layer, and the sixth projection is the projection of the folded third extension line or the folded fourth extension line on the reference routing layer.
7. The wiring structure according to claim 6, characterized in that: The folding region includes a first sub-folding region and a second sub-folding region, the third extension line folds the reference distance in the first sub-folding region, and the fourth extension line folds the reference distance in the second sub-folding region.
8. The wiring structure according to claim 6 or 7, characterized in that: One layer-changing structure corresponds to one folding area, and a plurality of folding areas arranged along the first direction are distributed in sequence in the second direction, and two adjacent folding areas are arranged in an alternating manner.
9. The wiring structure according to claim 6 or 7, characterized in that: The reference distance is the sum of a distance between two adjacent first signal lines and a width of the first signal line.
10. A chip, characterized in that: The chip comprises the wiring structure according to any one of claims 1 to 9, and the wiring structure is used to connect the at least two electronic devices.
11. An electronic device, characterized in that: The electronic device comprises the chip according to claim 10.
Citation Information
Patent Citations
Array substrate and manufacturing method thereof and display device
CN105097843A
Trace structure and chip comprising the same
CN109473419A
Array substrate
CN109932848A
