Light detection device, driving method thereof, and electronic apparatus

Abstract

The present technology relates to a solid-state imaging device capable of outputting a phase difference signal without lowering a frame rate, a method for driving the same, and an electronic apparatus. The solid-state imaging device is provided with a pixel array unit in which a color filter and one microlens of the same color are two-dimensionally arranged in a matrix for a plurality of pixels in a microlens unit in which the plurality of pixels are arranged. Pixel rows of at least a portion of the pixel array unit include: a first signal line transmitting a driving signal for driving a first transfer transistor of a first pixel in a microlens unit including a color filter of a first color; a second signal line that transmits a driving signal for driving a second transfer transistor of a second pixel different from the first pixel; and a third signal line transmitting a driving signal for driving a third transfer transistor of a third pixel in a microlens unit including a color filter of a second color different from the first color. The present technology can be applied to, for example, a solid-state imaging device.

Description

[0001] This application is a divisional application of patent application No. 202080037125.5, whose application date is June 18, 2020 and whose invention name is “Solid-state imaging device, its driving method and electronic device”. Technical Field

[0002] The present technology relates to a solid-state imaging device, a driving method thereof, and an electronic device, and more particularly, to a solid-state imaging device capable of outputting a phase difference signal without reducing a frame rate, a driving method thereof, and an electronic device. Background Art

[0003] There is a solid-state imaging device having a structure in which one microlens is configured for four pixels of 2×2 each including two pixels in the vertical direction and the horizontal direction, and a floating diffusion (FD) is shared by four pixels (for example, see Patent Document 1). In a solid-state imaging device having such a microlens configuration, it is possible to detect a phase difference by acquiring the charge accumulated in the photodiode of each pixel in units of two pixels on one side.

[0004] Citation list

[0005] Patent Literature

[0006] Patent Document 1: Japanese Patent Application Laid-Open No. 2016-052041 Summary of the invention

[0007] Problem that the invention aims to solve

[0008] However, in order to detect the phase difference, generally speaking, two readouts are required, namely, charge readout of two pixels on one side below the microlens and charge readout of the remaining two pixels or all four pixels, resulting in a decrease in the frame rate.

[0009] The present technology has been made in view of such circumstances, and enables output of a phase difference signal without reducing the frame rate.

[0010] Solution to the problem

[0011] A solid-state imaging device according to a first aspect of the present technology includes a pixel array unit, wherein a plurality of pixels in a microlens unit in which color filters of the same color and one microlens are configured for a plurality of pixels are two-dimensionally arranged in a matrix, wherein a pixel row of at least a portion of the pixel array unit includes: a first signal line configured to transmit a drive signal of a first transfer transistor for driving a first pixel in a microlens unit having a color filter of a first color; a second signal line configured to transmit a drive signal of a second transfer transistor for driving a second pixel different from the first pixel in the microlens unit having a color filter of the first color; and a third signal line configured to transmit a drive signal of a third transfer transistor for driving a third pixel in a microlens unit having a color filter of a second color different from the first color.

[0012] According to a second aspect of the present technology, a driving method for a solid-state imaging device, the solid-state imaging device includes a pixel array unit and first to third signal lines in a pixel row located in at least a part of the pixel array unit, wherein a plurality of pixels in a microlens unit in which a color filter of the same color and a microlens are configured for a plurality of pixels are two-dimensionally arranged in a matrix, the method including: driving a first transfer transistor of a first pixel in a microlens unit having a color filter of a first color via a first signal line; driving a second transfer transistor of a second pixel different from the first pixel in the microlens unit having a color filter of the first color via a second signal line; and driving a third transfer transistor of a third pixel in a microlens unit having a color filter of a second color different from the first color via a third signal line.

[0013] An electronic device according to a third aspect of the present technology includes: a solid-state imaging device, the solid-state imaging device including a pixel array unit, wherein a plurality of pixels in a microlens unit in which a color filter of the same color and a microlens are configured for a plurality of pixels are two-dimensionally arranged in a matrix, wherein a pixel row of at least a portion of the pixel array unit includes: a first signal line configured to transmit a drive signal of a first transfer transistor for driving a first pixel in a microlens unit including a color filter of a first color; a second signal line configured to transmit a drive signal of a second transfer transistor for driving a second pixel different from the first pixel in the microlens unit including the color filter of the first color; and a third signal line configured to transmit a drive signal of a third transfer transistor for driving a third pixel in a microlens unit including a color filter of a second color different from the first color.

[0014] In the first to third aspects of the present technology, there is provided a pixel array unit in which a plurality of pixels in a microlens unit in which color filters of the same color and one microlens are configured for a plurality of pixels are two-dimensionally arranged in a matrix, and at least some pixel rows of the pixel array unit include: a first signal line configured to transmit a drive signal of a first transfer transistor for driving a first pixel in a microlens unit including a color filter of a first color; a second signal line configured to transmit a drive signal of a second transfer transistor for driving a second pixel different from the first pixel in the microlens unit including the color filter of the first color; and a third signal line configured to transmit a drive signal of a third transfer transistor for driving a third pixel in a microlens unit including a color filter of a second color different from the first color.

[0015] In a second aspect according to the present technology, the solid-state imaging device includes a pixel array unit and first to third signal lines in a pixel row located in at least a part of the pixel array unit, wherein in the pixel array unit, a plurality of pixels in a microlens unit in which a color filter of the same color and one microlens are configured for a plurality of pixels are two-dimensionally arranged in a matrix, wherein a first transfer transistor of a first pixel in a microlens unit having a color filter of a first color is driven via a first signal line, a second transfer transistor of a second pixel different from the first pixel is driven via a second signal line in the microlens unit having a color filter of the first color, and a third transfer transistor of a third pixel in a microlens unit having a color filter of a second color different from the first color is driven via a third signal line.

[0016] The solid-state imaging device and the electronic device may be independent devices or modules incorporated into other devices. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] Figure 1 : is a diagram showing a schematic configuration of a solid-state imaging device to which the present technology is applied.

[0018] Figure 2 It is a cross-sectional view of a pixel in a pixel array unit.

[0019] Figure 3 is a plan view showing an example of arrangement of microlenses and color filters.

[0020] Figure 4 is a diagram of the basic circuit of a shared pixel structure.

[0021] Figure 5 is a plan view showing a pixel configuration example of a solid-state imaging device.

[0022] Figure 6 : is a plan view showing an example of wiring of signal lines in a phase difference pixel unit.

[0023] Figure 7 : is a plan view showing an example of wiring of signal lines in a phase difference pixel unit.

[0024] Figure 8 is a plan view showing an example of wiring of signal lines in a normal pixel unit.

[0025] Fig. 9 is a diagram showing an output image of a pixel signal in units of pixel units.

[0026] Fig.10 : is a block diagram showing a configuration example of a column AD conversion unit.

[0027] Fig.11 It is a diagram for explaining the processing of the column AD conversion unit in the V2H2 addition mode.

[0028] Fig.12 It is a diagram for explaining the processing of the column AD conversion unit in the V2H2 addition mode.

[0029] Fig.13 : is a plan view showing another configuration example of the phase difference pixel unit.

[0030] Fig.14 It shows that in the Fig.13 A block diagram showing an example of the configuration of a pixel array unit and a column AD conversion unit in the case of a phase difference pixel.

[0031] Fig.15 1 is a plan view showing an example of wiring of signal lines of a phase difference pixel unit that outputs a phase difference signal divided vertically.

[0032] Fig.16 1 is a plan view showing an example of wiring of signal lines of a phase difference pixel unit that outputs a phase difference signal divided vertically.

[0033] Fig.17 1 is a diagram showing a driving example of a phase difference signal in a phase difference pixel unit.

[0034] Fig.18 1 is a diagram showing a driving example of a phase difference signal in a phase difference pixel unit.

[0035] Fig.19 1 is a plan view showing another wiring example of the signal lines of the phase difference pixel unit which outputs the phase difference signal divided vertically.

[0036] Fig. 20 A diagram for explaining a signal output of a solid-state imaging device.

[0037] Fig.21 A diagram for explaining a signal output of a solid-state imaging device.

[0038] Fig. 22 This is a block diagram showing a configuration example of an imaging device as an electronic device to which the present technology is applied.

[0039] Fig.23 This is a diagram for explaining an example of using an image sensor.

[0040] Fig.24 : is a diagram showing an example of a schematic configuration of an endoscopic surgery system.

[0041] Fig.25 : is a block diagram showing an example of the functional configuration of a camera and a CCU.

[0042] Fig.26 is a block diagram showing an example of a schematic configuration of a vehicle control system.

[0043] Fig. 27 2 is an explanatory diagram showing an example of installation positions of the vehicle exterior information detection unit and the imaging unit. DETAILED DESCRIPTION

[0044] Modes for carrying out the present technology (hereinafter, referred to as embodiments) are described below. Note that the description is given in the following order.

[0045] 1. Schematic Configuration Example of Solid-State Imaging Device

[0046] 2. Pixel cross-sectional structure diagram

[0047] 3. Basic circuit example of shared pixel structure

[0048] 4. Example of Phase Difference Pixel Configuration

[0049] 5. Example of the configuration of a column AD conversion unit

[0050] 6. Another configuration example of phase difference pixels

[0051] 7. Example of the configuration of phase difference pixels divided vertically

[0052] 8. Signal output of solid-state imaging device

[0053] 9. Others

[0054] 10. Application examples of electronic equipment

[0055] 11. Application examples of endoscopic surgery systems

[0056] 12. Application examples of mobile objects

[0057] <1. Schematic Configuration Example of Solid-State Imaging Device>

[0058] Figure 1A schematic configuration of a solid-state imaging device to which the present technology is applied is shown.

[0059] Figure 1 The solid-state imaging device 1 includes a pixel array unit 3, in which pixels 2 are two-dimensionally arranged in a matrix on a semiconductor substrate 12 using, for example, silicon (Si) as a semiconductor, and a peripheral circuit unit surrounding the pixel array unit 3. The peripheral circuit unit includes a vertical drive circuit 4, a column AD conversion unit 5, a horizontal drive circuit 6, an output circuit 7, a control circuit 8, and the like.

[0060] The pixel 2 includes a photodiode as a photoelectric conversion element and a plurality of pixel transistors, for example, the plurality of pixel transistors include four MOS transistors of a transfer transistor, a selection transistor, a reset transistor, and an amplifier transistor.

[0061] In addition, the pixel 2 may have a shared pixel structure. The shared pixel structure includes a plurality of photodiodes, a plurality of transfer transistors, a shared floating diffusion portion (floating diffusion region), and other pixel transistors each of which is shared. That is, in the shared pixel structure, the photodiodes and transfer transistors constituting the plurality of unit pixels are configured to share each other pixel transistor.

[0062] The control circuit 8 receives an input clock and data indicating an operation mode and the like, and outputs data such as internal information of the solid-state imaging device 1. That is, the control circuit 8 generates a clock signal or a control signal serving as an operation reference of the vertical drive circuit 4, the column AD conversion unit 5, the horizontal drive circuit 6, etc. based on the vertical synchronization signal, the horizontal synchronization signal, and the main clock. Then, the control circuit 8 outputs the generated clock signal and control signal to the vertical drive circuit 4, the column AD conversion unit 5, the horizontal drive circuit 6, etc.

[0063] For example, the vertical drive circuit 4 includes a shift register, selects a predetermined pixel drive wiring 10, supplies a pulse for driving the pixel 2 to the selected pixel drive wiring 10, and drives the pixel 2 in a row unit. That is, the vertical drive circuit 4 sequentially selects and scans each pixel 2 of the pixel array unit 3 in a vertical direction in a row unit, and supplies a pixel signal based on a signal charge generated according to the amount of light received in the photoelectric conversion unit of each pixel 2 to the column AD conversion unit 5 through the vertical signal line 9.

[0064] The column AD conversion unit 5 converts the analog pixel signal output from each pixel 2 arranged two-dimensionally into a digital pixel signal, and holds the digital pixel signal for a certain period of time. Fig.10 As described above, the ADC 52 is provided for each of one or more pixel columns in the column AD conversion unit 5 .

[0065] The horizontal drive circuit 6 includes, for example, a shift register, and sequentially outputs horizontal scanning pulses to output the AD-converted pixel signals held in the column AD conversion units 5 to the horizontal signal lines 11 .

[0066] The output circuit 7 performs predetermined signal processing on the AD-converted pixel signals sequentially supplied through the horizontal signal line 11, and outputs the pixel signals. For example, the output circuit 7 may only perform buffering, or may perform various digital signal processing such as black level adjustment, column variation correction, defect correction processing, etc. The input / output terminal 13 exchanges signals with the outside.

[0067] The solid-state imaging device 1 is a CMOS image sensor configured as described above.

[0068] <2. Cross-sectional diagram of a pixel>

[0069] Figure 2 It shows that Figure 1 FIG. 4 is a diagram showing a cross-sectional structure of pixels 2 arranged in a matrix within a pixel array unit 3.

[0070] In each pixel 2 of the pixel array unit 3, for example, an N-type (second conductivity type) semiconductor region 22 is formed on a semiconductor substrate (silicon substrate) 12 on which a P-type (first conductivity type) semiconductor region 21 is formed, thereby forming a photodiode PD on a pixel basis. Figure 2 In the embodiment, the semiconductor region 21 is divided into pixel units for convenience, but such boundaries do not actually exist.

[0071] On the front side of the semiconductor substrate 12 ( Figure 2 On the lower side in the middle), a plurality of pixel transistors for reading out charges accumulated in the photodiode PD and the like and a multilayer wiring layer including a plurality of wiring layers and an interlayer insulating film (neither of which are shown) are formed.

[0072] On the other hand, on the back side of the semiconductor substrate 12 ( Figure 2 On the upper side in the figure), an oxide film 23 such as a TEOS film is formed via an anti-reflection film (not shown) including, for example, a silicon oxide film.

[0073] A light shielding film 24 is formed at intervals of two pixels at the pixel boundary portion on the back side of the semiconductor substrate 12. The light shielding film 24 may be any material as long as it blocks light, but is preferably a material having a strong light shielding property and capable of being accurately processed by micro-processing such as etching. For example, the light shielding film 24 may include a metal film of tungsten (W), aluminum (Al), copper (Cu), titanium (Ti), molybdenum (Mo), nickel (Ni), or the like.

[0074] A color filter 25 is formed on the upper surface of the oxide film 23. For example, the color filter 25 has one color among red, green and blue, and allows only light of the color (wavelength) to pass through the photodiode PD. For example, the color filter 25 is formed by spin coating a photosensitive resin containing a pigment such as a pigment or a dye.

[0075] A microlens (on-chip lens) 26 is formed on the color filter 25. The microlens 26 contains a resin material such as a styrene resin, an acrylic resin, a styrene-acrylic copolymer resin, or a siloxane resin, for example.

[0076] Each pixel of the pixel array unit 3 is configured as described above, and the solid-state imaging device 1 is a back-illuminated solid-state imaging device in which light is incident from the back side opposite to the front side of the semiconductor substrate 12 on which the pixel transistor is formed.

[0077] Figure 3 2 is a plan view showing an example of the arrangement of the microlens 26 and the color filter 25 in the pixel array unit 3 .

[0078] like Figure 3 As shown, one microlens 26 is formed for four pixels including two pixels (2×2) in each of the vertical direction and the horizontal direction.

[0079] In addition, the color filter 25 is also configured so that the photodiodes PD of four pixels of 2×2 that share one microlens 26 receive light of the same wavelength. For example, the color array of the color filter 25 is a Bayer array in units of four pixels of 2×2.

[0080] In the following description, a pixel having a green color filter 25 and receiving green light is referred to as a G pixel, a pixel having a red color filter 25 and receiving red light is referred to as an R pixel, and a pixel having a blue color filter 25 and receiving blue light is referred to as a B pixel. In addition, a pixel row in which R pixels and G pixels are arranged in the horizontal direction is referred to as an RG pixel row, and a pixel row in which G pixels and B pixels are arranged in the horizontal direction is referred to as a GB pixel row. In addition, a unit of four pixels of 2×2 sharing one microlens 26 is referred to as an OCL unit, Figure 3 The unit of 64 pixels of 8×8 shown is referred to as a pixel unit 31 .

[0081] <3. Basic circuit example of shared pixel structure>

[0082] Next, Figure 1 The shared pixel structure adopted in the solid-state imaging device 1 is described below. Figure 4 A basic circuit of a shared pixel structure that is a premise of a pixel circuit of the solid-state imaging device 1 will be described.

[0083] Figure 4 A basic circuit of a shared pixel structure is shown in which one FD is shared by a total of eight pixels including four pixels in the vertical direction and two pixels in the horizontal direction (4×2).

[0084] In the case of distinguishing 4×2 pixels 2 sharing one FD, as Figure 5 As shown, pixel 2 is divided into pixel 2 a ~2 h Hereinafter, a total of eight pixels of 4×2 sharing one FD are also referred to as an FD sharing unit.

[0085] Each pixel 2 individually includes a photodiode PD and a transfer transistor TG that transfers the charge accumulated in the photodiode PD. Then, each of the FD 35, the reset transistor 36, the amplification transistor 37, and the selection transistor 38 is commonly used by eight pixels as a sharing unit.

[0086] Note that in the following description, each of the reset transistor 36, the amplifying transistor 37, and the selecting transistor 38 used in common by eight pixels as a sharing unit is also referred to as a shared pixel transistor. a ~2 h The photodiode PD and transfer transistor TG in Figure 5 As shown, they are called photodiodes PD a ~PD h and the transfer transistor TG a ~TG h .

[0087] Photodiode PD a ~PD h Each of the light sources receives light and performs photoelectric conversion on it, generates signal charge and accumulates it.

[0088] When the signal line 41 a The driving signal TRG supplied to the gate electrode a goes high, the pass transistor TG a In response to this, it becomes active (ON) and accumulates the energy in the photodiode PD. a The signal charge in the FD 35 is transferred to the FD 35 via the signal line 41. b The driving signal TRG supplied to the gate electrode b goes high, the pass transistor TG b In response to this, it becomes active and accumulates energy in the photodiode PD. b The signal charge in the FD 35 is transferred to the FD 35 via the signal line 41. c The driving signal TRG supplied to the gate electrode cgoes high, the pass transistor TG c In response to this, it becomes active and accumulates energy in the photodiode PD. c The signal charge in the FD 35 is transferred to the FD 35 via the signal line 41. d The driving signal TRG supplied to the gate electrode d goes high, the pass transistor TG d In response to this, the photodiode PD becomes active and d The signal charge accumulated in the photodiode PD is transferred to the FD 35. e ~PD h and the transfer transistor TG e ~TG h With photodiode PD a ~PD d and the transfer transistor TG a ~TG d Operate similarly.

[0089] FD 35 temporarily holds the photodiode PD a ~PD h The signal charge supplied.

[0090] When the drive signal RST supplied to the gate electrode via the signal line 42 becomes high, the reset transistor 36 becomes an active state (ON) in response thereto, and resets the potential of the FD 35 to a predetermined level (reset voltage VDD).

[0091] The source of the amplification transistor 37 is connected to the vertical signal line 9 via the selection transistor 38 , thereby forming a source follower circuit with a load MOS (not shown) of a constant current source circuit unit connected to one end of the vertical signal line 9 .

[0092] The selection transistor 38 is connected between the source electrode of the amplifier transistor 37 and the vertical signal line 9. When the selection signal SEL supplied to the gate electrode via the signal line 43 becomes high, the selection transistor 38 becomes activated (ON) in response thereto, and outputs the pixel signal of the pixel 2 in the shared unit output from the amplifier transistor 37 to the vertical signal line 9 when the shared unit is in the selected state.

[0093] The plurality of pixels 2 in the shared unit can be driven by the vertical drive circuit 4 ( Figure 1 ) driving signal, outputs pixel signals in units of one pixel, or can simultaneously output pixel signals in units of multiple pixels.

[0094] For example, in the case of outputting a pixel signal in units of one pixel, the vertical drive circuit 4 only needs to sequentially turn on the transfer transistors TG a ~TG hThe charge accumulated in the photodiode PD is transferred to the FD 35 , and the charge is output to the vertical signal line 9 via the selection transistor 38 .

[0095] For example, in the case of outputting pixel signals in an OCL unit of four pixels of 2×2, the vertical drive circuit 4 only needs to transfer the charges of all four pixels to FD35 by simultaneously turning on the transfer transistors TG of the four pixels of the OCL unit, and output the charges to the vertical signal line 9 via the selection transistor 38.

[0096] like Figure 3 As shown, for example, when one microlens 26 is arranged in four pixels of 2×2, the photodiodes PD of the two pixels on the left side of 2×2 and the photodiodes PD of the two pixels on the right side of 2×2 are formed at different positions relative to the microlens 26, so that an offset (phase difference) occurs in the images generated by the two photodiodes PD. In addition, even in the photodiodes PD of the two pixels on the upper side and the photodiodes PD of the two pixels on the lower side, since the photodiodes PD are formed at different positions relative to the microlens 26, an offset (phase difference) occurs in the images generated by the two photodiodes PD.

[0097] Therefore, by outputting four pixels sharing one microlens 26 as pixel signals in units of two pixels left and right or up and down, a phase difference can be detected and used as an autofocus control signal of an imaging device in which the solid-state imaging device 1 is incorporated.

[0098] However, in Figure 4 In the pixel circuit structure, in order to obtain pixel signals of two pixels in the left and right or upper and lower parts in the OCL unit, it is necessary to sequentially read out pixel signals of two pixels in the left and right or upper and lower parts, which leads to a decrease in the frame rate.

[0099] therefore, Figure 1 The solid-state imaging device 1 in FIG. 1 is configured to be able to output a phase difference signal without reducing the frame rate, in other words, by reading out four pixels of the OCL unit at a time. Hereinafter, this configuration will be described.

[0100] <4. Example of Phase Difference Pixel Configuration>

[0101] Figure 5 1 is a plan view showing an example of pixel arrangement in the pixel array unit 3 of the solid-state imaging device 1 .

[0102] In the pixel array unit 3, including Figure 3 The pixel units 31 of 64 pixels of 8×8 are repeatedly arranged in the vertical direction and the horizontal direction.

[0103] Here, when the pixel array unit 3 is observed in units of pixel units 31, phase difference pixel units 31A and 31B and a normal pixel unit 31T are arranged in the pixel array unit 3 according to a predetermined rule or randomly. The phase difference pixel units 31A and 31B are pixel units 31 in which phase difference pixels capable of outputting phase difference signals are arranged in some pixels 2 of the pixel unit 31. The phase difference pixel unit 31A is a pixel unit 31 in which a phase difference pixel that outputs a phase difference signal of the left half of the OCL unit is arranged, and the phase difference pixel unit 31B is a pixel unit 31 in which a phase difference pixel that outputs a phase difference signal of the right half of the OCL unit is arranged. The normal pixel unit 31T is a pixel unit 31 in which no phase difference pixel is arranged.

[0104] exist Figure 5 In the normal pixel unit 31T and the phase difference pixel units 31A and 31B shown, the pixel 2 denoted by “G” is a G pixel, the pixel 2 denoted by “R” is an R pixel, and the pixel 2 denoted by “B” is a B pixel.

[0105] In the phase difference pixel units 31A and 31B, the pixel 2 denoted as "G1" is a G pixel of a phase difference pixel capable of outputting a phase difference signal of two pixels on the left, and the pixel 2 denoted as "G2" is a G pixel of a phase difference pixel capable of outputting a phase difference signal of two pixels on the right. Figure 5 , “R”, “G”, “B”, “G1”, and “G2” other than the pixel 2 represented by the reference numerals of the normal pixel unit 31T and the phase difference pixel units 31A and 31B are omitted.

[0106] Note that in this embodiment, an example is described in which a phase difference pixel capable of outputting a phase difference signal among R pixels, G pixels, and B pixels is arranged in a G pixel, but the phase difference pixel may be arranged in either the R pixel or the B pixel.

[0107] Figure 6 1 is a plan view showing a wiring example of a signal line 41 that transmits a drive signal TRG to a transfer transistor TG of each pixel 2 in the phase difference pixel unit 31A.

[0108] Note that Figures 6 to 8 In order to make the drawing easy to see, the pixel unit 31 is shown separately in an FD sharing unit of 4×2 eight pixels that share the FD 35 .

[0109] In a pixel circuit in which eight pixels of 4×2 share one FD 35, as shown in FIG. Figure 4As described in the basic circuit of , if two signal lines 41 are configured per row and a total of eight signal lines 41 are configured in four rows of the FD sharing unit, control can be performed so that pixel signals are read out in pixel units or in OCL units.

[0110] On the other hand, in the phase difference pixel unit 31A, in addition to the signal line 41 of the basic circuit a ~41 h In addition, two signal lines 41 are added to the four rows of the FD shared unit. x and 41 y .

[0111] Signal line 41 x The drive signal TRG is transmitted to the transfer transistor TG of the predetermined pixel 2 in the GB pixel row. x . Signal line 41 y The drive signal TRG is transmitted to the transfer transistor TG of the predetermined pixel 2 in the GB pixel row. y . Write on the signal line 41 (41 a ~41 y ) represents a contact point between the gate electrode of the transfer transistor TG and the signal line 41.

[0112] like Figure 6 As shown by the circle in FIG. 1 , in the phase difference pixel unit 31A, the gate electrodes of the transfer transistors TG of the two right G1 pixels among the four G1 pixels of the OCL unit are connected to the signal line 41 x or 41 y , instead of signal line 41 f or 41 h The connection between the gate electrode of the transfer transistor TG in the other FD sharing unit and the signal line 41 is the same as Figure 4 similar.

[0113] In the phase difference pixel unit 31A, when three signal lines 41 are configured e , 41 f and 41 x When the two B pixels of the GB pixel row are the first pixel and the second pixel, and the two G1 pixels are the third pixel and the fourth pixel, the transfer transistor TG of the first pixel (the B pixel on the left) and the transfer transistor TG of the fourth pixel (the G1 pixel on the left) are connected by the same signal line 41. e The driving signal TRG e The transfer transistor TG of the second pixel (the B pixel on the right) is controlled by the signal line 41 f The driving signal TRG fThe transfer transistor TG of the third pixel (G1 pixel on the right) is controlled by the signal line 41. x The driving signal TRG x Control. There are three signal lines 41 g , 41 h and 41 y The GB pixel row is similar.

[0114] right Figure 6 An operation of adding (FD addition) and outputting pixel signals in 2×2 OCL units in the phase difference pixel unit 31A will be described.

[0115] First, the vertical drive circuit 4 sends the drive signal TRG of the two RG pixel rows of the FD sharing unit on the upper side of the phase difference pixel unit 31A to the vertical drive circuit 4. a ~TRG d As a result, the signal line 41 is connected to a ~41 d The transfer transistors TG of the R pixel and G pixel of the OCL unit a ~TG d The photodiode PD is turned on, and the signal charge accumulated in the photodiode PD is transferred to the FD 35 and output as a pixel signal.

[0116] Next, the vertical driving circuit 4 transmits the driving signal TRG of the two GB pixel rows of the FD sharing unit on the upper side of the phase difference pixel unit 31A to the vertical driving circuit 4. e ~TRG h As a result, the signal line 41 is connected to e ~41 h The signal charge accumulated in the photodiode PD of the G1 pixel and the B pixel of the OCL unit is transferred to the FD 35 and output as a pixel signal. At this time, since the gate electrode of the transfer transistor TG is not connected to the signal line 41 in the two G1 pixels on the right among the four G1 pixels of the OCL unit, e ~41 h Therefore, the accumulated charges in the two G1 pixels on the right are not transferred to the FD 35 , and only the accumulated charges in the two G1 pixels on the left are transferred to the FD 35 .

[0117] Next, the vertical driving circuit 4 transmits the driving signal TRG of the two RG pixel rows of the FD sharing unit on the lower side of the phase difference pixel unit 31A to the vertical driving circuit 4. a ~TRG d As a result, the signal line 41 is connected to a ~41 d The signal charges accumulated in the photodiodes PD of the R pixels and the G pixels of the OCL unit are transferred to the FD 35 and output as pixel signals.

[0118] Next, the vertical driving circuit 4 transmits the driving signal TRG of the two GB pixel rows of the FD sharing unit on the lower side of the phase difference pixel unit 31A to e ~TRG h As a result, the signal line 41 is connected to e ~41 h The signal charge accumulated in the photodiode PD of the G1 pixel and the B pixel of the OCL unit is transferred to the FD 35 and output as a pixel signal. At this time, since the gate electrode of the transfer transistor TG is not connected to the signal line 41 in the two right G1 pixels among the four G1 pixels of the OCL unit, e ~41 h Therefore, the accumulated charges in the two G1 pixels on the right are not transferred to the FD 35 , and only the accumulated charges in the two G1 pixels on the left are transferred to the FD 35 .

[0119] When the above drive is performed, Fig. 9 As shown in A, the solid-state imaging device 1 can obtain the R pixel, G pixel, and B pixel of the phase difference pixel unit 31A as a signal obtained by adding the pixel signals of the four pixels of the OCL unit, and can obtain the G1 pixel as a signal obtained by adding the pixel signals of the two pixels on the left half of the OCL unit. That is, in the phase difference pixel unit 31A, it is possible to output a phase difference signal by reading out four pixels of the OCL unit at a time.

[0120] Fig. 9 : is a diagram showing an output image of a pixel signal in units of pixel units when the solid-state imaging device 1 operates in a driving mode (output mode of OCL units) in which a signal obtained by adding four pixels of an OCL unit is output as a pixel signal.

[0121] Figure 7 1 is a plan view showing an example of wiring of a signal line 41 that transmits a drive signal TRG to a transfer transistor TG of each pixel 2 in the phase difference pixel unit 31B.

[0122] Also in the phase difference pixel unit 31B, in addition to the signal line 41 of the basic circuit a ~41 h In addition, two signal lines 41 are added to the four rows of the FD shared unit. x and 41 y .

[0123] like Figure 7 As shown by the circle in FIG. 1 , in the phase difference pixel unit 31B, the gate electrodes of the transfer transistors TG of the two G2 pixels on the left among the four G2 pixels of the OCL unit are connected to the signal line 41x or 41 y , instead of signal line 41 e or 41 g .

[0124] In the phase difference pixel unit 31B, it is assumed that three signal lines 41 are arranged. e , 41 f and 41 x The two B pixels of the GB pixel row are the first pixel and the second pixel, and the two G2 pixels are the third pixel and the fourth pixel. The transfer transistor TG of the first pixel (the B pixel on the right) and the transfer transistor TG of the fourth pixel (the G2 pixel on the right) are connected by the same signal line 41. f The driving signal TRG f The transfer transistor TG of the second pixel (the B pixel on the left) is controlled by the signal line 41 e The driving signal TRG e The transfer transistor TG of the third pixel (G2 pixel on the left) is controlled by the signal line 41. x The driving signal TRG x Control. There are three signal lines 41 g , 41 h and 41 y The GB pixel row is similar.

[0125] right Figure 7 An operation of adding (FD addition) and outputting pixel signals in 2×2 OCL units in the phase difference pixel unit 31B will be described.

[0126] First, the vertical drive circuit 4 sends the drive signal TRG of the two RG pixel rows of the FD sharing unit on the upper side of the phase difference pixel unit 31B to the vertical drive circuit 4. a ~TRG d As a result, the signal line 41 is connected to a ~41 d The signal charges accumulated in the photodiodes PD of the R pixels and the G pixels of the OCL unit are transferred to the FD 35 and output as pixel signals.

[0127] Next, the vertical driving circuit 4 transmits the driving signal TRG of the two GB pixel rows of the FD sharing unit on the upper side of the phase difference pixel unit 31B to the vertical driving circuit 4. e ~TRG h As a result, the signal line 41 is connected to e ~41 hThe signal charge accumulated in the photodiode PD of the G2 pixel and the B pixel of the OCL unit is transferred to the FD 35 and output as a pixel signal. At this time, since the gate electrodes of the transfer transistors TG are not connected to the signal line 41 in the two G2 pixels on the left among the four G2 pixels of the OCL unit, e ~41 h Therefore, the accumulated charges in the two G2 pixels on the left are not transferred to the FD 35 , and only the accumulated charges in the two G2 pixels on the right are transferred to the FD 35 .

[0128] Next, the vertical driving circuit 4 transmits the driving signal TRG of the two RG pixel rows of the FD sharing unit on the lower side of the phase difference pixel unit 31B to the vertical driving circuit 4. a ~TRG d As a result, the signal line 41 is connected to a ~41 d The signal charges accumulated in the photodiodes PD of the R pixels and the G pixels of the OCL unit are transferred to the FD 35 and output as pixel signals.

[0129] Next, the vertical driving circuit 4 transmits the driving signal TRG of the two GB pixel rows of the FD sharing unit on the lower side of the phase difference pixel unit 31B to the vertical driving circuit 4. e ~TRG h As a result, the signal line 41 is connected to e ~41 h The signal charge accumulated in the photodiode PD of the G2 pixel and the B pixel of the OCL unit is transferred to the FD 35 and output as a pixel signal. At this time, since the gate electrodes of the transfer transistors TG are not connected to the signal line 41 in the two G2 pixels on the left among the four G2 pixels of the OCL unit, e ~41 h Therefore, the accumulated charges in the two G2 pixels on the left are not transferred to the FD 35 , and only the accumulated charges in the two G2 pixels on the right are transferred to the FD 35 .

[0130] When the above drive is performed, Fig. 9 As shown in FIG. 1B, the solid-state imaging device 1 can obtain the R pixel, G pixel, and B pixel of the phase difference pixel unit 31B as a signal obtained by adding the pixel signals of the four pixels of the OCL unit, and can obtain the G2 pixel as a signal obtained by adding the pixel signals of the two pixels on the right half of the OCL unit. That is, in the phase difference pixel unit 31B, the phase difference signal can be output by reading out the four pixels of the OCL unit at one time.

[0131] Figure 81 is a plan view showing a wiring example of a signal line 41 that transmits a drive signal TRG to a transfer transistor TG of each pixel 2 in a normal pixel unit 31T.

[0132] Also in the normal pixel unit 31T, in addition to the signal line 41 of the basic circuit a ~41 h In addition, two signal lines 41 are added to the four rows of the FD shared unit. x and 41 y .

[0133] However, in the normal pixel unit 31T, there is no gate electrode of the transfer transistor TG connected to the additional signal line 41 x or 41 y In other words, the gate electrodes of the transfer transistors TG of all the R pixels, G pixels, and B pixels are connected to the signal line 41. a ~41 h Any one of .

[0134] right Figure 8 An operation of adding (FD addition) and outputting pixel signals in 2×2 OCL units in the normal pixel unit 31T will be described.

[0135] First, the vertical drive circuit 4 sends the drive signal TRG of the two RG pixel rows of the FD sharing unit on the upper side of the normal pixel unit 31T to the vertical drive circuit 4. a ~TRG d As a result, the signal line 41 is connected to a ~41 d The signal charges accumulated in the photodiodes PD of the R pixels and the G pixels of the OCL unit are transferred to the FD 35 and output as pixel signals.

[0136] Next, the vertical driving circuit 4 transmits the driving signal TRG of the two GB pixel rows of the FD sharing unit on the upper side of the normal pixel unit 31T to the vertical driving circuit 4. e ~TRG h As a result, the signal line 41 is connected to e ~41 h The signal charges accumulated in the photodiodes PD of the G pixel and the B pixel of the OCL unit are transferred to the FD 35 and output as pixel signals.

[0137] Next, the vertical driving circuit 4 transmits the driving signal TRG of the two RG pixel rows of the FD sharing unit on the lower side of the normal pixel unit 31T to the vertical driving circuit 4. a ~TRG d As a result, the signal line 41 is connected to a ~41 dThe signal charges accumulated in the photodiodes PD of the R pixels and the G pixels of the OCL unit are transferred to the FD 35 and output as pixel signals.

[0138] Next, the vertical driving circuit 4 transmits the driving signal TRG of the two GB pixel rows of the FD sharing unit on the lower side of the normal pixel unit 31T to the vertical driving circuit 4. e ~TRG h As a result, the signal line 41 is connected to e ~41 h Signal charges accumulated in the photodiodes PD of the G pixel and the B pixel of the OCL unit are transferred to the FD 35 and output as pixel signals.

[0139] When the above drive is performed, Fig. 9 As shown in C, the solid-state imaging device 1 can obtain all R pixels, G pixels, and B pixels of the normal pixel unit 31T as signals obtained by adding pixel signals of four pixels of the OCL unit. That is, in the normal pixel unit 31T, all pixel signals are signals obtained by adding pixel signals of four pixels as the OCL unit.

[0140] Note that in the case where it is not desired to output the phase difference signal in the phase difference pixel units 31A and 31B, in other words, in a driving mode in which the phase difference signal is not output, the solid-state imaging device 1 is driven as follows.

[0141] In the phase difference pixel units 31A and 31B, the vertical drive circuit 4 converts the drive signal TRG of the two GB pixel rows of the upper FD sharing unit into e ~TRG h When the control is high, the two signal lines 41 x and 41 y The driving signal TRG supplied x and TRG y Controlled to High. As a result, since the signal charge accumulated in the photodiode PD of four G1 pixels or G2 pixels as an OCL unit is transferred to the FD 35, a signal obtained by adding pixel signals in 2×2 OCL units (FD addition) is output.

[0142] That is, in the driving mode (first driving mode) in which the phase difference signal is not output, the vertical driving circuit 4 of the solid-state imaging device 1 outputs the driving signals TRG of the two GB pixel rows. e ~TRG h And the driving signal TRG x and TRG y All controls are high and all pass transistors TG e ~TG hOn the other hand, in the driving mode for outputting the phase difference signal (the second driving mode), the vertical driving circuit 4 only outputs the driving signal TRG of the two GB pixel rows. e ~TRG h Control is high, only the pass transistor TG of the left half of the OCL unit e and TG g or only the right half of the pass transistor TG f and TG h As a result, it is possible to output a phase difference signal by performing a single readout operation on each pixel without reducing the frame rate.

[0143] Note that according to Figures 6 to 8 The wiring structure of the signal line 41 shown is that for the GR pixel row that does not output the phase difference signal, the number of signal lines 41 per row is two, but according to the GB pixel row that outputs the phase difference signal, for the GR pixel row, three signal lines 41 can also be wired per row.

[0144] <5. Configuration Example of Column AD Conversion Unit>

[0145] Fig.10 : is a block diagram showing a configuration example of the column AD conversion unit 5 .

[0146] like Fig.10 As shown, the column AD conversion unit 5 is provided with ADCs 52 corresponding one to one with the vertical signal lines 9. Then, a multiplexer (MUX) 51 is provided between the vertical signal lines 9 of the pixel array unit 3 and the input signal lines 56 to the ADCs 52.

[0147] The MUX 51 appropriately selects connection between four vertical signal lines 9 corresponding to the pixel unit 31 and four ADCs 52 corresponding to the four vertical signal lines 9 according to a driving mode or the like, and outputs pixel signals input via the vertical signal lines 9 to desired ADCs 52 .

[0148] Now, four vertical signal lines connected to the input stage of the MUX 51 are distinguished as vertical signal lines 9A to 9D, and the ADCs 52 corresponding to the vertical signal lines 9A to 9D are referred to as ADCs 52A to 52D.

[0149] For example, in a certain driving mode, the MUX 51 connects the vertical signal lines 9 and the ADCs 52 in a one-to-one correspondence, and outputs the pixel signals input through the vertical signal lines 9 to the corresponding ADCs 52 .

[0150] Furthermore, for example, in a certain driving mode, the MUX 51 adds pixel signals input via two predetermined vertical signal lines 9 and outputs the result to one predetermined ADC 52 .

[0151] Note that, in the present embodiment, for example, the number of vertical signal lines 9 and ADCs 52 that can be connected and controlled by the MUX 51 is 4, but the number of vertical signal lines 9 and ADCs that can be connected and controlled by the MUX 51 can be other than 4.

[0152] The ADC 52 includes a comparator 53 that compares the pixel signal of a predetermined pixel input from the MUX 51 with the ramp signal from the DAC 55, and an up / down counter 54 that counts the comparison time of the comparator.

[0153] The comparator 53 outputs the difference signal obtained by comparing the pixel signal with the ramp signal to the up / down counter 54. For example, when the ramp signal is greater than the pixel signal, a Hi (High) difference signal is supplied to the up / down counter 54, and when the ramp signal is less than the pixel signal, a Lo (Low) difference signal is supplied to the up / down counter 54.

[0154] During the preset phase (P-phase) AD conversion, the up / down counter 54 performs down counting only when a Hi difference signal is supplied, and during the data phase (D-phase) AD conversion, it performs up counting only when a Hi difference signal is supplied. Then, the up / down counter 54 outputs the sum of the down count value during the P-phase AD conversion and the up count value during the D-phase AD conversion as the pixel data after the CDS process and the AD conversion process. As a result, the AD conversion of the pixel signal is performed, and the reset noise can be removed. Note that up counting can be performed during the P-phase AD conversion and down counting can be performed during the D-phase AD conversion.

[0155] The digital-to-analog converter (DAC) 55 generates a ramp signal whose level (voltage) changes stepwise over time and supplies the ramp signal to each ADC 52 of the column AD conversion unit 5. For example, the DAC 55 is provided in the control circuit 8 ( Figure 1 )

[0156] <V2H2 Addition Mode>

[0157] Using Fig.10 the configuration of the column AD conversion unit 5 shown, the solid-state imaging device 1 has a drive mode (third drive mode) for generating and outputting a pixel signal (hereinafter, this signal is referred to as a V2H2 signal) obtained by adding two pixels in each of the vertical and horizontal directions to a pixel signal having an OCL unit as one pixel. This drive mode is called the V2H2 addition mode.

[0158] Fig.11It is a diagram for explaining the processing of the column AD conversion unit 5 in the V2H2 addition mode.

[0159] In the phase difference pixel unit 31A, as Fig. 9 As shown in A, for the R pixel, the G pixel, and the B pixel, a signal obtained by adding the pixel signals of the four pixels as the OCL unit is obtained, and for the G1 pixel, a signal obtained by adding the pixel signals of the two pixels in the left half of the OCL unit is obtained.

[0160] like Fig.11 As shown in A, for each of the R pixel, G pixel, B pixel and G1 pixel having an OCL unit as one pixel, the column AD conversion unit 5 adds four pixels of 2×2 including two pixels each in the vertical direction and the horizontal direction, and outputs the V2H2 signal of the R pixel, G pixel, B pixel and G1 pixel.

[0161] Similarly, for the phase difference pixel unit 31B, Fig.11 As shown in B, for each of the R pixel, G pixel, B pixel and G2 pixel having an OCL unit as one pixel, the column AD conversion unit 5 adds four pixels of 2×2 in the vertical direction and the horizontal direction, and outputs the V2H2 signal of the R pixel, G pixel, B pixel and G2 pixel.

[0162] Similarly, for a common pixel unit 31T, Fig.11 As shown in C, for each of the R pixel, G pixel, B pixel and G pixel having an OCL unit as one pixel, the column AD conversion unit 5 adds four pixels of 2×2 in the vertical direction and the horizontal direction, and outputs the V2H2 signal of the R pixel, G pixel, B pixel and G pixel.

[0163] Reference Fig.12 , in the example of the phase difference pixel unit 31A, the processing of the column AD conversion unit 5 in the V2H2 addition mode is further described.

[0164] With the OCL unit of the phase difference pixel unit 31A as one pixel, the vertical drive circuit 4 outputs the accumulated charges of 2×2 four R pixels to the MUX 51 via the vertical signal lines 9A and 9C, and outputs the accumulated charges of 2×2 four G pixels to the MUX 51 via the vertical signal lines 9B and 9D.

[0165] For example, the MUX 51 adds the pixel signal of the R pixel of the vertical signal line 9A and the pixel signal of the R pixel of the vertical signal line 9C from among the four vertical signal lines 9A to 9D of the phase difference pixel unit 31A, and outputs the result to the ADC 52A. In addition, for example, the MUX 51 adds the pixel signal of the G pixel from the vertical signal line 9B and the pixel signal of the G pixel from the vertical signal line 9D, and outputs the result to the ADC 52D. In each of the vertical signal lines 9A to 9D, the pixel signals of two pixels of the OCL unit arranged in the vertical direction flow to the MUX 51, and the pixel signals flowing to the two vertical signal lines 9 are added by the MUX 51 and supplied to the ADC 52. As a result, the ADC 52A receives the pixel signal of the R pixel of the four pixels of 2×2 with the OCL unit as one pixel, and the ADC 52D receives the pixel signal of the G pixel of the four pixels of 2×2 with the OCL unit as one pixel.

[0166] At the time of reading out the next pixel signal, with the OCL unit of the phase difference pixel unit 31A as one pixel, the accumulated charges of 2×2 four G1 pixels are output to the MUX 51 via the vertical signal lines 9A and 9C, and the accumulated charges of 2×2 four B pixels are output to the MUX 51 via the vertical signal lines 9B and 9D.

[0167] For example, the MUX 51 adds the pixel signal of the G1 pixel of the vertical signal line 9A and the pixel signal of the G1 pixel of the vertical signal line 9C from among the four vertical signal lines 9A to 9D of the phase difference pixel unit 31A, and outputs the result to the ADC 52A. In addition, for example, the MUX 51 adds the pixel signal of the B pixel from the vertical signal line 9B and the pixel signal of the B pixel from the vertical signal line 9D, and outputs the result to the ADC 52D. In each of the vertical signal lines 9A to 9D, the pixel signals of two pixels of the OCL unit arranged in the vertical direction flow to the MUX 51, and the pixel signals flowing to the two vertical signal lines 9 are added by the MUX 51 and supplied to the ADC 52. As a result, the pixel signal of the G1 pixel of the four pixels of 2×2 with the OCL unit as one pixel is input to the ADC 52A, and the pixel signal of the B pixel of the four pixels of 2×2 with the OCL unit as one pixel is input to the ADC 52D.

[0168] As described above, the pixel signal input to the ADC 52A or ADC 52D is compared with the ramp signal and converted into a count value, thereby generating a Fig.12 The V2H2 signals of the digital R pixels, G pixels, B pixels and G1 pixels are shown.

[0169] According to the pixel configuration of the phase difference pixel unit 31A and the phase difference pixel unit 31B described above, even when the V2H2 addition mode is used, by adding two pixels in the vertical direction and the horizontal direction to the pixel signal of the OCL unit as one pixel, a phase difference signal can be output. Since the phase difference signal does not use (discard) the signal charge of half (two pixels) of the four pixels of the OCL unit, there may be a situation where the signal level of the pixel signal is low. However, according to the V2H2 addition mode, by adding the pixel signals of the four pixels of the OCL unit as one pixel, a sufficient signal amount can be ensured even when the signal level is low in one OCL unit.

[0170] <6. Another Configuration Example of Phase Difference Pixels>

[0171] As reference Fig.11 and Fig.12 As described, in the phase difference pixel units 31A and 31B, when the phase difference pixels are arranged in 2×2 OCL units at the same color position in the pixel, there is an advantage that a phase difference signal can be obtained even when 2×2 OCL units are added using the V2H2 addition mode.

[0172] On the other hand, since the light receiving area of ​​the phase difference pixel is half of the normal light receiving area, the phase difference pixel is a defective pixel as a pixel signal for video. Therefore, in the output circuit 7 to which the AD-converted pixel signal is input, it is necessary to use the same-color pixel signals of the surrounding pixels to perform processing to correct the phase difference pixel to generate a pixel signal for video.

[0173] However, if Fig.11 As shown, when phase difference pixels are arranged at 2×2 positions of the same color in the OCL unit pixels, the peripheral pixels for correcting the phase difference pixels are also phase difference pixels, so sufficient signals for generating pixel signals for video cannot be obtained.

[0174] Therefore, as another arrangement example of phase difference pixels, an arrangement example of phase difference pixels suitable for correction of pixel signals for generating video will be described below.

[0175] Fig.13 : is a plan view showing another configuration example of the phase difference pixel unit.

[0176] exist Fig.13In the phase difference pixel units 31A and 31B, among the pixels of the OCL unit, the phase difference pixels are arranged only at the positions of the G pixels of two pixels in the vertical direction. As a result, the number of phase difference pixels in the phase difference pixel units 31A and 31B is changed from four to two, and the number of G pixels around the phase difference pixels that can be used to correct the phase difference pixels is increased, so that a sufficient signal for generating a pixel signal for video can be obtained.

[0177] On the other hand, Fig.13 In the configuration, Fig.11 As shown, when 2×2 pixel signals of the same color in the pixels of the OCL unit are added in the V2H2 addition mode, the pixel signals of the phase difference pixels on one side half of the OCL unit and the pixel signals of the OCL unit (four pixels) are added, and a normal phase difference signal cannot be obtained.

[0178] Therefore, in adopting Fig.13 In the case of the phase difference pixel configuration shown in FIG. Fig.14 The circuit configuration shown.

[0179] Fig.14 It shows that in the Fig.13 1 is a block diagram showing an example of the configuration of the pixel array unit 3 and the column AD conversion unit 5 in the case of the arrangement of the phase difference pixels shown.

[0180] Fig.14 Corresponds to Fig.10 The block diagram of Fig.10 The same components are denoted by the same reference numerals, and description thereof will be appropriately omitted.

[0181] and Fig.10 Compared with the circuit structure of Fig.14 In the circuit configuration of FIG. 1 , a switch 71 and a signal line 72 are newly added to the phase difference pixel unit 31A. Specifically, the switch 71 is provided at the connection portion between the pixel circuit of the FD sharing unit including the R pixel and the G1 pixel and the vertical signal line 9. a , and a switch 71 is provided at a connection portion between a pixel circuit of an FD sharing unit including an R pixel and a G pixel and a vertical signal line 9. b .

[0182] For example, the switch 71 includes an N-type MOS transistor and controls whether to add a pixel signal of an OCL unit of a G1 pixel output from an FD sharing unit including an R pixel and a G1 pixel to a pixel signal of an OCL unit of a G pixel of an FD sharing unit including an R pixel and a G pixel. a According to the signal line 72 a The switch 71 is turned on and off by the control signal FDSEL1 supplied from the vertical drive circuit 4.b According to the signal line 72 b It is turned on and off by the control signal FDSEL2 supplied from the vertical drive circuit 4.

[0183] In the V2H2 addition mode, the vertical drive circuit 4 turns off the switch 71 when detecting the phase difference. b , and turn on switch 71 without detecting the phase difference b As a result, in the case of detecting a phase difference, the pixel signal of the OCL unit of the G1 pixel output from the FD sharing unit including the R pixel and the G1 pixel is not added to the pixel signal of the OCL unit of the G pixel of the FD sharing unit including the R pixel and the G pixel, so a normal phase difference signal can be obtained.

[0184] Fig.14 2 shows a circuit configuration of the phase difference pixel unit 31A in the pixel array unit 3. Similarly, the phase difference pixel unit 31B is provided with a switch 71 and a signal line 72.

[0185] Although not shown, a switch 71 is provided at a connection portion between a pixel circuit of an FD sharing unit including an R pixel and a G2 pixel and a vertical signal line 9. a , and a switch 71 is provided at a connection portion between a pixel circuit of an FD sharing unit including an R pixel and a G pixel and a vertical signal line 9. b In the V2H2 addition mode, the vertical drive circuit 4 supplies control signals FDSEL1 and FDSEL2 to the switch 71 of the FD sharing unit including the R pixel and the G2 pixel of the phase difference pixel unit 31B. a The switch 71 of the FD sharing unit including the R pixel and the G pixel of the phase difference pixel unit 31B is turned on. b disconnect.

[0186] Note that Fig.14 In the above description, an example has been described in which the switch 71 controls whether to add pixel signals of two OCL units in the horizontal direction, but the switch 71 can also control whether to add pixel signals of two OCL units in the vertical direction. In this case, one switch 71 in two adjacent FD sharing units in the vertical direction is controlled to be turned on, and the other switch 71 is controlled to be turned off. It is also possible to control whether to add pixel signals of two OCL units (i.e., 2×2 OCL units) in the horizontal and vertical directions.

[0187] The signal line 72 provided for each FD sharing unit including the G1 pixel or the G2 pixel a and 72 bWiring may be performed only for a region where the phase difference pixel unit 31A or 31B is arranged, but wiring may be performed for the entire pixel array unit 3 regardless of the presence or absence of the phase difference pixel units 31A and 31B.

[0188] <7. Example of Configuration of Phase Difference Pixels Split Vertically>

[0189] exist Figures 6 to 8 In the above-mentioned embodiments shown in FIG. 1 , when the phase difference pixel units 31A and 31B output phase difference signals, they are configured to output left-right (horizontally) divided phase difference signals of the left half or the right half of the OCL unit.

[0190] Hereinafter, a configuration will be described in which, when the phase difference pixel units 31A and 31B output phase difference signals, vertically divided phase difference signals of the upper half or the lower half of the OCL unit are output.

[0191] Fig.15 1 is a plan view showing an example of wiring of the signal line 41 of the phase difference pixel unit 31A that outputs the phase difference signal divided vertically.

[0192] Note that in the above figure, the pixel 2 denoted as "G1" is a G pixel that can output the phase difference signal of the two pixels on the left, and the pixel 2 denoted as "G2" is a G pixel that can output the phase difference signal of the two pixels on the right. Figures 15 to 18 , the pixel 2 denoted as “ G1 ” is a G pixel that can output phase difference signals of two pixels on the upper side, and the pixel 2 denoted as “ G2 ” is a G pixel that can output phase difference signals of two pixels on the lower side.

[0193] exist Figure 6 In the phase difference pixel unit 31A that outputs the left-right divided phase difference signal, in addition to the signal line 41 of the basic circuit a ~41 h In addition, two signal lines 41 are added to the four rows of the FD shared unit. x and 41 y .

[0194] On the other hand, Fig.15 In the phase difference pixel unit 31A that outputs the phase difference signal divided into upper and lower parts, in addition to the signal line 41 of the basic circuit a ~41 h In addition, four signal lines 41 are added to the four rows of the FD shared unit. p ~41 s .

[0195] Signal line 41 p The driving signal TRG pTransfer to the transfer transistor TG of the predetermined pixel 2 in the GB pixel row. Signal line 41 q The driving signal TRG q Transfer to the transfer transistor TG of the predetermined pixel 2 in the GB pixel row. Signal line 41 r The driving signal TRG r Transfer to the transfer transistor TG of the predetermined pixel 2 in the GB pixel row. Signal line 41 s The driving signal TRG s The signal is transmitted to the transfer transistor TG of the predetermined pixel 2 in the GB pixel row. a ~41 h , 41 p ~41 s ) represents a contact point between the gate electrode of the transfer transistor TG and the signal line 41.

[0196] like Fig.15 As shown in the circle in FIG. 1 , the gate electrodes of the transfer transistors TG of the two lower G1 pixels among the four G1 pixels of the OCL unit are connected to the signal line 41 r or 41 s , instead of signal line 41 g or 41 h . Assume that there are four signal lines 41 g , 41 h , 41 r and 41 s The two B pixels of the GB pixel row are the first pixel and the second pixel, and the two G1 pixels are the third pixel and the fourth pixel. Then the first pixel and the second pixel are connected by the signal line 41 g and 41 h The third pixel and the fourth pixel are controlled by the driving signal TRG of the signal line 41. r and 41 s The driving signal TRG controls.

[0197] Fig.16 1 is a plan view showing an example of wiring of the signal line 41 of the phase difference pixel unit 31B that outputs the phase difference signal divided vertically.

[0198] Also in the output Fig.16 In the phase difference pixel unit 31B of the phase difference signal divided up and down, in addition to the signal line 41 of the basic circuit a ~41 h In addition, four signal lines 41 are added to the four rows of the FD shared unit. p ~41 s .

[0199] Signal line 41p The driving signal TRG p Transfer to the transfer transistor TG of the predetermined pixel 2 in the GB pixel row. Signal line 41 q The driving signal TRG q Transfer to the transfer transistor TG of the predetermined pixel 2 in the GB pixel row. Signal line 41 r The driving signal TRG r Transfer to the transfer transistor TG of the predetermined pixel 2 in the GB pixel row. Signal line 41 s The driving signal TRG s The signal is transmitted to the transfer transistor TG of the predetermined pixel 2 in the GB pixel row. a ~41 h , 41 p ~41 s ) represents a contact point between the gate electrode of the transfer transistor TG and the signal line 41.

[0200] Fig.16 The phase difference pixel unit 31B in Fig.15 The difference between the phase difference pixel unit 31A and the phase difference pixel unit 31A is that the gate electrodes of the transfer transistors TG of the upper two G2 pixels of the four G2 pixels of the OCL unit are connected to the signal line 41. p or 41 q , instead of signal line 41 e or 41 f , and the gate electrodes of the transfer transistors TG of the two G2 pixels on the lower side are connected to the signal line 41 g or 41 h , instead of signal line 41 r or 41 s . Assume that there are four signal lines 41 e , 41 f , 41 p and 41 q The two B pixels of the GB pixel row are the first pixel and the second pixel, and the two G2 pixels are the third pixel and the fourth pixel. Then the first pixel and the second pixel are connected by the signal line 41 e and 41 f The third pixel and the fourth pixel are controlled by the driving signal TRG of the signal line 41. p and 41 q The driving signal TRG controls.

[0201] Fig.17 Shown in Fig.15 An example of driving in which a phase difference signal is output in the phase difference pixel unit 31A.

[0202] exist Fig.15When the phase difference pixel unit 31A outputs a phase difference signal, the vertical drive circuit 4 is connected to Fig.17 The driving signal TRG transmitted through the signal line 41 of the contact point indicated by the black circle is controlled to be high.

[0203] In a GB pixel row in which four signal lines 41 are wired in one row, the vertical drive circuit 4 switches the drive signals TRG of the upper two signal lines 41 (ie, the drive signals TRG e and TG f And the driving signal TRG g and TG h ) is controlled to high. As a result, Fig.17 As shown in the lower half of , for the G1 pixel, a signal obtained by adding pixel signals of two pixels in the upper half of the OCL unit can be acquired.

[0204] Fig.18 Shown in Fig.16 An example of driving in which a phase difference signal is output in the phase difference pixel unit 31B.

[0205] exist Fig.16 When the phase difference pixel unit 31B in the vertical driving circuit 4 outputs a phase difference signal, the vertical driving circuit 4 will be connected to Fig.18 The driving signal TRG transmitted through the signal line 41 of the contact point indicated by the black circle is controlled to be high.

[0206] In a GB pixel row in which four signal lines 41 are wired in one row, the vertical drive circuit 4 switches the drive signals TRG of the upper two signal lines 41 (ie, the drive signals TRG e and TG f And the driving signal TRG g and TG h ) is controlled to high. As a result, Fig.18 As shown in the lower half of , for the G2 pixel, a signal obtained by adding pixel signals of two pixels in the lower half of the OCL unit can be acquired.

[0207] In the case of not outputting the phase difference signal, it is only necessary to convert the four driving signals TRG of the GB pixel row (ie, the driving signal TRG e ~TRG h and drive signal TRG p ~TRG s ) is controlled to be high. In this case, it is possible to acquire a pixel signal similar to the pixel signal of the normal pixel unit 31T obtained by adding the pixel signals of the OCL unit (four pixels).

[0208] That is, in the driving mode (first driving mode) in which the phase difference signal is not output, the vertical driving circuit 4 of the solid-state imaging device 1 outputs all the driving signals TRG of the two GB pixel rows. e ~TRG h and drive signal TRG p ~TRG s control is high and all pass transistors TG e ~TG h The control is activated, and in the driving mode of outputting the phase difference signal (the second driving mode), only the driving signals TRG of the two GB pixel rows are e ~TRG h control is high and only the pass transistor TG of the upper half of the OCL unit e and TG f Or only the lower half of the pass transistor TG g and TG h As a result, it is possible to output a phase difference signal by performing a single readout operation on each pixel without reducing the frame rate.

[0209] Therefore, according to Fig.15 and Fig.16 The configuration of the phase difference pixel units 31A and 31B can output upper and lower divided phase difference signals by reading out four pixels of the OCL unit at a time.

[0210] Note that you need to Fig.15 and Fig.16 The phase difference pixel units 31A and 31B in the embodiment are divided into a pixel unit 31 that can output a phase difference signal of the upper half of the OCL unit and a pixel unit 31 that can output a phase difference signal of the lower half of the OCL unit. Fig.19 As shown, by connecting the four signal lines 41 of the GB pixel row and the gate electrode of the transfer transistor TG, both the upper half phase difference signal and the lower half phase difference signal can be output simply by controlling the drive signal TRG.

[0211] exist Fig.19 In the embodiment, the gate electrodes of the transfer transistors TG of the G pixels indicated as “G1G2” are connected to the lower signal line 41 among the four signal lines 41 of the GB pixel row. p , 41 q , 41 r and 41 s By setting the drive signal TRG p and TRG q Control is high, the drive signal TRG r and TRG sOn the other hand, by controlling the drive signal TRG p and TRG q Control is low, the drive signal TRG r and TRG s When the control is high, the phase difference signal of the lower half can be obtained.

[0212] <8. Signal Output of Solid-State Imaging Device>

[0213] Reference Fig. 20 and Fig.21 The signal output of the solid-state imaging device 1 will be described.

[0214] In the case where a drive signal line (signal line 41 x and 41 y ) solid-state imaging device, as described above, it is necessary to perform two readout operations of reading out pixel signals of two pixels on either side and reading out pixel signals in pixels of the OCL unit. As a result, although the frame rate is reduced, Fig. 20 As shown, both the pixel signal for video and the pixel signal for phase difference can be acquired in the entire pixel area of ​​the pixel array unit 3.

[0215] Fig. 20 An example is shown in which a pixel signal of each of the R, G, G, and B pixels of the OCL unit is output as a pixel signal for video, and a left phase difference signal Y of the luminance signal Y is calculated from the phase difference signals of the four R, G, G, and B pixels of the OCL unit. L and the right phase difference signal Y R , and outputs an example of a pixel signal used as a phase difference.

[0216] On the other hand, as described above, a portion of the entire pixel area of ​​the pixel array unit 3 is set as a pixel signal output for phase difference, and the solid-state imaging device 1 obtains both the pixel signal for video and the pixel signal for phase difference by reading out once (one frame). The pixel signal for video of the phase difference pixel is generated by correction processing.

[0217] Therefore, if Fig.21 As shown, the solid-state imaging device 1 outputs a pixel signal for video for the entire pixel area of ​​the pixel array unit 3 and a pixel signal for phase difference for only some pixels (phase difference pixels) of the pixel array unit 3. Fig.21 In the example, since the G pixel is a phase difference pixel, the left phase difference signal G of the G pixel is output. L and the right phase difference signal G R .

[0218] As described above, when the configuration of this embodiment is used, a smaller number of phase difference signals than pixel signals for video are output.

[0219] <9. Others>

[0220] In the above-mentioned embodiment, as the pixel unit 31 configured in the pixel array unit 3, the configuration of the phase difference pixel units 31A and 31B that output the phase difference signal of the left half or the right half of the OCL unit and the phase difference pixel units 31A and 31B that output the phase difference signal of the upper half or the lower half of the OCL unit have been described.

[0221] In the pixel array unit 3 , the phase difference pixel units 31A and 31B outputting the left half or right half phase difference signal and the phase difference pixel units 31A and 31B outputting the upper half or lower half phase difference signal of the OCL unit may be configured in a mixed manner.

[0222] In the above-described embodiment, the solid-state imaging device 1 has been described as having Figure 4 The shared pixel structure in which one FD35 is shared by a total of eight pixels of 4×2 is shown. However, the solid-state imaging device 1 may have a structure in which the FD is shared by a number of pixels other than eight pixels (e.g., two pixels, four pixels, sixteen pixels, etc.), or may have a structure in which a shared pixel transistor is not shared with the FD.

[0223] <10. Application examples of electronic equipment>

[0224] The present technology is not limited to being applicable to solid-state imaging devices. That is, the present technology can be applied to all electronic devices that use solid-state imaging devices as image capture units (photoelectric conversion units) such as imaging devices (such as digital cameras or video cameras), mobile terminal devices with imaging functions, and copiers that use solid-state imaging devices as image readout units. The solid-state imaging device can be formed as a single chip, or can be in the form of a module with an imaging function in which an imaging unit and a signal processing unit or an optical system are packaged together.

[0225] Fig. 22 This is a block diagram showing a configuration example of an imaging device as an electronic device to which the present technology is applied.

[0226] Fig. 22 The imaging device 100 includes an optical unit 101 having a lens group, etc., wherein the optical unit 101 is Figure 1The solid-state imaging device (imaging device) 102 of the solid-state imaging device 1 in the embodiment of the present invention and a digital signal processor (DSP) circuit 103 as a camera signal processing circuit. In addition, the imaging device 100 further includes a frame memory 104, a display unit 105, a recording unit 106, an operation unit 107, and a power supply unit 108. The DSP circuit 103, the frame memory 104, the display unit 105, the recording unit 106, the operation unit 107, and the power supply unit 108 are connected to each other via a bus 109.

[0227] The optical unit 101 captures incident light (image light) from a subject and forms an image on an imaging surface of the solid-state imaging device 102. The solid-state imaging device 102 converts the amount of incident light formed on the imaging surface by the optical unit 101 into an electrical signal for each pixel and outputs the electrical signal as a pixel signal. As the solid-state imaging device 102, a Figure 1 The solid-state imaging device 1 in the embodiment is a solid-state imaging device capable of simultaneously acquiring a pixel signal and a phase difference signal for video by reading out one frame.

[0228] The display unit 105 includes, for example, a thin display such as a liquid crystal display (LCD) or an organic electroluminescent (EL) display, and displays a moving image or a still image captured by the solid-state imaging device 102. The recording unit 106 records the moving image or the still image captured by the solid-state imaging device 102 on a recording medium such as a hard disk or a semiconductor memory.

[0229] The operation unit 107 issues operation commands for various functions of the imaging device 100 under the operation of the user. The power supply unit 108 supplies various power sources used as operation power sources for the DSP circuit 103, the frame memory 104, the display unit 105, the recording unit 106, and the operation unit 107 to these supply targets as appropriate.

[0230] As described above, by using the solid-state imaging device 1 to which the above-described embodiment is applied as the solid-state imaging device 102, it is possible to simultaneously acquire a pixel signal and a phase difference signal for video by one-frame readout. Therefore, in the imaging device 100 such as a video camera, a digital camera, or a camera module for a mobile device such as a mobile phone, high-speed focus control and high image quality of a captured image can be achieved.

[0231] <Use examples of image sensors>

[0232] Fig.23 1 is a diagram showing a usage example of the solid-state imaging device 1 described above.

[0233] For example, an image sensor using the above-described solid-state imaging device 1 can be used in various cases of sensing light such as visible light, infrared light, ultraviolet light, and X-rays as shown below.

[0234] - A device for capturing images for viewing, for example, a digital camera or a portable device with a camera function.

[0235] - Traffic devices, such as on-board sensors that capture images of the front, rear, surroundings, interior, etc. of a vehicle for safe driving such as automatic parking, recognize the driver's condition, etc., surveillance cameras that monitor moving vehicles and roads, and ranging sensors that measure the distance between vehicles, etc.

[0236] - Home appliances, such as televisions, refrigerators, and air conditioners, to capture an image of a user's gesture and perform device operations based on the gesture.

[0237] - Medical and health care devices, for example, endoscopes or devices for angiography by receiving infrared light.

[0238] -Security devices, such as surveillance cameras for crime prevention or cameras for personal identification.

[0239] - Devices for beauty care, for example, a dermatograph for taking images of the skin and a microscope for taking images of the scalp.

[0240] - Sports devices, for example, sports cameras or wearable cameras for sports purposes, etc.

[0241] - Agricultural devices, such as cameras used to monitor the condition of fields and crops.

[0242] <11. Application examples of endoscopic surgery systems>

[0243] The technology according to the present disclosure can be applied to various products. For example, the technology according to the present disclosure can be applied to an endoscopic surgery system.

[0244] Fig.24 : is a diagram showing an example of a schematic configuration of an endoscopic surgery system to which the technology according to the present disclosure (the present technology) can be applied.

[0245] Fig.24 The figure shows a state where an operator (doctor) 11131 is using an endoscopic surgery system 11000 to perform surgery on a patient 11132 on a bed 11133. As shown in the figure, the endoscopic surgery system 11000 includes an endoscope 11100, other surgical instruments 11110 such as a pneumoperitoneum tube 11111 and an energy treatment instrument 11112, a support arm device 11120 supporting the endoscope 11100, and a cart 11200 on which various instruments for endoscopic surgery are mounted.

[0246] The endoscope 11100 includes a lens barrel 11101 in which a region of a predetermined length from a distal end is inserted into a body cavity of a patient 11132, and a camera 11102 connected to a proximal end of the lens barrel 11101. In the example shown, the endoscope 11100 constructed as a so-called hard scope having a hard lens barrel 11101 is shown, but the endoscope 11100 may be constructed as a so-called soft scope having a soft lens barrel.

[0247] An opening portion into which an objective lens is fitted is provided at the distal end of the lens barrel 11101. The light source device 11203 is connected to the endoscope 11100, and the light generated by the light source device 11203 is guided to the distal end of the lens barrel through a light guide extending to the inside of the lens barrel 11101, and the light is emitted toward an observation object in the body cavity of the patient 11132 via the objective lens. Note that the endoscope 11100 may be a straight-view mirror, an oblique-view mirror, or a side-view mirror.

[0248] An optical system and an imaging element are provided inside the camera head 11102, and reflected light (observation light) from an observation object is converged on the imaging element through the optical system. The observation light is photoelectrically converted by the imaging element, and an electrical signal corresponding to the observation light, that is, an image signal corresponding to the observation image, is generated. The image signal is transmitted to the camera control unit (CCU) 11201 as RAW data.

[0249] The CCU 11201 includes a central processing unit (CPU), a graphics processing unit (GPU), etc., and comprehensively controls the operations of the endoscope 11100 and the display device 11202. In addition, the CCU 11201 receives an image signal from the camera 11102, and performs various types of image processing such as development processing (demosaic processing) on ​​the image signal to display an image based on the image signal.

[0250] The display device 11202 displays an image based on an image signal on which image processing has been performed by the CCU 11201 under the control of the CCU 11201 .

[0251] For example, the light source device 11203 includes a light source such as a light emitting diode (LED), and supplies irradiation light for capturing an image of a surgical site or the like to the endoscope 11100 .

[0252] The input device 11204 is an input interface for the endoscopic surgery system 11000. The user can input various types of information and instructions to the endoscopic surgery system 11000 via the input device 11204. For example, the user inputs instructions for changing the imaging conditions (type of irradiation light, magnification, focal length, etc.) of the endoscope 11100, and the like.

[0253] The treatment instrument control device 11205 controls the driving of the energy treatment instrument 11112 for cauterization and incision of tissues, sealing of blood vessels, etc. The pneumoperitoneum device 11206 injects gas into the body cavity of the patient 11132 via the pneumoperitoneum tube 11111 to expand the body cavity, thereby ensuring the field of view of the endoscope 11100 and ensuring the working space of the operator. The recorder 11207 is a device capable of recording various types of information related to the operation. The printer 11208 is a device capable of printing various types of information related to the operation in various forms such as text, images, or graphics.

[0254] Note that the light source device 11203 that supplies irradiation light for imaging the surgical site to the endoscope 11100 may include, for example, an LED, a laser light source, or a white light source including a combination thereof. In the case where the white light source includes a combination of RGB laser light sources, since the output intensity and output timing of each color (various wavelengths) can be controlled with high precision, the white balance of the captured image can be adjusted in the light source device 11203. In addition, in this case, by emitting laser light from each RGB laser light source to the observed object in a time-division manner and controlling the drive of the imaging element of the camera 11102 in synchronization with the emission timing, it is also possible to capture images corresponding to each RGB in a time-division manner. According to this method, a color image can be obtained without providing a color filter in the imaging element.

[0255] In addition, the drive of the light source device 11203 can be controlled so that the intensity of the light to be output is changed at predetermined intervals. By controlling the drive of the imaging element of the camera 11102 in synchronization with the timing of the change in light intensity to acquire images in a time-division manner and synthesize the images, it is possible to generate a high dynamic range image without so-called blocked shadows and overexposed highlights.

[0256] In addition, the light source device 11203 can be configured to supply light of a predetermined wavelength band corresponding to special light observation. In special light observation, for example, by using the wavelength dependence of light absorption in body tissue, by emitting light having a narrowband domain compared to the irradiation light (i.e., white light) during ordinary observation, so-called narrowband domain imaging is performed to image predetermined tissues such as blood vessels on the surface of the mucosa with high contrast. Alternatively, in special light observation, fluorescence observation can be performed to obtain an image by emitting fluorescence generated by excitation light. In fluorescence observation, for example, excitation light can be irradiated to body tissue to observe fluorescence from body tissue (autofluorescence imaging), or reagents such as indocyanine green (ICG) can be locally injected into body tissue and excitation light corresponding to the fluorescence wavelength of the reagent can be emitted to obtain a fluorescent image. The light source device 11203 can be configured to supply narrowband domain light and / or excitation light corresponding to such special light observation.

[0257] Fig.25 It shows Fig.24 A block diagram showing an example of the functional configuration of the camera 11102 and the CCU 11201 shown.

[0258] The camera 11102 includes a lens unit 11401, an imaging unit 11402, a driving unit 11403, a communication unit 11404, and a camera control unit 11405. The CCU 11201 includes a communication unit 11411, an image processing unit 11412, and a control unit 11413. The camera 11102 and the CCU 11201 are communicatively connected to each other via a transmission cable 11400.

[0259] The lens unit 11401 is an optical system provided at a connection portion with the lens barrel 11101. Observation light received from the distal end of the lens barrel 11101 is guided to the camera head 11102 and is incident on the lens unit 11401. The lens unit 11401 is constructed by combining a plurality of lenses including a zoom lens and a focus lens.

[0260] The imaging unit 11402 includes an imaging element. The number of imaging elements constituting the imaging unit 11402 may be one (so-called single-board type) or multiple (so-called multi-board type). In the case where the imaging unit 11402 is configured as a multi-board type, for example, image signals corresponding to RGB can be generated by each imaging element, and a color image can be obtained by synthesizing the image signals. Alternatively, the imaging unit 11402 may include a pair of imaging elements for acquiring image signals for the right eye and the left eye corresponding to a three-dimensional (3D) display. By performing a 3D display, the operator 11131 can more accurately grasp the depth of the living tissue in the surgical site. Note that in the case where the imaging unit 11402 is configured as a multi-board type, a plurality of lens units 11401 corresponding to the respective imaging elements may be provided.

[0261] In addition, the imaging unit 11402 does not have to be provided in the camera head 11102. For example, the imaging unit 11402 may be provided just behind the objective lens inside the lens barrel 11101.

[0262] The driving unit 11403 includes an actuator, and moves the zoom lens and the focus lens of the lens unit 11401 by a predetermined distance along the optical axis under the control of the camera control unit 11405. As a result, the magnification and focus of the image captured by the imaging unit 11402 can be appropriately adjusted.

[0263] The communication unit 11404 includes a communication device for transmitting / receiving various types of information to / from the CCU 11201. The communication unit 11404 transmits the image signal acquired from the imaging unit 11402 to the CCU 11201 via the transmission cable 11400 as RAW data.

[0264] In addition, the communication unit 11404 receives a control signal for controlling the driving of the camera 11102 from the CCU 11201, and supplies the control signal to the camera control unit 11405. For example, the control signal includes information related to imaging conditions, such as information specifying a frame rate of a captured image, information specifying an exposure value at the time of imaging, and / or information specifying a magnification and a focus of a captured image, etc.

[0265] Note that imaging conditions such as frame rate, exposure value, magnification, and focus may be appropriately specified by the user, or may be automatically set based on the acquired image signal by the control unit 11413 of the CCU 11201. In the latter case, a so-called automatic exposure (AE) function, an automatic focus (AF) function, and an automatic white balance (AWB) function are provided in the endoscope 11100.

[0266] The camera control unit 11405 controls the driving of the camera 11102 based on a control signal from the CCU 11201 received via the communication unit 11404 .

[0267] The communication unit 11411 includes a communication device for transmitting / receiving various types of information to / from the camera 11102. The communication unit 11411 receives an image signal transmitted from the camera 11102 via the transmission cable 11400.

[0268] In addition, the communication unit 11411 transmits a control signal for controlling the driving of the camera 11102 to the camera 11102. The image signal and the control signal may be transmitted through electrical communication, optical communication, or the like.

[0269] The image processing unit 11412 performs various types of image processing on the image signal which is RAW data transmitted from the camera 11102 .

[0270] The control unit 11413 performs various types of control related to imaging of a surgical site, etc., by the endoscope 11100 and display of a captured image obtained by imaging the surgical site, etc. For example, the control unit 11413 generates a control signal for controlling the driving of the camera 11102.

[0271] In addition, the control unit 11413 causes the display device 11202 to display the captured image of the surgical site, etc. based on the image signal that has been image-processed by the image processing unit 11412. At this time, the control unit 11413 can use various image recognition technologies to recognize various objects within the captured image. For example, the control unit 11413 can recognize surgical instruments such as forceps, specific living parts, bleeding, fog when the energy treatment instrument 11112 is used, etc. by detecting the edge shape, color, etc. of the object contained in the captured image. When the display device 11202 is caused to display the captured image, by using the recognition result, the control unit 11413 can overlap and display various types of surgical support information on the image of the surgical site. Since the surgical support information is superimposed and displayed and presented to the operator 11131, the burden of the operator 11131 can be reduced, and the operator 11131 can reliably perform the operation.

[0272] The transmission cable 11400 connecting the camera head 11102 and the CCU 11201 together is an electrical signal cable compatible with communication of electrical signals, an optical fiber compatible with optical communication, or a composite cable thereof.

[0273] Here, in the example shown, wired communication is performed by using the transmission cable 11400 , but wireless communication may be performed between the camera 11102 and the CCU 11201 .

[0274] An example of an endoscopic surgical system to which the technology according to the present disclosure is applicable has been described above. In the above-mentioned configuration, the technology according to the present disclosure can be applied to the imaging unit 11402 of the camera 11102. Specifically, the solid-state imaging device 1 can be used as the imaging unit 11402. By applying the technology according to the present disclosure to the imaging unit 11402, it is possible to simultaneously acquire a pixel signal and a phase difference signal for video. As a result, a captured image with high image quality and distance information can be acquired, and a clearer surgical site image can be obtained.

[0275] Note that here, an endoscopic surgery system is described as an example, but the technology according to the present disclosure can be applied to, for example, a microscope surgery system or the like.

[0276] <12. Application examples of mobile objects>

[0277] The technology according to the present disclosure can be applied to various products. For example, the technology according to the present disclosure is implemented as a device installed on any type of mobile body such as a car, an electric car, a hybrid electric car, a motorcycle, a bicycle, a personal mobile device, an airplane, an unmanned aerial vehicle, a ship, and a robot.

[0278] Fig.26This is a block diagram showing a schematic configuration example of a vehicle control system as an example of a mobile object control system to which the technology according to the present disclosure can be applied.

[0279] The vehicle control system 12000 includes a plurality of electronic control units connected via a communication network 12001. Fig.26 In the example shown, the vehicle control system 12000 includes a drive system control unit 12010, a main system control unit 12020, an external information detection unit 12030, an internal information detection unit 12040, and an integrated control unit 12050. In addition, as a functional configuration of the integrated control unit 12050, a microcomputer 12051, a sound and image output unit 12052, and an in-vehicle network interface (I / F) 12053 are shown.

[0280] The drive system control unit 12010 controls the operation of devices related to the drive system of the vehicle according to various programs. For example, the drive system control unit 12010 is a control device for a drive force generating device such as an internal combustion engine or a drive motor that generates a drive force of the vehicle, a drive force transmission mechanism that transmits the drive force to the wheels, a steering mechanism that adjusts the steering angle of the vehicle, and a control device such as a brake device that generates a braking force of the vehicle.

[0281] The main body system control unit 12020 controls the operation of various devices installed to the vehicle body according to various programs. For example, the main body system control unit 12020 is used as a control device for a keyless entry system, a smart key system, a power window device, or various lights such as a headlight, a taillight, a brake light, a flasher for a car, or a fog light. In this case, a radio wave transmitted from a portable device or a signal of various switches instead of a key may be input to the main body system control unit 12020. The main body system control unit 12020 receives the input of the radio wave or the signal and controls the door lock device, the power window device, the light, etc. of the vehicle.

[0282] The vehicle exterior information detection unit 12030 detects information of the exterior of the vehicle equipped with the vehicle control system 12000. For example, the imaging unit 12031 is connected to the vehicle exterior information detection unit 12030. The vehicle exterior information detection unit 12030 causes the imaging unit 12031 to capture an image of the exterior of the vehicle and receive the captured image. The vehicle exterior information detection unit 12030 may perform object detection processing such as a person, a car, an obstacle, a sign, text on the road, etc. or distance detection processing based on the received image.

[0283] The imaging unit 12031 is an optical sensor that receives light and outputs an electrical signal corresponding to the amount of light received. The imaging unit 12031 can output the electrical signal as an image or as distance measurement information. In addition, the light received by the imaging unit 12031 can be visible light or invisible light such as infrared light.

[0284] The in-vehicle information detection unit 12040 detects information inside the vehicle. For example, the in-vehicle information detection unit 12040 is connected to a driver state detection unit 12041 that detects the state of the driver. For example, the driver state detection unit 12041 includes a camera that photographs the driver, and based on the detection information input from the driver state detection unit 12041, the in-vehicle information detection unit 12040 can calculate the driver's fatigue or concentration, or can determine whether the driver has fallen asleep.

[0285] The microcomputer 12051 can calculate the control target value of the driving force generation device, the steering mechanism or the braking device based on the information inside and outside the vehicle obtained by the vehicle exterior information detection unit 12030 or the vehicle interior information detection unit 12040, and can output a control instruction to the drive system control unit 12010. For example, the microcomputer 12051 can perform coordinated control to realize the functions of an advanced driver assistance system (ADAS) including collision avoidance or collision mitigation of vehicles, tracking driving based on the distance between vehicles, vehicle speed maintenance driving, vehicle collision warning, lane departure warning of vehicles, etc.

[0286] In addition, the microcomputer 12051 can coordinate control by controlling the driving force generating device, steering mechanism, braking device, etc. based on the information about the vehicle's surroundings obtained by the external information detection unit 12030 or the internal information detection unit 12040 to achieve autonomous driving that does not rely on the driver's operation.

[0287] In addition, the microcomputer 12051 can output a control command to the main system control unit 12020 based on the information outside the vehicle obtained by the vehicle exterior information detection unit 12030. For example, the microcomputer 12051 controls the headlights according to the position of the front vehicle or the oncoming vehicle detected by the vehicle exterior information detection unit 12030, and performs coordinated control to achieve glare prevention such as switching the high beam to the low beam.

[0288] The sound and image output unit 12052 transmits an output signal of at least one of sound and image to an output device capable of visually or auditorily notifying the vehicle occupants or the outside of the vehicle of information. Fig.26 In the example of FIG. 1 , as output devices, an audio speaker 12061, a display unit 12062, and a dashboard 12063 are illustrated. For example, the display unit 12062 may include at least one of an in-vehicle display and a head-up display.

[0289] Fig. 27 12031 is a diagram showing an example of the installation position of the imaging unit 12031.

[0290] exist Fig. 27In the figure, vehicle 12100 has imaging units 12101, 12102, 12103, 12104 and 12105 as imaging unit 12031.

[0291] For example, the imaging units 12101, 12102, 12103, 12104 and 12105 are arranged at positions such as the front of the vehicle 12100, the side mirrors, the rear bumper and the rear door, and the upper side of the windshield in the vehicle. The imaging unit 12101 arranged on the front of the vehicle and the imaging unit 12105 arranged on the upper side of the windshield in the vehicle mainly obtain images in front of the vehicle 12100. The imaging units 12102 and 12103 arranged on the side mirrors mainly obtain images on the side of the vehicle 12100. The imaging unit 12104 arranged on the rear bumper or the rear door mainly obtains images on the rear of the vehicle 12100. The front images acquired by the imaging units 12101 and 12105 are mainly used to detect front vehicles, pedestrians, obstacles, traffic lights, traffic signs, lanes, etc.

[0292] also, Fig. 27 An example of the imaging ranges of the imaging units 12101 to 12104 is shown. The imaging range 12111 represents the imaging range of the imaging unit 12101 disposed on the front of the vehicle, the imaging ranges 12112 and 12113 respectively represent the imaging ranges of the imaging units 12102 and 12103 disposed on the side mirrors, and the imaging range 12114 represents the imaging range of the imaging unit 12104 disposed on the rear bumper or the rear door. For example, by superimposing the image data captured by the imaging units 12101 to 12104, a bird's-eye view image of the vehicle 12100 seen from above can be obtained.

[0293] At least one of the imaging units 12101 to 12104 may have a function of acquiring distance information. For example, at least one of the imaging units 12101 to 12104 may be a stereo camera including a plurality of imaging elements, or may be an imaging element having pixels for phase difference detection.

[0294] For example, based on the distance information obtained from the imaging units 12101 to 12104, the microcomputer 12051 can extract the closest solid object located on the driving route of the vehicle 12100, that is, the solid object traveling at a predetermined speed (for example, 0 km / h or more) in the same direction as the vehicle 12100 as the front vehicle by obtaining the distance to each solid object within the imaging range 12111 to 12114 and the time change of the distance (relative speed relative to the vehicle 12100). In addition, the microcomputer 12051 can set the distance between the vehicles that is previously ensured in front of the front vehicle, and can perform automatic braking control (including tracking travel stop control), automatic acceleration control (including tracking travel start control), etc. In this way, coordinated control such as automatic driving for realizing autonomous driving without relying on the operation of the driver can be performed.

[0295] For example, based on the distance information obtained from the imaging units 12101 to 12104, the microcomputer 12051 can classify and extract the three-dimensional object data about the three-dimensional object into two-wheeled vehicles, ordinary vehicles, large vehicles, pedestrians, and other three-dimensional objects such as electric poles, so that it can be used to automatically avoid obstacles. For example, the microcomputer 12051 identifies obstacles around the vehicle 12100 as obstacles that can be seen by the driver of the vehicle 12100 and obstacles that are difficult to see. Then, the microcomputer 12051 determines the collision risk indicating the degree of danger of collision with each obstacle, and when there is a possibility of collision with a collision risk exceeding a set value, the microcomputer 12051 outputs a warning to the driver via the audio speaker 12061 or the display unit 12062 or performs forced deceleration or evasive steering through the drive system control unit 12010, thereby performing driving assistance for collision avoidance.

[0296] At least one of the imaging units 12101 to 12104 may be an infrared camera for detecting infrared rays. For example, the microcomputer 12051 may identify a pedestrian by determining whether the pedestrian exists in the imaging images of the imaging units 12101 to 12104. For example, the identification of the pedestrian is performed by extracting feature points in the imaging images of the imaging units 12101 to 12104 as infrared cameras and by performing pattern matching processing on a series of feature points indicating the outline of the object to determine whether the object is a pedestrian. When the microcomputer 12051 determines that the pedestrian exists in the imaging images of the imaging units 12101 to 12104 and identifies the pedestrian, the sound image output unit 12052 controls the display unit 12062 so that the identified pedestrian is covered by a rectangular outline for emphasis. In addition, the sound image output unit 12052 causes the display unit 12062 to display an icon indicating the pedestrian at a desired position, etc.

[0297] An example of a vehicle control system to which the technology according to the present disclosure is applicable has been described above. In the above-mentioned configuration, the technology according to the present disclosure can be applied to the imaging unit 12031. Specifically, the solid-state imaging device 1 according to the above-mentioned embodiment can be used as the imaging unit 12031. By applying the technology according to the present disclosure to the imaging unit 12031, it is possible to simultaneously acquire a pixel signal and a phase difference signal for video. As a result, high-quality captured images and distance information can be acquired, and the safety of the driver and the vehicle can be increased.

[0298] Note that the embodiments of the present technology are not limited to the above-described embodiments, and various changes can be made without departing from the gist of the present technology.

[0299] For example, a form in which all or some of the above-described embodiments are combined may be adopted.

[0300] Note that the effects described in this specification are merely examples and not limitations, and effects other than those described in this specification may be provided.

[0301] Note that the present technology can have the following configurations.

[0302] (1) A solid-state imaging device comprising:

[0303] A pixel array unit in which a plurality of pixels in a microlens unit in which a color filter of the same color and one microlens are arranged for a plurality of pixels are two-dimensionally arranged in a matrix,

[0304] At least a portion of the pixel rows of the pixel array unit include:

[0305] a first signal line configured to transmit a drive signal for driving a first transfer transistor of a first pixel in a microlens unit including a color filter of a first color;

[0306] a second signal line configured to transmit a drive signal for driving a second transfer transistor of a second pixel different from the first pixel; and

[0307] A third signal line configured to transmit a drive signal for driving a third transfer transistor of a third pixel in a microlens unit including a color filter of a second color different from the first color.

[0308] (2) The solid-state imaging device according to (1), further comprising:

[0309] a driving circuit configured to control each of the transmission transistors,

[0310] The driving circuit controls all of the first to third transfer transistors to be in an active state in a first driving mode, and controls the first transfer transistor and the second transfer transistor to be in an active state in a second driving mode.

[0311] (3) The solid-state imaging device according to (1) or (2),

[0312] The microlens unit is composed of four pixels each including two pixels in the vertical direction and the horizontal direction, and the first pixel to the third pixel are located in the same pixel row.

[0313] (4) The solid-state imaging device according to (3),

[0314] The fourth transfer transistor of the fourth pixel different from the third pixel in the microlens unit including the color filter of the second color is controlled by the driving signal of the first signal line.

[0315] (5) The solid-state imaging device according to (3) or (4),

[0316] A plurality of pixels in the microlens unit including the color filter of the second color are pixels that detect a phase difference obtained by dividing the microlens unit in the horizontal direction.

[0317] (6) The solid-state imaging device according to any one of (1) to (5), further comprising:

[0318] A third driving mode in which pixel signals of two microlens units in each of the vertical and horizontal directions are added.

[0319] (7) The solid-state imaging device according to (6), further comprising:

[0320] The switch is configured to control whether to add pixel signals of two microlens units in the horizontal direction or the vertical direction in the third driving mode.

[0321] (8) The solid-state imaging device according to (7), further comprising:

[0322] a drive circuit configured to control the switch,

[0323] The drive circuit turns off the switch when the phase difference is detected, and turns on the switch when the phase difference is not detected.

[0324] (9) The solid-state imaging device according to (2),

[0325] wherein at least a portion of the pixel rows of the pixel array unit further includes a fourth signal line configured to transmit a drive signal for driving a fourth transfer transistor of a fourth pixel in the microlens unit including a color filter of a second color, and

[0326] The driving circuit controls all of the first to fourth transfer transistors to be in an active state in a first driving mode, and controls the first and second transfer transistors to be in an active state in a second driving mode.

[0327] (10) The solid-state imaging device according to (9),

[0328] The microlens unit is composed of four pixels each including two pixels in the vertical direction and the horizontal direction, and the first pixel to the fourth pixel are located in the same pixel row.

[0329] (11) The solid-state imaging device according to (9) or (10),

[0330] A plurality of pixels in the microlens unit including the color filter of the second color are pixels that detect a phase difference obtained by dividing the microlens unit in the vertical direction.

[0331] (12) The solid-state imaging device according to any one of (1) to (11),

[0332] The first color is red or blue, and the second color is green.

[0333] (13) A method for driving a solid-state imaging device, the solid-state imaging device comprising a pixel array unit and first to third signal lines located in at least a portion of pixel rows of the pixel array unit, wherein in the pixel array unit, a plurality of pixels in a microlens unit in which a color filter of the same color and one microlens are arranged for a plurality of pixels are two-dimensionally arranged in a matrix, the method comprising:

[0334] driving a first transfer transistor of a first pixel in a microlens unit including a color filter of a first color via a first signal line;

[0335] driving a second transfer transistor of a second pixel different from a first pixel in a microlens unit including a color filter of a first color via a second signal line; and

[0336] A third transfer transistor of a third pixel in a microlens unit including a color filter of a second color different from the first color is driven via a third signal line.

[0337] (14) An electronic device comprising:

[0338] A solid-state imaging device comprising a pixel array unit in which a plurality of pixels in a microlens unit in which a color filter of the same color and one microlens are arranged for a plurality of pixels are two-dimensionally arranged in a matrix,

[0339] At least a portion of the pixel rows of the pixel array unit include:

[0340] a first signal line configured to transmit a drive signal for driving a first transfer transistor of a first pixel in a microlens unit including a color filter of a first color;

[0341] a second signal line configured to transmit a drive signal for driving a second transfer transistor of a second pixel different from the first pixel in the microlens unit including the color filter of the first color; and

[0342] A third signal line configured to transmit a drive signal for driving a third transfer transistor of a third pixel in a microlens unit including a color filter of a second color different from the first color.

[0343] Reference numerals list

[0344] 1 Solid-state imaging device

[0345] 2 pixels

[0346] 3 Pixel Array Unit

[0347] 4 Vertical drive circuit

[0348] 5 columns AD conversion unit

[0349] 7 Output Circuit

[0350] 8 Control circuit

[0351] 9 Vertical signal line

[0352] 10 Pixel drive wiring

[0353] 31 pixel unit

[0354] PD Photodiode

[0355] 35 Floating diffusion (FD)

[0356] TG Pass Transistor

[0357] TRG drive signal

[0358] 26 Microlens

[0359] 31A, 31B Phase difference pixel unit

[0360] 31T Normal pixel unit

[0361] 41 Signal line

[0362] 51 MUX

[0363] 52 ADC

[0364] 53 Comparator

[0365] 54 Up / Down Counter

[0366] 71(71 a ,71 b ) switch

[0367] 72(72 a ,72 b ) Signal line

[0368] 100 Imaging Device

[0369] 102 Solid-state imaging device

Claims

1. A light detection device, comprising: a first pixel group including first pixels, second pixels, third pixels, and fourth pixels arranged in a 2×2 matrix in a plan view, each of the first pixels, the second pixels, the third pixels, and the fourth pixels including a photoelectric conversion region, and the first pixel group further including a first charge holding portion connected to the photoelectric conversion regions of all of the first pixels, the second pixels, the third pixels, and the fourth pixels in the first pixel group; a second pixel group arranged adjacent to the first pixel group and including a fifth pixel, a sixth pixel, a seventh pixel, and an eighth pixel arranged in a 2×2 matrix in the plan view, each of the fifth pixel, the sixth pixel, the seventh pixel, and the eighth pixel including a photoelectric conversion region, and the second pixel group further including a second charge holding portion connected to the photoelectric conversion regions of all of the fifth pixel, the sixth pixel, the seventh pixel, and the eighth pixel in the second pixel group; a third pixel group arranged adjacent to the second pixel group and including a ninth pixel, a tenth pixel, an eleventh pixel, and a twelfth pixel arranged in a 2×2 matrix in the plan view, each of the ninth pixel, the tenth pixel, the eleventh pixel, and the twelfth pixel including a photoelectric conversion region, and the third pixel group further including a third charge holding portion connected to the photoelectric conversion regions of all of the ninth pixel, the tenth pixel, the eleventh pixel, and the twelfth pixel in the third pixel group; a fourth pixel group arranged adjacent to the third pixel group and including a thirteenth pixel, a fourteenth pixel, a fifteenth pixel, and a sixteenth pixel arranged in a 2×2 matrix in the plan view, each of the thirteenth pixel, the fourteenth pixel, the fifteenth pixel, and the sixteenth pixel including a photoelectric conversion region, the fourth pixel group further including a fourth charge holding portion connected to the photoelectric conversion regions of all of the thirteenth pixel, the fourteenth pixel, the fifteenth pixel, and the sixteenth pixel in the fourth pixel group, wherein the first pixel group, the second pixel group, the third pixel group, and the fourth pixel group are arranged in a row in the plan view; a first signal line connected to the photoelectric conversion region of the fifth pixel and the photoelectric conversion region of the thirteenth pixel; a second signal line connected to the photoelectric conversion region of the second pixel, the photoelectric conversion region of the sixth pixel, the photoelectric conversion region of the tenth pixel, and the photoelectric conversion region of the fourteenth pixel; a third signal line connected to the photoelectric conversion region of the first pixel and the photoelectric conversion region of the ninth pixel; a fourth signal line connected to the photoelectric conversion region of the eighth pixel and the photoelectric conversion region of the sixteenth pixel; a fifth signal line connected to the photoelectric conversion region of the third pixel, the photoelectric conversion region of the seventh pixel, the photoelectric conversion region of the eleventh pixel, and the photoelectric conversion region of the fifteenth pixel; and A sixth signal line connected to the photoelectric conversion region of the fourth pixel and the photoelectric conversion region of the twelfth pixel.

2. The light detection device according to claim 1, further comprising: a driving circuit configured to control the first signal line to the sixth signal line, In which, the driving circuit controls all the driving signals on the first signal line to the sixth signal line to be high in the first driving mode, and controls the driving signals on the first signal line, the second signal line, the fourth signal line and the fifth signal line to be high in the second driving mode.

3. The light detection device according to claim 1 or 2, wherein: Each pixel in the first pixel group and the third pixel group is used to detect light having a first wavelength range, and each pixel in the second pixel group and the fourth pixel group is used to detect light having a second wavelength range, and the first wavelength range is different from the second wavelength range.

4. The light detection device according to claim 1 or 2, wherein: Each pixel in the first pixel group and the third pixel group is a phase difference pixel.

5. The light detection device according to claim 2, further comprising: a fifth pixel group arranged adjacent to the first pixel group and including four pixels arranged in a 2×2 matrix in the plan view; and a sixth pixel group, which is arranged adjacent to the second pixel group and includes four pixels arranged in a 2×2 matrix in the plan view, wherein the first pixel group, the second pixel group, the fifth pixel group and the sixth pixel group are configured as a 2×2 matrix, In a third driving mode, pixel signals from the first pixel group, the second pixel group, the fifth pixel group, and the sixth pixel group are added.

6. The light detection device according to claim 5, further comprising: A switch is configured to control whether to add pixel signals from the first pixel group, the second pixel group, the fifth pixel group, and the sixth pixel group in the third driving mode.

7. The light detection device according to claim 6, wherein: The drive circuit is further configured to control the switch so that the switch is turned off when the phase difference is detected, and the switch is turned on when the phase difference is not detected.

8. The light detection device according to claim 3, wherein: The light having the first wavelength range is green, and the light having the second wavelength range is red or blue.

9. The light detection device according to claim 5, wherein: The pixels in each of the first to sixth pixel groups share one microlens.

10. A method for driving a light detection device, wherein the light detection device is the light detection device according to any one of claims 1 to 9, wherein: The method comprises: driving each transfer transistor in the fifth pixel and the thirteenth pixel via the first signal line; driving each transfer transistor in the second pixel, the sixth pixel, the tenth pixel, and the fourteenth pixel via the second signal line; driving each transfer transistor in the first pixel and the ninth pixel via the third signal line; driving each transfer transistor in the eighth pixel and the sixteenth pixel via the fourth signal line; driving each transfer transistor in the third pixel, the seventh pixel, the eleventh pixel, and the fifteenth pixel via the fifth signal line; and Each transfer transistor in the fourth pixel and the twelfth pixel is driven via the sixth signal line.

11. An electronic device comprising the light detection device according to any one of claims 1 to 9.

Images