High-stability organic field effect transistor constructed based on sandwich composite insulating layer
By using a sandwich composite insulating layer structure in an organic field effect transistor, the interface between the insulating layer and the semiconductor layer is optimized, the problem of insufficient device stability is solved, high stability and simple preparation are achieved, and it is suitable for industrial production.
Patent Information
- Application Number
- CN202411369610.9
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-09-29
- Publication Date
- 2025-01-03
AI Technical Summary
During long-term operation or storage, existing airport effect transistors are susceptible to environmental factors and changes in the aggregated state structure of the material itself, and their stability is difficult to meet the actual application needs. The existing stabilization strategy is complex, costly and difficult to produce in industrialized production.
Using a method based on sandwich composite insulating layer, a highly stable organic field effect transistor is constructed through polymer insulating layer, elastic insulating material and single-molecular modification layer, optimize the interface between the insulating layer and the semiconductor layer, improve the carrier injection effect, and simplify the Preparation process to reduce costs.
The preparation of high-stability organic field effect transistors is realized, the properties of the insulating layer are maintained, the preparation process is simplified, and the cost is reduced. It is suitable for the production of large-area flexible devices, which improves the stability and consistency of the devices.
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Figure CN119255619A_ABST
Abstract
Description
Technical Field
[0001] The invention relates to a high-stability organic field effect transistor constructed based on a sandwich composite insulating layer, and belongs to the field of organic electronics. Background Art
[0002] Organic field-effect transistors (OFETs) have the advantages of light weight, intrinsic flexibility, wide material sources, solution processing and low cost, and have important application prospects in the fields of radio frequency identification, drive circuits and sensors. In recent years, OFETs have developed rapidly, and the device mobility is comparable to that of polysilicon, gradually meeting the needs of practical applications. However, during long-term operation or storage, the electrical properties of the device are still easily affected by environmental factors (such as water, oxygen, light, etc.) or changes in the aggregate structure of the material itself, and the stability is difficult to meet the needs of practical applications. Nobel Prize winner in Physics Professor Herbert Kroemer once talked about "interface as device" in his acceptance speech. The charge accumulation and transport processes of organic field-effect transistors occur at the interface, so the contact quality and energy level matching at the interface have a profound impact on the stability of the device.
[0003] The researchers investigated the instability mechanism of organic field-effect transistors ( Sci. Adv. 2021, 7, eabf8555; Nat. Commun. 2024, 15, 626), and developed a series of stabilization strategies ( Nat. Commun . 2022, 13,1480; Adv. Mater . 2023, 35, 2306975; Nat. Mater . 2024, 23, 1268; Sci. Adv . 2023,9,eadj4656; Adv. Mater . 2024, 36, 2400089; ACS Appl. Mater. Interfaces. 2022,14, 13584). At present, the methods and problems of improving the stability of organic field-effect transistors are as follows: (1) Material modification. Introducing conjugated side chains or functional groups through chemical modification can improve the crystallinity and intermolecular interaction of the material; using crosslinkers or polymer networks to enhance the mechanical strength and chemical stability of the organic semiconductor layer. However, chemical modification may affect the electrical properties of the material, and it is necessary to balance the relationship between stability and electrical properties; the crosslinking process may introduce impurities, affecting the purity and performance of the device. (2) Interface engineering. Introducing a buffer layer between the organic semiconductor layer and the electrode to reduce interface defects and trap states; using self-assembled monolayers (SAMs) or functionalized interface layers to improve interface contact. However, the selection and preparation process of the buffer layer are complicated, which may increase the manufacturing cost; the uniformity and coverage of the self-assembled monolayer are difficult to control, which may affect the consistency of the device. (3) Packaging technology. Using high-performance packaging materials to prevent the intrusion of moisture and oxygen, thereby improving the environmental stability of the device. However, the thickness and uniformity of the encapsulation layer are difficult to control, which may affect the flexibility of the device, and the multi-layer encapsulation structure increases the manufacturing complexity and cost. (4) Doping and annealing. Dopants are introduced to improve carrier mobility and stability; thermal annealing is used to optimize the crystalline structure of the organic semiconductor layer and reduce defect states. However, the control and uniformity of the doping concentration is a difficult problem; the selection of annealing temperature and time needs to be optimized, and too high a temperature may damage the organic material.
[0004] At present, the stability problem is still a key factor restricting the development of organic field-effect transistors, further limiting their commercialization process. Therefore, it is necessary to provide a method for constructing high-stability organic field-effect transistors, which not only ensures the high stability of the entire device, but also requires a simple method, easy operation, low cost and convenient for industrial production. Summary of the invention
[0005] The purpose of the present invention is to provide a method based on a sandwich composite insulating layer to construct an organic field effect transistor device and a device array with high stability. The method of the sandwich composite insulating layer optimizes the interface between the insulating layer and the semiconductor layer, improves the quality of the organic semiconductor layer deposited on the surface of the insulating layer, so as to form a good carrier injection effect, which is conducive to obtaining a high-stability device.
[0006] The preparation method provided by the present invention does not destroy the properties of the insulating layer itself, and the layer-by-layer preparation method is simple, easy to operate, and low in cost; the present invention can also successfully prepare a large-area flexible organic field effect transistor array, which is conducive to industrial production.
[0007] The high-stability organic field-effect transistor based on the sandwich composite insulating layer provided by the present invention comprises, from bottom to top, a gate electrode, a sandwich composite insulating layer, an organic semiconductor layer, a source electrode and a drain electrode; The structure of the sandwich composite insulation layer is: from bottom to top, polymer insulation layer 1, polymer insulation layer 2 and monomolecular modification layer.
[0008] In the organic field effect transistor with high stability of the present invention, the material of the polymer insulating layer 1 is a UV curing adhesive such as NOA72, or an epoxy resin such as SU8 (PC-1040, Gersteltec) photoresist; The material of the polymer insulating layer 2 is an elastic insulating material, such as silicone, polydimethylsiloxane, or polymethylsiloxane; the material of the monomolecular modified layer is octadecyltrichlorosilane or hexamethyldisilazane; The thickness of the sandwich composite insulation layer is 0.5 μm to 3 μm, wherein the thickness of the polymer insulation layer 1 can be 0.4 μm to 2.5 μm, the thickness of the polymer insulation layer 2 can be 0.1 μm to 0.5 μm, and the thickness of the monomolecular modification layer can be 2 nm to 3 nm; In the high-stability organic field-effect transistor of the present invention, the material of the organic semiconductor layer is dinaphtho[2,3-b:2',3'-f]thieno[3,2-b]thiophene (DNTT), 2,9-diphenyl dinaphtho[2,3-b:2',3'-f]thieno[3,2-b]thiophene (2,9-DPh-DNTT), 2,9-didecyl dinaphtho[2,3-b:2',3'-f]thieno[3,2-b]thiophene (C 10 -DNTT), 2,9-dioctylnaphtho[2,3-b]naphtha[2',3':4,5]thieno[2,3-d]thiophene (C8-DNTT); The thickness of the organic semiconductor layer is 20 to 100 nm; The thickness of the gate electrode is 30-50 nm.
[0009] The present invention also provides a method for preparing the organic field effect transistor, comprising the following steps: S1, preparing the gate electrode on a substrate; The substrate may be a hard substrate, such as silicon, silicon dioxide or glass, or a flexible substrate, such as polyimide or polyethylene terephthalate; S2, preparing the sandwich composite insulating layer on the gate electrode; S3, depositing the organic semiconductor layer on the sandwich composite insulating layer; S4, depositing metal on the organic semiconductor layer to obtain the source electrode and the drain electrode.
[0010] In the preparation method of the present invention, before preparing the gate electrode, octadecyltrichlorosilane is modified on the substrate; Modifying the octadecyltrichlorosilane by a liquid phase method or a gas phase method; The steps of the liquid phase method are as follows: The cleaned substrate is placed in a mixed solution of concentrated sulfuric acid and hydrogen peroxide, and then the substrate is further cleaned, and then the substrate is placed in a mixed solution of n-heptane and octadecyltrichlorosilane; that is, octadecyltrichlorosilane is modified on the surface of the substrate; The steps of the gas phase method are as follows: The cleaned substrate is treated with oxygen plasma (e.g., power of 100 W, time of 30 s), and then placed in a vacuum drying oven; octadecyltrichlorosilane is placed in the vacuum drying oven; the vacuum drying oven is heated, and when the vacuum drying oven is cooled to room temperature, the substrate is taken out and then placed in chloroform for ultrasonic treatment, so that octadecyltrichlorosilane is modified on the surface of the substrate.
[0011] In the preparation method of the present invention, in step S2, the steps of preparing the sandwich composite insulation layer are as follows: 1) Spin-coating a UV curing glue or epoxy resin on the gate electrode, and curing to obtain the polymer insulating layer 1; 2) Spin-coating an elastic insulating material onto the polymer insulating layer 1, and curing the polymer insulating layer 2; 3) Using octadecyltrichlorosilane or hexamethyldisilazane to perform monomolecular layer modification on the polymer insulating layer 2 to obtain the monomolecular modified layer.
[0012] Preferably, in step 1), the conditions for curing the UV curable adhesive film are: the wavelength of UV exposure is 365 nm, the power is 100 mJ / cm 2 , the exposure time is 80 to 200 s; The conditions for curing epoxy resin film are as follows: baking temperature is 65-175°C, baking time is 30-180 minutes; UV exposure wavelength is 365 nm, power is 100 mJ / cm 2 , exposure time is 5 to 60 s; Preferably, in step 2), the conditions for curing the elastic insulating material layer are: temperature of 70-100° C. and time of 30-60 minutes; Preferably, in step 3), the monomolecular modification layer is prepared by a gas phase method; The steps of the gas phase method are as follows: The polymer insulating layer 2 is subjected to oxygen plasma treatment (power of 100 W, time of 30 s), and then placed in a vacuum drying oven, and the octadecyltrichlorosilane or the hexamethyldisilazane is placed in the vacuum drying oven; after heating the vacuum drying oven, the device is taken out, and then a PDMS solution is poured on the surface of the polymer insulating layer 2, and the PDMS is peeled off after curing.
[0013] The monomolecular modified layer material; the device is taken out after heating the vacuum drying oven (temperature is 70-90°C), a PDMS solution (PDMS: cross-linking agent = 1:10, volume ratio) is poured on the surface of the insulating layer of the device after it is taken out, and then it is cured at 70-100°C for 10-20 minutes and then taken out, and then the PDMS is peeled off from the surface of the insulating layer.
[0014] The purpose of the monomolecular layer modification in the present invention is to improve the quality of the organic semiconductor layer deposited on the surface thereof, so as to form a good carrier injection effect, thereby facilitating the acquisition of a high-stability device.
[0015] In the preparation method of the present invention, in step S3, the organic semiconductor is deposited by gas phase vacuum thermal deposition; In step S4, the source electrode and the drain electrode are prepared by vacuum evaporation.
[0016] A high-stability flexible organic field effect transistor array formed based on the high-stability flexible organic field effect transistor also falls within the protection scope of the present invention.
[0017] The present invention provides a highly stable organic field effect transistor device and its device array and preparation method based on a sandwich composite insulating layer; the interface between the insulating layer and the semiconductor layer is optimized by the sandwich composite insulating layer method, and the quality of the organic semiconductor layer deposited on the surface of the insulating layer is improved to form a good carrier injection effect, which is conducive to obtaining a highly stable device. The preparation method provided by the present invention does not destroy the properties of the insulating layer itself, and the layer-by-layer preparation method is simple, easy to operate, and low in cost; it has a significant effect on improving the stability of transistors; the present invention has universal applicability and can also successfully prepare large-area flexible organic field effect transistor arrays, which is conducive to industrial production. BRIEF DESCRIPTION OF THE DRAWINGS
[0018] Figure 1 The schematic diagram is a structural diagram of a high-stability organic field-effect transistor constructed based on a composite insulating layer in the present invention.
[0019] Figure 2 This is a microscope image of a high-stability organic field-effect transistor constructed based on a composite insulating layer according to the present invention.
[0020] Figure 3This is a diagram showing the preparation of a high-stability organic field effect transistor array based on an octadecyltrichlorosilane / organic silicon / SU8 composite insulating layer according to Example 1 of the present invention.
[0021] Figure 4 This is an atomic force microscope image of the semiconductor layer of a high-stability organic field-effect transistor based on an octadecyltrichlorosilane / organic silicon / SU8 composite insulating layer prepared in Example 1 of the present invention.
[0022] Figure 5 The transfer curve of the high-stability organic field-effect transistor based on octadecyltrichlorosilane / organic silicon / SU8 composite insulating layer prepared in Example 1 of the present invention ( Figure 5 (a) Output curve ( Figure 5 (b) ), 15000 s bias stress curve ( Figure 5 (c) ), 100 repeated test transfer curves ( Figure 5 (d) ), 25700 switching cycles test ( Figure 5 (e)).
[0023] Figure 6 The mobility of the high stability organic field effect transistor array based on the octadecyltrichlorosilane / organic silicon / SU8 composite insulating layer in Example 1 of the present invention ( Figure 6 (a)) and threshold voltage ( Figure 6 (b) Performance distribution diagram.
[0024] Figure 7 The transfer curve of the high stability field effect transistor based on the octadecyltrichlorosilane / organic silicon / NOA72 composite insulating layer according to Example 2 of the present invention ( Figure 7 (a) Output curve ( Figure 7 (b) ), 10 repeated test transfer curves ( Figure 7 (c)).
[0025] Figure 8 The transfer curve of the high stability field effect transistor based on the octadecyltrichlorosilane / polydimethylsiloxane / SU8 composite insulating layer in Example 3 of the present invention ( Figure 8 (a) Output curve ( Figure 8 (b) ), 10 repeated test transfer curves ( Figure 8 (c)).
[0026] Fig. 9 The transfer curve of the high stability field effect transistor based on the hexamethyldisilazane / organic silicon / SU8 composite insulating layer in Example 4 of the present invention ( Fig. 9 (a) Output curve ( Fig. 9 (b) ), 10 repeated test transfer curves ( Fig. 9 (c)).
[0027] Fig.10 Atomic force microscope image of the semiconductor layer of an organic field effect transistor based on a SU8 single-layer insulating layer prepared in comparative example 1 of the present invention.
[0028] Fig.11 The transfer curve of the organic field effect transistor based on the SU8 single-layer insulating layer prepared in Comparative Example 1 of the present invention ( Fig.11 (a) Output curve ( Fig.11 (b) ), 10 repeated test transfer curves ( Fig.11 (c)).
[0029] Fig.12 The transfer curve of the organic field effect transistor based on the NOA72 single-layer insulating layer prepared in Comparative Example 2 of the present invention ( Fig.12 (a) Output curve ( Fig.12 (b) ), 10 repeated test transfer curves ( Fig.12 (c)). DETAILED DESCRIPTION
[0030] Unless otherwise specified, the experimental methods used in the following examples are conventional methods.
[0031] Unless otherwise specified, the materials and reagents used in the following examples can be obtained from commercial sources.
[0032] Example 1: Preparation of high-stability organic field-effect transistors and crystal arrays based on octadecyltrichlorosilane / organic silicon / SU8 composite insulating layer (1) Octadecyltrichlorosilane was connected to the surface of the silicon substrate by using a liquid phase method: the cleaned substrate was placed in a mixed solution of concentrated sulfuric acid and hydrogen peroxide, and then the substrate was further cleaned and then placed in a mixed solution of n-heptane and octadecyltrichlorosilane for 3 h; that is, octadecyltrichlorosilane was connected to the surface of the substrate.
[0033] (2) After step (1), a metal Au full gate electrode with a thickness of 30 nm is prepared on the silicon substrate by vacuum evaporation.
[0034] (3) The insulating polymer insulating layer SU8 (PC 1040) was spin-coated on the surface of the full-gate electrode obtained in step (2) and cured (pre-baked the film at 65 °C for 5 minutes, then raised the pre-baking temperature to 95 °C at a rate of 2 °C per minute, and pre-baked at 95 °C for 5 minutes; after the substrate cooled to room temperature, the film was exposed to ultraviolet light (wavelength of 365 nm, power of 100 mJ / cm 2), the exposure time is set to 40 s; then the sample is post-baked, and the process steps are the same as the pre-baking operation; finally, the sample is hardened at 170 ° C for 30 minutes. A polymer insulating layer 1 is formed with a thickness of 1.1 μm.
[0035] (4) Spin-coat the elastic insulating material silicone on the surface of the polymer insulating layer 1 obtained in step (3), and cure it (temperature: 100°C, time: 1 h) to form a polymer insulating layer 2 with a thickness of 150 nm.
[0036] (5) The surface of the polymer insulating layer 2 obtained in step (4) was modified with octadecyltrichlorosilane by a vapor phase method. The surface of the polymer insulating layer 2 was treated with oxygen plasma (power of 100 W, time of 30 s), and then placed in a vacuum drying oven, and octadecyltrichlorosilane was placed in the vacuum drying oven; the vacuum drying oven was heated (temperature of 70°C) and the device was taken out, and a PDMS solution (PDMS: cross-linking agent = 1:10, volume ratio) was poured on the surface of the insulating layer of the device after it was taken out, and then it was cured at 100°C for 10 to 20 minutes and then taken out, and then the PDMS was peeled off from the surface of the insulating layer; an octadecyltrichlorosilane monomolecular modification layer with a thickness of 2.5 nm was formed.
[0037] (6) The organic semiconductor material DNTT is vapor-phase vacuum thermally deposited on the surface of the sandwich composite insulating layer obtained in step (5) at an evaporation rate of 0.1 Å / s and a substrate temperature of 60 °C. The thickness of the DNTT layer deposited on the surface of the insulating layer is 40 nm.
[0038] (7) On the semiconductor film obtained in step (6), metal Au is thermally evaporated as the source electrode and drain electrode. The channel length of the electrode is 100 μm and the channel width is 3500 μm.
[0039] Figure 1 Schematic diagram of the structure of a high-stability organic field-effect transistor constructed based on a composite insulating layer.
[0040] Figure 2 Microscope image of a high-stability organic field-effect transistor constructed based on a composite insulating layer.
[0041] Figure 3 A diagram showing the preparation of a high-stability organic field-effect transistor array based on an octadecyltrichlorosilane / organic silicon / SU8 composite insulating layer.
[0042] Figure 4 Atomic force microscopy image of the semiconductor layer of a high-stability organic field-effect transistor prepared based on an octadecyltrichlorosilane / organic silicon / SU8 composite insulating layer.
[0043] Figure 5 Transfer curve of high stability organic field effect transistor based on octadecyltrichlorosilane / organic silicon / SU8 composite insulating layer ( Figure 5 (a) Output curve ( Figure 5 (b) ), 15000 s bias stress curve ( Figure 5 (c) ), 100 repeated test transfer curves ( Figure 5 (d) ), 25700 switching cycles test ( Figure 5 (e)). It can be seen that the mobility of the device is 2.36 cm 2 V -1 s -1 , threshold voltage is 3.9V, switch ratio is 9.67×10 7 The electrical characteristic curve shows that it has almost no hysteresis, good repeatability in multiple scans, good switching stability, and the device has high stability as a whole.
[0044] Figure 6 The mobility of the high-stability organic field-effect transistor array based on octadecyltrichlorosilane / organic silicon / SU8 composite insulating layer was prepared. Figure 6 (a)) and threshold voltage ( Figure 6 (b) Performance distribution diagram. It can be seen that the device array shows good device uniformity, and the average mobility of the device is 1.781±0.054 cm 2 V -1 s -1 , the average threshold voltage of the device is -0.868±0.836 V, indicating that the device has excellent field effect performance.
[0045] Example 2: Preparation of a high-stability field effect transistor based on octadecyltrichlorosilane / organic silicon / NOA72 composite insulating layer (1) Octadecyltrichlorosilane was connected to the surface of the silicon substrate by using a gas phase method: the cleaned silicon substrate was treated with oxygen plasma (power of 100 W, time of 30 s), and then placed in a vacuum drying oven, and octadecyltrichlorosilane was placed in the vacuum drying oven; the vacuum drying oven was heated (temperature of 70 °C), and the silicon substrate was taken out; the silicon substrate was placed in chloroform and ultrasonicated, and then the substrate was taken out and dried with nitrogen, so that octadecyltrichlorosilane was connected to the surface of the silicon substrate.
[0046] (2) After step (1), a metal Au full gate electrode with a thickness of 30 nm is prepared on the silicon substrate by thermal evaporation.
[0047] (3) The insulating polymer insulating layer NOA72 is spin-coated on the surface of the full gate electrode obtained in step (2) and cured by ultraviolet exposure (wavelength 365 nm, power 100 mJ / cm2 ) The exposure time is set to 100 s to form a polymer insulating layer 1 with a thickness of 2.3 μm; (4) Spin-coat the elastic insulating material silicone on the surface of the polymer insulating layer 1 obtained in step (3), and cure it (temperature: 100°C, time: 1 h) to form a polymer insulating layer 2 with a thickness of 150 nm.
[0048] (5) The surface of the polymer insulating layer 2 obtained in step (4) was modified with octadecyltrichlorosilane by a vapor phase method. The surface of the polymer insulating layer 2 was treated with oxygen plasma (power of 100 W, time of 30 s), and then placed in a vacuum drying oven, and octadecyltrichlorosilane was placed in the vacuum drying oven; the vacuum drying oven was heated (temperature of 70°C) and the device was taken out, and a PDMS solution (PDMS: cross-linking agent = 1:10, volume ratio) was poured on the surface of the insulating layer of the device after it was taken out, and then it was cured at 100°C for 10 to 20 minutes and then taken out, and then the PDMS was peeled off from the surface of the insulating layer; an octadecyltrichlorosilane monomolecular modification layer with a thickness of 2.5 nm was formed.
[0049] (6) The organic semiconductor material DNTT is vapor-phase vacuum thermally deposited on the surface of the sandwich composite insulating layer obtained in step (5) at an evaporation rate of 0.1 Å / s and a substrate temperature of 60 °C. The thickness of the DNTT layer deposited on the surface of the insulating layer is 40 nm.
[0050] (7) On the semiconductor film obtained in step (6), metal Au is thermally evaporated as the source electrode and drain electrode. The channel length of the electrode is 100 μm and the channel width is 3500 μm.
[0051] Figure 7 Transfer curve of the high stability field effect transistor based on octadecyltrichlorosilane / organic silicon / NOA72 composite insulating layer ( Figure 7 (a) Output curve ( Figure 7 (b) ), 10 repeated test transfer curves ( Figure 7 (c)). It can be seen that the device mobility is 0.69 cm 2 V -1 s -1 , threshold voltage is 1.8 V, on / off ratio is 3.37×10 7 The electrical characteristic curve shows that it has almost no hysteresis, good repeatability in multiple scans, and the device has high stability as a whole.
[0052] Example 3: Preparation of a high-stability field effect transistor based on octadecyltrichlorosilane / polydimethylsiloxane / SU8 composite insulating layer (1) Octadecyltrichlorosilane is connected to the surface of a silicon substrate by a liquid phase method: the cleaned substrate is placed in a mixed solution of concentrated sulfuric acid and hydrogen peroxide, and then the substrate is further cleaned and then placed in a mixed solution of n-heptane and octadecyltrichlorosilane for 3 h; that is, octadecyltrichlorosilane is connected to the surface of the substrate.
[0053] (2) After step (1), a metal Au full gate electrode with a thickness of 30 nm is prepared on the silicon substrate by thermal evaporation.
[0054] (3) The insulating polymer insulating layer SU8 (PC 1040) was spin-coated on the surface of the full-gate electrode obtained in step (2) and cured (pre-baked the film at 65 °C for 5 minutes, then raised the pre-baking temperature to 95 °C at a rate of 2 °C per minute, and pre-baked at 95 °C for 5 minutes; after the substrate cooled to room temperature, the film was exposed to ultraviolet light (wavelength of 365 nm, power of 100 mJ / cm 2 ), the exposure time is set to 40 s; then the sample is post-baked, and the process steps are the same as the pre-baking operation; finally, the sample is hardened at 170 ° C for 30 minutes. ), forming a polymer insulating layer 1 with a thickness of 1.1 μm.
[0055] (4) Polydimethylsiloxane was spin-coated on the surface of the polymer insulating layer 1 obtained in step (3), and then cured (temperature: 100°C, time: 0.5 h) to form a polymer insulating layer 2 with a thickness of 200 nm.
[0056] (5) The surface of the polymer insulating layer 2 obtained in step (4) was modified with octadecyltrichlorosilane by a vapor phase method. The surface of the polymer insulating layer 2 was treated with oxygen plasma (power of 100 W, time of 30 s), and then placed in a vacuum drying oven, and octadecyltrichlorosilane was placed in the vacuum drying oven; the vacuum drying oven was heated (temperature of 70°C) and the device was taken out, and a PDMS solution (PDMS: cross-linking agent = 1:10, volume ratio) was poured on the surface of the insulating layer of the device after it was taken out, and then it was cured at 100°C for 10 to 20 minutes and then taken out, and then the PDMS was peeled off from the surface of the insulating layer; an octadecyltrichlorosilane monomolecular modification layer with a thickness of 2.5 nm was formed.
[0057] (6) The organic semiconductor material DNTT is vapor-phase vacuum thermally deposited on the surface of the sandwich composite insulating layer obtained in step (5) at an evaporation rate of 0.1 Å / s and a substrate temperature of 60 °C. The thickness of the DNTT layer deposited on the surface of the insulating layer is 40 nm.
[0058] (7) On the semiconductor film obtained in step (6), metal Au is thermally evaporated as the source electrode and drain electrode. The channel length of the electrode is 100 μm and the channel width is 3500 μm.
[0059] Figure 8 Transfer curve of the high stability field effect transistor based on octadecyltrichlorosilane / polydimethylsiloxane / SU8 composite insulating layer ( Figure 8 (a) Output curve ( Figure 8 (b) ), 10 repeated test transfer curves ( Figure 8 (c)). It can be seen that the device mobility is 0.67 cm 2 V -1 s -1 , threshold voltage is 7.2 V, on / off ratio is 2.12×10 7 The electrical characteristic curve shows that it has almost no hysteresis, good repeatability in multiple scans, and the device has high stability as a whole.
[0060] Example 4: Preparation of a high-stability field effect transistor based on a hexamethyldisilazane / organic silicon / SU8 composite insulating layer.
[0061] (1) Octadecyltrichlorosilane was connected to the surface of the silicon substrate by using a gas phase method: the cleaned silicon substrate was treated with oxygen plasma (power of 100 W, time of 30 s), and then placed in a vacuum drying oven, and octadecyltrichlorosilane was placed in the vacuum drying oven; the vacuum drying oven was heated (temperature of 70 °C), and the silicon substrate was taken out; the silicon substrate was placed in chloroform and ultrasonicated, and then the substrate was taken out and dried with nitrogen, so that octadecyltrichlorosilane was connected to the surface of the silicon substrate.
[0062] (2) After step (1), a metal Au full gate electrode with a thickness of 30 nm is prepared on the silicon substrate by thermal evaporation.
[0063] (3) The insulating polymer insulating layer SU8 (PC 1040) was spin-coated on the surface of the full-gate electrode obtained in step (2) and cured (pre-baked the film at 65 °C for 5 minutes, then raised the pre-baking temperature to 95 °C at a rate of 2 °C per minute, and pre-baked at 95 °C for 5 minutes; after the substrate cooled to room temperature, the film was exposed to ultraviolet light (wavelength of 365 nm, power of 100 mJ / cm 2 ), the exposure time is set to 40 s; then the sample is subjected to post-baking operation, and the process steps are the same as the pre-baking operation; finally, the sample is subjected to hardening treatment at 170 ° C, and the time is set to 30 minutes. ), a polymer insulating layer 1 is formed with a thickness of 1.1 μm.
[0064] (4) Spin-coat the elastic insulating material silicone on the surface of the polymer insulating layer 1 obtained in step (3), and cure it (temperature: 100°C, time: 1 h) to form a polymer insulating layer 2 with a thickness of 150 nm.
[0065] (5) The surface of the polymer insulating layer 2 obtained in step (4) was modified with hexamethyldisilazane by a vapor phase method. The surface of the polymer insulating layer 2 was treated with oxygen plasma (power of 100 W, time of 30 s), and then placed in a vacuum drying oven, and hexamethyldisilazane was placed in the vacuum drying oven; the vacuum drying oven was heated (temperature of 90°C) and the device was taken out, and a PDMS solution (PDMS: cross-linking agent = 1:10, volume ratio) was poured on the surface of the insulating layer of the device after it was taken out, and then it was cured at 100°C for 10 to 20 minutes and then taken out, and then the PDMS was peeled off from the surface of the insulating layer; a hexamethyldisilazane monomolecular modification layer with a thickness of 2.7 nm was formed.
[0066] (6) The organic semiconductor material DNTT is vapor-phase vacuum thermally deposited on the surface of the sandwich composite insulating layer obtained in step (5) at an evaporation rate of 0.1 Å / s and a substrate temperature of 60 °C. The thickness of the DNTT layer deposited on the surface of the insulating layer is 40 nm.
[0067] (7) On the semiconductor film obtained in step (6), metal Au is thermally evaporated as the source electrode and drain electrode. The channel length of the electrode is 100 μm and the channel width is 3500 μm.
[0068] Fig. 9 Transfer curve of the high stability field effect transistor based on hexamethyldisilazane / organic silicon / SU8 composite insulating layer ( Fig. 9 (a) Output curve ( Fig. 9 (b) ), 10 repeated test transfer curves ( Fig. 9 (c)). It can be seen that the device mobility is 1.11 cm 2 V -1 s -1 , threshold voltage is -6.4 V, on / off ratio is 9.62×10 7 The electrical characteristic curve shows that it has almost no hysteresis, good repeatability in multiple scans, and the device has high stability as a whole.
[0069] Comparative Example 1: Preparation of an organic field effect transistor based on a SU8 single-layer insulating layer.
[0070] (1) Octadecyltrichlorosilane was connected to the surface of the silicon substrate by using a liquid phase method: the cleaned substrate was placed in a mixed solution of concentrated sulfuric acid and hydrogen peroxide, and then the substrate was further cleaned and then placed in a mixed solution of n-heptane and octadecyltrichlorosilane for 3 h; that is, octadecyltrichlorosilane was connected to the surface of the substrate.
[0071] (2) After step (1), a metal Au full gate electrode with a thickness of 30 nm is prepared on the silicon substrate by vacuum evaporation.
[0072] (3) The insulating polymer insulating layer SU8 (PC 1040) was spin-coated on the surface of the full-gate electrode obtained in step (2) and cured (pre-baked the film at 65 °C for 5 minutes, then raised the pre-baking temperature to 95 °C at a rate of 2 °C per minute, and pre-baked at 95 °C for 5 minutes; after the substrate cooled to room temperature, the film was exposed to ultraviolet light (wavelength of 365 nm, power of 100 mJ / cm 2 ), the exposure time is set to 40 s; then the sample is post-baked, and the process steps are the same as the pre-baking operation; finally, the sample is hardened at 170 ° C for 30 minutes. A polymer insulating layer is formed with a thickness of 1.1 μm.
[0073] (4) The organic semiconductor material DNTT is vapor-phase vacuum thermally deposited on the surface of the SU8 insulating layer obtained in step (3) at an evaporation rate of 0.1 Å / s and a substrate temperature of 60 °C. The thickness of the DNTT layer deposited on the surface of the insulating layer is 40 nm.
[0074] (5) On the semiconductor film obtained in step (4), metal Au is thermally evaporated as the source electrode and drain electrode. The channel length of the electrode is 100 μm and the channel width is 3500 μm.
[0075] Fig.10 Atomic force microscope image of the semiconductor layer of an organic field effect transistor based on a single SU8 insulating layer. Figure 4 In contrast, the semiconductor layer of a field effect transistor with a single insulating layer structure grows poorly and has a poor morphology than that of a sandwich composite insulating layer structure, which is not conducive to the transmission of carriers and the formation of a high-stability field effect transistor.
[0076] Fig.11 Transfer curve of the organic field effect transistor based on the SU8 single-layer insulating layer ( Fig.11 (a) Output curve ( Fig.11 (b) ), 10 repeated test transfer curves ( Fig.11 (c)). It can be seen that the device mobility is 0.24 cm 2 V -1 s -1 , threshold voltage is 2.4 V, on / off ratio is 8.94×10 6 Compared with Examples 1, 3, and 4, the electrical characteristic curves show that the hysteresis of the field effect transistor with a single insulating layer is relatively large, the repeatability of multiple scans is relatively poor, and the mobility is significantly lower than that of the field effect transistor with a sandwich composite insulating layer structure, and the overall performance of the device is poor.
[0077] Comparative Example 2: Preparation of an organic field effect transistor based on a single-layer insulating layer of NOA72 (1) Octadecyltrichlorosilane was connected to the surface of the silicon substrate by using a gas phase method: the cleaned silicon substrate was treated with oxygen plasma (power of 100 W, time of 30 s), and then placed in a vacuum drying oven, and octadecyltrichlorosilane was placed in the vacuum drying oven; the vacuum drying oven was heated (temperature of 70 °C), and the silicon substrate was taken out; the silicon substrate was placed in chloroform and ultrasonicated, and then the substrate was taken out and dried with nitrogen, so that octadecyltrichlorosilane was connected to the surface of the silicon substrate.
[0078] (2) After step (1), a metal Au full gate electrode with a thickness of 30 nm is prepared on the silicon substrate by thermal evaporation.
[0079] (3) The insulating polymer insulating layer NOA72 is spin-coated on the surface of the full gate electrode obtained in step (2) and cured by ultraviolet exposure (wavelength 365 nm, power 100 mJ / cm 2 ) The exposure time was set to 100 s to form a polymer insulating layer with a thickness of 2.3 μm.
[0080] (4) The organic semiconductor material DNTT is vapor-phase vacuum thermally deposited on the surface of the NOA72 insulating layer obtained in step (3) at an evaporation rate of 0.1 Å / s and a substrate temperature of 60 °C. The thickness of the DNTT layer deposited on the surface of the insulating layer is 40 nm.
[0081] (5) On the semiconductor film obtained in step (4), metal Au is thermally evaporated as the source electrode and drain electrode. The channel length of the electrode is 100 μm and the channel width is 3500 μm.
[0082] Fig.12 Transfer curve of the organic field effect transistor based on NOA72 single-layer insulating layer ( Fig.12 (a) Output curve ( Fig.12 (b) ), 10 repeated test transfer curves ( Fig.12 (c)). It can be seen that the device mobility is 0.03 cm 2 V -1 s -1, threshold voltage is -12.5 V, on / off ratio is 2.00×10 5 Compared with Example 2, the electrical characteristic curve shows that the hysteresis of the field effect transistor with a single insulating layer is larger than that of the sandwich composite insulating layer structure, the repeatability of multiple scans is poor, and the mobility is low, and the overall performance of the device is significantly poor.
Claims
1. An organic field effect transistor with high stability constructed based on a sandwich composite insulating layer, which comprises a gate electrode, a sandwich composite insulating layer, an organic semiconductor layer, a source electrode and a drain electrode from bottom to top; The structure of the sandwich composite insulation layer is: from bottom to top, polymer insulation layer 1, polymer insulation layer 2 and monomolecular modification layer.
2. The organic field effect transistor according to claim 1, characterized in that: The material of the polymer insulating layer 1 is ultraviolet curing glue or epoxy resin; the material of the polymer insulating layer 2 is elastic insulating material; the material of the monomolecular modification layer is octadecyltrichlorosilane or hexamethyldisilazane.
3. The organic field effect transistor according to claim 1 or 2, characterized in that: The material of the organic semiconductor layer is dinaphtho[2,3-b:2',3'-f]thieno[3,2-b]thiophene, 2,9-diphenyl dinaphtho[2,3-b:2',3'-f]thieno[3,2-b]thiophene, 2,9-didecyl dinaphtho[2,3-b:2',3'-f]thieno[3,2-b]thiophene or 2,9-dioctylnaphtho[2,3-b]naphtha[2',3':4,5]thieno[2,3-d]thiophene; The thickness of the organic semiconductor layer is 20 to 100 nm; The thickness of the sandwich composite insulation layer is 0.6 μm to 3 μm; The thickness of the gate electrode is 30-50 nm.
4. A method for preparing an organic field effect transistor according to any one of claims 1 to 3, comprising the following steps: S1, preparing the gate electrode on a substrate; S2, preparing the sandwich composite insulating layer on the gate electrode; S3, depositing the organic semiconductor layer on the sandwich composite insulating layer; S4, depositing metal on the organic semiconductor layer to obtain the source electrode and the drain electrode.
5. The preparation method according to claim 4, characterized in that: In step S1, before preparing the gate electrode, octadecyltrichlorosilane is modified on the substrate; The octadecyltrichlorosilane is modified by a liquid phase method or a gas phase method.
6. The preparation method according to claim 4 or 5, characterized in that: In step S2, the steps of preparing the sandwich composite insulation layer are as follows: 1) Spin-coating a UV curing glue or epoxy resin on the gate electrode, and curing to obtain the polymer insulating layer 1; 2) Spin-coating an elastic insulating material onto the polymer insulating layer 1, and curing the polymer insulating layer 2; 3) Using octadecyltrichlorosilane or hexamethyldisilazane to perform monomolecular layer modification on the polymer insulating layer 2 to obtain the monomolecular modified layer.
7. The preparation method according to claim 6, characterized in that: In step 1), the conditions for curing the UV curable adhesive film are: the wavelength of UV exposure is 365 nm, the power is 100 mJ / cm 2 , the exposure time is 80 to 200 s; The conditions for curing epoxy resin film are as follows: baking temperature is 65-175°C, baking time is 30-180 minutes; UV exposure wavelength is 365 nm, power is 100 mJ / cm 2 , exposure time is 5 to 60 s; In step 2), the conditions for curing the elastic insulating material layer are: temperature of 70 to 100°C and time of 30 to 60 minutes; In step 3), the monomolecular modification layer is prepared by a gas phase method.
8. The preparation method according to claim 7, characterized in that: The steps of the gas phase method are as follows: The polymer insulating layer 2 is subjected to oxygen plasma treatment (power of 100 W, time of 30 s), and then placed in a vacuum drying oven, and the octadecyltrichlorosilane or the hexamethyldisilazane is placed in the vacuum drying oven; after heating the vacuum drying oven, the device is taken out, and then a PDMS solution is poured on the surface of the polymer insulating layer 2, and the PDMS is peeled off after curing.
9. The preparation method according to any one of claims 4 to 7, characterized in that: In step S3, the organic semiconductor is deposited by vapor phase vacuum thermal deposition; In step S4, the source electrode and the drain electrode are prepared by vacuum evaporation.
10. A high-stability flexible organic field effect transistor array constructed based on a sandwich composite insulating layer, formed by the organic field effect transistor according to any one of claims 1 to 3.