Processing apparatus, firmware updating apparatus, and firmware updating method of processing apparatus

Abstract

The invention provides a processing apparatus, a firmware updating apparatus, and a firmware updating method of the processing apparatus. The main integrated circuit has a first flash memory region and a first random access memory region. The over-the-air integrated circuit has a second flash memory region and a second random access memory region. The main integrated circuit cannot access the second flash memory area and the second random access memory area. And the air transmission integrated circuit downloads the firmware updating data from the air transmission server and updates the firmware of the main integrated circuit according to the firmware updating data.

Description

Technical Field

[0001] The present invention relates to an electronic device, and more particularly to a processing device, a firmware updating device and a firmware updating method for the processing device. Background Art

[0002] Since all kinds of consumer electronic products today need to perform over-the-air firmware updates (OTA firmware update), such as vehicle systems and IoT devices, secure over-the-air transmission is becoming increasingly important. If the firmware data is replaced or updated to incorrect firmware data, the system may be invaded, causing the system to be controlled by hackers or paralyzed. Summary of the invention

[0003] The present invention provides a processing device, a firmware updating device and a firmware updating method for the processing device, which can effectively improve the security of firmware updating during over-the-air transmission.

[0004] The processing device of the present invention includes a main integrated circuit and an air transmission integrated circuit. The main integrated circuit has a first flash memory area and a first random access memory area. The air transmission integrated circuit is coupled to the main integrated circuit and has a second flash memory area and a second random access memory area. The air transmission integrated circuit downloads firmware update data from an air transmission server and updates the firmware of the main integrated circuit according to the firmware update data. The main integrated circuit cannot access the second flash memory area and the second random access memory area.

[0005] In one embodiment of the present invention, the above-mentioned main integrated circuit is a first chip, and the air transmission integrated circuit is a second chip. The air transmission integrated circuit is a chip independent of the main integrated circuit. The main integrated circuit includes a first flash memory having a first flash memory area and a second random access memory having a first random access memory area. The air transmission integrated circuit includes a second flash memory having a second flash memory area and a second random access memory having a second random access memory area.

[0006] In one embodiment of the present invention, the above-mentioned main integrated circuit and air transmission integrated circuit are respectively the first core circuit and the second core circuit in the multi-core chip, and the main integrated circuit and the air transmission integrated circuit share a flash memory and a random access memory, the flash memory includes a first flash memory area and a second flash memory area, and the random access memory includes a first random access memory area and a second random access memory area.

[0007] In one embodiment of the present invention, the above-mentioned air transmission integrated circuit also verifies the firmware of the main integrated circuit, confirms with the air transmission server whether the firmware of the main integrated circuit needs to be updated, decrypts the firmware update data, stores the decrypted firmware update data in the first flash memory area, verifies the firmware update data stored in the first flash memory area, and notifies the main integrated circuit to execute a reboot.

[0008] In one embodiment of the present invention, the peripheral circuit of the above-mentioned over-the-air transmission integrated circuit is independent of the peripheral circuit of the main integrated circuit, and the peripheral circuit of the over-the-air transmission integrated circuit includes a network transmission circuit and an encryption and decryption circuit.

[0009] The present invention also provides a firmware update device, which is suitable for updating the firmware of a processing device, wherein the processing device includes a main integrated circuit, and the main integrated circuit has a first flash memory area and a first random access memory area. The firmware update device includes an air transmission integrated circuit, which is coupled to the main integrated circuit and has a second flash memory area and a second random access memory area. The air transmission integrated circuit downloads integrated update data from an air transmission server, and updates the firmware of the main integrated circuit according to the firmware update data. The main integrated circuit cannot access the second flash memory area and the second random access memory area.

[0010] In one embodiment of the present invention, the above-mentioned main integrated circuit is a first chip, and the air transmission integrated circuit is a second chip. The air transmission integrated circuit is a chip independent of the main integrated circuit. The main integrated circuit includes a first flash memory having a first flash memory area and a second random access memory having a first random access memory area. The air transmission integrated circuit includes a second flash memory having a second flash memory area and a second random access memory having a second random access memory area.

[0011] In one embodiment of the present invention, the above-mentioned main integrated circuit and air transmission integrated circuit are respectively the first core circuit and the second core circuit in the multi-core chip, and the main integrated circuit and the air transmission integrated circuit share a flash memory and a random access memory, the flash memory includes a first flash memory area and a second flash memory area, and the random access memory includes a first random access memory area and a second random access memory area.

[0012] In one embodiment of the present invention, the above-mentioned air transmission integrated circuit also verifies the firmware of the main integrated circuit, confirms with the air transmission server whether the firmware of the main integrated circuit needs to be updated, decrypts the firmware update data, stores the decrypted firmware update data in the first flash memory area, and verifies the firmware update data stored in the first flash memory area.

[0013] In one embodiment of the present invention, the peripheral circuit of the above-mentioned over-the-air transmission integrated circuit is independent of the peripheral circuit of the main integrated circuit, and the peripheral circuit of the over-the-air transmission integrated circuit includes a network transmission circuit and an encryption and decryption circuit.

[0014] The present invention also provides a firmware update method for a processing device, the processing device includes a main integrated circuit, the main integrated circuit has a first flash memory area and a first random access memory area. The firmware update method for the processing device includes the following steps. Provide an air transmission integrated circuit having a second flash memory area and a second random access memory area. Use the air transmission integrated circuit to download firmware update data from an air transmission server. Use the air transmission integrated circuit to update the firmware of the main integrated circuit according to the firmware update data, wherein the main integrated circuit cannot access the second flash memory area and the second random access memory area.

[0015] In one embodiment of the present invention, the above-mentioned main integrated circuit is a first chip, and the air transmission integrated circuit is a second chip. The air transmission integrated circuit is a chip independent of the main integrated circuit. The main integrated circuit includes a first flash memory having a first flash memory area and a second random access memory having a first random access memory area. The air transmission integrated circuit includes a second flash memory having a second flash memory area and a second random access memory having a second random access memory area.

[0016] In one embodiment of the present invention, the above-mentioned main integrated circuit and air transmission integrated circuit are respectively the first core circuit and the second core circuit in the multi-core chip, and the main integrated circuit and the air transmission integrated circuit share a flash memory and a random access memory, the flash memory includes a first flash memory area and a second flash memory area, and the random access memory includes a first random access memory area and a second random access memory area.

[0017] In one embodiment of the present invention, the firmware update method of the processing device includes performing the following steps using an over-the-air integrated circuit. Verifying the firmware of the main integrated circuit. Confirming with an over-the-air server whether the firmware of the main integrated circuit needs to be updated. Decrypting the firmware update data. Storing the decrypted firmware update data in a first flash memory area. Verifying the firmware update data stored in the first flash memory area. Notifying the main integrated circuit to perform a reboot.

[0018] Based on the above, the air transmission integrated circuit of the embodiment of the present invention is independent of the main integrated circuit, and can download firmware update data from the air transmission server, and update the firmware of the main integrated circuit according to the firmware update data. The main integrated circuit cannot access the second flash memory area and the second random access memory area of ​​the air transmission integrated circuit. Since the air transmission firmware update of the main integrated circuit is fully responsible by the air transmission integrated circuit, and the main integrated circuit cannot interfere with the operation of the air transmission integrated circuit, the risk of firmware update data being tampered with can be effectively reduced, and the security of air transmission firmware update can be greatly improved.

[0019] In order to make the above features and advantages of the present invention more clearly understood, embodiments are given below with reference to the accompanying drawings for detailed description. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] Figure 1 is a schematic diagram of a processing device according to an embodiment of the present invention.

[0021] Figure 2 is a schematic diagram of a processing device according to another embodiment of the present invention.

[0022] Figure 3 is a schematic diagram of a processing device according to another embodiment of the present invention.

[0023] Figure 4 The present invention is a flowchart of a firmware update method for a processing device according to an embodiment of the present invention.

[0024] Figure 5 is a flowchart of a firmware updating method for a processing device according to another embodiment of the present invention. DETAILED DESCRIPTION

[0025] In order to make the content of the present invention more understandable, the following embodiments are specifically cited as examples on which the present invention can be implemented. In addition, wherever possible, components / members with the same reference numerals are used in the drawings and embodiments to represent the same or similar components.

[0026] Figure 1 is a schematic diagram of a processing device according to an embodiment of the present invention, please refer to Figure 1 . The processing device 100 may be, for example, an in-vehicle system or an Internet of Things device, but is not limited thereto. The processing device 100 may include a main integrated circuit 102 and an air transmission integrated circuit 104, wherein the main integrated circuit 102 is coupled to the air transmission integrated circuit 104. The main integrated circuit 102 has a first flash memory area and a first random access memory area, and the air transmission integrated circuit 104 has a second flash memory area and a second random access memory area, wherein the main integrated circuit 102 cannot access the second flash memory area and the second random access memory area of ​​the air transmission integrated circuit 104. The air transmission integrated circuit 104 may communicate with the air transmission server 106, download firmware update data from the air transmission server 106, and update the firmware of the main integrated circuit 102 according to the firmware update data.

[0027] Furthermore, the OTA integrated circuit 104 can also verify the firmware of the main integrated circuit 102, and confirm with the OTA server 106 whether the firmware of the main integrated circuit 102 needs to be updated. In the case that the firmware of the main integrated circuit 102 needs to be updated, the OTA integrated circuit 104 can decrypt the firmware update data provided by the OTA server 106, and store the decrypted firmware update data in the first flash memory area of ​​the main integrated circuit 102. The OTA integrated circuit 104 can also verify whether the firmware update data stored in the first flash memory area is correct, and after confirming that the firmware update data is correctly stored in the main integrated circuit 102, notify the main integrated circuit 102 to execute a reboot. In addition, the OTA integrated circuit 104 can also verify the boot data stored in the first flash memory area of ​​the main integrated circuit 102 during the boot process of the processing device 100, and restore the boot data in real time when it is found that the boot data has been tampered with or an error occurs.

[0028] In this way, the OTA IC 104 is fully responsible for the OTA firmware update of the main IC 102 and restricts the main IC 102 from interfering with the operation of the OTA IC, which can effectively reduce the risk of firmware update data being tampered with and greatly improve the security of OTA firmware update.

[0029] Specifically, the main integrated circuit 102 and the air transmission integrated circuit 104 may be implemented as independent chips. Figure 2 As shown, the main integrated circuit 102 may include a flash memory 202 having a first flash memory area, a random access memory 204 having a first random access memory area, and a peripheral circuit 206, wherein the peripheral circuit 206 may include, for example, a universal serial bus interface circuit or an integrated circuit bus (I2C) interface circuit, but is not limited thereto. In addition, the air transmission integrated circuit 104 may include a flash memory 208 having a second flash memory area, a random access memory 210 having a second random access memory area, and a peripheral circuit including an encryption and decryption circuit 212 and a network transmission circuit 214, wherein the peripheral circuit of the air transmission integrated circuit 104 is also independent of the peripheral circuit 206 of the main integrated circuit 102. The encryption and decryption circuit 212 may be used to decrypt the firmware update data provided by the air transmission server 106, and the network transmission circuit 214 may be used to communicate with the air transmission server 106 and receive the firmware update data from the air transmission server 106.

[0030] In this embodiment, the main integrated circuit 102 is used as a main chip and can be responsible for executing operating system programs or applications other than over-the-air firmware update processing, while the over-the-air integrated circuit 104 is used as an over-the-air (OTA) chip and can be specifically responsible for executing over-the-air firmware update processing. In other words, the connection, data download, data storage, data replication, and data encryption and decryption processing related to the over-the-air firmware update processing are all handled by the over-the-air integrated circuit 104. The main integrated circuit 102 cannot interfere with the operation of the over-the-air integrated circuit 104, nor can it access the memory of the over-the-air integrated circuit 104. Therefore, the main integrated circuit 102 can be prevented from being hacked, and the over-the-air firmware update processing can be prevented from affecting the data processing performance of the main integrated circuit 102.

[0031] exist Figure 2 In the embodiment, the main integrated circuit 102 and the air transmission integrated circuit 104 are independent chips and have corresponding flash memory and random access memory respectively. However, in some embodiments, the main integrated circuit 102 and the air transmission integrated circuit 104 can also be implemented in a manner of sharing the flash memory and random access memory instead of using the same chip. Figure 2 The embodiments are limited. Figure 3 As shown, Figure 3 Example and Figure 2 The difference between the embodiments is that Figure 3 In the embodiment, the main integrated circuit 102 and the air transmission integrated circuit 104 can be, for example, respectively the first core circuit and the second core circuit in a multi-core chip, and the main integrated circuit 102 and the air transmission integrated circuit 104 share a flash memory 302 and a random access memory 304, wherein the flash memory 302 includes a first flash memory area 302-1 for use by the main integrated circuit 102 and a second flash memory area 302-2 for use by the air transmission integrated circuit 104, and the random access memory 304 includes a first random access memory area 304-1 for use by the main integrated circuit 102 and a second random access memory area 304-2 for use by the air transmission integrated circuit 104, and the first flash memory area 302-1, the second flash memory area 302-2, the first random access memory area 304-1 and the second random access memory area 304-2 can be divided, for example, using a software method. Similar to the above embodiment, the main integrated circuit 102 cannot access the second flash memory area 302-2 and the second random access memory area 304-2, which can effectively reduce the risk of firmware update data being tampered with, and greatly improve the security of air transmission firmware update.

[0032] Figure 4It is a flowchart of a firmware update method for a processing device according to another embodiment of the present invention, wherein the processing device includes a main integrated circuit, and the main integrated circuit has a first flash memory area and a first random access memory area. As can be seen from the above embodiments, the firmware update method for the processing device may include the following steps. First, an air transmission integrated circuit having a second flash memory area and a second random access memory area is provided (step S402), wherein the main integrated circuit cannot access the second flash memory area and the second random access memory area. Then, the air transmission integrated circuit is used to download firmware update data from an air transmission server (step S404). Thereafter, the air transmission integrated circuit is used to update the firmware of the main integrated circuit according to the firmware update data (step S406).

[0033] Further, the over-the-air integrated circuit can be used to perform the following Figure 5 The firmware update method shown. First, verify the firmware of the main integrated circuit (step S502), for example, verify whether the firmware of the main integrated circuit is abnormal. If the firmware of the main integrated circuit is abnormal, the firmware data of the main integrated circuit can be restored in real time (step S504), and if the firmware of the main integrated circuit is normal, the firmware version of the main integrated circuit can be confirmed from the air transmission server (step S506) to determine whether the firmware of the main integrated circuit needs to be updated. In the case where the firmware of the main integrated circuit needs to be updated, the firmware update data can be downloaded from the air transmission server (step S508), and the firmware update data can be decrypted (step S510). Then, the decrypted firmware update data is stored in the flash memory area of ​​the main integrated circuit (step S512), and it is verified whether the firmware update data stored in the flash memory area of ​​the main integrated circuit is correct (step S514). After confirming that the firmware update data stored in the flash memory area of ​​the main integrated circuit is correct, notify the main integrated circuit to perform a restart (step S516).

[0034] In this embodiment, the main integrated circuit and the air transmission integrated circuit may be independent chips, the main integrated circuit may include a first flash memory having a first flash memory area and a second random access memory having a first random access memory area, and the air transmission integrated circuit may include a second flash memory having a second flash memory area and a second random access memory having a second random access memory area. In other embodiments, the main integrated circuit and the air transmission integrated circuit may also be the first core circuit and the second core circuit in a multi-core chip, respectively, and the main integrated circuit and the air transmission integrated circuit may share a flash memory and a random access memory, wherein the flash memory includes a first flash memory area and a second flash memory area, and the random access memory includes a first random access memory area and a second random access memory area.

[0035] In summary, the over-the-air integrated circuit of the embodiment of the present invention is independent of the main integrated circuit, and can download firmware update data from the over-the-air server, and update the firmware of the main integrated circuit according to the firmware update data, and the main integrated circuit cannot access the second flash memory area and the second random access memory area of ​​the over-the-air integrated circuit. Since the over-the-air firmware update of the main integrated circuit is fully responsible by the over-the-air integrated circuit, and the main integrated circuit cannot interfere with the operation of the over-the-air integrated circuit, the risk of firmware update data being tampered with can be effectively reduced, and the security of over-the-air firmware update can be greatly improved.

[0036] Although the present invention has been disclosed as above by way of embodiments, it is not intended to limit the present invention. Any person skilled in the art may make some changes and modifications without departing from the spirit and scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the scope defined by the claims.

Claims

1. A processing device, characterized in that: include: A main integrated circuit having a first flash memory area and a first random access memory area; as well as The over-the-air integrated circuit is coupled to the main integrated circuit and has a second flash memory area and a second random access memory area. The over-the-air integrated circuit downloads firmware update data from an over-the-air server and updates the firmware of the main integrated circuit according to the firmware update data. The main integrated circuit cannot access the second flash memory area and the second random access memory area.

2. The processing device according to claim 1, characterized in that The main integrated circuit is a first chip, the over-the-air transmission integrated circuit is a second chip, the over-the-air transmission integrated circuit is a chip independent of the main integrated circuit, the main integrated circuit includes a first flash memory having the first flash memory area and a second random access memory having the first random access memory area, and the over-the-air transmission integrated circuit includes a second flash memory having the second flash memory area and a second random access memory having the second random access memory area.

3. The processing device according to claim 1, characterized in that The main integrated circuit and the air transmission integrated circuit are respectively the first core circuit and the second core circuit in a multi-core chip. The main integrated circuit and the air transmission integrated circuit share a flash memory and a random access memory. The flash memory includes the first flash memory area and the second flash memory area. The random access memory includes the first random access memory area and the second random access memory area.

4. A firmware update device, characterized in that: A firmware updating device for updating a processing device, the processing device comprising a main integrated circuit, the main integrated circuit having a first flash memory area and a first random access memory area, the firmware updating device comprising: The over-the-air integrated circuit is coupled to the main integrated circuit and has a second flash memory area and a second random access memory area. The over-the-air integrated circuit downloads firmware update data from an over-the-air server and updates the firmware of the main integrated circuit according to the firmware update data. The main integrated circuit cannot access the second flash memory area and the second random access memory area.

5. The firmware update device according to claim 4, characterized in that: The main integrated circuit is a first chip, the over-the-air transmission integrated circuit is a second chip, the over-the-air transmission integrated circuit is a chip independent of the main integrated circuit, the main integrated circuit includes a first flash memory having the first flash memory area and a second random access memory having the first random access memory area, and the over-the-air transmission integrated circuit includes a second flash memory having the second flash memory area and a second random access memory having the second random access memory area.

6. The firmware update device according to claim 4, characterized in that: The air transmission integrated circuit also verifies the firmware of the main integrated circuit, confirms with the air transmission server whether the firmware of the main integrated circuit needs to be updated, decrypts the firmware update data, stores the decrypted firmware update data in the first flash memory area, and verifies the firmware update data stored in the first flash memory area.

7. The firmware update device according to claim 4, characterized in that: The peripheral circuit of the air transmission integrated circuit is independent of the peripheral circuit of the main integrated circuit, and the peripheral circuit of the air transmission integrated circuit includes a network transmission circuit and an encryption and decryption circuit.

8. A method for updating firmware of a processing device, characterized in that: The processing device includes a main integrated circuit, the main integrated circuit has a first flash memory area and a first random access memory area, and the firmware update method of the processing device includes: providing an over-the-air integrated circuit having a second flash memory area and a second random access memory area; downloading firmware update data from an over-the-air server using the over-the-air integrated circuit; and The over-the-air integrated circuit is used to update the firmware of the main integrated circuit according to the firmware update data, wherein the main integrated circuit cannot access the second flash memory area and the second random access memory area.

9. The method for updating the firmware of a processing device according to claim 8, characterized in that: The main integrated circuit is a first chip, the over-the-air transmission integrated circuit is a second chip, the over-the-air transmission integrated circuit is a chip independent of the main integrated circuit, the main integrated circuit includes a first flash memory having the first flash memory area and a second random access memory having the first random access memory area, and the over-the-air transmission integrated circuit includes a second flash memory having the second flash memory area and a second random access memory having the second random access memory area.

10. The firmware update method of a processing device according to claim 8, characterized in that: The main integrated circuit and the air transmission integrated circuit are respectively the first core circuit and the second core circuit in a multi-core chip. The main integrated circuit and the air transmission integrated circuit share a flash memory and a random access memory. The flash memory includes the first flash memory area and the second flash memory area. The random access memory includes the first random access memory area and the second random access memory area.

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