CPU security verification method and computing device

Through the communication between the manager and the BIOS chip and the CPU, the CPU is safely verified based on the authentication information of the BIOS chip, solving the problem of additional authentication devices in the prior art, and achieving efficient and low-cost CPU security verification.

CN119272287APending Publication Date: 2025-01-07XFUSION DIGITAL TECH CO LTD
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Patent Information

Application Number
CN202411380092.0
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-09-29
Publication Date
2025-01-07

AI Technical Summary

Technical Problem

In the prior art, the security verification of the CPU requires additional authentication equipment to be deployed, resulting in high server costs.

Method used

Through the communication between the manager and the BIOS chip and the CPU, the CPU is safely verified based on the authentication information of the BIOS chip, the first authentication information is obtained, and the manager stores this information for security verification of the CPU, avoiding the deployment of additional authentication devices demand.

Benefits of technology

It improves the accuracy and reliability of CPU security verification, reduces the cost of computing equipment, and guarantees the integrity and reliability of authentication information.

✦ Generated by Eureka AI based on patent content.

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Abstract

The embodiment of the invention provides a safety verification method of a CPU and computing equipment, the method is applied to a manager of the computing equipment, the computing equipment comprises the manager, a BIOS chip and a central processing unit CPU, and the manager is in communication connection with the BIOS chip and the CPU; the method comprises the following steps: performing security verification on a BIOS chip based on authentication information of the BIOS chip; after the security verification of the BIOS chip is passed, obtaining first authentication information from the BIOS chip; wherein the first authentication information represents the authentication information of the CPU; and based on the first authentication information, performing security verification on the CPU. According to the embodiment of the invention, authentication equipment does not need to be additionally deployed in the computing equipment, and the cost of the computing equipment is reduced.
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Description

Technical Field

[0001] The embodiments of the present application relate to the technical field of computing devices, and in particular to a CPU security verification method and a computing device. Background Art

[0002] With the development of science and technology, servers are widely used, and users' requirements for server security are also increasing. At present, one of the security services provided by servers is the central processing unit (CPU) security verification (CPU attestation), which is used to verify the integrity of the CPU and CPU firmware.

[0003] In the related art, the security verification of the CPU is mostly performed by setting up an authentication device in the server, such as a complex programmable logic device (CPLD), for performing security verification on the CPU. However, this method requires additional deployment of authentication devices, resulting in higher server costs. Summary of the invention

[0004] The embodiments of the present application provide a CPU security verification method and a computing device, which do not require the deployment of additional authentication equipment, thereby reducing the cost of the computing device.

[0005] In a first aspect, an embodiment of the present application provides a CPU security verification method, the method being applied to a manager of a computing device, the computing device comprising a manager, a BIOS chip, and a central processing unit (CPU), the manager being respectively connected to the BIOS chip and the CPU in communication; comprising:

[0006] Based on the authentication information of the BIOS chip, performing security verification on the BIOS chip;

[0007] After the BIOS chip passes the security check, first authentication information is obtained from the BIOS chip; wherein the first authentication information represents the authentication information of the CPU;

[0008] Based on the first authentication information, a security check is performed on the CPU.

[0009] Beneficial effects of this embodiment: the manager can obtain the first authentication information from the BIOS chip after performing a security check on the BIOS chip based on the authentication information of the preset BIOS chip, and perform a security check on the CPU based on the first authentication information. In this way, the integrity and reliability of the first authentication information used for the security check of the CPU can be guaranteed based on the security check of the BIOS chip, and the first authentication information can be guaranteed not to be tampered with, so as to improve the accuracy of the subsequent security check of the CPU. At the same time, in this way, the reliable first authentication information is stored in the manager, and the manager is used to implement the security check of the CPU, without the need to deploy additional authentication devices in the computing device, thus saving the cost of the computing device.

[0010] In a possible implementation manner, the first authentication information includes a root certificate of the CPU and a historical hash value of a firmware required by the CPU; and obtaining the first authentication information from the BIOS chip includes:

[0011] Obtaining the root certificate of the CPU and the historical hash value of the firmware required by the CPU from the BIOS chip; or,

[0012] The root certificate of the CPU is obtained from the BIOS chip, and the historical hash value of the firmware required by the CPU is obtained from the memory of the manager.

[0013] Beneficial effect of this embodiment: In this way, the first authentication information can be flexibly updated.

[0014] In a possible implementation, performing security verification on the BIOS chip based on authentication information of the BIOS chip includes:

[0015] Based on the second authentication information, a security check is performed on the manager; wherein the second authentication information represents the authentication information of the manager;

[0016] After the manager passes the security check, the BIOS chip is subjected to a security check based on the authentication information of the BIOS chip.

[0017] Beneficial effects of this embodiment: Through this method, the reliability of the firmware included in the manager can be guaranteed, and then the reliability of the authentication information stored in the manager can be guaranteed, and the accuracy of subsequent BIOS chip security verification and CPU security verification can be guaranteed.

[0018] In a possible implementation manner, before performing security verification on the CPU based on the first authentication information, the method includes:

[0019] The access rights of the BIOS chip are granted to the CPU.

[0020] Beneficial effect of this embodiment: In this way, the manager can control the access rights of the BIOS chip and ensure the security of the BIOS chip.

[0021] In a possible implementation, the method further includes:

[0022] After the CPU security check passes, a startup instruction is sent to the CPU; wherein the startup instruction is used to instruct the CPU to obtain the firmware required by the CPU from the BIOS chip, and start the CPU based on the firmware required by the CPU.

[0023] Beneficial effect of this embodiment: In this way, the manager can use the startup instruction to control the CPU startup after the CPU security check passes, thereby ensuring the reliability of the CPU.

[0024] In a second aspect, an embodiment of the present application provides a CPU security verification method, the method being applied to a manager of a computing device, the computing device comprising a manager and a central processing unit (CPU), the manager being communicatively connected to the CPU; the manager comprising first authentication information and second authentication information; the first authentication information representing the authentication information of the CPU, the second authentication information representing the authentication information of the manager; comprising:

[0025] During the CPU startup process, the manager is security-checked based on the second authentication information; after it is determined that the manager security-check has passed, the CPU is security-checked based on the first authentication information.

[0026] The beneficial effects of this embodiment are as follows: by storing the authentication information in the manager, during the startup process of the CPU, the manager can perform a security check on the manager based on the stored second authentication information to ensure the integrity and reliability of the manager and the firmware included in the manager, and after the security check of the manager passes, perform a security check on the CPU based on the stored first authentication information to ensure the integrity and reliability of the firmware included in the CPU. In this way, there is no need to deploy additional authentication equipment in the computing device, and the existing manager can be used to implement the security check of the CPU, reducing the cost of the computing device.

[0027] In a possible implementation, the manager includes a security core and a business core, the security core includes first authentication information and second authentication information; and based on the second authentication information, performing security verification on the manager includes:

[0028] The security core of the manager performs a security check on the security core based on the second authentication information;

[0029] After determining that the security core passes the security check, the security core of the manager performs a security check on the business core based on the second authentication information;

[0030] After determining that the manager passes the security check, performing a security check on the CPU based on the first authentication information includes:

[0031] After determining that the business core has passed the security check, the security core of the manager performs a security check on the CPU based on the first authentication information.

[0032] The beneficial effects of this embodiment are as follows: by dividing the manager into a security core and a business core, and using the security core to store the first authentication information and the second authentication information, the security and reliability of the authentication information are improved, and then the security core implements a security check on the manager and a security check on the CPU based on the authentication information, thereby improving the reliability of the security check on the manager and the security check on the CPU.

[0033] In a possible implementation, the security core includes first authentication information; the first authentication information includes a root certificate of the CPU and a historical hash value of a firmware required by the CPU; the security core of the manager performs a security check on the CPU based on the first authentication information, including:

[0034] The security core of the manager obtains the certificate chain of the CPU;

[0035] The security core of the manager verifies the certificate chain of the CPU based on the root certificate of the CPU;

[0036] After the certificate chain of the CPU is verified, the security core of the manager obtains the current hash value of the firmware required by the CPU;

[0037] The security core of the manager performs a security check on the CPU based on a historical hash value of the firmware required by the CPU and a current hash value of the firmware required by the CPU.

[0038] The beneficial effects of this embodiment are as follows: the security core is used to store the first authentication information, thereby improving the security and reliability of the authentication information, and then the security core implements security verification of the CPU based on the first authentication information, thereby improving the reliability of the security verification of the CPU.

[0039] In a possible implementation, the computing device further includes a BIOS chip and a multiplexer, the output end of the multiplexer is connected to the BIOS chip, and the input end of the multiplexer is connected to the security core of the manager and the CPU; the security core also includes authentication information of the BIOS chip; the method further includes:

[0040] The security core of the manager performs a security check on the BIOS chip based on the authentication information of the BIOS chip;

[0041] After determining that the BIOS chip has passed the security check, the security core of the manager controls the multiplexer to conduct the channel between the CPU and the BIOS chip.

[0042] The beneficial effects of this embodiment are as follows: the security core is used to store the authentication information of the BIOS chip, thereby improving the security and reliability of the authentication information. The security core then implements security verification of the BIOS chip based on the authentication information of the BIOS chip, thereby improving the reliability of the security verification of the BIOS chip. After the security verification of the BIOS chip passes, the path between the CPU and the BIOS chip is controlled to be connected, thereby improving the security of the CPU.

[0043] In a third aspect, an embodiment of the present application further provides a computing device, a manager, a central processing unit (CPU), and a memory, wherein the manager is communicatively connected to the central processing unit; the manager is communicatively connected to the memory;

[0044] The memory stores computer-executable instructions;

[0045] The manager executes the computer-executable instructions stored in the memory to implement the CPU security verification method as described in the first aspect, or the CPU security verification method as described in any one of the second aspects.

[0046] Beneficial effects of this embodiment: the manager of the computing device can execute the computer execution instruction, so that the manager can perform a security check on the BIOS chip based on the authentication information of the preset BIOS chip, obtain the first authentication information from the BIOS chip, and perform a security check on the CPU based on the first authentication information. In this way, the integrity and reliability of the first authentication information used for the security check of the CPU can be guaranteed based on the security check of the BIOS chip, and the first authentication information can be guaranteed not to be tampered with, so as to improve the accuracy of the subsequent security check of the CPU. At the same time, in this way, the reliable first authentication information is stored in the manager, and the manager is used to implement the security check of the CPU, without the need to deploy additional authentication devices in the computing device, thus saving the cost of the computing device;

[0047] Alternatively, by storing the authentication information in the manager, during the CPU startup process, the manager can perform a security check on the manager based on the stored second authentication information to ensure the integrity and reliability of the manager and the firmware included in the manager, and after the manager passes the security check, perform a security check on the CPU based on the stored first authentication information to ensure the integrity and reliability of the firmware included in the CPU. In this way, there is no need to deploy additional authentication equipment in the computing device, and the existing manager can be used to implement the security check of the CPU, reducing the cost of the computing device.

[0048] In a fourth aspect, an embodiment of the present application provides a computer program product, including a computer program, which, when executed by a manager, implements the CPU security verification method as described in the first aspect, or the CPU security verification method as described in any one of the second aspects.

[0049] Beneficial effects of this embodiment: the manager of the computing device can execute the computer program, so that the manager can obtain the first authentication information from the BIOS chip after performing a security check on the BIOS chip based on the authentication information of the preset BIOS chip, and perform a security check on the CPU based on the first authentication information. In this way, the integrity and reliability of the first authentication information used for the security check of the CPU can be guaranteed based on the security check of the BIOS chip, and the first authentication information can be guaranteed not to be tampered with, so as to improve the accuracy of the subsequent security check of the CPU. At the same time, in this way, the reliable first authentication information is stored in the manager, and the manager is used to implement the security check of the CPU, without the need to deploy additional authentication devices in the computing device, thus saving the cost of the computing device;

[0050] Alternatively, by storing the authentication information in the manager, during the CPU startup process, the manager can perform a security check on the manager based on the stored second authentication information to ensure the integrity and reliability of the manager and the firmware included in the manager, and after the manager passes the security check, perform a security check on the CPU based on the stored first authentication information to ensure the integrity and reliability of the firmware included in the CPU. In this way, there is no need to deploy additional authentication equipment in the computing device, and the existing manager can be used to implement the security check of the CPU, reducing the cost of the computing device. BRIEF DESCRIPTION OF THE DRAWINGS

[0051] Figure 1 A schematic diagram of the structure of a computing device provided in an embodiment of the present application;

[0052] Figure 2 A schematic diagram of the structure of another computing device provided in an embodiment of the present application;

[0053] Figure 3A schematic diagram of a CPU security verification method provided in an embodiment of the present application;

[0054] Figure 4 A schematic diagram of a CPU security verification method provided in an embodiment of the present application;

[0055] Figure 5 A schematic diagram of a flow chart of another CPU security verification method provided in an embodiment of the present application;

[0056] Figure 6 A schematic diagram of a flow chart of another CPU security verification method provided in an embodiment of the present application;

[0057] Figure 7 A schematic diagram of the structure of a CPU security verification device provided in an embodiment of the present application;

[0058] Figure 8 A schematic diagram of the structure of another CPU security verification device provided in an embodiment of the present application. DETAILED DESCRIPTION

[0059] In order to make the purpose, technical solution and advantages of the embodiments of the present application clearer, the technical solution in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments made by ordinary technicians in this field under the enlightenment of the embodiments belong to the scope of protection of the present application.

[0060] The terms "first", "second", "third", "fourth", etc. (if any) in the specification and claims of the present application and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence. It should be understood that the data used in this way can be interchangeable where appropriate, so that the embodiments of the present application described herein can be implemented in an order other than those illustrated or described herein. In addition, the terms "including" and "having" and any of their variations are intended to cover non-exclusive inclusions, for example, a process, method, system, product or device that includes a series of steps or units is not necessarily limited to those steps or units that are clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products or devices.

[0061] First, the terms involved in the embodiments of the present application are explained:

[0062] System trusted root: used to represent the root public key set.

[0063] Root certificate: It is a top-level certificate issued by a trusted certificate authority (CA). Each root certificate contains a CA's public key and related information, thus forming the starting point of the public key infrastructure (PKI) trust chain and can be used to verify the authenticity of other certificates.

[0064] Certificate chain: A sequence of multiple certificates that forms a trust path from a root certificate to a specific component of a device (such as firmware, operating system).

[0065] BIOS production package: A tool set used to create and configure system firmware for computing devices, usually including binary files, configuration files, update tools, and documentation for BIOS firmware. Its main purpose is to help manufacturers customize and deploy BIOS during the production process to support specific hardware platforms and features.

[0066] The embodiment of the present application proposes a CPU security verification method, which is based on a device deployed in a computing device and serves as a CPU security verification manager to verify the integrity of the CPU and the firmware included in the CPU, thereby reducing the development cost of the computing device.

[0067] Figure 1 A schematic diagram of the structure of a computing device provided in an embodiment of the present application. Figure 1 As shown, the computing device 100 includes a CPU 101 and a manager 102, and the CPU 101 is in communication connection with the manager 102. The CPU 101 and the manager 102 may be in communication connection through an internal interface or a bus, and the communication connection method of the embodiment of the present application is not limited, for example, it may be an improved integrated circuit bus (Improved Inter Integrated Circuit, I3C).

[0068] The manager 102 stores authentication information, which is used to verify the integrity of the hardware devices deployed by the computing device and the firmware included in the hardware devices. The authentication information may include, for example, a system trusted root, key information, and feature information of the device. The system trusted root may include public key certificates of various hardware, such as the public key certificate of the manager, the public key certificate of the CPU, the public key certificate of the BIOS chip, etc. The manager may be a management module deployed in the computing device, such as a baseboard management controller (Baseboard Management Controller, BMC) in the computing device, or a monitoring management device in the computing device, or a system management module (System Management Mode, SMM) in the computing device, etc. The embodiments of the present application do not limit the specific form of the manager, and the above is only an exemplary description. In the following embodiments, the manager is taken as an example of BMC for explanation.

[0069] It should be noted that in different computing devices, BMC may have different names. For example, in some computing devices, it is called iLO or iDRAC. BMC, iLO or iDRAC can all be understood as the BMC in the embodiment of the present invention.

[0070] CPU 101 is used to execute computing tasks and control tasks in the computing device. It should be noted that the embodiment of the present application does not limit the type and number of CPUs.

[0071] In some embodiments, the computing device 100 may further include a Basic Input Output System (BIOS) chip 103, which is in communication with the CPU 101 and the management 102. The BIOS chip may be, for example, a storage chip such as a flash memory or an electrically erasable programmable read only memory (EEPROM), in which the BIOS is stored.

[0072] In some embodiments, the CPU 101 and the manager 102 are connected to the BIOS chip 103 based on the multiplexer 104, wherein the CPU 101 and the manager 102 serve as the input ends of the multiplexer 104, and the BIOS chip 103 serves as the output end of the multiplexer 104. The manager 102 may generate a control signal to control the multiplexer 104 to select a channel to be turned on. The form of the control signal is not limited in the embodiment of the present application, for example, a high level may be used to indicate that the channel between the CPU 101 and the BIOS chip 103 is turned on, and a low level may be used to indicate that the channel between the manager 102 and the BIOS chip 103 is turned on.

[0073] It should be noted that the present application embodiment does not limit the specific type of computing device. The computing device can be any device including Figure 1 The computing device may include more or fewer components than shown, or combine some components, or split some components, or arrange the components differently. The components shown may be implemented in hardware, software, or a combination of software and hardware. For example, the computing device may be a server, a server cluster, a laptop computer, a desktop computer, a tablet computer, a mobile phone, an artificial intelligence device, etc.

[0074] Figure 2 A schematic diagram of the structure of another computing device provided in an embodiment of the present application. Figure 2 The computing device 200 shown includes a CPU 201 and a manager 202 , and the manager 202 includes a security core 203 and a business core 204 .

[0075] It can be understood that the manager 202 includes a CPU with multiple processing cores (Cores). Therefore, the manager can be structurally divided based on the number of processing cores to obtain a security core 203 and a business core 204.

[0076] The security core 203 is used to process security-related functions and tasks in the manager. Taking the manager as BMC as an example, the security core can perform security-related functions such as secure boot, encryption and decryption functions, identity authentication and access control.

[0077] The business core 204 is used to process general management functions and business logic in the manager. Taking the manager as a BMC as an example, the business core can perform functions such as system monitoring, hardware status detection, fault detection and alarm.

[0078] It should be noted that the embodiments of the present application do not limit how to divide the security core and business core of the manager, and the embodiments of the present application do not limit the communication method between the security core and the business core, which is specifically related to the settings of the manager.

[0079] refer to Figure 2 As shown, the manager 202 may further include a memory 205 for storing the firmware and data included in the manager. The memory 205 may be a non-volatile memory, such as a flash memory, a one-time programmable (OTP) memory, an electrically erasable programmable read only memory (EEPROM) or an embedded MultiMedia Card (EMMC). The security core 203 and the service core 204 may share the memory 205.

[0080] In some embodiments, the computing device 202 may further include a BIOS chip 206 and a multiplexer 207. The CPU 201 and the security core 203 are connected to the BIOS chip 206 based on the multiplexer 207, wherein the CPU 201 and the security core 203 serve as input terminals of the multiplexer 207, and the BIOS chip 206 serves as an output terminal of the multiplexer 207. The security core 203 may generate a control signal to control the multiplexer 207 to select a channel to be turned on.

[0081] The technical solutions of the embodiments of the present application are described in detail below through specific embodiments. It should be noted that the following specific embodiments can be combined with each other, and the same or similar concepts or processes will not be repeated in some embodiments.

[0082] refer to Figure 3 As shown, Figure 3 A schematic diagram of a CPU security verification method provided by an embodiment of the present application, wherein the channel between the manager and the BIOS chip in this embodiment is connected, in other words, the manager can communicate with the BIOS chip. Figure 1 and Figure 3 As shown, the method includes:

[0083] S301. The manager performs a security check on the BIOS chip based on the authentication information of the BIOS chip.

[0084] Exemplarily, the authentication information of the BIOS chip may include, for example, the public key certificate of the BIOS chip and the digital signature of the BIOS chip, which are used to verify the integrity of the firmware included in the BIOS chip, wherein the firmware included in the BIOS chip can be used to initialize and test hardware components (such as CPU, memory, hard disk, etc.), provide basic input and output functions when the computing device is started, and guide the operating system to load. Therefore, it is necessary to verify the integrity of the firmware included in the BIOS chip.

[0085] The security check is used to verify the reliability of the hardware identity and / or the integrity and reliability of the firmware included in the hardware. For example, it can verify whether the firmware included in the BIOS chip is complete or has been modified.

[0086] In some possible implementations, during the manufacturing and equipment phase or maintenance and update phase of a computing device, a user can store the authentication information of a BIOS chip in a manager, and burn a BIOS production package including first authentication information into the BIOS chip, wherein the first authentication information represents the authentication information of a CPU, and the first authentication information may include a root certificate of the CPU and a historical hash value of a firmware required by the CPU, and is used to perform security verification on the CPU, and the authentication information of the BIOS chip has a corresponding relationship with the BIOS production package. In this way, the first authentication information can be updated.

[0087] In some possible implementations, the authentication information of the BIOS chip may include the public key certificate of the BIOS chip and the digital signature of the BIOS chip; the digital signature of the BIOS chip includes the private key certificate of the BIOS chip and the historical hash value of the BIOS chip; the historical hash value of the BIOS chip represents the historical hash value of the firmware included in the BIOS chip; the historical hash value may be generated by the BIOS chip during the equipment production stage. The digital signature of the BIOS chip may be obtained by encrypting the historical hash value of the BIOS chip based on the private key certificate of the BIOS chip and storing it in the manager.

[0088] In this implementation, the manager can grant the access rights of the BIOS chip to the manager. In other words, the manager can control the multiplexer to conduct the channel between the manager and the BIOS chip, and obtain the current hash value of the BIOS chip, wherein the current hash value of the BIOS chip represents the current hash value of the firmware included in the BIOS chip, and the current hash value of the BIOS chip can be generated by the BIOS chip based on the currently included firmware and hash algorithm. As mentioned above, the manager stores a system trusted root, which includes the public key certificates of each hardware, in other words, the public key certificate of the BIOS chip. Then, the manager can decrypt the digital signature of the BIOS chip based on the public key certificate of the BIOS chip, and obtain the historical hash value of the BIOS chip after decryption; if it is determined that the historical hash value of the BIOS chip is consistent with the current hash value of the BIOS chip, it means that the security check of the BIOS chip has passed, and if it is determined that they are inconsistent, it means that the firmware included in the BIOS chip is incomplete or has been changed, indicating that the security check of the BIOS chip has failed.

[0089] S302: After the BIOS chip passes security verification, the manager obtains first authentication information from the BIOS chip.

[0090] Exemplarily, the firmware included in the BIOS chip may include first authentication information, which represents the authentication information of the CPU and can be used to perform security verification on the CPU. For example, the reliability of the CPU identity can be verified, and the integrity and reliability of the firmware required by the CPU can be verified. It should be understood that the firmware required by the CPU represents the firmware related to the CPU included in the BIOS chip.

[0091] In some possible implementations, as mentioned above, a production package including the first authentication information is pre-burned in the BIOS chip. Therefore, after the manager passes the security check of the BIOS chip, the first authentication information can be obtained from the BIOS chip based on the channel between the manager and the BIOS chip of the multiplexer, and stored in a preset storage location in the manager. The preset storage location can be a hardware security module (HSM) in the manager, or a non-volatile memory, and the non-volatile memory has access permission restrictions to prevent the authentication information from being tampered with. The non-volatile memory can be, for example, an OTP memory, or EMMC; in other words, the authentication information stored in the OTP memory cannot be erased or modified again to ensure the reliability of the authentication information.

[0092] Taking the example that the first authentication information may include the root certificate of the CPU and the historical hash value of the firmware required by the CPU, in this implementation, the manager may obtain the root certificate of the CPU and the historical hash value of the firmware required by the CPU from the BIOS chip.

[0093] In some possible implementations, the digital signature of the CPU in the first authentication information can be pre-burned in the BIOS chip, and the root certificate of the CPU is stored in the manager. The manager can obtain the root certificate of the CPU from the BIOS chip and read the historical hash value of the firmware required by the CPU from the memory of the manager. In other words, the manager can obtain the first authentication information including the root certificate of the CPU and the historical hash value of the firmware required by the CPU, and store the first authentication information. In this way, the first authentication information can be flexibly updated.

[0094] Optionally, the first authentication information may also include the public key certificate of the CPU. As mentioned above, the manager stores a system trusted root, which includes the public key certificates of each hardware, in other words, the public key certificate of the CPU. It should be noted that the historical hash value of the firmware required by the CPU is in the form of the digital signature of the CPU to prevent tampering. The digital signature of the CPU is obtained by encrypting the historical hash value of the firmware required by the CPU using the private key certificate of the CPU. Therefore, when performing a security check on the CPU, the manager can decrypt the digital signature of the CPU based on the public key certificate of the CPU to obtain the historical hash value of the firmware required by the CPU.

[0095] In some embodiments, before the manager performs a security check on the BIOS chip, the manager may also perform a security check on itself. For example, the manager may perform a security check on the manager based on the preset second authentication information; and after the manager passes the security check, the manager may perform a security check on the BIOS chip based on the authentication information of the BIOS chip. Among them, the second authentication information represents the authentication information of the manager, and the second authentication information may include, for example, the public key certificate of the manager and the digital signature of the manager; the digital signature of the manager includes the private key certificate of the manager and the historical hash value of the manager; the historical hash value of the manager represents the historical hash value of the firmware included in the manager; the historical hash value may be generated by the manager during the equipment production stage. The digital signature of the manager may be obtained by encrypting the historical hash value of the manager based on the private key certificate of the manager, and stored in the manager.

[0096] Specifically, as mentioned above, the manager stores a system trusted root, which includes the public key certificates of each hardware, in other words, the public key certificate of the manager. Then, the manager can decrypt the digital signature of the manager based on the public key certificate of the manager, and obtain the historical hash value of the manager after decryption. If the historical hash value of the manager is determined to be consistent with the current hash value of the manager, it means that the security check of the manager has passed. If it is determined that they are inconsistent, it means that the firmware included in the manager is incomplete or has been changed, indicating that the security check of the manager has failed. In this way, the reliability of the firmware included in the manager can be guaranteed, and then the reliability of the authentication information stored in the manager can be guaranteed, and the accuracy of the subsequent BIOS chip security check and CPU security check can be guaranteed.

[0097] S303: The manager performs a security check on the CPU based on the first authentication information.

[0098] In some possible implementations, the first authentication information includes the root certificate of the CPU and the historical hash value of the firmware required by the CPU. Therefore, the manager can perform a security check on the CPU based on the root certificate of the CPU and the historical hash value of the firmware required by the CPU. For example, the manager can verify the certificate chain of the CPU based on the root certificate of the CPU. After the verification is passed, the manager can determine whether the hash values ​​are consistent based on the historical hash value of the firmware required by the CPU and the current hash value of the firmware required by the CPU, so as to determine whether the firmware required by the CPU has been updated or tampered with, thereby achieving a security check on the CPU.

[0099] It should be understood that if the CPU is replaced, or the firmware required by the CPU is tampered with, then the historical hash value of the firmware required by the CPU in the first authentication information is different from the current hash value of the actual firmware required by the CPU, and the security check of the CPU cannot pass. Therefore, this method can be used to ensure the integrity and reliability of the CPU.

[0100] In some embodiments, before performing security verification on the CPU, the manager grants the access rights of the BIOS chip to the CPU. In other words, the manager can control the multiplexer to conduct the channel between the CPU and the BIOS chip, so that the CPU can obtain the current hash value of the firmware required by the CPU from the BIOS chip. In this way, the manager can control the access rights of the BIOS chip and ensure the security of the BIOS chip.

[0101] In some embodiments, after the CPU security check passes, a startup instruction is sent to the CPU; wherein the startup instruction is used to instruct the CPU to obtain the firmware required by the CPU from the BIOS chip and start the CPU based on the firmware required by the CPU. In this way, the manager can use the startup instruction to control the CPU startup after the CPU security check passes, thereby ensuring the reliability of the CPU.

[0102] It should be noted that the public key certificates of the hardware included in the authentication information involved in the embodiments of the present application, such as the public key certificate of the CPU, the public key certificate of the manager, or the public key certificate of the BIOS chip, can be stored in the manager in the form of a system trusted root, and the system trusted root can be stored in the manager during the production equipment stage or the maintenance and update stage of the computing device. The public key certificates of each hardware can be read from the system trusted root when in use, and the public key certificates of other hardware are similar and will not be described in detail later.

[0103] In this embodiment, the manager can obtain the first authentication information from the BIOS chip after performing a security check on the BIOS chip based on the authentication information of the preset BIOS chip, and perform a security check on the CPU based on the first authentication information. In this way, the integrity and reliability of the first authentication information used for the security check of the CPU can be guaranteed based on the security check of the BIOS chip, and the first authentication information can be guaranteed not to be tampered with, so as to improve the accuracy of the subsequent security check of the CPU. At the same time, in this way, the reliable first authentication information is stored in the manager, and the manager is used to implement the security check of the CPU, without the need to deploy additional authentication devices in the computing device, thus saving the cost of the computing device.

[0104] Figure 4 A flowchart of a CPU security verification method provided by an embodiment of the present application. Figure 1 and Figure 4 As shown, in this embodiment, the multiplexer channel between the CPU and the BIOS chip is turned on. In other words, the CPU can communicate with the BIOS chip. The method may include the following steps:

[0105] S401. During the CPU startup process, the manager performs a security check on the manager based on the second authentication information.

[0106] Exemplarily, the manager may include first authentication information and second authentication information, wherein the first authentication information represents the authentication information of the CPU, in other words, the first authentication information can be used to verify the integrity of the CPU and the firmware required by the CPU. Similarly, the second authentication information represents the authentication information of the manager, in other words, the second authentication information can be used to verify the integrity of the firmware included in the manager.

[0107] As mentioned above, the manager can obtain the first authentication information through the method of the above embodiment and store it in the preset storage location of the manager. The second authentication information can be stored in the preset storage location during the production equipment stage of the manager or the computing device; or it can be stored in the preset storage location during the maintenance or update stage of the manager, such as when the firmware included in the manager is updated. The preset storage location can be a hardware security module (HSM) in the manager, or it can be a non-volatile memory, and the non-volatile memory has access permission restrictions to prevent the authentication information from being tampered with. The non-volatile memory can be, for example, an OTP memory. In other words, the authentication information stored in the OTP memory cannot be erased or modified again to ensure the reliability of the authentication information.

[0108] Exemplarily, the second authentication information may include the public key certificate of the manager and the digital signature of the manager, wherein the digital signature of the manager includes the private key certificate and the historical hash value of the firmware included in the manager. It is understandable that the manager can determine the historical hash value based on the firmware included in the manager during the equipment production stage, and encrypt the historical hash value using the private key certificate to obtain the digital signature of the manager. Therefore, the manager can perform a security verification on the manager based on the public key certificate of the manager and the digital signature of the manager in the pre-stored system trusted root. For example, the manager can verify the private key certificate in the digital signature based on the public key certificate. If the verification is successful, the manager can obtain the historical hash value of the firmware included in the manager, and then after obtaining the current hash value of the firmware included in the manager, it can determine whether the firmware included in the manager has been updated or tampered with based on the historical hash value in the digital signature of the manager, thereby achieving a security verification of the manager.

[0109] It should be understood that if the manager is replaced, or the firmware included in the manager is tampered with, then the historical hash value of the firmware included in the manager in the second authentication information will be different from the current hash value of the firmware included in the actual manager, and the security check of the manager will fail. Therefore, the integrity and reliability of the manager can be protected in this way.

[0110] Through this step, the manager can ensure the integrity and reliability of the manager itself so as to perform security verification on the CPU.

[0111] S402: After the manager determines that the manager security check has passed, the manager performs a security check on the CPU based on the first authentication information.

[0112] As mentioned above, the manager includes the first authentication information, and the first authentication information can be used to verify the integrity of the CPU and the firmware required by the CPU. Therefore, the manager can perform security verification on the CPU based on the first authentication information.

[0113] Exemplarily, the first authentication information may include a public key certificate of the CPU, a root certificate of the CPU, and a digital signature of the CPU, wherein the digital signature of the CPU includes a private key certificate and a historical hash value of the CPU and the firmware required by the CPU. It is understandable that in the production equipment stage, the CPU can determine the historical hash value based on the firmware required by the CPU included in the BIOS chip, and use the private key certificate to process the hash value to obtain the digital signature of the CPU. Therefore, the manager can first verify the certificate chain of the CPU based on the root certificate of the CPU. After the verification is passed, the manager can perform a security check on the CPU based on the public key certificate of the CPU in the pre-stored system trusted root and the digital signature of the CPU. For example, the manager can verify the private key certificate in the digital signature based on the public key certificate. If the verification is successful, the manager can obtain the historical hash value of the firmware required by the CPU, and then obtain the current hash value of the firmware required by the CPU from the BIOS chip based on the CPU. Based on the historical hash value in the digital signature of the CPU, determine whether the firmware required by the CPU has been updated or tampered with, and implement a security check on the CPU.

[0114] It should be understood that if the CPU is replaced, or the firmware required by the CPU is tampered with, then the historical hash value of the firmware required by the CPU in the first authentication information is different from the current hash value of the actual firmware required by the CPU, and the security check of the CPU cannot pass. Therefore, this method can be used to ensure the integrity and reliability of the CPU.

[0115] Optionally, after the manager determines that the CPU security check has passed, the manager may send a startup instruction to the CPU, where the startup instruction is used to instruct the CPU to start up. The CPU may obtain the firmware required by the CPU from the BIOS chip based on the startup instruction to start up the CPU.

[0116] In this embodiment, by storing the authentication information in the manager, during the startup process of the CPU, the manager can perform a security check on the manager based on the stored second authentication information to ensure the integrity and reliability of the manager and the firmware included in the manager, and after the security check of the manager passes, perform a security check on the CPU based on the stored first authentication information to ensure the integrity and reliability of the firmware included in the CPU. In this way, there is no need to deploy additional authentication equipment in the computing device, and the existing manager can be used to implement the security check of the CPU, reducing the cost of the computing device.

[0117] Figure 5A flowchart of another CPU security verification method provided by an embodiment of the present application. In this embodiment, the second authentication information includes the public key certificate of the manager and the digital signature of the manager, the digital signature of the manager includes the historical hash value of the manager, and the digital signature of the manager is obtained by encrypting the historical hash value of the manager based on the private key certificate of the manager; the historical hash value of the manager is used to represent the historical hash value of the firmware included in the manager, and the historical hash value can be, for example, a hash value determined during the equipment production stage of the manager.

[0118] The first authentication information includes the public key certificate of the CPU, the root certificate of the CPU, and the digital signature of the CPU. The digital signature of the CPU includes the historical hash value of the firmware required by the CPU, and the digital signature of the CPU is obtained by encrypting the historical hash value of the firmware required by the CPU based on the private key certificate of the CPU. The historical hash value of the firmware required by the CPU can be, for example, a hash value determined during the CPU production equipment stage. Figure 1 and Figure 5 As shown, in this embodiment, the multiplexer channel between the CPU and the BIOS chip is turned on. In other words, the CPU can communicate with the BIOS chip. The method may include the following steps:

[0119] S501. During the startup process of the CPU, the manager verifies the digital signature of the manager based on the public key certificate of the manager to determine the historical hash value of the manager.

[0120] Exemplarily, the manager may decrypt the digital signature of the manager based on the public key certificate of the manager included in the system trusted root, and after decryption, the historical hash value of the manager included in the digital signature of the manager may be determined.

[0121] It should be noted that the embodiment of the present application does not limit the decryption method, which is specifically related to the encryption algorithm adopted by the manager.

[0122] S502: The manager obtains the current hash value of the manager.

[0123] Exemplarily, the current hash value of the manager represents the current hash value of the firmware included in the manager. The manager can generate the current hash value of the manager based on the firmware and hash algorithm included in the current manager. It should be noted that the embodiment of the present application does not limit the hash algorithm for generating the hash value, and it can be consistent with the hash algorithm for generating the historical hash value of the manager. The hash algorithm can be, for example, a 256-bit secure hash algorithm (Secure Hash Algorithm 256-bit, SHA-256) or a cyclic redundancy check (Cyclic Redundancy Check, CRC) algorithm, etc.

[0124] It should be noted that the embodiment of the present application does not limit the execution order of step S501 and step S502. For example, they can be executed sequentially or in parallel. This embodiment only takes sequential execution as an example for illustration.

[0125] S503: The manager performs a security check on the manager based on the manager's historical hash value and the manager's current hash value.

[0126] Exemplarily, the manager can determine whether the manager's historical hash value is consistent with the manager's current hash value to implement security verification of the manager. If the manager determines that the manager's historical hash value is consistent with the manager's current hash value, it means that the firmware included in the manager has not been replaced or tampered with, and the security verification of the manager passes, and step S504 is executed; if the manager determines that the manager's historical hash value is inconsistent with the manager's current hash value, it means that the firmware included in the manager may have been replaced or tampered with, and the security verification of the manager fails.

[0127] Optionally, if the manager fails the security check, a prompt message may be returned to the client of the computing device to prompt the user that the computing device has a fault. It should be noted that the embodiment of the present application does not limit the content of the prompt message.

[0128] S504: After determining that the manager security check has passed, the manager obtains the certificate chain of the CPU.

[0129] Exemplarily, the certificate chain of the CPU can be used to characterize the legitimacy of the CPU identity. In other words, the certificate chain of the CPU can be used to determine whether the CPU in the computing device is legitimate. The manager can send a certificate chain request instruction to the CPU, and the CPU returns the certificate chain of the CPU to the manager after receiving the certificate chain request instruction.

[0130] In one possible implementation, as mentioned above, reference Figure 1 As shown, the manager and the CPU may be connected to each other through an I3C bus. Therefore, the manager and the CPU may use the Management Component Transport Protocol (MCTP) based on the I3C bus to transmit security data and commands defined by the Security Protocol and Data Model. In this implementation, the manager may be installed with a preset application, which may be used to implement the transmission of security data and commands between the manager and the CPU. The preset application may be, for example, libspdm software.

[0131] S505: The manager verifies the certificate chain of the CPU based on the root certificate of the CPU.

[0132] Exemplarily, the manager can verify the certificate chain of the CPU based on the root certificate of the CPU. For example, the manager can verify the first certificate included in the certificate chain of the CPU based on the root certificate of the CPU. If the verification is successful, the public key certificate included in the first certificate is used to verify the certificates included in the certificate chain of the CPU step by step until all certificates included in the certificate chain of the CPU are verified. It is determined that the verification of the certificate chain of the CPU is successful. Through this step, the manager can determine the legitimacy of the CPU identity to prevent the CPU from being replaced.

[0133] S506: After the certificate chain of the CPU is verified, the manager verifies the digital signature of the CPU based on the public key certificate of the CPU to determine the historical hash value of the firmware required by the CPU.

[0134] After the manager determines that the certificate chain of the CPU has been verified, the digital signature of the CPU is verified based on the public key certificate of the CPU to determine the historical hash value of the firmware required by the CPU. For example, the manager can decrypt the digital signature of the CPU based on the public key certificate of the CPU included in the system trusted root, and after decryption, the historical hash value of the firmware required by the CPU included in the digital signature of the CPU can be determined.

[0135] It should be noted that the embodiment of the present application does not limit the decryption method, which is specifically related to the encryption algorithm adopted by the CPU.

[0136] S507: The manager obtains the current hash value of the firmware required by the CPU.

[0137] Exemplarily, the CPU can generate the current hash value of the firmware required by the CPU based on the firmware required by the CPU and the hash algorithm stored in the current BIOS chip, and send it to the manager. It should be noted that the hash algorithm for generating the hash value is not limited in the embodiment of the present application, and it can be consistent with the hash algorithm for generating the historical hash value of the firmware required by the CPU. The hash algorithm can be, for example, a 256-bit secure hash algorithm (Secure Hash Algorithm 256-bit, SHA-256) or a cyclic redundancy check (Cyclic Redundancy Check, CRC) algorithm, etc.

[0138] In a possible implementation, the manager may send a hash value acquisition instruction to the CPU based on a preset application, and the CPU returns the current hash value of the firmware required by the CPU in response to the hash value acquisition instruction.

[0139] It should be noted that, in the embodiment of the present application, after the certificate chain of the CPU is verified based on the root certificate of the CPU, the execution order of "based on the public key certificate of the CPU, verifying the digital signature of the CPU, and determining the historical hash value of the firmware required by the CPU" shown in step S506 and "the manager obtains the current hash value of the firmware required by the CPU" shown in step S507 is not limited. For example, it can be executed sequentially or in parallel. This embodiment is only illustrated by taking sequential execution as an example.

[0140] S508 . The manager performs a security check on the CPU based on the historical hash value of the firmware required by the CPU and the current hash value of the firmware required by the CPU.

[0141] Exemplarily, the manager can determine whether the historical hash value of the firmware required by the CPU is consistent with the current hash value of the firmware required by the CPU to implement the security check of the CPU. If the manager determines that the historical hash value of the firmware required by the CPU is consistent with the current hash value of the firmware required by the CPU, it means that the firmware required by the CPU has not been replaced or tampered with, and the security check of the CPU passes; if the manager determines that the historical hash value of the firmware required by the CPU is inconsistent with the current hash value of the firmware required by the CPU, it means that the firmware required by the CPU may have been replaced or tampered with, and the security check of the CPU fails.

[0142] Optionally, if the CPU security check fails, a prompt message may be returned to the client of the computing device to prompt the user that the computing device has a fault. It should be noted that the embodiment of the present application does not limit the content of the prompt message.

[0143] In this embodiment, during the CPU startup process, the manager performs a security check on the manager based on the manager's digital signature, and after determining that the manager's security check has passed, the manager uses the CPU's root certificate stored in the manager to verify the CPU's certificate chain to ensure the legitimacy of the CPU's identity, and after the verification passes, the CPU is security checked using the CPU's public key certificate and the CPU's digital signature to ensure the integrity and reliability of the firmware required by the CPU. In this way, there is no need to deploy additional authentication devices in the computing device, and the manager can not only implement integrity verification of the manager based on the stored authentication information, but also implement verification of the legitimacy of the CPU's identity and verification of the integrity and reliability of the firmware required by the CPU, thereby reducing the cost of the computing device.

[0144] Figure 6 A flowchart of another CPU security verification method provided by an embodiment of the present application. Figure 2As shown, the manager may include a security core and a business core, and the multiplexer conducts the channel between the security core of the manager and the BIOS chip. Among them, the security core may include first authentication information, second authentication information, authentication information of the BIOS chip, first firmware and second firmware. The first firmware may be a program that runs immediately after the manager is powered on, such as a boot loader; the second firmware may be a program for performing security verification. Optionally, the first authentication information, the second authentication information and the authentication information of the BIOS chip may be stored in the OTP memory of the security core, and the first authentication information, the second authentication information and the authentication information of the BIOS chip can only be accessed by the security core and cannot be erased or modified again to ensure the reliability of the first authentication information, the second authentication information and the authentication information of the BIOS chip.

[0145] refer to Figure 2 and Figure 6 As shown, the method may include the following steps:

[0146] S601. During CPU startup, the security core of the manager performs a security check on the security core based on the second authentication information.

[0147] In a possible implementation, the second authentication information includes a public key certificate of the security core and a digital signature of the security core, and the digital signature of the security core includes a historical hash value of the security core, and the digital signature of the security core may be obtained by, for example, encrypting the historical hash value of the security core based on the private key certificate of the security core. The historical hash value of the security core represents the historical hash value of the firmware included in the security core, and the historical hash value may be, for example, a hash value determined by the security core of the manager during the equipment production stage.

[0148] Under this implementation, the manager's security core runs the first firmware, verifies the digital signature of the security core based on the public key certificate of the security core included in the system's trusted root, determines the historical hash value of the security core, obtains the current hash value of the security core, and performs a security check on the security core based on the historical hash value of the security core and the current hash value of the security core.

[0149] Exemplarily, the first firmware may be a boot loader. After the manager is powered on, the security core runs the first firmware and performs a security check on the security core based on the second authentication information. The security core of the manager may decrypt the digital signature of the security core based on the public key certificate of the security core, and after decryption, the historical hash value of the security core included in the digital signature of the security core may be determined. The current hash value of the security core represents the current hash value of the firmware included in the security core. The security core of the manager may generate the current hash value of the security core based on the firmware and hash algorithm included in the current security core. It should be noted that the embodiment of the present application does not limit the hash algorithm for generating the hash value, and it may be consistent with the hash algorithm for generating the historical hash value of the security core. The hash algorithm may be, for example, a 256-bit secure hash algorithm (Secure Hash Algorithm 256-bit, SHA-256) or a cyclic redundancy check (Cyclic Redundancy Check, CRC) algorithm, etc.

[0150] Exemplarily, the manager's security core can determine whether the security core's historical hash value is consistent with the security core's current hash value to implement security verification of the manager's security core. If the manager's security core determines that the security core's historical hash value is consistent with the security core's current hash value, it means that the firmware included in the manager's security core has not been replaced or tampered with, and the security verification of the security core passes; if the manager's security core determines that the security core's historical hash value is inconsistent with the security core's current hash value, it means that the firmware included in the security core may have been replaced or tampered with, and the security verification of the security core fails.

[0151] Optionally, if the security check of the security core of the manager fails, a prompt message may be returned to the client of the computing device to prompt the user that the computing device has a fault. It should be noted that the embodiment of the present application does not limit the content of the prompt message.

[0152] In this way, the security core is used to store the second authentication information, thereby improving the security and reliability of the authentication information. The security core then implements security verification of the security core based on the authentication information, thereby improving the reliability of the security verification of the security core.

[0153] It should be noted that the embodiments of the present application do not limit the decryption method, which is specifically related to the encryption algorithm adopted by the security core. In addition, the embodiments of the present application do not limit the execution order of "determining the historical hash value of the security core" and "obtaining the current hash value of the security core". For example, it can be sequential execution or parallel execution. This embodiment only takes sequential execution as an example for illustration.

[0154] S602. After the manager's security core determines that the security core has passed the security check, the manager's security core performs a security check on the business core based on the second authentication information.

[0155] In a possible implementation, the second authentication information includes a public key certificate of the business core and a digital signature of the business core, and the digital signature of the business core includes a historical hash value of the business core; the digital signature of the business core can be obtained by, for example, encrypting the historical hash value of the business core based on the private key certificate of the business core and storing it in the security core. The historical hash value of the business core represents the historical hash value of the firmware included in the business core, and the historical hash value can be, for example, a hash value determined by the business core of the manager during the equipment production stage.

[0156] Under this implementation, the manager's security core runs the second firmware, verifies the digital signature of the business core of the business core based on the public key certificate of the business core included in the system's trusted root, determines the historical hash value of the business core; obtains the current hash value of the business core; and performs a security check on the business core based on the historical hash value of the business core and the current hash value of the business core.

[0157] Exemplarily, after the security check of the security core passes, the security core can operate normally, so the security core can run the second firmware, which is used to perform a security check on the business core based on the second authentication information. The security core of the manager can run the second firmware, decrypt the digital signature of the business core based on the public key certificate of the business core, and after decryption, the historical hash value of the business core included in the digital signature of the business core can be determined. The current hash value of the business core represents the current hash value of the firmware included in the business core. The business core of the manager can generate the current hash value of the business core based on the firmware and hash algorithm included in the current business core. It should be noted that the embodiment of the present application does not limit the hash algorithm for generating the hash value, and it can be consistent with the hash algorithm for generating the historical hash value of the business core. The hash algorithm can be, for example, a 256-bit secure hash algorithm (Secure Hash Algorithm 256-bit, SHA-256) or a cyclic redundancy check (CyclicRedundancy Check, CRC) algorithm, etc.

[0158] Exemplarily, the security core may obtain the current hash value of the business core through the internal communication interface between the security core and the business core; or, after the business core generates the current hash value of the business core, the business core stores the current hash value of the business core in the memory of the manager, because the security core and the business core can share the memory, so the security core can read the current hash value of the business core from the memory. The security core of the manager can determine whether the historical hash value of the business core is consistent with the current hash value of the business core to implement the security check of the business core of the manager. If the security core of the manager determines that the historical hash value of the business core is consistent with the current hash value of the business core, it means that the firmware included in the business core of the manager has not been replaced or tampered with, and the security check of the business core passes; if the security core of the manager determines that the historical hash value of the business core is inconsistent with the current hash value of the business core, it means that the firmware included in the business core may be replaced or tampered with, and the security check of the business core fails.

[0159] In this way, the security core is used to store the second authentication information, thereby improving the security and reliability of the authentication information. The security core then performs security verification of the business core based on the authentication information, thereby improving the reliability of the security verification of the business core.

[0160] It should be noted that the embodiment of the present application does not limit the decryption method, which is specifically related to the encryption algorithm used by the business core. It should be noted that the embodiment of the present application does not limit the execution order of "determining the historical hash value of the business core" and "obtaining the current hash value of the business core", for example, it can be sequential execution or parallel execution. This embodiment is only illustrated by sequential execution as an example.

[0161] Optionally, if the security check of the business core of the manager fails, a prompt message may be returned to the client of the computing device to prompt the user that the computing device has a fault. It should be noted that the embodiment of the present application does not limit the content of the prompt message.

[0162] Optionally, after the manager's security core determines that the business core has passed the security check, it can return a startup instruction to the business core. The startup instruction can instruct the manager's business core to run the firmware included in the business core to implement the functions of the manager's business core. For example, taking the manager as BMC, the business core can perform system monitoring, hardware status detection, fault detection and alarm and other functions.

[0163] Through this step, the manager is divided into a security core and a business core. The security core is used to store the second authentication information, which improves the security and reliability of the authentication information. The security core then implements security verification of the manager based on the authentication information, which improves the reliability of the security verification of the manager.

[0164] S603: The security core of the manager performs a security check on the BIOS chip based on the authentication information of the BIOS chip.

[0165] For example, reference Figure 2 As shown, the computing device may further include a BIOS chip, and the security core may further include authentication information of the BIOS chip, the authentication information of the BIOS chip representing the authentication information of the BIOS chip, and used to verify the integrity of the firmware included in the BIOS chip. It is understandable that the firmware stored in the BIOS chip is related to the operation of the CPU, and therefore, the integrity and reliability of the firmware included in the BIOS chip need to be guaranteed.

[0166] In a possible implementation, the authentication information of the BIOS chip may include the public key certificate of the BIOS chip and the digital signature of the BIOS chip; the digital signature of the BIOS chip includes the historical hash value of the BIOS chip; the historical hash value of the BIOS chip represents the historical hash value of the firmware included in the BIOS chip; the historical hash value may be generated by the BIOS chip during the equipment production stage. The digital signature of the BIOS chip may be obtained by encrypting the historical hash value of the BIOS chip based on the private key certificate of the BIOS chip, and storing it in the security core.

[0167] Under this implementation, the manager's security core responds to the BIOS chip verification request triggered by the business core, verifies the digital signature of the BIOS chip based on the public key certificate of the BIOS chip included in the system's trusted root, and determines the historical hash value of the BIOS chip; obtains the current hash value of the BIOS chip based on the channel between the security core and the BIOS chip turned on by the multiplexer; and performs a security check on the BIOS chip based on the historical hash value of the BIOS chip and the current hash value of the BIOS chip.

[0168] Exemplarily, the BIOS chip verification request is used to instruct the security core to perform a security verification on the BIOS chip. It is understandable that the function of hardware status detection can be executed in the business core, so the business core can trigger a verification request for the BIOS chip after running the firmware included in the business core. The security core of the manager can run the second firmware, decrypt the digital signature of the BIOS chip based on the public key certificate of the BIOS chip, and after decryption, the historical hash value of the BIOS chip included in the digital signature of the BIOS chip can be determined. The current hash value of the BIOS chip represents the current hash value of the firmware included in the BIOS chip. The BIOS chip can generate the current hash value of the BIOS chip based on the currently included firmware and hash algorithm. It should be noted that the embodiment of the present application does not limit the hash algorithm for generating the hash value, and it can be consistent with the hash algorithm for generating the historical hash value of the BIOS chip. The hash algorithm can be, for example, a 256-bit secure hash algorithm (Secure Hash Algorithm 256-bit, SHA-256) or a cyclic redundancy check (Cyclic Redundancy Check, CRC) algorithm, etc. It should be noted that the embodiment of the present application does not limit the decryption method, which is specifically related to the encryption algorithm adopted by the BIOS chip.

[0169] It should be understood that the security core can generate a control signal to control the multiplexer to turn on the channel between the security core and the BIOS chip so as to achieve communication between the security core and the BIOS chip, and then the security core can obtain the current hash value of the BIOS chip generated by the BIOS chip.

[0170] Exemplarily, the manager's security core can determine whether the historical hash value of the BIOS chip is consistent with the current hash value of the BIOS chip to implement security verification of the BIOS chip. If the manager's security core determines that the historical hash value of the BIOS chip is consistent with the current hash value of the BIOS chip, it means that the firmware included in the BIOS chip has not been replaced or tampered with, and the security verification of the BIOS chip passes; if the manager's security core determines that the historical hash value of the BIOS chip is inconsistent with the current hash value of the BIOS chip, it means that the firmware included in the BIOS chip may have been replaced or tampered with, and the security verification of the BIOS chip fails.

[0171] In this way, the security core is used to store the authentication information of the BIOS chip, which improves the security and reliability of the authentication information. The security core then implements security verification of the BIOS chip based on the authentication information of the BIOS chip, thereby improving the reliability of the security verification of the BIOS chip. After the security verification of the BIOS chip passes, the path between the CPU and the BIOS chip is controlled to be connected, thereby improving the security of the CPU.

[0172] Optionally, if the security check of the BIOS chip fails, a prompt message may be returned to the client of the computing device to prompt the user that the computing device has a fault. It should be noted that the embodiment of the present application does not limit the content of the prompt message.

[0173] S604: After the security core of the manager determines that the BIOS chip has passed the security check, the multiplexer is controlled to conduct the channel between the CPU and the BIOS chip.

[0174] It is understandable that the firmware required by the CPU is stored in the BIOS chip. Therefore, after determining that the BIOS chip security check has passed, the security core can generate a control signal to control the multiplexer to turn on the channel between the CPU and the BIOS chip, so that the manager's security core can obtain the current hash value of the firmware required by the CPU and perform a security check on the CPU.

[0175] S605: The security core of the manager obtains the certificate chain of the CPU.

[0176] Exemplarily, the certificate chain of the CPU can be used to characterize the legitimacy of the CPU identity. In other words, the certificate chain of the CPU can be used to determine whether the CPU in the computing device is legitimate.

[0177] In one possible implementation, as mentioned above, reference Figure 1 As shown, the manager and the CPU may be connected to each other through an I3C bus, so the manager and the CPU may use the Management Component Transport Protocol (MCTP) based on the I3C bus to transmit security data and commands defined by the Security Protocol and Data Model. In this implementation, the manager may be installed with a preset application, which may be used to implement the transmission of security data and commands between the manager and the CPU.

[0178] For example, after the manager's security core determines that the security check of the BIOS chip has passed, the firmware included in the operation of the manager's business core can trigger a CPU verification request, and then the manager's business core can run a preset application to communicate with the CPU, obtain the CPU's certificate chain, and store it in the manager's memory. The security core can obtain the CPU's certificate chain from the memory.

[0179] S606: The security core of the manager verifies the certificate chain of the CPU based on the root certificate of the CPU.

[0180] Exemplarily, the manager's security core can run the second firmware to verify the CPU's certificate chain based on the CPU's root certificate. For example, the manager's security core can verify the first certificate included in the CPU's certificate chain based on the CPU's public key certificate in the CPU's root certificate. If the verification is successful, the public key certificate included in the first certificate is used to verify the certificates included in the CPU's certificate chain step by step until all certificates included in the CPU's certificate chain are verified. This determines that the CPU's certificate chain has passed verification. Through this step, the manager's security core can determine the legitimacy of the CPU's identity to prevent the CPU from being replaced.

[0181] S607 . After the certificate chain of the CPU is verified, the security core of the manager obtains the current hash value of the firmware required by the CPU.

[0182] After the manager's security core determines that the CPU's certificate chain has been verified, the digital signature of the CPU is verified based on the CPU's public key certificate to determine the historical hash value of the firmware required by the CPU. For example, the manager's security core can decrypt the digital signature of the CPU based on the CPU's public key certificate, and after decryption, the historical hash value of the firmware required by the CPU included in the digital signature of the CPU can be determined.

[0183] It should be noted that the embodiment of the present application does not limit the decryption method, which is specifically related to the encryption algorithm adopted by the CPU.

[0184] Exemplarily, the current hash value of the firmware required by the CPU represents the current hash value of the firmware included in the CPU. The CPU can obtain the firmware required by the CPU from the BIOS chip and generate the current hash value of the firmware required by the CPU based on the hash algorithm, and send it to the business core of the manager. It should be noted that the hash algorithm for generating the hash value is not limited in the embodiment of the present application, and it can be consistent with the hash algorithm for generating the historical hash value of the firmware required by the CPU. The hash algorithm can be, for example, a 256-bit secure hash algorithm (Secure Hash Algorithm 256-bit, SHA-256) or a cyclic redundancy check (CyclicRedundancy Check, CRC) algorithm, etc.

[0185] In one possible implementation, the business core of the manager can run a preset application to communicate with the CPU, obtain the current hash value of the firmware required by the CPU, and store it in the memory of the manager. The security core of the manager obtains the current hash value of the firmware required by the CPU from the memory.

[0186] S608. The security core of the manager performs a security check on the CPU based on the historical hash value of the firmware required by the CPU and the current hash value of the firmware required by the CPU.

[0187] Exemplarily, the manager's security core can determine whether the historical hash value of the firmware required by the CPU is consistent with the current hash value of the firmware required by the CPU to implement security verification of the CPU. If the manager's security core determines that the historical hash value of the firmware required by the CPU is consistent with the current hash value of the firmware required by the CPU, it means that the firmware required by the CPU has not been replaced or tampered with, and the security verification of the CPU passes; if the manager's security core determines that the historical hash value of the firmware required by the CPU is inconsistent with the current hash value of the firmware required by the CPU, it means that the firmware required by the CPU may have been replaced or tampered with, and the security verification of the CPU fails.

[0188] Optionally, if the CPU security check fails, a prompt message may be returned to the client of the computing device to prompt the user that the computing device has a fault. It should be noted that the embodiment of the present application does not limit the content of the prompt message.

[0189] In this way, the security core is used to store the first authentication information, thereby improving the security and reliability of the authentication information. The security core then implements security verification of the CPU based on the first authentication information, thereby improving the reliability of the security verification of the CPU.

[0190] In some possible implementations, the second authentication information may be updated based on an update of the firmware included in the manager; the first authentication information may be updated based on an update of the firmware included in the manager, or may be updated based on an update of the firmware included in the BIOS chip.

[0191] In this embodiment, during the startup process of the CPU, the security core of the manager can verify the security core and the business core based on the second authentication information. After ensuring the safe startup of the manager, the security core of the manager performs a security check on the BIOS chip based on the authentication information of the BIOS chip, and after the security check of the BIOS chip passes, the access rights of the BIOS chip are switched to the CPU, and then after the security check of the CPU based on the first authentication information passes, the CPU can be controlled to start based on the firmware included in the BIOS chip. This method improves the security and reliability of the authentication information by dividing the manager into a security core and a business core, using the security core to store the first authentication information, the second authentication information, and the authentication information of the BIOS chip, and the business core cannot access the authentication information, and then the security core implements security checks on the manager, BIOS chip, and CPU based on the authentication information, thereby improving the reliability of the security check.

[0192] Figure 7 A schematic diagram of the structure of a CPU security verification device provided in an embodiment of the present application. The device can be applied to a manager of a computing device, such as Figure 7 As shown, the device 700 includes:

[0193] A first verification module 701, configured to perform security verification on the BIOS chip based on the authentication information of the BIOS chip;

[0194] The acquisition module 702 is used to acquire first authentication information from the BIOS chip after the BIOS chip passes the security check; wherein the first authentication information represents the authentication information of the CPU;

[0195] The second verification module 703 is used to perform security verification on the CPU based on the first authentication information.

[0196] In a possible implementation, the first authentication information includes a root certificate of the CPU and a historical hash value of a firmware required by the CPU; the acquisition module 702 is specifically configured to:

[0197] Obtaining the root certificate of the CPU and the historical hash value of the firmware required by the CPU from the BIOS chip; or,

[0198] The root certificate of the CPU is obtained from the BIOS chip, and the historical hash value of the firmware required by the CPU is obtained from the memory of the manager.

[0199] In a possible implementation, the first verification module 701 is specifically configured to:

[0200] Based on the second authentication information, a security check is performed on the manager; wherein the second authentication information represents the authentication information of the manager;

[0201] After the manager passes the security check, the BIOS chip is subjected to a security check based on the authentication information of the BIOS chip.

[0202] In a possible implementation, the device further includes a control module, which is used to:

[0203] The access rights of the BIOS chip are granted to the CPU.

[0204] In a possible implementation, the device further includes a sending module, configured to:

[0205] After the CPU security check passes, a startup instruction is sent to the CPU; wherein the startup instruction is used to instruct the CPU to obtain the firmware required by the CPU from the BIOS chip, and start the CPU based on the firmware required by the CPU.

[0206] The CPU security verification device provided in this embodiment can execute the CPU security verification method in the above method embodiment, and its beneficial effects are similar, which will not be repeated here.

[0207] Figure 8 A schematic diagram of the structure of a CPU security verification device provided in an embodiment of the present application. The device can be applied to a manager of a computing device, wherein the manager includes first authentication information and second authentication information; the first authentication information represents the authentication information of the CPU, and the second authentication information represents the authentication information of the manager; Figure 8 As shown, the device 800 includes:

[0208] A first verification module 801 is used to perform a security verification on the manager based on the second authentication information during the CPU startup process;

[0209] The second verification module 802 is used to perform a security verification on the CPU based on the first authentication information after determining that the manager has passed the security verification.

[0210] In a possible implementation, the manager includes a security core and a business core, the security core includes first authentication information and second authentication information; the first verification module 801 is specifically used to:

[0211] The security core of the manager performs a security check on the security core based on the second authentication information;

[0212] After determining that the security core passes the security check, the security core of the manager performs a security check on the business core based on the second authentication information;

[0213] The second verification module 802 is specifically used for:

[0214] After determining that the business core has passed the security check, the security core of the manager performs a security check on the CPU based on the first authentication information.

[0215] In a possible implementation, the security core includes first authentication information; the first authentication information includes a root certificate of the CPU and a historical hash value of a firmware required by the CPU; the first verification module 801 is specifically used to:

[0216] The security core of the manager obtains the certificate chain of the CPU;

[0217] The security core of the manager verifies the certificate chain of the CPU based on the root certificate of the CPU;

[0218] After the certificate chain of the CPU is verified, the security core of the manager obtains the current hash value of the firmware required by the CPU;

[0219] The security core of the manager performs a security check on the CPU based on a historical hash value of the firmware required by the CPU and a current hash value of the firmware required by the CPU.

[0220] In a possible implementation, the computing device further includes a BIOS chip and a multiplexer, the output end of the multiplexer is connected to the BIOS chip, and the input end of the multiplexer is connected to the security core of the manager and the CPU; the security core also includes authentication information of the BIOS chip; and a third verification module is specifically used to:

[0221] The security core of the manager performs a security check on the BIOS chip based on the authentication information of the BIOS chip;

[0222] After determining that the BIOS chip has passed the security check, the security core of the manager controls the multiplexer to conduct the channel between the CPU and the BIOS chip.

[0223] The CPU security verification device provided in this embodiment can execute the CPU security verification method in the above method embodiment, and its beneficial effects are similar, which will not be repeated here.

[0224] The computing device provided in this embodiment can refer to the aforementioned Figure 1 or Figure 2 As shown, the technical solution in the above method embodiment can be executed, and its beneficial effects are similar, which will not be described again here.

[0225] An embodiment of the present application also provides a computer-readable storage medium, in which computer-executable instructions are stored. When the computer-executable instructions are executed by a processor, they are used to implement the technical solution provided by any of the aforementioned method embodiments.

[0226] An embodiment of the present application also provides a computer program product, including a computer program, which is used to implement the technical solution provided by the aforementioned method embodiment when executed by a processor.

[0227] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the embodiments of the present application, rather than to limit them. Although the embodiments of the present application have been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or replace some or all of the technical features therein by equivalents. These modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present application.

Claims

1. A CPU security verification method, characterized in that: The method is applied to a manager of a computing device, the computing device comprising a manager, a BIOS chip and a central processing unit (CPU), the manager being in communication connection with the BIOS chip and the CPU respectively; the method comprising: Based on the authentication information of the BIOS chip, performing security verification on the BIOS chip; After the BIOS chip passes the security check, first authentication information is obtained from the BIOS chip; wherein the first authentication information represents the authentication information of the CPU; Based on the first authentication information, a security check is performed on the CPU.

2. The method according to claim 1, characterized in that The first authentication information includes a root certificate of the CPU and a historical hash value of a firmware required by the CPU; obtaining the first authentication information from the BIOS chip includes: Obtaining the root certificate of the CPU and the historical hash value of the firmware required by the CPU from the BIOS chip; or, The root certificate of the CPU is obtained from the BIOS chip, and the historical hash value of the firmware required by the CPU is obtained from the memory of the manager.

3. The method according to claim 1, characterized in that Based on the authentication information of the BIOS chip, a security check is performed on the BIOS chip, including: Based on the second authentication information, a security check is performed on the manager; wherein the second authentication information represents the authentication information of the manager; After the manager passes the security check, the BIOS chip is subjected to a security check based on the authentication information of the BIOS chip.

4. The method according to claim 1, characterized in that: Before performing security verification on the CPU based on the first authentication information, the method includes: The access rights of the BIOS chip are granted to the CPU.

5. The method according to claim 1, characterized in that The method further comprises: After the CPU security check passes, a startup instruction is sent to the CPU; wherein the startup instruction is used to instruct the CPU to obtain the firmware required by the CPU from the BIOS chip, and start the CPU based on the firmware required by the CPU.

6. A CPU security verification method, characterized in that: The method is applied to a manager of a computing device, the computing device comprising a manager and a central processing unit (CPU), the manager being in communication connection with the CPU; the manager comprising first authentication information and second authentication information; The first authentication information represents the authentication information of the CPU, and the second authentication information represents the authentication information of the manager; The method comprises: During the CPU startup process, performing a security check on the manager based on the second authentication information; After determining that the manager has passed the security check, a security check is performed on the CPU based on the first authentication information.

7. The method according to claim 6, characterized in that The manager includes a security core and a business core, and the security core includes first authentication information and second authentication information; The performing security verification on the manager based on the second authentication information includes: The security core of the manager performs a security check on the security core based on the second authentication information; After determining that the security core passes the security check, the security core of the manager performs a security check on the business core based on the second authentication information; After determining that the manager passes the security check, performing a security check on the CPU based on the first authentication information includes: After determining that the business core has passed the security check, the security core of the manager performs a security check on the CPU based on the first authentication information.

8. The method according to claim 7, characterized in that The security core includes first authentication information; the first authentication information includes a root certificate of the CPU and a historical hash value of a firmware required by the CPU; the security core of the manager performs a security check on the CPU based on the first authentication information, including: The security core of the manager obtains the certificate chain of the CPU; The security core of the manager verifies the certificate chain of the CPU based on the root certificate of the CPU; After the certificate chain of the CPU is verified, the security core of the manager obtains the current hash value of the firmware required by the CPU; The security core of the manager performs a security check on the CPU based on a historical hash value of the firmware required by the CPU and a current hash value of the firmware required by the CPU.

9. The method according to any one of claims 7 or 8, characterized in that: The computing device further comprises a BIOS chip and a multiplexer, wherein an output end of the multiplexer is connected to the BIOS chip, and an input end of the multiplexer is connected to the security core of the manager and the CPU; the security core also comprises authentication information of the BIOS chip; The method further comprises: The security core of the manager performs a security check on the BIOS chip based on the authentication information of the BIOS chip; After determining that the BIOS chip has passed the security check, the security core of the manager controls the multiplexer to conduct the channel between the CPU and the BIOS chip.

10. A computing device, characterized in that The computing device comprises: a manager, a central processing unit (CPU), and a memory, wherein the manager is communicatively connected to the central processing unit; the manager is communicatively connected to the memory; The memory stores computer-executable instructions; The manager executes the computer-executable instructions stored in the memory to implement the CPU security verification method according to any one of claims 1 to 5, or the CPU security verification method according to any one of claims 6 to 9.

Citation Information

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    WO2026066009A1