Method for forming image sensor

Abstract

The invention discloses a method for forming an image sensor. The method comprises the following steps: providing a substrate; forming a trench isolation structure and a photodiode on the front surface of the substrate; forming a grid electrode of a transfer transistor of which at least part of a channel is in the vertical direction above the photodiode; injecting a first doped region of a first conductive type on the front surface of the substrate; and by controlling the voltage of the grid electrode, the charge of the photodiode is transmitted to the first doped region through a part of the substrate between the second doped region of the second conduction type of the photodiode and the grid electrode of the transfer transistor. According to the embodiment of the invention, the position of the grid electrode of the transfer transistor is close to the isolation structure, and the characteristic of high-concentration doping of the second doped region of the second conduction type of the photodiode is utilized, so that a charge transfer channel of the photodiode is more easily turned off, and backflow and dark current in the photodiode are reduced; in addition, a fully-depleted transmission channel can be formed, and the transmission capacity of charges is improved.

Description

Technical Field

[0001] The present invention relates to the field of image sensors, and in particular to an image sensor and a method for forming the same. Background Art

[0002] With the rapid development of image sensors and the increasingly wide application fields of image sensors. The performance requirements of image sensors are increasing, the size of sensor pixels is getting smaller and smaller, and the full well capacitance density of sensor pixels is rapidly increasing, causing huge pressure on charge readout. In the pixel structure, the design of the transfer transistor is particularly important for pixel readout. For pixels made at advanced nodes, the transfer transistor also has a series of optimized designs, especially the vertical transfer transistor, which can effectively improve the readout capability while reducing the isolation pressure of the photodiode, bringing great convenience to pixel design. However, as the pixel size becomes smaller and smaller, the distance between the conventional vertical transfer transistor and the surrounding heavily doped area is also getting smaller and smaller, which easily leads to the transmission transistor and the surrounding area being penetrated. Summary of the invention

[0003] Based on the problems existing in the prior art, the present invention proposes a method for forming an image sensor, comprising: providing a substrate; forming a trench isolation structure and a photodiode on the front side of the substrate; forming a gate of a transfer transistor with at least a portion of the channel in a vertical direction above the photodiode; injecting a first doping region of a first conductivity type into the front side of the substrate; and controlling the voltage of the gate so that the charge of the photodiode is transferred to the first doping region through a portion of the substrate between a second doping region of a second conductivity type of the photodiode and the gate of the transfer transistor.

[0004] In some embodiments, providing a substrate includes: providing a first substrate of a second conductivity type; epitaxially forming a first doped epitaxial layer of a first conductivity type on the first substrate to form a third doped region of the first conductivity type of the photodiode; and epitaxially forming a second doped epitaxial layer of a second conductivity type on the first doped epitaxial layer.

[0005] In some embodiments, forming a trench isolation structure and a photodiode on the front side of the substrate includes: etching the substrate to form a first trench; forming a first dielectric layer on the surface of the first trench; etching the first dielectric layer at the bottom of the first trench; etching the substrate to increase the depth of the first trench; increasing the width of the first trench by laterally etching the substrate; removing the first dielectric layer; epitaxially forming a third doped epitaxial layer of a second conductivity type on the surface of the first trench to form a photodiode; forming a second dielectric layer on the surface of the first trench and filling it with first polysilicon to form the trench isolation structure.

[0006] In some embodiments, forming a trench isolation structure and a photodiode on the front side of the substrate includes: etching the substrate to form a first trench; forming a first dielectric layer on the surface of the first trench; etching the first dielectric layer at the bottom of the first trench; etching the substrate to increase the depth of the first trench; increasing the width of the first trench by side etching the substrate; forming a second dielectric layer on the surface of the first trench and filling it with first polysilicon; wherein the second dielectric layer or the first polysilicon contains doped ions of a second conductivity type; and diffusing the doped ions of the second conductivity type into the substrate through heat treatment, thereby forming the photodiode and the trench isolation structure.

[0007] In some embodiments, forming a gate of a transfer transistor with at least a portion of the channel in a vertical direction above the photodiode includes: etching the second doped epitaxial layer to form a second trench; forming a third dielectric layer on the surface of the second trench and filling it with second polysilicon to form the transfer transistor.

[0008] In some embodiments, providing the substrate includes: providing the substrate of the second conductivity type; forming a fourth doping layer of the first conductivity type in the middle of the substrate by ion implantation to form a third doping region of the photodiode.

[0009] In some embodiments, forming a trench isolation structure and a photodiode on the front side of the substrate includes: etching the substrate to form a first trench; forming a first dielectric layer on the surface of the first trench; etching the first dielectric layer at the bottom of the first trench; etching the substrate to increase the depth of the first trench; increasing the width of the first trench by laterally etching the substrate; removing the first dielectric layer; epitaxially forming a third doped epitaxial layer of a second conductivity type on the surface of the first trench to form a photodiode; forming a second dielectric layer on the surface of the first trench and filling it with first polysilicon to form the trench isolation structure.

[0010] In some embodiments, forming a trench isolation structure and a photodiode on the front side of the substrate includes: etching the substrate to form a first trench; forming a first dielectric layer on the surface of the first trench; etching the first dielectric layer at the bottom of the first trench; etching the substrate to increase the depth of the first trench; increasing the width of the first trench by side etching the substrate; forming a second dielectric layer on the surface of the first trench and filling it with first polysilicon; wherein the second dielectric layer or the first polysilicon contains doped ions of a second conductivity type; and diffusing the doped ions of the second conductivity type into the first doped epitaxial layer through heat treatment, thereby forming the photodiode and the trench isolation structure.

[0011] In some embodiments, forming a gate of a transfer transistor with at least a portion of the channel in a vertical direction above the photodiode includes: etching the substrate to form a second trench; forming a third dielectric layer on the surface of the second trench and filling it with second polysilicon to form the transfer transistor.

[0012] In some embodiments, the first doped region of the first conductivity type is located above the second doped region of the second conductivity type of the photodiode; and the first doped region of the first conductivity type is electrically connected to the floating diffusion region.

[0013] In some embodiments, the method further includes: performing ion implantation on the substrate to form a second doped region of the first conductivity type in the substrate for connecting the transfer transistor and the photodiode; when a voltage is applied to the gate of the transfer transistor, at least one side of the gate of the transfer transistor and a portion of the substrate between the trench isolation structure is completely depleted.

[0014] Compared with the prior art, the embodiment of the present invention positions the gate of the transfer transistor close to the isolation structure, increases the distance from the surrounding heavily doped areas, and achieves better isolation between the transfer transistor and surrounding functional transistors (for example, reset transistor, source follower transistor, etc.); and utilizes the high-concentration doping characteristics of the photodiode isolation doping region, thereby making it easier to shut off the charge transfer channel of the photodiode and reduce backflow and dark current; in addition, a fully depleted transfer channel can be formed to improve the charge transfer capability. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] The present invention will be further explained in the form of exemplary embodiments, which will be described in detail by means of the accompanying drawings. These embodiments are not restrictive, and in these embodiments, the same numerals represent the same structure.

[0016] Figure 1 The figure is a functional block diagram of an image sensor according to an embodiment of the present invention.

[0017] Figure 2 The figure is a circuit diagram of a pixel unit according to an embodiment of the present invention.

[0018] Figure 3 The figure is a schematic structural diagram of a substrate according to an embodiment of the present invention.

[0019] Figure 4 FIG. 4 is a schematic structural diagram of another substrate according to an embodiment of the present invention.

[0020] Figure 5 The figure is a schematic structural diagram of a substrate according to an embodiment of the present invention.

[0021] Figure 6FIG. 4 is a schematic structural diagram of another substrate according to an embodiment of the present invention.

[0022] Figures 7 to 17 It is a schematic diagram of the cross-sectional structure during the process of forming the image sensor according to the embodiment of the present invention. DETAILED DESCRIPTION

[0023] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some examples or embodiments of the present invention. For ordinary technicians in this field, the present invention can also be applied to other similar scenarios based on these drawings without creative work. Unless it is obvious from the language environment or otherwise explained, the same reference numerals in the figures represent the same structure or operation.

[0024] Figure 1 1 is a functional block diagram of an image sensor 100 according to an embodiment of the present invention. The image sensor 100 includes a pixel array 105 , a readout circuit 110 , a function logic 115 , and a control circuit 120 .

[0025] Pixel array 105 includes a two-dimensional ("2D") array of a plurality of image sensor pixels (e.g., pixels P1, P2, ... Pn). As shown, each pixel is arranged into rows (e.g., rows R1 to Ry) and columns (e.g., columns C1 to Cx) to acquire image data of a person, place, or object, which can then be used to render a 2D image of the person, place, or object.

[0026] After each pixel acquires its image data or image charge, the image data is read out by the readout circuit 110 and transmitted to the function logic 115. The readout circuit 110 may include amplification circuits, analog-to-digital conversion circuits ("ADC"), etc. The function logic 115 may simply store the image data or process the image data. In one embodiment, the readout circuit 110 may read out the image data one row at a time along the readout column line 102, or may use other techniques (not shown) to read out the image data, such as column / row readout, serial readout, or all pixels in parallel at the same time.

[0027] The control circuit 120 is connected to the pixel array 105 to control the pixel array 105. For example, the control circuit 120 can generate a shutter signal for controlling image acquisition. In one embodiment, the shutter signal can be a global shutter signal for simultaneously enabling all pixels within the pixel array 105 to simultaneously capture their respective image data during a single acquisition window. In other embodiments, the shutter signal can be a rolling shutter signal, whereby each row, column, or group of pixels is sequentially enabled during consecutive acquisition windows.

[0028] Figure 2 FIG. 1 is a circuit diagram of a pixel circuit 101 of a four-transistor (“4T”) pixel in a pixel array according to an embodiment of the present invention. The pixel circuit 101 is used to implement Figure 1 One possible pixel circuit architecture for each pixel within the pixel array 105. However, it should be understood that the embodiments described herein are not limited to 4T pixel architectures; they may also be applied to 3T designs, 5T designs, and various other pixel architectures.

[0029] exist Figure 2 In the embodiment, each pixel circuit 101 includes a photodiode PD, a transfer transistor T1, a reset transistor T2, a source follower transistor T3 ("SF"), and a selection transistor T4. In some embodiments, the number of photodiodes PD can be one, two, four, or other numbers. For example, four photodiodes PD can share a floating diffusion region FD. During operation, the transfer transistor T1 receives a signal TX, which transfers the charge accumulated in the photodiode PD to the floating diffusion region FD. In one embodiment, the floating diffusion node FD can be coupled to a storage capacitor for temporarily storing image charge.

[0030] The reset transistor T2 is coupled between the voltage source VDD and the floating diffusion region FD to reset the pixel (e.g., discharge or charge FD and PD to a preset voltage) under the control of the reset signal RST. The SF transistor T3 is coupled between the voltage source VDD and the selection transistor T4. The selection transistor T4 selectively couples the output of the pixel circuit 101 to the readout column line 102 under the control of the selection signal SEL.

[0031] In one embodiment, the TX signal, the RST signal, and the SEL signal are generated by the control circuit 120. For example, in an embodiment where the pixel array 105 operates with a global shutter, the global shutter signal is coupled to the gate of each transfer transistor T1 in the entire pixel array 105 to simultaneously start charge transfer from the photodiode PD of each pixel.

[0032] In order to improve the transmission performance of the transfer transistor T1, an embodiment of the present invention proposes a method for forming an image sensor. The following describes the method for forming an image sensor in conjunction with the relevant drawings. For the convenience of description, only a partial structure of the image sensor is described below.

[0033] like Figures 3 to 6 As shown, a substrate 200 is provided. For illustrative purposes only, commonly used substrate types are introduced below.

[0034] like Figure 3As shown, the substrate 200 may be a p-type doped substrate 200; by performing n-type doping ion implantation on the substrate 200, an n-type doping region 220 is formed in the middle layer of the substrate 200, which is used to form an n-type doping region (or carrier collection region) of the photodiode PD. The lower layer of the substrate 200 is a p-type doping region 210; and the upper layer of the substrate 200 is a p-type doping region 230.

[0035] like Figure 4 As shown, the substrate 200 may also be an n-type doped substrate 200; by performing p-type doping ion implantation on the substrate 200, a p-type doping region 220 is formed in the middle layer of the substrate 200, which is used to form a p-type doping region (or carrier collection region) of the photodiode PD. The lower layer of the substrate 200 is an n-type doping region 210; the upper layer of the substrate 200 is an n-type doping region 230.

[0036] like Figure 5 As shown, the substrate 200 may include a p-type doped first substrate 211; and an n-type doped epitaxial layer 212 epitaxially formed on the first substrate 211 to form an n-type doped region (or carrier collection region) of the photodiode PD; and a p-type doped epitaxial doped layer 213 epitaxially formed on the epitaxial doped layer 212.

[0037] like Figure 6 As shown, the substrate 200 may also include an n-type doped first substrate 211; and a p-type doped epitaxial doping layer 212 epitaxially formed on the first substrate 211 to form a p-type doped region (or carrier collection region) of the photodiode PD; and an n-type doped epitaxial doping layer 213 epitaxially formed on the epitaxial doping layer 212.

[0038] In addition to the substrate described above, the substrate 200 may also be of other types. No further description is given here. Figure 5 The substrate 200 is described as an example.

[0039] Furthermore, if Figures 7 to 9 , etching the substrate 200, forming interconnected first trenches 300 and n-type doping regions 201 of a plurality of photodiodes PD on the front side of the substrate 200; the n-type doping regions 201 of the plurality of photodiodes PD are arranged in a dispersed array.

[0040] Specifically, Figure 7 As shown, the substrate 200 is etched to form a first trench 300 with a relatively shallow depth on the front side of the substrate 200; Figure 8 As shown, a dielectric layer 301 is formed on the surface of the first trench 300; Fig. 9As shown, the first dielectric layer 301 at the bottom of the first trench 300 is etched; the substrate 200 is etched to increase the depth of the first trench 300; and the width of the first trench 300 is increased by side etching the substrate 200 to form the first trenches 300 interconnected at the bottom; as shown Fig.10 As shown, the dielectric layer 301 is removed. The dielectric layer 301 may be silicon oxide, silicon nitride, silicon oxynitride, or the like.

[0041] Furthermore, the embodiment of the present invention lists two different schemes for forming the trench isolation structure 410 and the photodiode PD.

[0042] In one embodiment, if Fig.11 As shown, a dielectric layer 401 is formed on the surface of the first trench 300, and polysilicon 402 is filled to form a trench isolation structure 410. The dielectric layer 401 or the polysilicon 402 contains p-type doping ions. Fig.12 As shown, by heat treatment, p-type doping ions are diffused into the substrate 200 to form a p-type doping region 202 of the photodiode PD, thereby forming the photodiode PD. The dielectric layer 401 can be silicon oxide, silicon nitride, silicon oxynitride, etc.

[0043] In another embodiment, if Fig.13 As shown, a p-type doped epitaxial layer 204 is formed on the surface of the first trench 300 by epitaxy, and forms a photodiode PD with the doped region 201. Fig.14 As shown, a dielectric layer 401 is formed on the surface of the first trench 300, and is filled with polysilicon 402 to form a trench isolation structure 410. The dielectric layer 401 may be silicon oxide, silicon nitride, silicon oxynitride, or the like.

[0044] The following Fig.11 and Fig.12 The embodiment of the present invention is taken as an example to further illustrate. Figures 15 to 17 A gate of a transfer transistor Tx having at least a portion of a channel in a vertical direction is formed above the photodiode PD.

[0045] Specifically, Fig.15 As shown, the doped epitaxial layer 230 is etched to form a second trench 500. Fig.16 As shown, a dielectric layer 501 is formed on the surface of the second trench 500, and polysilicon 502 is filled to form the gate of the transfer transistor Tx. The dielectric layer 501 can be silicon oxide, silicon nitride, silicon oxynitride, etc. Further, as Fig.17As shown, an n-type doping region 601 is implanted on the front side of the substrate 200; by controlling the voltage of the gate of the transfer transistor Tx, the charge of the photodiode PD is transferred to the n-type doping region 601 through the portion of the substrate between the n-type doping region 201 of the photodiode PD and the gate of the transfer transistor Tx. The n-type doping region 601 can be electrically connected to the floating diffusion region FD.

[0046] In the embodiment of the present invention, the doping concentration of the p-type doping region 202 is about 1E17; the doping concentration of the p-type doped epitaxial layer 213 is about 1E15. In the embodiment of the present invention, the gate of the transfer transistor Tx is located close to the isolation structure 410, which increases the distance between the transfer transistor Tx and the heavily doped region of the surrounding functional transistors, enhances the isolation effect, and utilizes the high-concentration doping characteristics of the p-type doping region 202 (or the isolation doping region) of the photodiode PD, thereby making it easier to shut off the charge transfer channel of the photodiode PD between the gate of the transfer transistor Tx and the p-type doped epitaxial layer 213 (such as Fig.17 region 701 in the middle), reducing backflow and dark current generation.

[0047] In some embodiments, ion implantation may be performed on the substrate 200 to form an n-type doped region (not shown in the figure) in the substrate 200 for connecting the transfer transistor Tx and the photodiode PD; when a voltage is applied to the gate Tx of the transfer transistor, at least one side of the gate of the transfer transistor Tx and a portion of the substrate 200 between the trench isolation structure 410 are completely depleted to form a fully depleted silicon-on-insulator (FDSOI) transistor, thereby improving the charge transfer capability.

[0048] It should be noted that some process steps are omitted in the above-mentioned formation process, such as exposure, development, chemical mechanical polishing, etc. The basic concepts have been described above. Obviously, for those skilled in the art, the above detailed disclosure is only an example and does not constitute a limitation of the present invention. Although it is not explicitly stated here, those skilled in the art may make various modifications, improvements and corrections to the present invention. Such modifications, improvements and corrections are suggested in the present invention, so such modifications, improvements and corrections still belong to the spirit and scope of the exemplary embodiments of the present invention. It should be understood that the embodiments described in the present invention are only used to illustrate the principles of the embodiments of the present invention. Other variations may also fall within the scope of the present invention. Therefore, as an example and not a limitation, the alternative configurations of the embodiments of the present invention may be regarded as consistent with the teachings of the present invention. Accordingly, the embodiments of the present invention are not limited to the embodiments explicitly introduced and described in the present invention.

Claims

1. A method for forming an image sensor, characterized in that: include: providing a substrate; forming a trench isolation structure and a photodiode on the front side of the substrate; Forming a gate of a transfer transistor above the photodiode, wherein at least a portion of the channel is in a vertical direction; Implanting a first doping region of a first conductivity type into the front surface of the substrate; By controlling the voltage of the gate, the charge of the photodiode is transferred to the first doping region through a portion of the substrate between the second doping region of the second conductivity type of the photodiode and the gate of the transfer transistor.

2. The method according to claim 1, characterized in that The providing of the substrate comprises: providing a first substrate of a second conductivity type; epitaxially forming a first doped epitaxial layer of a first conductivity type on the first substrate, for forming a third doped region of the first conductivity type of the photodiode; A second doped epitaxial layer of a second conductivity type is epitaxially formed on the first doped epitaxial layer.

3. The method according to claim 2, characterized in that The forming of a trench isolation structure and a photodiode on the front side of the substrate comprises: Etching the substrate to form a first trench; forming a first dielectric layer on the surface of the first trench; Etching the first dielectric layer at the bottom of the first trench; Etching the substrate to increase the depth of the first groove; By side etching the substrate, the width of the first trench is increased; removing the first dielectric layer; Epitaxially forming a third doped epitaxial layer of a second conductivity type on a surface of the first trench to form a photodiode; A second dielectric layer is formed on the surface of the first trench and filled with first polysilicon to form the trench isolation structure.

4. The method according to claim 2, characterized in that The forming of a trench isolation structure and a photodiode on the front side of the substrate comprises: Etching the substrate to form a first trench; forming a first dielectric layer on the surface of the first trench; Etching the first dielectric layer at the bottom of the first trench; Etching the substrate to increase the depth of the first groove; By side etching the substrate, the width of the first trench is increased; Forming a second dielectric layer on the surface of the first trench and filling it with first polysilicon; wherein the second dielectric layer or the first polysilicon contains doped ions of the second conductivity type; The second conductive type doping ions are diffused into the substrate through heat treatment, thereby forming the photodiode and the trench isolation structure.

5. The method according to claim 3 or 4, characterized in that The gate of the transfer transistor formed above the photodiode with at least a portion of the channel being in a vertical direction comprises: Etching the second doped epitaxial layer to form a second trench; A third dielectric layer is formed on the surface of the second trench and filled with second polysilicon to form the transfer transistor.

6. The method according to claim 1, characterized in that The providing of the substrate comprises: providing the substrate of the second conductivity type; A fourth doping layer of the first conductivity type is formed in the middle of the substrate by ion implantation, which is used to form the third doping region of the photodiode.

7. The method according to claim 6, characterized in that The forming of a trench isolation structure and a photodiode on the front side of the substrate comprises: Etching the substrate to form a first trench; forming a first dielectric layer on the surface of the first trench; Etching the first dielectric layer at the bottom of the first trench; Etching the substrate to increase the depth of the first groove; By side etching the substrate, the width of the first trench is increased; removing the first dielectric layer; Epitaxially forming a third doped epitaxial layer of a second conductivity type on a surface of the first trench to form a photodiode; A second dielectric layer is formed on the surface of the first trench and filled with first polysilicon to form the trench isolation structure.

8. The method according to claim 6, characterized in that The forming of a trench isolation structure and a photodiode on the front side of the substrate comprises: Etching the substrate to form a first trench; forming a first dielectric layer on the surface of the first trench; Etching the first dielectric layer at the bottom of the first trench; Etching the substrate to increase the depth of the first groove; By side etching the substrate, the width of the first trench is increased; Forming a second dielectric layer on the surface of the first trench and filling it with first polysilicon; wherein the second dielectric layer or the first polysilicon contains doped ions of the second conductivity type; By heat treatment, the doping ions of the second conductivity type are diffused into the first doped epitaxial layer, thereby forming the photodiode and the trench isolation structure.

9. The method according to claim 7 or 8, characterized in that The gate of the transfer transistor formed above the photodiode with at least a portion of the channel being in a vertical direction comprises: Etching the substrate to form a second trench; A third dielectric layer is formed on the surface of the second trench and filled with second polysilicon to form the transfer transistor.

10. The method according to claim 1, characterized in that The first doping region of the first conductivity type is located above the second doping region of the second conductivity type of the photodiode; and the first doping region of the first conductivity type is electrically connected to the floating diffusion region.

11. The method according to claim 1, characterized in that Also includes: Performing ion implantation on the substrate to form a second doping region of the first conductivity type in the substrate for connecting the transfer transistor and the photodiode; When a voltage is applied to the gate of the transfer transistor, at least one side of the gate of the transfer transistor and a portion of the substrate between the trench isolation structure are completely depleted.

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