Method for calculating parameter variation of MOSFET (Metal-Oxide-Semiconductor Field Effect Transistor) device under HCI stress action

Abstract

The invention discloses a method for calculating parameter variation of an MOSFET (Metal-Oxide-Semiconductor Field Effect Transistor) device under the action of HCI stress, which comprises the following steps of: when the MOSFET device works in a saturation region, respectively measuring Id-Vgs curves of a forward circuit and a reverse circuit in a circuit, applying the HCI stress to the device, selecting a corresponding most serious stress condition to apply the HCI stress for a certain time, generating an interface state and an oxide layer defect on a Si / SiO2 interface, and calculating the parameter variation of the MOSFET device under the action of the HCI stress. The source / drain series resistance value and the effective migration rate of the channel are changed; repeating the steps, measuring Id-Vgs curves of the forward circuit and the reverse circuit under each HCI stress time node, and calculating to obtain a change relation of a function f along with Id; and calculating parameters VT, Rs and Rd of the HCI stress at each time node, obtaining corresponding parameter variations Delta VT, Delta Rs and Delta Rd, and calculating the variation of the mobility under the same measurement voltage condition. According to the method, VT, Rs, Rd and mueff variations caused by the HCI effect in the nano small-size MOSFET device can be quickly and accurately calculated.

Description

Technical Field

[0001] The invention relates to a semiconductor device parameter measurement technology, and in particular to a method for calculating parameter variation of a MOSFET device under HCI stress. Background Art

[0002] With the development of MOSFET technology, the reduction of gate length has significantly improved device performance, but it also faces more severe reliability issues, such as negative bias temperature instability (NBTI), time-dependent breakdown of gate oxide (TDDB) and hot carrier injection (HCI) effect. The HCI effect has always been one of the main topics in MOSFET reliability research. When the source-drain voltage is applied to the MOSFET, the electrons in the device channel will be accelerated by the electric field, gain a lot of energy, and become "hot carriers". These hot carriers cause impact ionization or electron-electron scattering effects, resulting in interface states and oxide layer defects, such as Figure 1 As shown in Figure 2, the interface states and oxide layer defects generated by the HCI effect are mainly concentrated near the drain region. These defects cause the threshold voltage (V T ), source-drain series resistance (R sd ) and channel mobility (μ eff ) and other parameters change, resulting in a decrease in device performance, which seriously restricts the life of the device.

[0003] Early studies by MM De Souza et al. found that defects caused by the HCI effect can cause R sd Later, some studies on the HCI effect in ultrashort channel devices mainly focused on the defect-induced I dsat 、V T and μ, while ignoring the changes in R sd JPCampbell et al. believed that this may be due to some traditional extraction R sd The method of extracting R by measuring independent devices is limited in short-channel devices and has low accuracy. sd The method of value, and R was observed under the HCI effect sd However, these methods ignore the asymmetry caused by electrical stress, manufacturing process and device layout. At the same time, the defects caused by the HCI effect are mainly concentrated near the drain area, which makes the degradation of source and drain resistances very different. How to independently characterize the HCI effect on the source (R s ) / drain series resistance (R d ) and accurately calculate the threshold voltage (V T ) and channel mobility (μ eff ) remains an important challenge. Summary of the invention

[0004] Purpose of the invention: The purpose of the present invention is to solve the deficiencies in the prior art and provide a method for calculating the parameter changes of MOSFET devices under HCI stress. By measuring the parameters of a single device, V is extracted separately using the current and transconductance ratio. T , R s and R d value, calculate the μ caused by HCI effect eff The change amount can more accurately observe the impact of HCI effect on device parameters caused by defects near the drain.

[0005] Technical solution: A method for calculating the parameter change of a MOSFET device under HCI stress of the present invention comprises the following steps:

[0006] Step 1: When the MOSFET device is working in the saturation region, measure the I of the forward circuit and the reverse circuit in the circuit respectively. d -V gs Curve, and then get the saturation region current equation, the specific method is:

[0007] Apply bias to the nano MOSFET device to make it work in the saturation region, and its current equation is as follows:

[0008] I d =κ(V gs -V T ) 2 (1+λV ds ) (1)

[0009]

[0010] Among them, V gs is the gate voltage, V ds is the drain voltage, V T is the threshold voltage, W is the channel width, L is the channel length, μ eff is the effective channel mobility, C OX is the gate oxide capacitance per unit area, λ is the channel length modulation parameter (range 0.001~0.05V -1 );

[0011] Since the source and drain series resistance (R s and R d ) can be regarded as being connected in series with the intrinsic device, R s and R d The current flowing through the MOSFET is equal to the channel current of the intrinsic device. Then the intrinsic voltage (V GS and V DS ) and the applied bias voltage (V gs and Vds ) is:

[0012] I d =κ(V GS -V T ) 2 (1+λV DS ) (3)

[0013] V GS =V gs -I d R s|d (4)

[0014] V DS =V ds -I d (R s +R d ) (5)

[0015] Among them, R s|d is R in the forward circuit s and R in the reverse circuit d , since R in formula (3) d and R s The resulting voltage drop λV DS , can be ignored, so the following formula is obtained:

[0016]

[0017] Combining equations (3), (4) and (6), the saturation region current equation is:

[0018] I d =κ(V gs +I d R s|d -V T ) 2 (1+λV ds ) (7)

[0019] Step 2: Apply HCI stress to the nano MOSFET device. Select the most severe stress condition in the nano small size device. After applying HCI stress for a certain period of time, 2 The interface generates interface states and oxide layer defects, which leads to a decrease in drain current and an increase in threshold voltage. At the same time, the source / drain series resistance value and the channel effective mobility change. Since the defects are mainly concentrated near the drain area, the change in drain resistance is greater than that in source resistance, such as Figure 1 As shown; here, defects are generated at the interface through step 2, causing changes in parameters;

[0020] Step 3: Repeat step 1 to measure the forward circuit and reverse circuit I at each HCI stress time node.d -V gs Curve, through I d V gs Derivative, calculate the transconductance g m Follow me d The relationship between the function f and I d The change relationship f(I d )[V];

[0021] Step 4: Calculate the parameter V of HCI stress at each time node T , R s and R d , and obtain the corresponding parameter change ΔV T , ΔR s and ΔR d , the specific method is:

[0022] First, combine formulas (8), (9) and (10) to derive the simultaneous extraction parameter V T , R s and R d f function;

[0023]

[0024] Then, R is extracted from the slopes of the forward and reverse circuits using the f function. d and R s value, extract V from the intercept T value;

[0025]

[0026] Get accurate V T , R s and R d After the parameters are calculated, the parameter change ΔV of each parameter at HCI degradation time of 100s, 1000s, 2500s, 4000s and 6000s is calculated. T , ΔR s and ΔR d ;

[0027] Step 5: Under the same measurement voltage conditions, calculate the change in mobility Δμ eff , the specific method is:

[0028] At the same measurement voltage (V gs 、V ds ), assuming that W, L and Cox remain unchanged, and assuming that the parameters before and after HCI stress are (V T ,I d , R d|s , μ eff ) and (V′T , I′ d , R′ d|s , μ′ eff ), the current ratio is:

[0029]

[0030] The mobility ratio is:

[0031]

[0032] Since the source resistance does not change with HCI stress time, the mobility of the forward circuit is calculated as follows:

[0033]

[0034] The ratio of mobility reduction is:

[0035]

[0036] Further, the details of step 3 are:

[0037] First use I d V gs Derivative, we get the transconductance g m ,

[0038]

[0039] Then, combining formulas (7) and (8), we get the current transconductance ratio:

[0040]

[0041] The f function is:

[0042]

[0043] Beneficial effect: Since the interface states and oxide layer defects generated by HCI stress are unevenly distributed along the channel and are mainly concentrated in the drain area, the present invention mainly considers the separation of source and drain parameters when analyzing the parameter changes caused by HCI; by measuring the basic parameters of MOSFET nanodevices such as current and voltage, the V T , R s , R d and μ eff The present invention uses the f function to measure the source current value and the drain current value to obtain the separated V T , R d and R s value, and from this we can deduce μ effThe measurement accuracy of the present invention is high, and it can be widely used in various MOSFET device structures such as CMOS, SONOS, FLASH, etc. The experimental method is simple and easy to operate;

[0044] In summary, the present invention can quickly and accurately calculate the V caused by the HCI effect in nano-sized small-size MOSFET devices. T , R s , R d and μ eff Amount of change. BRIEF DESCRIPTION OF THE DRAWINGS

[0045] Figure 1 This is a schematic diagram of interface states and oxide layer defects generated by hot carrier impact ionization and electron-electron scattering effects after a certain period of HCI stress is applied to the MOSFET device.

[0046] Figure 2 This is the circuit diagram for measuring MOSFET device parameters.

[0047] Figure 3 It is the overall flow chart of the present invention.

[0048] Figure 4 is the I in the positive and negative measurement circuits of the 120nm device in the embodiment. d -V gs curve.

[0049] Figure 5 is the I of the 120nm device at each HCI stress time node in the embodiment. d -V gs curve.

[0050] Figure 6 is the fI of the 120nm device at each HCI stress time node in the embodiment d curve.

[0051] Figure 7 In the embodiment fI d The fitting straight line of .

[0052] Figure 8 is the threshold voltage V in the embodiment T Changes of values ​​with HCI stress time.

[0053] Fig. 9 In the embodiment, R s and R d Changes of values ​​with HCI stress time.

[0054] Fig.10 is the change in drain resistance and average threshold voltage in the embodiment, ΔR d and ΔVT Variation of HCI stress with time.

[0055] Fig.11 is the mobility change Δμ in the embodiment eff Variation of HCI stress with time. DETAILED DESCRIPTION

[0056] The technical solution of the present invention is described in detail below, but the protection scope of the present invention is not limited to the embodiments.

[0057] like Figure 3 As shown, the method for calculating the parameter change of a MOSFET device under HCI stress of the present invention comprises the following steps:

[0058] Step 1: When the MOSFET device is working in the saturation region, measure the I of the forward circuit and the reverse circuit in the circuit respectively. d -V gs Curve, and then get the saturation region current equation, the specific method is:

[0059] Apply bias to the nano MOSFET device to make it work in the saturation region, and its current equation is as follows:

[0060] I d =κ(V gs -V T ) 2 (1+λV ds ) (1)

[0061]

[0062] Among them, V gs is the gate voltage, V ds is the drain voltage, V T is the threshold voltage, W is the channel width, L is the channel length, μ eff is the effective channel mobility, C OX is the gate oxide capacitance per unit area, λ is the channel length modulation parameter;

[0063] like Figure 2 As shown, the source series resistor R s and the drain series resistor R d The current flowing through the MOSFET is equal to the channel current of the intrinsic device. Then the intrinsic voltage (V GS and V DS ) and the external bias voltage V gs and V ds The relationship is:

[0064] I d =κ(V GS -VT ) 2 (1+λV DS ) (3)

[0065] V GS =V gs -I d R s|d (4)

[0066] V DS =V ds -I d (R s +R d ) (5)

[0067] Among them, R s|d is R in the forward circuit s and R in the reverse circuit d , since R in formula (3) d and R s The resulting voltage drop λV DS Ignore it, so we get the following formula:

[0068]

[0069] Combining equations (3), (4) and (6), we can get the saturation current equation I d -V gs for:

[0070] I d =κ(V gs -I d R s|d -V T ) 2 (1+λV ds ) (7)

[0071] In the above formula, V T is the threshold voltage.

[0072] Figure 2 V GS and V DS is the intrinsic voltage of the device circuit, V gs and V ds is the external bias voltage of the device circuit, Figure 2 (a) is the forward measurement circuit, and (b) is the reverse measurement circuit. In the forward circuit, the source is grounded and the drain is connected to a 1.5V forward voltage to make the device work in the saturation region. The I d With V gs In the reverse circuit shown in Figure 2(b), the drain is grounded, the source voltage is kept at 1.5V, and the source current is measured with V gs The change curve.

[0073] Step 2: Apply HCI stress to the nano MOSFET device. After applying HCI stress for a certain period of time under the most severe stress condition, 2 Interface states and oxide layer defects are generated at the interface, resulting in a decrease in drain current and an increase in threshold voltage, as well as changes in source / drain series resistance and channel effective mobility.

[0074] Step 3: Repeat step 1 to measure the forward circuit and reverse circuit I at each HCI stress time node. d -V gs Curve (such as Figure 2 shown), and through I d V gs Derivative, calculate the transconductance g m Follow me d The relationship between the function f and I d The change relationship f(I d )[V].

[0075] Step 4: Calculate the parameter V at each time node of HCI stress (e.g. 100s, 1000s, 2500s, 4000s and 6000s) T , R s and R d , and obtain the corresponding parameter change ΔV T , ΔR s and ΔR d , the specific method is:

[0076] First, combine formulas (8), (9) and (10) to derive the simultaneous extraction parameter V T , R s and R d f function;

[0077]

[0078] Then, R is extracted from the slopes of the forward and reverse circuits using the f function. d and R s value, extract V from the intercept T value;

[0079]

[0080]

[0081] Get accurate V T , R s and R d After the parameters are calculated, the parameter change ΔV of each parameter at different HCI degradation time nodes is finally calculated.T , ΔR s and ΔR d ;

[0082] Step 5: Under the same measurement voltage conditions, calculate the change in mobility Δμ eff , the specific method is:

[0083] At the same measured gate voltage V gs and drain voltage V ds Under the assumption that W, L and Cox remain unchanged, the parameters before and after HCI stress are (V T ,I d , R d|s , μ eff ) and (V′ T , I′ d , R′ d|s , μ′ eff ), the current ratio is:

[0084]

[0085] The mobility ratio is:

[0086]

[0087] Since the source resistance does not change with HCI stress time, the mobility ratio of the forward circuit is calculated:

[0088]

[0089] Finally, the mobility decreases by:

[0090]

[0091] like Figure 2 As shown in the figure, in the forward circuit, the source is grounded and the drain is connected to a 1.5V forward voltage to make the device work in the saturation region. The I d With V gs In the reverse circuit, the drain is grounded and the source voltage is kept at 1.5V. The source current at each HCI time node is measured with V gs The change curve of; Details of step 3:

[0092] First use I d V gs Derivative, we get the transconductance g m ,

[0093]

[0094] Then, combining formulas (7) and (8), we get the current transconductance ratio:

[0095]

[0096] Among them, the f function is:

[0097]

[0098] Example

[0099] The MOSFET device parameters used in this embodiment are L (channel length) = 120nm, W (channel width) = 10μm, T OX (Oxide layer thickness) = 2.6nm, N A (Channel doping) = 1E20 / cm 3 The specific implementation process of this embodiment is as follows:

[0100] Step 1: Apply bias voltage to the nano MOSFET device to make the device work in the saturation region and measure the I of the forward and reverse circuits respectively. d -V gs Curve; In the forward circuit, the source is grounded and the drain is connected to a 1.5V forward voltage to make the device work in the saturation region. The gate voltage (V gs ) gradually increases from 0.05V to 1V, and the current I is measured every time the change is 0.05V d , get I d -V gs Curve; In the reverse circuit, the drain is grounded, the source voltage is kept at 1.5V, and the gate voltage (V gs ) gradually increases from 0.05V to 1V, and the current I is measured every time the change is 0.05V d , and the drain current I d -V gs curve.

[0101] The measured results are as follows Figure 4 As shown (measured voltage V ds =1.5V, solid is the forward circuit curve, hollow is the reverse circuit curve), at the same voltage (V ds 、V gs ), the currents measured in the forward and reverse circuits are not completely consistent. ds =1.5V, V gs =1V, the current difference is 0.066mA, indicating that there is a slight difference between the source and drain resistances.

[0102] Step 2: Apply HCI stress to the MOSFET device to produce hot carrier degradation. The HCI degradation mechanism is as follows: Figure 1 Different from the HCI degradation mechanism of long channel devices, in nano-sized devices, the most serious degradation condition has become Vds =V gs , impact ionization and electron-electron scattering mechanisms exist simultaneously, resulting in a large range of interface states and oxide layer defects, but they are still concentrated near the drain. This experiment was conducted under the worst stress conditions, V ds =1.5V, V gs =1.5V, and select several stress time nodes of 100s, 1000s, 2500s, 4000s and 6000s for parameter measurement.

[0103] Step 3: At each HCI stress time node, measure the I of the forward and reverse circuits respectively. d -V gs Curve, calculate the transconductance (g m ) with current (I d ) changes, and the f function changes with the current I d At each stress time node, select the voltage V ds =1.5V, gate voltage (V gs ) gradually increases from 0.05V to 1V, and the current I is measured every time the change is 0.05V d , get I d -V gs Curves, such as Figure 5 shown.

[0104] Figure 5 The solid center represents the I measured in the forward circuit. d -V gs The hollow curve represents the I measured in the reverse circuit. d -V gs Curve. It can be seen from the figure that with the increase of stress time t, the interface state and oxide layer defects increase, which aggravates HCI degradation (HCI degradation condition is: V ds =V gs =1.5V), current I d Gradually decrease. d V gs Derivative, calculate the relationship between transconductance and current, and thus get the function f with I d The measured parameter V gs ,I d and g m Substitute into the f function formula and calculate the corresponding I d The f function value is obtained by changing the f function with I d The change curve of Figure 6 As shown (HCI degradation condition is: V ds =V gs =1.5V), Figure 6The f function curve of the forward circuit in (a) does not change with the change of time nodes. Figure 6 (b) The f function curve of the reverse circuit shows that the f value increases significantly with the increase of HCI stress time.

[0105] Step 4: According to theoretical derivation, we get the f function and parameter V T , R s and R d Relationship, using the f function to extract R from the slope of the forward and reverse circuits respectively d and R s value, extract V from the intercept T value. Figure 7 Describes the fI at all HCI stress time nodes in both the positive and negative measurement circuits d Curve, in order to ensure that the device works in the saturation region, select V gs Draw a fitting straight line at the points between 0.6V and 1V. Figure 7 It can be seen that the f function in this range is consistent with I d It is approximately a linear relationship, and the red line in the figure is the fitted straight line. The solid curve represents the forward circuit, and the slope of the fitted straight line is R s , the hollow curve represents the reverse circuit, and the slope of the fitting line is R d , the intercept is V T , Figure 8 Given the threshold voltage V T As the HCI stress time changes, the hollow box represents the threshold voltage of the forward circuit, and the solid box represents the threshold voltage of the reverse circuit. The threshold voltage values ​​of the forward and reverse circuits are similar, so the average value is taken, such as Figure 8 The solid triangle in the graph represents the average value of the threshold voltage. As the HCI stress time increases, the average value of the threshold voltage increases.

[0106] In this embodiment, R d and R s The changes of HCI stress time are as follows Fig. 9 , in the initial device (t = 0s), R d and R s If the values ​​of R are different, it means that the device may have asymmetry caused by electrical stress, manufacturing process and device layout. s The value of R is basically unchanged with the increase of HCI stress time, indicating that there are few defects caused by HCI effect in the source electrode, and the influence on the parameters can be basically ignored. d The increase in the R d Changes in R d An important component of the drain extension region is the cover resistance (R ov), R ov In the accumulation layer below the gate, it is more sensitive to defects and increases with the increase of defects, resulting in a drain resistance R d Keep getting bigger. Fig.10 Given R d The change in (ΔR d ) changes with HCI stress time. When degraded to 6000s, ΔR d The value reached 5.3%.

[0107] Under the same measurement voltage conditions, calculate the change in mobility at each HCI stress time node. Fig. 9 The calculation results show that R s It is basically not affected by the HCI effect. Therefore, when calculating the change in mobility, the forward circuit is selected. According to the formula derived from the theory, the mobility change Δμ of the device at each HCI stress time node is calculated. eff ,like Fig.11 As shown in the figure, the mobility decreases continuously with the increase of stress time, and the reduction ratio reaches 15% at 6000s.

Claims

1. A method for calculating the parameter change of a MOSFET device under HCI stress, characterized in that: The following steps are involved: Step 1: When the MOSFET device is working in the saturation region, measure the I of the forward circuit and the reverse circuit in the circuit respectively. d -V gs Curve, and then get the saturation region current equation I d -V gs , the specific method is: Apply bias voltage to the nano MOSFET device to make it work in the saturation region. d -V gs The equation is as follows: I d =κ(V gs -V T ) 2 (1+λV ds ) (1) Among them, V gs is the gate voltage, V ds is the drain voltage, W is the channel width, L is the channel length, μ eff is the effective channel mobility, C OX is the gate oxide capacitance per unit area, λ is the channel length modulation parameter; Source series resistance R s and the drain series resistor R d The current flowing through the MOSFET is equal to the channel current of the intrinsic device, then the intrinsic voltage (V GS and V DS ) and the external bias voltage V gs and V ds The relationship is: I d =κ(V GS -V T ) 2 (1+λV DS ) (3) V GS =V gs -I d R s|d (4) V DS =V ds -I d (R s +R d ) (5) Among them, R s|d is R in the forward circuit s and R in the reverse circuit d , since R in formula (3) d and R s The resulting voltage drop λV DS Ignore it, so we get the following formula: Combining equations (3), (4) and (6), we can get the saturation current equation I d -V gs for: I d =κ(V gs +I d R s|d -V T ) 2 (1+λV ds ) (7) In the above formula, V T is the threshold voltage; Step 2, applying HCI stress to the nano MOSFET device, selecting the most severe stress condition and applying HCI stress for a certain period of time, generating interface states and oxide layer defects at the Si / SiO2 interface, resulting in a decrease in drain current, an increase in threshold voltage, and changes in source / drain series resistance and channel effective mobility; Step 3: Repeat step 1 to measure the forward circuit and reverse circuit I at each HCI stress time node. d -V gs curve, and through I d V gs Derivative, calculate the transconductance g m Follow me d The relationship between the function f and I d The change relationship f(I d )[V]; Step 4: Calculate the parameter V of HCI stress at each time node T , R s and R d , and obtain the corresponding parameter change ΔV T , ΔR s and ΔR d , the specific method is: First, combine formulas (8), (9) and (10) to derive the simultaneous extraction parameter V T , R s and R d f function; Then, R is extracted from the slopes of the forward and reverse circuits using the f function. d and R s value, extract V from the intercept T value; Get accurate V T , R s and R d After the parameters are calculated, the parameter change ΔV of each parameter at different HCI degradation time nodes is finally calculated. T , ΔR s and ΔR d ; Step 5: Under the same measurement voltage conditions, calculate the change in mobility Δμ eff , the specific method is: At the same measured gate voltage V gs and drain voltage V ds Assuming W, L and C OX Keep unchanged, assuming that the parameters before and after HCI stress are (V T ,I d , R d|s , μ eff ) and (V′ T , I′ d , R′ d|s , μ′ eff ), the current ratio is: The mobility ratio is: Since the source resistance does not change with HCI stress time, the mobility ratio of the forward circuit is calculated: Finally, the mobility decreases by:

2. The method for calculating parameter variation of a MOSFET device under HCI stress according to claim 1, characterized in that: Details of step 3: First use I d V gs Derivative, we get the transconductance g m , Then, combining formulas (7) and (8), we get the current transconductance ratio: Among them, the f function is:

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