Improved FPGA-based storage system platform and operation method thereof

Abstract

The invention relates to an improved FPGA (Field Programmable Gate Array)-based storage system platform and an operation method thereof. The storage system platform comprises an FPGA (Field Programmable Gate Array) master control module which is mounted with a DDR4 (Double Data Rate 4) memory module and serves as a control core of the storage system platform to control high-speed reading of data of external equipment; the communication module is used for reading data of external equipment through an Aurora communication interface and transmitting the data outwards through a 10-gigabit optical port; the NVMe storage module interacts with the FPGA main control module through a hard core PCIe bus and stores external data; the health management module monitors the operation state of the storage system platform; the clock module is used for providing clock management for the work of the storage system platform; the power supply module is used for providing power management for the work of the storage system platform; the FPGA main control module is provided with a file management system used for file management and assisting the FPGA main control module in data management.

Description

Technical Field

[0001] The present invention relates to the field of computers, and in particular to an improved FPGA-based high-performance, large-capacity storage system platform and an operation method thereof. Background Art

[0002] With the rapid development of modern society, information technology involves many fields such as aerospace, energy and power, rail transportation, etc. The requirements for fast and real-time storage of large amounts of information data are getting higher and higher. Therefore, high-performance large-capacity storage / system equipment platforms are gradually emerging. Research and development in this area has been widely used, especially in the application direction and aspects of vehicle-mounted and airborne massive data storage.

[0003] At present, the mainstream storage platform devices on the market are based on the central processing unit CPU for data storage, and the storage medium is a mechanical hard disk. Its computing and storage capabilities are limited, and it is difficult to ensure fast and real-time storage of large amounts of data.

[0004] A small number of devices use solutions that mount DDR3 memory. They have few PCIe IP hard core resources and use mSATA disks, which results in insufficient computing and storage capabilities. Insufficient PCIe hard cores limit the storage rate and capacity of the storage platform, resulting in limited applications. In addition, in applications that require high performance and large capacity, if the storage performance and capacity requirements are to be met, additional equipment, material and labor costs are required.

[0005] In view of the above problems, the inventor of the present invention proposes a new control method for a high-performance and large-capacity storage device platform based on FPGA.

[0006] The information included in this background section of the present specification, including any references cited herein and any description or discussion thereof, is included for technical reference purposes only and is not to be construed as subject matter that will limit the scope of the present invention. Summary of the invention

[0007] The present invention is proposed in view of the above and other more concepts.

[0008] In order to solve the problem of high-performance, fast and large-capacity storage of large-capacity information and data collected, the present invention proposes a control system architecture of a high-performance and large-capacity storage platform (storage system platform) based on FPGA. The storage system platform can integrate up to 6 PCIe IP hard cores, mainly including FPGA master control module, file management system, DDR4 module, communication module, NVMe storage module, health management module, clock module and power supply module.

[0009] In the present invention, an FPGA master control module is used in combination with DDR4 memory and multiple hard-core PCIe IP protocols to simultaneously connect multiple NVMe M.2 hard disks for parallel storage, replacing the traditionally used computer CPU. Combined with other hardware configurations of the present invention, a high-performance, large-capacity storage platform solution that is far superior to the prior art can be achieved.

[0010] According to one aspect of the present invention, an improved FPGA-based storage system platform is provided, comprising: an FPGA master control module, the FPGA master control module is mounted with a DDR4 memory module, and is configured to serve as the control core of the storage system platform, and is used to control high-speed reading of data from external devices; a communication module, which is configured to read data from external devices through an Aurora communication interface, and transmit data to the outside through a 10 Gigabit optical port; an NVMe storage module, which is configured to interact with the FPGA master control module through a hard-core PCIe bus to store data from the external device; a health management module, which is configured to monitor the operating status and parameters of the storage system platform and transmit them to the FPGA master control module; a clock module, which is configured to provide clock management for the storage system platform; and a power supply module, which is configured to provide power management for the storage system platform; wherein the FPGA master control module is configured with a file management system, and the file management system is configured to manage files and assist the FPGA master control module in data management.

[0011] According to one embodiment, the DDR4 memory module is a DDR4 SDRAM with a maximum capacity in the range of 16GB-128GB.

[0012] According to one embodiment, the PCIe bus is a 6-lane PCIe Gen3 IP hard core.

[0013] According to one embodiment, the NVMe storage module is 6 NVMe solid-state drives, which are configured to combine with the 6-way PCIe Gen3 IP hard core to achieve parallel storage of data received by the FPGA main control module.

[0014] According to one embodiment, the NVMe solid state drive is an NVMe M.2 solid state drive.

[0015] According to one embodiment, the Aurora communication interface supports a maximum of 8 channels to simultaneously read data from the external device.

[0016] According to one embodiment, the storage system platform is a high-speed, large-capacity storage platform that supports a maximum storage speed of more than 10 GB / s and a maximum storage capacity of 48 TB.

[0017] According to an embodiment, the storage system platform is a storage system platform used in a data center, such as an Internet data center or a local area network data center.

[0018] According to another aspect of the present invention, a method for operating data storage of a storage system platform is also disclosed, comprising the following steps: S1, powering on the storage system platform and completing the initialization operation of each module of the storage system platform; S2, configuring an Aurora communication interface for data storage transmission for the storage system platform, which is configured to adopt the Aurora64B / 66B protocol and support up to 8 channels to simultaneously read data from an external device of the storage system platform; S3, receiving a data storage instruction from the external device and sending it to an FPGA master control module of the storage system platform to start reading data from the external device; S4, the external master control device controls the FPGA master control module to create a file system through the Aurora communication interface and starts receiving the data; S5, while starting the reception of the data, the FPGA master control module creates a file management system to manage files and data; S6, storing the data in parallel in an NVMe storage module in the form of an NVMe SSD hard disk through a hard-core multi-channel PCIe bus; S7, receiving a stop storage instruction for the data of the external device; S8, after receiving the stop storage instruction, terminating the update of the data list and terminating the storage of the data.

[0019] According to an embodiment, the storage system platform is the storage system platform described above.

[0020] According to one embodiment, the FPGA main control module is configured to selectively transmit the operating status and parameters to a host computer of the storage system platform or an external monitoring system.

[0021] According to one embodiment, the FPGA master control module is a KU series FPGA, such as KU system FPGA-KU1115.

[0022] For example, an NVMe storage module can include up to 6 NVMe M.2 solid-state drives. The fastest storage speed of a single NVMe M.2 solid-state drive is 2.1GB / s. The maximum storage speed of these 6 drives exceeds 12GB / s, and the maximum storage capacity supports 48TB of storage.

[0023] The specifications, power consumption and capacity of DDR4 memory are far superior to those of DDR3 memory. For example, the starting frequency of DDR3 memory is only 800MHz, and the maximum frequency is 2133MHz, while the starting frequency of DDR4 memory is 2133MHz, and the maximum frequency can reach 3000MHz; the working voltage of DDR3 memory is 1.5V, which consumes a lot of power, and is prone to heat and frequency reduction, which affects performance, while the working voltage of DDR4 memory is 1.2V or even lower, and the memory working stability is higher, and the frequency reduction caused by heat will basically not occur; the maximum capacity of a single DDR3 is 64GB, while the maximum capacity of a single DDR4 is 128GB or higher.

[0024] The FPGA master control module is the control core of the storage system platform. It reads the data of external devices through the Aurora communication interface and saves it in the storage module. The file management system creates a file system management function in the master control module to assist the master control module in data management. The DDR4 module is 2 groups of 64-bit data width, each group mounts 4 memory particles, supports a maximum memory size of 16GB, and has a transmission rate of 2133Mbps, providing the FPGA master control module with faster response speed and more powerful data processing capabilities. The communication module mainly receives data for the Aurora 64B / 66B protocol, and transmits data to the outside through the 10G optical port. The NVMe storage module is implemented based on the PCIe bus of the FPGA. The external interface is an AXI-like interface, which is simple to operate and has a back pressure mechanism to ensure reliable data storage. The clock and power supply module provides the necessary clock and power supply tracks for the normal operation of the system. The health management module monitors the voltage, current, temperature and other states of the entire system, and transmits them to the FPGA master control module through the serial port. The master control module reports the health information to the external device for human-computer interaction.

[0025] The storage system platform uses an FPGA module such as KU system FPGA-KU1115 as the main controller, supports up to 6 PCIe Gen3 IP hard cores, and can carry 6 NVMe M.2 disks for parallel storage at the same time. A single disk supports up to 8TB, and the total capacity supports up to 48TB. It communicates with external control devices through the LRM connector, and stores its data using the Aurora 64B / 66B protocol with a data bit width of x8 mode. Then, the received data is stored in parallel in 6 NVMe solid-state drives through the PCIe bus. The system has an onboard DDR4-16GB memory size, which provides it with high-performance computing and storage capabilities. It switches out the 10G optical port and the Gigabit network port communication interface through the 2-way GTH high-speed interface to interact with peripherals, and leads out the RS232 and JTAG serial ports to the J30J connector for debugging and burning programs. It is equipped with a 256MB SPI Flash for loading the boot program. Health management uses APM32F405 to communicate with FPGA through IPMII bus. The clock mainly uses 100MHz, 156.25Mhz differential clock, 25Mhz, 8Mhz crystal and 50Mhz single-ended clock to ensure the clock required for normal operation of each chip. The power module mainly uses ADI's LTM4650 and LTM4644 to ensure the power supply requirements of the system. In addition, the storage of remote data is realized through optical modules, supporting a maximum distance of 10Km.

[0026] Compared with the prior art, one or more embodiments of the present invention can achieve at least some of the following beneficial effects:

[0027] (1) An FPGA master control module is used as the control core of the storage system platform of the present invention, such as the KU series FPGA, which has strong computing and processing capabilities, rich resources, and supports up to 6 PCIe Gen3 IP hard cores, greatly reducing the difficulty for developers and reducing human, material and financial resources, and meeting the system's high-performance and large-capacity storage functions.

[0028] (2) FPGA mounts DDR4 memory, such as DDR4 SDRAM (mounted 16GB), which greatly improves the platform system's response speed and data storage capacity.

[0029] (3) In order to store data efficiently, at high speed and in large capacity, the storage system platform of the present invention creates a file management system, which greatly improves the data reading and writing capabilities of the system.

[0030] More embodiments of the present invention can also achieve other advantageous technical effects that are not listed one by one. These other technical effects may be partially described below and are predictable and understandable to those skilled in the art after reading the present invention. BRIEF DESCRIPTION OF THE DRAWINGS

[0031] The above features and advantages of these embodiments and other features and advantages and the manner in which they are achieved will become more apparent, and embodiments of the present invention may be better understood, by referring to the following description taken in conjunction with the accompanying drawings, in which:

[0032] Figure 1 It is a schematic principle block diagram showing the system architecture and configuration of a high-performance, large-capacity storage platform based on FPGA according to an embodiment of the present invention.

[0033] Figure 2 is a schematic block diagram showing the control and system configuration of an exemplary embodiment of a high-performance, large-capacity storage platform based on an FPGA according to the present invention.

[0034] Figure 3 The invention is a flowchart showing a schematic data storage of a high-performance, large-capacity storage platform based on FPGA according to an embodiment of the present invention. DETAILED DESCRIPTION

[0035] In the following description of the drawings and specific embodiments, the details of one or more embodiments of the present invention will be described. Other features, objects and advantages of the present invention will be apparent from these descriptions, drawings and claims.

[0036] It should be understood that the illustrated and described embodiments are not limited in application to the details of the construction and arrangement of the components set forth in the following description or illustrated in the accompanying drawings. The illustrated embodiments may be other embodiments and may be implemented or executed in various ways. Each example is provided by explaining the disclosed embodiments rather than limiting them. In fact, it will be apparent to those skilled in the art that various modifications and variations may be made to the embodiments of the present invention without departing from the scope or essence of the present invention. For example, a feature illustrated or described as part of one embodiment may be used together with another embodiment to still produce another embodiment. Therefore, the present invention discloses such modifications and variations that fall within the scope of the appended claims and their equivalent elements.

[0037] Likewise, it is understood that the phrases and terms used herein are for descriptive purposes and should not be considered restrictive. The use of "include," "comprise," or "have" and variations thereof herein is intended to be open-ended to include the items listed thereafter and their equivalents and additional items.

[0038] The present invention will be described in more detail below with reference to specific embodiments of the present invention.

[0039] Figure 1It is a schematic principle block diagram showing the system architecture and configuration of a high-performance, large-capacity storage platform based on FPGA according to an embodiment of the present invention.

[0040] like Figure 1 As shown, the main functional modules of the FPGA-based high-performance large-capacity storage platform (storage system platform) of this embodiment include: FPGA master control module, file management system, DDR4 module, communication module, NVMe storage module, health management module, clock module and power supply module.

[0041] In the present invention Figure 1 In the FPGA-based high-performance, large-capacity storage platform of the illustrated embodiment, an FPGA master control module (replacing the computer CPU) is used as the control core of the system, which can be configured to read data from external devices through the Aurora communication interface and store the data in the storage module.

[0042] The file management system is configured to be formed in the FPGA master control module to create a file system management function and assist in data management in the FPGA master control module.

[0043] In this embodiment of the present invention, a DDR4 module can be used instead of a DDR3 memory. The DDR4 module can have two groups of 64-bit data widths, one group can mount four memory particles, and a maximum memory size of 16GB is supported. The transmission rate is 2133Mbps, providing the FPGA master control module with faster response speed and more powerful data processing capabilities.

[0044] The communication module is configured to receive data mainly through the Aurora x8 channel (data width is x8) and to transmit data externally through the optical port (10Gbps).

[0045] The NVMe storage module is configured as a PCIe (protocol) bus in the form of a hard core based on FPGA to realize high-speed and large-capacity data interaction with the FPGA master control module. The external interface can be an AXI-like interface, which is simple to operate and has a back pressure mechanism to ensure reliable data storage. In the FPGA master control module, PCI Express (PCIe) is a very important high-speed interface protocol, and the implementation of the PCIe interface requires very efficient, high-speed, and reliable hardware resource support. Although FPGA can use a soft core to implement the PCIe interface, its efficiency and performance are difficult to reach the level of hard core implementation. Hard core implementation is to directly implement the PCIe interface circuit in the FPGA chip, which can quickly and efficiently support various functions of the PCIe protocol and has very high reliability and stability. On the other hand, the soft core implementation is implemented through the programmable logic resources of the FPGA. This method will face challenges in various aspects such as resource consumption, timing problems, and clock domain management, and it is difficult to meet the high-speed and low-latency requirements of the PCIe protocol, which is not desirable for the high-performance and large-capacity storage platform of the present invention. To sum up, in the present invention, in order to ensure the efficiency, reliability and stability of the PCIe interface, the PCIe interface adopts a hard-core implemented PCIe IP core, which can help quickly realize an efficient, reliable and high-speed PCIe interface, improve system performance and reliability, and reduce design risks and development time.

[0046] In one example of the present invention, the NVMe storage module can use, for example, KU system FPGA-KU1115 as the FPGA master control module, which can support 6-way PCIe Gen3 IP hard cores, can carry 6 NVMe M.2 disks for parallel storage at the same time, a single disk supports up to 8TB, and the total capacity supports up to 48TB. In addition, the actual operating speed of a single NVMe solid-state drive can reach 2.0GB / s, and the speed of 6 disks exceeds 10GB / s, which meets the system's large-capacity and high-performance storage capabilities.

[0047] The clock and power supply modules are configured to provide necessary clock and power management for the normal operation of the storage system platform.

[0048] The health management module is configured to monitor the voltage, current, temperature and other status of the entire storage system platform, and transmit them to the FPGA main control module through, for example, a serial port. The FPGA main control module can report the operation, health and other information of the storage system platform to external devices for human-computer interaction.

[0049] Figure 2 is a schematic block diagram showing the control and system configuration of an exemplary embodiment of a high-performance, large-capacity storage platform based on an FPGA according to the present invention.

[0050] like Figure 2As shown, the example of the high-performance large-capacity storage platform (or storage system platform) uses, for example, KU system FPGA-KU1115 as the main control module (main controller), supports 6-way PCIe Gen3 IP hard core, can carry 6 NVMe M.2 disks for parallel storage at the same time, supports a maximum of 8TB for a single disk, and a maximum total capacity of 48TB.

[0051] The storage system platform communicates with external control devices through the LRM connector and stores its data using the Aurora 64B / 66B protocol with a data width of x8. The received data can then be stored in parallel in six NVMe SSDs via the PCIe bus.

[0052] The storage system platform can be equipped with DDR4-16GB memory size, providing it with high-performance computing and storage capabilities, and interacting with peripherals through 2 GTH high-speed interfaces to switch out 10G optical ports and 1G network port communication interfaces.

[0053] The storage system platform can lead out RS232 and JTAG serial ports to the J30J connector for debugging and burning programs.

[0054] The storage system platform can be equipped with a 256MB SPI Flash for loading the boot program. The storage system platform health management uses APM32F405 to communicate with FPGA through the IPMII bus.

[0055] The clock of the storage system platform mainly adopts 100MHz, 156.25Mhz differential clock, 25Mhz, 8Mhz crystal and 50Mhz single-ended clock to ensure the clock required for the normal operation of each chip.

[0056] The power modules of this storage system platform mainly use ADI's LTM4650 and LTM4644 to ensure the power supply requirements of the system.

[0057] The storage system platform can achieve data storage and transmission over long distances through optical modules, which support a maximum distance of up to 10 km. Optical modules can also be used for interconnection between servers, storage system platforms and network devices in data centers, such as Internet data centers (IDCs), to support high-speed data transmission and large-scale data storage within data centers, and improve the efficient operation of data centers.

[0058] Figure 3 FIG. 1 is a flowchart showing a schematic data storage of a high-performance, large-capacity storage platform (or storage system platform) based on FPGA according to an embodiment of the present invention. Figure 3 As shown, the data storage process of the storage system platform may include:

[0059] S1. System power-on: complete the initialization operation of each module.

[0060] S2. Configure Aurora communication interface: The storage system platform interface external data interface is Aurora. Data storage is completed through Aurora x8 to complete real-time data recording, using Aurora64B / 66B protocol.

[0061] S3. Receive external device data storage instructions: When the external device sends data, a start storage instruction will be sent to the storage system platform, and the storage platform will start storing after receiving the instruction.

[0062] S4, data is received through Aurora x8 channel: the external master device controls the FPGA storage device through the Aurora bus to create a file system and start data reception. In the provided Aurora interface function, it can support the simultaneous sending of data files of 8 channels, and each channel can be started / stopped independently or all 8 channels can transmit data together.

[0063] S5. Create a file management system: When data file reception is enabled, the FPGA control software will create a file management system. The software implements file management functions through the Microblaze soft core, forms a file index, and can query, write, and read files and folders according to the control protocol, as well as prevent data loss, scheduled backup, and read and write speed functions.

[0064] S6. Data is stored in NVMe SSD hard disk through PCIe bus: FPGA master control module connects 6 NVMe SSD hard disks through 6 PCIe Gen3 high-speed interfaces to realize data storage function.

[0065] S7, receiving the instruction to stop storing data from the external device.

[0066] S8, data storage completed, data list updated: after receiving an external stop storage instruction, the data list update is terminated and storage is completed.

[0067] The foregoing description of several embodiments of the present invention is presented for illustrative purposes. The foregoing description is not intended to be exhaustive, nor is it intended to limit the present invention to the precise steps and / or forms disclosed, and it is apparent that many modifications and variations may be made in light of the above teachings. The scope of the present invention and all equivalents are intended to be defined by the appended claims.

Claims

1. An improved FPGA-based storage system platform, characterized in that: The storage system platform includes: An FPGA main control module, wherein the FPGA main control module is mounted with a DDR4 memory module and is configured to serve as a control core of the storage system platform, and is used to control high-speed reading of data from an external device; A communication module configured to read data from an external device through an Aurora communication interface and transmit data to the outside through a 10 Gigabit optical port; An NVMe storage module, configured to perform data interaction with the FPGA master control module through a PCIe bus in a hard core form, and used to store data from the external device; A health management module configured to monitor the operating status and parameters of the storage system platform and transmit the status and parameters to the FPGA master control module; A clock module configured to provide clock management for the storage system platform; and A power supply module configured to provide power management for the storage system platform; The FPGA main control module is configured with a file management system, which is configured to manage files and assist the FPGA main control module in data management.

2. The storage system platform according to claim 1, characterized in that: The DDR4 memory module is a DDR4 SDRAM with a maximum capacity in the range of 16GB-128GB.

3. The storage system platform according to claim 2, characterized in that: The PCIe bus is a 6-lane PCIe Gen3 IP hard core.

4. The storage system platform according to claim 3, characterized in that: The NVMe storage module is 6 NVMe solid-state hard drives, which are configured to combine with the 6-way PCIe Gen3 IP hard core to achieve parallel storage of data received by the FPGA main control module.

5. The storage system platform according to claim 4, characterized in that: The NVMe solid state drive is an NVMe M.2 solid state drive.

6. The storage system platform according to any one of claims 1 to 5, characterized in that: The Aurora communication interface supports up to 8 channels to read data from the external device simultaneously.

7. The storage system platform according to any one of claims 1 to 5, characterized in that: The storage system platform is a high-speed, large-capacity storage platform that supports a maximum storage speed of more than 10 GB / s and a maximum storage capacity of 48 TB.

8. The storage system platform according to claim 7, characterized in that: The storage system platform is a storage system platform used in a data center.

9. A method for operating data storage of a storage system platform, characterized in that: The operation method comprises the following steps: S1, powering on the storage system platform and completing the initialization operation of each module of the storage system platform; S2, configuring an Aurora communication interface for data storage and transmission for the storage system platform, which is configured to adopt the Aurora 64B / 66B protocol and support up to 8 channels to simultaneously read data from external devices of the storage system platform; S3, receiving a data storage instruction from the external device, and sending it to the FPGA master control module of the storage system platform, and starting to read the data of the external device; S4, the external main control device controls the FPGA main control module to create a file system through the Aurora communication interface and starts receiving the data; S5. While starting the reception of the data, the FPGA main control module creates a file management system to manage files and data; S6. The data is stored in parallel in an NVMe storage module in the form of an NVMe SSD hard disk through a multi-channel PCIe bus in the form of a hard core; S7, receiving a stop storage instruction of the data from the external device; and S8. After receiving the stop storage instruction, stop updating the data list and stop storing the data.

10. The operating method according to claim 9, characterized in that: The storage system platform is the storage system platform according to any one of claims 1-8.

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