Battery management system

Abstract

The invention provides a battery management system. The battery management system comprises a power panel control circuit, a power protection circuit, a power circuit, an input and output control circuit, a temperature sampling circuit, a voltage sampling circuit, a current acquisition circuit, an isolation optocoupler driving switch circuit and a current limiting circuit, the power panel control circuit is used for controlling on-off of the power circuit; the power panel control circuit is electrically connected with the power protection circuit, the input and output control circuit, the temperature sampling circuit, the voltage sampling circuit, the current acquisition circuit, the isolation optocoupler drive switch circuit and the current limiting circuit. The power panel control circuit is used for controlling the power protection circuit to be turned on or turned off. The power protection circuit is used for protecting the work of the battery management system; and the input and output control circuit is connected with the power supply protection circuit and is used for realizing input and output of signals. The battery management system can improve the output power effect and reliability of the robot.

Description

Technical Field

[0001] The present invention relates to the field of circuit technology, and in particular to a battery management system. Background Art

[0002] With the development of technology and the improvement of people's living standards, more and more mobile robots have entered the fields of civilian consumption and industrial production, bringing convenience to people's lives and production, such as amphibious robots, food delivery service robots, logistics handling robots and inspection robots, etc. Robots need power to work, so power management plays a vital role in robots.

[0003] At present, since amphibious robots are often in a mobile state when working, and most of these robots are powered by batteries, robots that work for a long time need to be charged frequently, so the battery management system is one of the most important parts. When the battery power is lower than the set value, the working ability of the amphibious robot will be reduced, resulting in poor power control effect of the amphibious robot and poor robot driving effect.

[0004] Therefore, the above-mentioned battery management system cannot meet the power control requirements of existing amphibious robots, either the circuit size is too large, or the power is insufficient, and the overall reliability is poor. Summary of the invention

[0005] The present invention provides a battery management system, aiming to solve the problems of oversize, insufficient power and poor reliability of the existing battery management system.

[0006] An embodiment of the present invention provides a battery management system, including: a power board control circuit, a power protection circuit, a power circuit, an input and output control circuit, a temperature sampling circuit, a voltage sampling circuit, a current acquisition circuit, an isolation optocoupler drive switch circuit, and a current limiting circuit;

[0007] The power supply circuit is used to provide power supply, the power board control circuit is connected to the power supply circuit, and the power board control circuit is used to control the on and off of the power supply circuit;

[0008] The power board control circuit is electrically connected to the power protection circuit, the input-output control circuit, the temperature sampling circuit, the voltage sampling circuit, the current acquisition circuit, the isolation optocoupler drive switch circuit and the current limiting circuit respectively, and the power board control circuit is used to control the start or shut down of the power protection circuit;

[0009] The power protection circuit is used to protect the operation of the battery management system; the input-output control circuit is connected to the power protection circuit to realize signal input and output; the temperature sampling circuit is connected to the power protection circuit to perform over-temperature protection on the power protection circuit; the voltage sampling circuit is connected to the power protection circuit to sample the voltage of the power protection circuit; the current acquisition circuit is used to acquire the current of the power protection circuit; the isolation optocoupler drive switch circuit is connected to the current acquisition circuit to drive the power protection circuit to close according to the overcurrent signal of the power protection circuit acquired by the current acquisition circuit.

[0010] Preferably, the power protection circuit comprises a power switch unit, a soft start unit and an anti-reverse connection unit which are electrically connected in sequence;

[0011] The power switch unit is used to control the operation of the slow start unit; the slow start unit is used to start the circuit; and the anti-reverse connection unit is used to prevent the reverse connection function of the slow start unit.

[0012] Preferably, the slow start unit includes: a resistor R30, a MOS tube Q1, a MOS tube Q3, a transistor U24, a diode D21, a resistor R47, a diode D22, a diode D27, a capacitor C5, a capacitor C9, a resistor R31 and a switch SW1;

[0013] The first end of the capacitor C5 is respectively connected to the first end of the resistor R30 and the base of the transistor U24; the second end of the capacitor C5 is respectively connected to the cathode of the diode D21, the cathode of the diode D22, the first end of the resistor R31 and the first end of the resistor R47, and the second end of the resistor R47 is grounded; the collector of the transistor U24 is connected to the anode of the diode D21, the emitter of the transistor U24 is respectively connected to the switch SW1, the source of the MOS transistor Q1, the source of the MOS transistor Q3, the cathode of the diode, and the first end of the capacitor C9, and the anode of the diode D22 is connected to the switch SW1; the anode of the diode is respectively connected to the second end of the capacitor C9, the second end of the resistor R31, the gate of the MOS transistor Q1 and the gate of the MOS transistor Q3; the second end of the resistor R30 is respectively connected to the drain of the MOS transistor Q1 and the drain of the MOS transistor Q3.

[0014] Preferably, the power switch unit includes: a signal interface CN2, a resistor R21, a resistor R22, a resistor R23, a resistor R24, a capacitor C10, a diode D28, a capacitor C2, a diode ZD1, a MOS transistor Q2 and a MOS transistor Q4;

[0015] Two ends of the signal interface CN2 are respectively connected to a power supply and ground; a first end of the resistor R21 is respectively connected to a first end of the resistor R22 and a first end of the resistor R23; a second end of the resistor R21 is connected to a first end of the capacitor C10, and a second end of the capacitor C10 is grounded; a second end of the resistor R22 is respectively connected to a cathode of the diode D28, a first end of the capacitor C2, a gate of the MOS transistor Q2, and a gate of the MOS transistor Q4; a source of the MOS transistor Q2 is respectively connected to a source of the MOS transistor Q4, a positive electrode of the diode D28, and a second end of the capacitor C2; a drain of the MOS transistor Q2 and a drain of the MOS transistor Q4 are respectively grounded.

[0016] Preferably, the anti-reverse connection unit includes: a diode ZD2, a resistor R29, a capacitor C11, a bidirectional diode D26, a resistor R53 and a resistor R54;

[0017] The cathode of the diode ZD2 is respectively connected to the second end of the resistor R30, the first end of the resistor R29 and the first positive terminal of the bidirectional diode D26; the anode of the diode ZD2 is respectively connected to the first end of the capacitor C11, the first end of the resistor R53 and the first end of the resistor R54 and grounded; the second end of the resistor R29 is connected to the second end of the capacitor C11; the second positive terminal of the bidirectional diode D26 is grounded; the second end of the resistor R53 is connected to the second end of the resistor R54 and grounded.

[0018] Preferably, the input-output control circuit includes a first control unit and a second control unit, the first control unit is used to achieve a voltage output of 5V, and the second control circuit is used to achieve a voltage output of 8V; and the circuit structure of the first control unit and the second control unit is the same;

[0019] The first control unit includes: U53 chip, capacitor C100, capacitor C109, capacitor C106, capacitor C105, capacitor C103, inductor L5, capacitor C107, capacitor C108, capacitor C10C1, diode D33, resistor R76, resistor R77, resistor R78, capacitor C102, MOS tube Q8 and U55 interface;

[0020] The first end of the capacitor 100 is connected to the first end of the capacitor C109, the first end of the capacitor C106 and the first end of the capacitor C105 respectively, and the second end of the capacitor 100 is connected to the second end of the capacitor C109, the second end of the capacitor C106 and the second end of the capacitor C105 respectively; the first end of the capacitor 100 is also connected to the VIN pin of the U53 chip, and the second end of the first capacitor is connected to the ground terminal of the U53 chip;

[0021] The PH pin of the U53 chip is respectively connected to the first end of the inductor L5, the first end of the capacitor C013 and the cathode of the diode D33, and the second end of the capacitor C103 is used to connect to the BOOT pin of the U53 chip; the second end of the inductor L5 is respectively connected to the first end of the capacitor C107, the first end of the capacitor C108, the first end of the capacitor C101, the first end of the resistor R76 and the 1 pin of the U55 interface; the anode of the diode D33 is respectively connected to the second end of the capacitor C107, the second end of the capacitor C108 and the second end of the capacitor C101 and grounded; the second end of the resistor R76 is connected to the first end of the resistor R77, and the second end of the resistor R77 is grounded;

[0022] Pin 2 of the U55 interface is connected to the drain of the MOS tube Q8, the source of the MOS tube Q8 is grounded, the first end of the resistor R78 is respectively connected to the first end of the capacitor C102 and the gate of the MOS tube Q8, and the second end of the resistor R78 is connected to the second end of the capacitor C102 and grounded.

[0023] Preferably, the temperature sampling circuit includes: a thermistor RT1, a capacitor C25 and a resistor R28; the first end of the thermistor RT1 is used to connect to the AVCC voltage, the second end of the thermistor TR1 is respectively connected to the first end of the capacitor C25 and the first end of the resistor R28, and the second end of the capacitor C25 is connected to the second end of the resistor R28 and grounded.

[0024] Preferably, the voltage sampling circuit includes: a thermistor RT1, a capacitor C32 and a resistor U12; the first end of the thermistor RT1 is used to connect the DCBUS voltage, the second end of the resistor R41 is respectively connected to the first end of the capacitor C32 and the first end of the resistor U12, and the second end of the capacitor C32 is connected to the second end of the resistor U12 and grounded.

[0025] Preferably, the current acquisition circuit includes: a resistor R1, a resistor U4, a resistor U7, a resistor R5, an amplifier, a resistor R3 and a capacitor C3;

[0026] The first end of the resistor U4 and the first end of the capacitor U7 are respectively used to connect to the bus voltage, the second end of the resistor U4 is respectively connected to the first end of the resistor R1 and the negative input end of the amplifier, the second end of the resistor U7 is respectively connected to the first end of the resistor R5 and the positive input end of the amplifier, and the second end of the resistor R5 is grounded; the output end of the amplifier is respectively connected to the second end of the resistor R1 and the first end of the resistor R3, and the second end of the resistor R3 is used to connect to the BUS-ADC voltage; the two ends of the capacitor C3 are respectively connected to the AVCC voltage and ground.

[0027] Preferably, the isolated optocoupler drive switch circuit comprises a plurality of resistors and a four-way isolated optocoupler switch; the plurality of resistors are electrically connected to the four-way isolated optocoupler switch respectively.

[0028] Compared with the prior art, the beneficial effect of the present invention lies in that, by using the power supply circuit to provide power supply, the power board control circuit is connected to the power supply circuit, and the power board control circuit is used to control the on and off of the power supply circuit; the power board control circuit is respectively electrically connected to the power protection circuit, the input and output control circuit, the temperature sampling circuit, the voltage sampling circuit, the current acquisition circuit, the isolation optocoupler drive switch circuit and the current limiting circuit, and the power board control circuit is used to control the start or shut down of the power protection circuit; the power protection circuit is used to protect the operation of the battery management system; the input and output control circuit is connected to the power protection circuit to realize the input and output of the signal; the temperature sampling circuit is connected to the power protection circuit The invention relates to a novel optical fiber transmission device for transmitting the power supply protection circuit to the optical fiber transmission device and the power supply protection circuit to transmit the power supply protection circuit to the optical fiber transmission device. The optical fiber transmission device is connected to the optical fiber transmission device of the optical fiber transmission device and the power supply protection circuit is connected to the optical fiber transmission device of ... BRIEF DESCRIPTION OF THE DRAWINGS

[0029] The present invention will be described in detail below in conjunction with the accompanying drawings. The above and other aspects of the present invention will become clearer and easier to understand through the detailed description made in conjunction with the following drawings. In the accompanying drawings:

[0030] Figure 1 is a module diagram of a battery management system provided by an embodiment of the present invention;

[0031] Figure 2 is a circuit diagram of a power board control circuit provided by an embodiment of the present invention;

[0032] Figure 3 is a circuit diagram of a power protection circuit provided by an embodiment of the present invention;

[0033] Figure 4 is a circuit diagram of a first control unit provided by an embodiment of the present invention;

[0034] Figure 5 is a circuit diagram of a second control unit provided by an embodiment of the present invention;

[0035] Figure 6 is a circuit diagram of a temperature sampling circuit provided by an embodiment of the present invention;

[0036] Figure 7 is a circuit diagram of a voltage sampling circuit provided by an embodiment of the present invention;

[0037] Figure 8 is a circuit diagram of a current acquisition circuit provided by an embodiment of the present invention;

[0038] Fig. 9 is a circuit diagram of an isolated optocoupler driving switch circuit provided by an embodiment of the present invention;

[0039] Fig.10 is a circuit diagram of a current limiting circuit provided by an embodiment of the present invention.

[0040] In the figure, 100, battery management system, 1, power board control circuit, 2, power protection circuit, 21, power switch unit, 22, soft start unit, 23, anti-reverse connection unit, 3, power circuit, 4, input and output control circuit, 5, temperature sampling circuit, 6, voltage sampling circuit, 7, current acquisition circuit, 8, isolation optocoupler drive switch circuit, 9, current limiting circuit. DETAILED DESCRIPTION

[0041] In order to make the purpose, technical solution and advantages of the present invention more clearly understood, the present invention is further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present invention and are not intended to limit the present invention.

[0042] Combined with Figure 1-2 As shown, an embodiment of the present invention provides a battery management system 100, including: a power board control circuit 1, a power protection circuit 2, a power circuit 3, an input and output control circuit 4, a temperature sampling circuit 5, a voltage sampling circuit 6, a current acquisition circuit 7, an isolation optocoupler drive switch circuit 8 and a current limiting circuit 9.

[0043] The power supply circuit 3 is used to provide power supply, the power board control circuit 1 is connected to the power supply circuit 3, and the power board control circuit 1 is used to control the on and off of the power supply circuit 3. Among them, the power board control circuit 1 uses STM32G030K6T6 as current detection and switch control.

[0044] The power board control circuit 1 is electrically connected to the power protection circuit 2, the input-output control circuit 4, the temperature sampling circuit 5, the voltage sampling circuit 6, the current acquisition circuit 7, the isolation optocoupler drive switch circuit 8 and the current limiting circuit 9 respectively, and the power board control circuit 1 is used to control the start or shut down of the power protection circuit 2.

[0045] The power protection circuit 2 is used to protect the operation of the battery management system 100; the input-output control circuit 4 is connected to the power protection circuit 2 to realize the input and output of signals; the temperature sampling circuit 5 is connected to the power protection circuit 2 to perform over-temperature protection on the power protection circuit 2; the voltage sampling circuit 6 is connected to the power protection circuit 2 to sample the voltage of the power protection circuit 2; the current acquisition circuit 7 is used to acquire the current of the power protection circuit 2; the isolation optical coupling drive switch circuit 8 is connected to the current acquisition circuit 7 to drive and close the power protection circuit 2 according to the overcurrent signal of the power protection circuit 2 acquired by the current acquisition circuit 7. By detecting the corresponding temperature, voltage and current, the operation of the power management system is controlled according to the temperature, voltage and current, so that the subsequent circuit can be effectively protected; at the same time, the overall circuit size is small, the power output control effect is good, and the robot operation reliability is high.

[0046] In this embodiment, Figure 3 As shown, the power protection circuit 2 includes a power switch unit 21, a slow start unit 22 and an anti-reverse connection unit 23 which are electrically connected in sequence; the power switch unit 21 is used to control the operation of the slow start unit 22; the slow start unit 22 is used to start the circuit; and the anti-reverse connection unit 23 is used to prevent the slow start unit 22 from having a reverse connection function.

[0047] In this embodiment, Figure 3 As shown, the slow start unit 22 includes: a resistor R30, a MOS transistor Q1, a MOS transistor Q3, a transistor U24, a diode D21, a resistor R47, a diode D22, a diode D27, a capacitor C5, a capacitor C9, a resistor R31 and a switch SW1;

[0048] The first end of the capacitor C5 is respectively connected to the first end of the resistor R30 and the base of the transistor U24; the second end of the capacitor C5 is respectively connected to the cathode of the diode D21, the cathode of the diode D22, the first end of the resistor R31 and the first end of the resistor R47, and the second end of the resistor R47 is grounded; the collector of the transistor U24 is connected to the anode of the diode D21, the emitter of the transistor U24 is respectively connected to the switch SW1, the source of the MOS transistor Q1, the source of the MOS transistor Q3, the cathode of the diode, and the first end of the capacitor C9, and the anode of the diode D22 is connected to the switch SW1; the anode of the diode is respectively connected to the second end of the capacitor C9, the second end of the resistor R31, the gate of the MOS transistor Q1 and the gate of the MOS transistor Q3; the second end of the resistor R30 is respectively connected to the drain of the MOS transistor Q1 and the drain of the MOS transistor Q3.

[0049] In this embodiment, Figure 3 As shown, the power switch unit 21 includes: a signal interface CN2, a resistor R21, a resistor R22, a resistor R23, a resistor R24, a capacitor C10, a diode D28, a capacitor C2, a diode ZD1, a MOS transistor Q2 and a MOS transistor Q4;

[0050] Two ends of the signal interface CN2 are respectively connected to a power supply and ground; a first end of the resistor R21 is respectively connected to a first end of the resistor R22 and a first end of the resistor R23; a second end of the resistor R21 is connected to a first end of the capacitor C10, and a second end of the capacitor C10 is grounded; a second end of the resistor R22 is respectively connected to a cathode of the diode D28, a first end of the capacitor C2, a gate of the MOS transistor Q2, and a gate of the MOS transistor Q4; a source of the MOS transistor Q2 is respectively connected to a source of the MOS transistor Q4, a positive electrode of the diode D28, and a second end of the capacitor C2; a drain of the MOS transistor Q2 and a drain of the MOS transistor Q4 are respectively grounded.

[0051] In this embodiment, Figure 3 As shown, the anti-reverse connection unit 23 includes: a diode ZD2, a resistor R29, a capacitor C11, a bidirectional diode D26, a resistor R53 and a resistor R54;

[0052] The cathode of the diode ZD2 is respectively connected to the second end of the resistor R30, the first end of the resistor R29 and the first positive terminal of the bidirectional diode D26; the anode of the diode ZD2 is respectively connected to the first end of the capacitor C11, the first end of the resistor R53 and the first end of the resistor R54 and grounded; the second end of the resistor R29 is connected to the second end of the capacitor C11; the second positive terminal of the bidirectional diode D26 is grounded; the second end of the resistor R53 is connected to the second end of the resistor R54 and grounded.

[0053] Specifically, the upper PMOS of the circuit is WSD90P06DN56 and the lower NMOS is CJAC110SN10A.

[0054] The resistor R30, capacitor C5, and transistor U24 in the circuit are used for the slow start circuit. The overvoltage circuit is mainly composed of the diode ZD1 and the transistor U24. The anti-reverse connection circuit group is composed of the MOS tube Q3 and the MOS tube Q4. The capacitor circuit composed of the resistor R30 and the capacitor C5 can make the base voltage of the transistor U24 increase slowly. When the voltage rises to a specific value, the transistor is turned on, the gates of the MOS tube Q1 and the MOS tube Q3 are pulled down, and the circuit is turned on. The circuit uses a differential amplifier to detect the voltage at both ends of DCUBS_I+ and DCUBS_I-. When the current increases, the two voltages will also increase in the same proportion. When the voltage increases to a specific value, the controller will pull up KEY_PWR and turn off the upper tubes of the MOS tube Q1 and the MOS tube Q3. When the bus voltage is higher than the voltage of the ZD1 Zener diode, the collector voltage of transistor U24 drops to about 0V, the transistor is cut off, and the upper tubes of MOS tubes Q1 and Q3 are turned off, the circuit cannot be turned on, and the overvoltage protection is played. When the circuit is connected normally, the current pulls up the gate voltage of MOS tubes Q3 and Q4 through resistor R22, so that the circuit is turned on normally. When reversely connected, the gate voltage of MOS tubes Q3 and Q4 is negative, and the circuit cannot be turned on normally.

[0055] In this embodiment, the AVCC power supply circuit 3 is obtained by bus step-down using the TPS5430DDAR chip. This DC-DC is a high output current PWM converter with a low resistance, high voltage side N-channel MOSFET integrated inside. The functions listed on the substrate include: a high performance voltage error amplifier that provides strict voltage regulation accuracy under transient conditions; an undervoltage lockout circuit that prevents startup before the input voltage reaches 5.5V; an internally set slow start circuit that limits inrush current; and a voltage feed-forward circuit that improves transient response.

[0056] In this embodiment, Figure 4-Figure 5As shown, the input-output control circuit 4 includes a first control unit and a second control unit, the first control unit is used to achieve a 5V voltage output, and the second control circuit is used to achieve an 8V voltage output; and the circuit structure of the first control unit is the same as that of the second control unit.

[0057] The first control unit includes: U53 chip, capacitor C100, capacitor C109, capacitor C106, capacitor C105, capacitor C103, inductor L5, capacitor C107, capacitor C108, capacitor C10C1, diode D33, resistor R76, resistor R77, resistor R78, capacitor C102, MOS tube Q8 and U55 interface;

[0058] The first end of the capacitor 100 is connected to the first end of the capacitor C109, the first end of the capacitor C106 and the first end of the capacitor C105 respectively, and the second end of the capacitor 100 is connected to the second end of the capacitor C109, the second end of the capacitor C106 and the second end of the capacitor C105 respectively; the first end of the capacitor 100 is also connected to the VIN pin of the U53 chip, and the second end of the first capacitor is connected to the ground terminal of the U53 chip;

[0059] The PH pin of the U53 chip is respectively connected to the first end of the inductor L5, the first end of the capacitor C013 and the cathode of the diode D33, and the second end of the capacitor C103 is used to connect to the BOOT pin of the U53 chip; the second end of the inductor L5 is respectively connected to the first end of the capacitor C107, the first end of the capacitor C108, the first end of the capacitor C101, the first end of the resistor R76 and the 1 pin of the U55 interface; the anode of the diode D33 is respectively connected to the second end of the capacitor C107, the second end of the capacitor C108 and the second end of the capacitor C101 and grounded; the second end of the resistor R76 is connected to the first end of the resistor R77, and the second end of the resistor R77 is grounded;

[0060] Pin 2 of the U55 interface is connected to the drain of the MOS tube Q8, the source of the MOS tube Q8 is grounded, the first end of the resistor R78 is respectively connected to the first end of the capacitor C102 and the gate of the MOS tube Q8, and the second end of the resistor R78 is connected to the second end of the capacitor C102 and grounded.

[0061] Specifically, the main control board requires 5V input and 8V input. The power output required by these two specifications uses TPS5450DDAR as the DC-DC step-down output. This DC-DC step-down has a maximum current output capacity of 5A. On this basis, each output has an NMOS tube added to open and close the circuit. When the controlled 5V_PWR or 8V_PWR is at a high level, the NMOS tube will be started and connected to the ground loop of the corresponding line.

[0062] In this embodiment, Figure 6 As shown, the temperature sampling circuit 5 includes: a thermistor RT1, a capacitor C25 and a resistor R28; the first end of the thermistor RT1 is used to connect to the AVCC voltage, the second end of the thermistor TR1 is respectively connected to the first end of the capacitor C25 and the first end of the resistor R28, and the second end of the capacitor C25 is connected to the second end of the resistor R28 and grounded.

[0063] In this embodiment, Figure 7 As shown, the voltage sampling circuit 6 includes: a thermistor RT1, a capacitor C32 and a resistor U12; the first end of the thermistor RT1 is used to connect the DCBUS voltage, the second end of the resistor R41 is respectively connected to the first end of the capacitor C32 and the first end of the resistor U12, and the second end of the capacitor C32 is connected to the second end of the resistor U12 and grounded.

[0064] Specifically, the detection end uses temperature sampling and voltage sampling. The temperature sampling thermistor is used to detect the temperature of the PMOS upper tube and PMOS lower tube circuits in the power protection circuit 2, and the temperature at the 5V and 8V output DC-DC. Voltage sampling is used to detect the voltage at the bus, 5V and 8V step-down DC-DC.

[0065] In this embodiment, Figure 8 As shown, the current acquisition circuit 7 includes: a resistor R1, a resistor U4, a resistor U7, a resistor R5, an amplifier, a resistor R3 and a capacitor C3;

[0066] The first end of the resistor U4 and the first end of the capacitor U7 are respectively used to connect to the bus voltage, the second end of the resistor U4 is respectively connected to the first end of the resistor R1 and the negative input end of the amplifier, the second end of the resistor U7 is respectively connected to the first end of the resistor R5 and the positive input end of the amplifier, and the second end of the resistor R5 is grounded; the output end of the amplifier is respectively connected to the second end of the resistor R1 and the first end of the resistor R3, and the second end of the resistor R3 is used to connect to the BUS-ADC voltage; the two ends of the capacitor C3 are respectively connected to the AVCC voltage and ground.

[0067] Specifically, the bus current detection chip uses a differential amplifier circuit with an amplification factor of 30 times. The sampling resistors are like resistors R53 and R54 in the power protection circuit 2. The high-precision LM321MFX has a high unity gain frequency and a guaranteed slew rate of 0.4Ns / , and the quiescent current is only 430A / amplifier (5V). The input common mode range includes ground, so the device can operate in single-power applications and dual-power applications. It can also comfortably drive large-capacity loads.

[0068] In this embodiment, Fig. 9 As shown, the isolated optocoupler driving switch circuit 8 includes a plurality of resistors and a four-way isolated optocoupler switch; the plurality of resistors are electrically connected to the four-way isolated optocoupler switch respectively.

[0069] Specifically, the 5V, 8V and bus voltages are turned on and off through the TLP291-4 four-way isolation optocoupler switch. When the master detects overcurrent through the current acquisition circuit 7 of the differential amplifier, the PMOS upper tube in the power protection circuit 2 is turned off and the current is cut off through the P_KEY pin. Among them, 8V_ON / OFF and 5V_ON / OFF are control pins for turning on the MOS tube Q7 and the MOS tube Q8 lower tube when waiting for stability at the first power-on, or turning off the MOS tube Q7 and the MOS tube Q8 lower tube when the DC-DC temperature is too high.

[0070] In this embodiment, Fig.10 As shown, the current limiting circuit 9 is provided with a plurality of resistors (R17-R20) and a switch (SW3). The current limiting circuit 9 can set the current limit through the onboard dip switch, and can also limit the current through the external communication serial port through the internal software.

[0071] It should be noted that, in this article, the terms "include", "comprises" or any other variations thereof are intended to cover non-exclusive inclusion, so that a process, article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, article or device. In the absence of more restrictions, an element defined by the sentence "includes a ..." does not exclude the existence of other identical elements in the process, article or device including the element.

[0072] The embodiments of the present invention are described above in conjunction with the accompanying drawings. What is disclosed is only the preferred embodiment of the present invention. However, the present invention is not limited to the above-mentioned specific implementation manner. The above-mentioned specific implementation manner is only illustrative rather than restrictive. Under the enlightenment of the present invention, ordinary technicians in this field can also make many forms and equivalent changes without departing from the scope of protection of the purpose of the present invention and the claims, all of which are within the protection of the present invention.

Claims

1. A battery management system, characterized in that: include: Power board control circuit, power protection circuit, power circuit, input and output control circuit, temperature sampling circuit, voltage sampling circuit, current acquisition circuit, isolation optocoupler drive switch circuit and current limiting circuit; The power supply circuit is used to provide power supply, the power board control circuit is connected to the power supply circuit, and the power board control circuit is used to control the on and off of the power supply circuit; The power board control circuit is electrically connected to the power protection circuit, the input-output control circuit, the temperature sampling circuit, the voltage sampling circuit, the current acquisition circuit, the isolation optocoupler drive switch circuit and the current limiting circuit respectively, and the power board control circuit is used to control the start or shut down of the power protection circuit; The power protection circuit is used to protect the operation of the battery management system; the input-output control circuit is connected to the power protection circuit to realize the input and output of signals; the temperature sampling circuit is connected to the power protection circuit to perform an over-temperature protection function on the power protection circuit; the voltage sampling circuit is connected to the power protection circuit to sample the voltage of the power protection circuit; The current collection circuit is used to collect the current of the power protection circuit; The isolation optocoupler drive switch circuit is connected to the current acquisition circuit, and is used to drive and shut down the power protection circuit according to the overcurrent signal of the power protection circuit acquired by the current acquisition circuit.

2. The battery management system according to claim 1, characterized in that: The power protection circuit comprises a power switch unit, a soft start unit and an anti-reverse connection unit which are electrically connected in sequence; The power switch unit is used to control the operation of the slow start unit; the slow start unit is used to start the circuit; and the anti-reverse connection unit is used to prevent the reverse connection function of the slow start unit.

3. The battery management system according to claim 2, characterized in that: The slow start unit includes: a resistor R30, a MOS tube Q1, a MOS tube Q3, a transistor U24, a diode D21, a resistor R47, a diode D22, a diode D27, a capacitor C5, a capacitor C9, a resistor R31 and a switch SW1; The first end of the capacitor C5 is respectively connected to the first end of the resistor R30 and the base of the transistor U24; the second end of the capacitor C5 is respectively connected to the cathode of the diode D21, the cathode of the diode D22, the first end of the resistor R31 and the first end of the resistor R47, and the second end of the resistor R47 is grounded; the collector of the transistor U24 is connected to the anode of the diode D21, the emitter of the transistor U24 is respectively connected to the switch SW1, the source of the MOS transistor Q1, the source of the MOS transistor Q3, the cathode of the diode, and the first end of the capacitor C9, and the anode of the diode D22 is connected to the switch SW1; the anode of the diode is respectively connected to the second end of the capacitor C9, the second end of the resistor R31, the gate of the MOS transistor Q1 and the gate of the MOS transistor Q3; the second end of the resistor R30 is respectively connected to the drain of the MOS transistor Q1 and the drain of the MOS transistor Q3.

4. The battery management system according to claim 3, characterized in that: The power switch unit includes: a signal interface CN2, a resistor R21, a resistor R22, a resistor R23, a resistor R24, a capacitor C10, a diode D28, a capacitor C2, a diode ZD1, a MOS transistor Q2 and a MOS transistor Q4; Two ends of the signal interface CN2 are respectively connected to a power supply and ground; a first end of the resistor R21 is respectively connected to a first end of the resistor R22 and a first end of the resistor R23; a second end of the resistor R21 is connected to a first end of the capacitor C10, and a second end of the capacitor C10 is grounded; a second end of the resistor R22 is respectively connected to a cathode of the diode D28, a first end of the capacitor C2, a gate of the MOS transistor Q2, and a gate of the MOS transistor Q4; a source of the MOS transistor Q2 is respectively connected to a source of the MOS transistor Q4, a positive electrode of the diode D28, and a second end of the capacitor C2; a drain of the MOS transistor Q2 and a drain of the MOS transistor Q4 are respectively grounded.

5. The battery management system according to claim 4, characterized in that: The anti-reverse connection unit includes: a diode ZD2, a resistor R29, a capacitor C11, a bidirectional diode D26, a resistor R53 and a resistor R54; The cathode of the diode ZD2 is respectively connected to the second end of the resistor R30, the first end of the resistor R29 and the first positive terminal of the bidirectional diode D26; the anode of the diode ZD2 is respectively connected to the first end of the capacitor C11, the first end of the resistor R53 and the first end of the resistor R54 and grounded; the second end of the resistor R29 is connected to the second end of the capacitor C11; the second positive terminal of the bidirectional diode D26 is grounded; the second end of the resistor R53 is connected to the second end of the resistor R54 and grounded.

6. The battery management system according to claim 1, characterized in that: The input-output control circuit includes a first control unit and a second control unit, the first control unit is used to achieve a voltage output of 5V, and the second control circuit is used to achieve a voltage output of 8V; and the circuit structure of the first control unit and the second control unit is the same; The first control unit includes: U53 chip, capacitor C100, capacitor C109, capacitor C106, capacitor C105, capacitor C103, inductor L5, capacitor C107, capacitor C108, capacitor C10C1, diode D33, resistor R76, resistor R77, resistor R78, capacitor C102, MOS tube Q8 and U55 interface; The first end of the capacitor C100 is connected to the first end of the capacitor C109, the first end of the capacitor C106 and the first end of the capacitor C105 respectively, and the second end of the capacitor 100 is connected to the second end of the capacitor C109, the second end of the capacitor C106 and the second end of the capacitor C105 respectively; the first end of the capacitor 100 is also connected to the VIN pin of the U53 chip, and the second end of the first capacitor is connected to the ground terminal of the U53 chip; The PH pin of the U53 chip is respectively connected to the first end of the inductor L5, the first end of the capacitor C013 and the cathode of the diode D33, and the second end of the capacitor C103 is used to connect to the BOOT pin of the U53 chip; the second end of the inductor L5 is respectively connected to the first end of the capacitor C107, the first end of the capacitor C108, the first end of the capacitor C101, the first end of the resistor R76 and the 1 pin of the U55 interface; the anode of the diode D33 is respectively connected to the second end of the capacitor C107, the second end of the capacitor C108 and the second end of the capacitor C101 and grounded; the second end of the resistor R76 is connected to the first end of the resistor R77, and the second end of the resistor R77 is grounded; Pin 2 of the U55 interface is connected to the drain of the MOS tube Q8, the source of the MOS tube Q8 is grounded, the first end of the resistor R78 is respectively connected to the first end of the capacitor C102 and the gate of the MOS tube Q8, and the second end of the resistor R78 is connected to the second end of the capacitor C102 and grounded.

7. The battery management system according to claim 1, characterized in that: The temperature sampling circuit includes: a thermistor RT1, a capacitor C25 and a resistor R28; the first end of the thermistor RT1 is used to connect to the AVCC voltage, the second end of the thermistor TR1 is respectively connected to the first end of the capacitor C25 and the first end of the resistor R28, and the second end of the capacitor C25 is connected to the second end of the resistor R28 and grounded.

8. The battery management system according to claim 1, characterized in that: The voltage sampling circuit includes: a thermistor RT1, a capacitor C32 and a resistor U12; the first end of the thermistor RT1 is used to connect the DCBUS voltage, the second end of the resistor R41 is respectively connected to the first end of the capacitor C32 and the first end of the resistor U12, and the second end of the capacitor C32 is connected to the second end of the resistor U12 and grounded.

9. The battery management system according to claim 1, characterized in that: The current acquisition circuit includes: a resistor R1, a resistor U4, a resistor U7, a resistor R5, an amplifier, a resistor R3 and a capacitor C3; The first end of the resistor U4 and the first end of the capacitor U7 are respectively used to connect to the bus voltage, the second end of the resistor U4 is respectively connected to the first end of the resistor R1 and the negative input end of the amplifier, the second end of the resistor U7 is respectively connected to the first end of the resistor R5 and the positive input end of the amplifier, and the second end of the resistor R5 is grounded; the output end of the amplifier is respectively connected to the second end of the resistor R1 and the first end of the resistor R3, and the second end of the resistor R3 is used to connect to the BUS-ADC voltage; the two ends of the capacitor C3 are respectively connected to the AVCC voltage and ground.

10. The battery management system according to claim 9, characterized in that: The isolated optocoupler drive switch circuit includes a plurality of resistors and a four-way isolated optocoupler switch; the plurality of resistors are electrically connected to the four-way isolated optocoupler switch respectively.

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