Link detection circuit, method, equipment and medium in special line communication process

Abstract

The invention relates to the technical field of wired Modem communication, in particular to a link detection circuit, method, equipment and medium in a special line communication process, which can distinguish a normal communication state and a broken link state of a two-line special line and can also distinguish a normal communication state and a broken link state of a four-line special line when a Modem module chip cannot automatically detect the broken link of a telephone line. And a link breakage event in private line communication is rapidly detected. Whether the dedicated line link is disconnected or not is judged only by judging whether the DETECT1 and DETECT2 signals change or not, the circuit is simple, the performance is reliable, and the link disconnection event in dedicated line communication can be rapidly detected.

Description

Technical Field

[0001] The invention relates to the technical field of wired Modem communication, and in particular to a link detection circuit, method, equipment and medium in a dedicated line communication process. Background Art

[0002] The physical link of wired modem communication can be a public telephone network or a dedicated 2-wire or 4-wire dedicated line. When using telephone lines and dedicated lines for communication, the signals transmitted are modulated. The difference is that there is a feeder voltage on the telephone line, but there is no feeder voltage on the dedicated line. During the communication process, it is very necessary to detect abnormal disconnection in time. Modem module chips are suitable for public telephone networks and can support modulation protocols such as V.92, V.90, V.34, V.32, V.23, V.22, and V.21. During the communication process, the disconnection of the telephone line can be automatically detected.

[0003] In some application scenarios, in order to support 2 / 4-wire dedicated line communication, a dedicated line to telephone line module needs to be added. This module will always be connected to the modem module chip, so when the dedicated line is disconnected, the modem module chip can no longer detect the disconnection of the dedicated line link. In addition, dedicated line communication is divided into 2-wire and 4-wire situations. There is a problem that the communication status and disconnection status cannot be distinguished between 2-wire dedicated lines and 4-wire dedicated lines.

[0004] It can be seen that if a module and the modem module chip remain connected, the modem module chip cannot automatically detect the disconnection of the telephone line. Therefore, a link detection technology in the dedicated line communication process is needed to quickly detect the disconnection event in 2-wire and 4-wire dedicated line communications. Summary of the invention

[0005] In view of this, the present invention provides a link detection circuit, method, device and medium in a dedicated line communication process, which can distinguish between the normal communication state and the broken link state of a 2-line dedicated line when the Modem module chip cannot automatically detect the disconnection of the telephone line, and can also distinguish between the normal communication state and the broken link state of a 4-line dedicated line, and quickly detect the broken link event in the dedicated line communication.

[0006] To achieve the above-mentioned purpose, the present invention provides a link detection circuit in a dedicated line communication process, including a 4-line dedicated line detection circuit and a 2-line dedicated line detection circuit; the 4-line dedicated line detection circuit includes a first inverting follower circuit and a first comparison circuit, the first inverting follower circuit introduces the signal received at the RX end into the comparison circuit, the first comparison circuit is used to detect the change of the signal received at the RX end, and the result is output to the output pin of the operational amplifier in the first comparison circuit, which is recorded as the DETECT1 signal; the 2-line dedicated line detection circuit includes a second inverting follower circuit, a third inverting follower circuit and a second comparison circuit; the second inverting follower circuit inverts the signal received at the RX end and introduces it into the comparison circuit; the third inverting follower circuit inverts the local TX signal and introduces it into the second comparison circuit; the second comparison circuit is used to detect the comparison between the signal received at the RX end and the local TX signal, and the result is output to the output pin of the operational amplifier in the second comparison circuit, which is recorded as the DETECT2 signal; whether the dedicated line link is disconnected is determined based on whether the DETECT1 and DETECT2 signals change.

[0007] Among them, resistor R12, resistor R13 and the first operational amplifier constitute a first inverting follower circuit; resistor R14, resistor R15, resistor R16 and the second operational amplifier constitute a first comparison circuit; among them, the signal received at the RX end is connected to the inverting input terminal of the first operational amplifier through resistor R12, the VREF reference voltage is connected to the non-inverting input terminal of the first operational amplifier through resistor R13, and the feedback resistor R11 is connected between the output pin and the inverting input terminal of the first operational amplifier; the signal received at the RX end after inversion is connected to the inverting input terminal of the second operational amplifier through resistor R14, VREF is connected to the non-inverting input terminal of the second operational amplifier through resistor R15, and the feedback resistor R16 is connected between the output pin and the non-inverting input terminal of the second operational amplifier.

[0008] Among them, the value range of resistors R11, R12 and R13 is 5KΩ~10KΩ; the value range of resistors R14 and R15 is 5KΩ~10KΩ; the value of resistor R16 is 80~100 times of R15.

[0009] Among them, resistor R1, resistor R2, resistor R3 and the third operational amplifier constitute a second inverting follower circuit; resistor R5, resistor R6, resistor R7 and the fourth operational amplifier constitute a third inverting follower circuit; resistor R4, resistor R8, resistor 9 and the fifth operational amplifier constitute a second comparison circuit; wherein, the signal received at the RX end is connected to the inverting input terminal of the third operational amplifier through resistor R2, the VREF reference voltage is connected to the non-inverting input terminal of the third operational amplifier through resistor R3, and the feedback resistor R1 is connected to the output pin and the inverting input terminal of the first operational amplifier; the local TX signal is connected to the inverting input terminal of the fourth operational amplifier through resistor R6, VREF is connected to the non-inverting input terminal of the fourth operational amplifier through resistor R7, and the feedback resistor R5 is connected between the output pin and the non-inverting input terminal of the fourth operational amplifier; the signal received at the RX end after inversion is connected to the inverting input terminal of the fifth operational amplifier through resistor R4, the local TX signal after inversion is connected to the non-inverting input terminal of the fifth operational amplifier through resistor R8, and the feedback resistor R9 is connected between the output pin and the non-inverting input terminal of the fifth operational amplifier.

[0010] Among them, the value range of resistors R1, R2, R3, R5, R6 and R7 is 5KΩ~10KΩ; the value range of resistors R4 and R8 is 5KΩ~10KΩ; the value of resistor R9 is 80~100 times of R8.

[0011] Among them, the continuous jump of DETECT1 and DETECT2 signals indicates that the corresponding link is normal, and the unchanged state of DETECT1 and DETECT2 signals indicates that the corresponding link is disconnected.

[0012] Among them, the 4-wire dedicated line detection circuit and the 2-wire dedicated line detection circuit are implemented by using 3 dual operational amplifiers or 5 single operational amplifiers.

[0013] The present invention also provides a link detection method in a dedicated line communication process, comprising the following steps:

[0014] Constructing the 4-wire dedicated line detection circuit and the 2-wire dedicated line detection circuit of the present invention;

[0015] The RX end receives the signal;

[0016] Check whether the DETECT1 signal and the DETECT2 signal change; if the DETECT1 signal and the DETECT2 signal continuously change, it indicates that the corresponding link is normal; if the DETECT1 signal and the DETECT2 signal remain unchanged, it indicates that the corresponding link is disconnected.

[0017] The present invention also provides an electronic device, which includes a processor and a memory for storing executable instructions of the processor; the processor is used to read the executable instructions from the memory and execute the instructions to implement the link detection method in the dedicated line communication process described in the present invention.

[0018] The present invention also provides a computer-readable storage medium, wherein the storage medium stores a computer program, and the computer program is used to execute the link detection method in the dedicated line communication process described in the present invention.

[0019] Beneficial effects:

[0020] 1. The circuit of the present invention can distinguish the normal communication state and the disconnection state of a 2-wire dedicated line, and can also distinguish the normal communication state and the disconnection state of a 4-wire dedicated line. It only needs to judge whether the DETECT1 and DETECT2 signals change to judge whether the dedicated line link is disconnected. The circuit is simple and the performance is reliable, and the disconnection event in the dedicated line communication can be quickly detected.

[0021] 2. In the 4-wire dedicated line detection circuit of the present invention, resistors R11, R12, R13 and operational amplifier U3B constitute an inverting follower circuit, which introduces the signal received at the RX end into the next-level detection circuit, while reducing the impact on the signal received at the original RX end.

[0022] 3. In the 2-wire dedicated line detection circuit of the present invention, resistors R1, R2, R3 and operational amplifier U1B constitute an inverting follower circuit, which inverts the signal received at the RX end and introduces it into the next-level detection circuit, while reducing the impact on the original signal received at the RX end; resistors R5, R6, R7 and operational amplifier U2B constitute an inverting follower circuit, which inverts the TX signal and introduces it into the next-level detection circuit, while reducing the impact on the original TX signal.

[0023] 4. The detection method of the present invention is implemented based on the detection circuit of the present invention. It only needs to judge whether the DETECT1 and DETECT2 signals change to judge whether the dedicated line link is disconnected. The continuous jump of the DETECT1 and DETECT2 signals indicates that the link is normal, and the unchanged DETECT1 and DETECT2 signals indicate that the link is disconnected. Through this simple and practical method, it is possible to detect whether the dedicated line communication link is disconnected.

[0024] 5. The device of the present invention is used to implement the detection method of the present invention, and can distinguish the normal communication state and the broken link state of the 2-wire dedicated line, and can also distinguish the normal communication state and the broken link state of the 4-wire dedicated line. It only needs to judge whether the DETECT1 and DETECT2 signals change to judge whether the dedicated line link is disconnected. The circuit is simple, the performance is reliable, and the broken link event in the dedicated line communication can be quickly detected.

[0025] 6. The medium of the present invention is used to implement the detection method of the present invention, and can distinguish the normal communication state and the broken link state of the 2-wire dedicated line, and can also distinguish the normal communication state and the broken link state of the 4-wire dedicated line. It only needs to judge whether the DETECT1 and DETECT2 signals change to judge whether the dedicated line link is disconnected. The circuit is simple, the performance is reliable, and the broken link event in the dedicated line communication can be quickly detected. BRIEF DESCRIPTION OF THE DRAWINGS

[0026] Figure 1 This is a schematic diagram of a 4-wire dedicated line detection circuit of the present invention.

[0027] Figure 2 This is a schematic diagram of a 2-wire dedicated line detection circuit of the present invention.

[0028] Figure 3 A schematic diagram of the structure of an electronic device provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0029] The present invention is described in detail below with reference to the accompanying drawings and embodiments.

[0030] The invention provides a link detection circuit in a dedicated line communication process, comprising a 4-line dedicated line detection circuit and a 2-line dedicated line detection circuit.

[0031] 4-wire dedicated line detection circuit Figure 1 As shown, resistors R11, R12, R13 and the first operational amplifier U3B form an inverting follower circuit, which introduces the signal received by the RX end into the next-level detection circuit, i.e., the comparison circuit, and reduces the impact on the signal received by the original RX end; resistors R14, R15, R16 and the second operational amplifier U3A form a comparison circuit, which detects the change of the signal received by the RX end, and the result is output to the output pin (U3A-PIN1) of the second operational amplifier, which is recorded as the DETECT1 signal. For a 4-wire dedicated line, during normal communication, the RX end will receive the other party's TX signal, which is sometimes larger than VREF (reference voltage) and sometimes smaller than VREF, so the DETECT1 signal is a continuously changing signal; when the link is disconnected, the RX end cannot receive the other party's TX signal, which is either larger than VREF or smaller than VREF, so the DETECT1 signal is a constant high level or low level.

[0032] Specifically, in this embodiment, the signal received at the RX end is connected to the inverting input terminal of the first operational amplifier (operational amplifier U3B-PIN6) through resistor R12, the VREF reference voltage is connected to the non-inverting input terminal of the first operational amplifier (operational amplifier U3B-PIN5) through resistor R13, and the feedback resistor R11 is connected between the output pin (operational amplifier U3B-PIN7) and the inverting input terminal (operational amplifier U3B-PIN6) of the first operational amplifier; the signal received at the RX end after inversion is connected to the inverting input terminal (U3A-PIN2) of the second operational amplifier through resistor R14, VREF is connected to the non-inverting input terminal (U3A-PIN3) of the second operational amplifier through resistor R15, and the feedback resistor R16 is connected between the output pin (U3A-PIN1) and the non-inverting input terminal (U3A-PIN3) of the second operational amplifier.

[0033] Among them, the value range of resistors R11, R12 and R13 is 5KΩ~10KΩ; the value range of resistors R14 and R15 is 5KΩ~10KΩ; the value of resistor R16 is 80~100 times of R15.

[0034] 2-wire dedicated line detection circuit such as Figure 2 As shown, resistors R1, R2, R3 and the third operational amplifier U1B form an inverting follower circuit, which inverts the signal received by the RX end and introduces it into the next level detection circuit, i.e., the comparison circuit, while reducing the impact on the original signal received by the RX end; resistors R5, R6, R7 and the fourth operational amplifier U2B form an inverting follower circuit, which inverts the local TX signal and introduces it into the next level detection circuit, while reducing the impact on the original TX signal of the local machine; resistors R4, R8, 9 and the fifth operational amplifier U1A form a comparison circuit, which detects the comparison between the signal received by the RX end and the local TX signal, and the result is output to the output pin (U1A-PIN1) of the fifth operational amplifier, recorded as the DETECT2 signal. For a 2-wire dedicated line, during normal communication, the RX end will receive the other party's TX signal and the local TX signal, and the DETECT2 signal is a continuously jumping signal that changes with the change of the other party's TX signal; when the link is disconnected, the RX end cannot receive the other party's TX signal, but the RX end will receive the local TX signal, and the DETECT2 signal is a constant high or low level.

[0035] Specifically, in this embodiment, the signal received at the RX end is connected to the inverting input terminal of the third operational amplifier (operational amplifier U1B-PIN6) through resistor R2, the VREF reference voltage is connected to the non-inverting input terminal of the third operational amplifier (operational amplifier U1B-PIN5) through resistor R3, and the feedback resistor R1 is connected between the output pin (operational amplifier U1B-PIN7) and the inverting input terminal (operational amplifier U1B-PIN6) of the first operational amplifier; the local TX signal is connected to the inverting input terminal (U2B-PIN6) of the fourth operational amplifier through resistor R6, and VREF is connected to the first operational amplifier through resistor R7. The non-inverting input terminal (U2B-PIN5) of the fourth operational amplifier, the feedback resistor R5 is connected between the output pin (U2B-PIN7) and the non-inverting input terminal (U2B-PIN6) of the fourth operational amplifier; the signal received at the inverted RX terminal is connected to the inverting input terminal (U1A-PIN2) of the fifth operational amplifier through resistor R4, the inverted local TX signal is connected to the non-inverting input terminal (U1A-PIN3) of the fifth operational amplifier through resistor R8, and the feedback resistor R9 is connected between the output pin (U1A-PIN1) and the non-inverting input terminal (U1A-PIN3) of the fifth operational amplifier.

[0036] In summary, whether the dedicated line link is disconnected can be determined based on whether the DETECT1 and DETECT2 signals change. Specifically, continuous changes in the DETECT1 and DETECT2 signals indicate that the corresponding link is normal, and remaining unchanged in the DETECT1 and DETECT2 signals indicates that the corresponding link is disconnected.

[0037] Among them, the value range of resistors R1, R2, R3, R5, R6 and R7 is 5KΩ~10KΩ; the value range of resistors R4 and R8 is 5KΩ~10KΩ; the value of resistor R9 is 80~100 times of R8.

[0038] Furthermore, the 4-wire dedicated line detection circuit and the 2-wire dedicated line detection circuit of the present invention can be implemented by using 3 dual operational amplifiers or 5 single operational amplifiers.

[0039] The present invention also provides a link detection method in a dedicated line communication process, which is implemented based on the circuit of the present invention and includes the following steps:

[0040] Constructing the 4-wire dedicated line detection circuit and the 2-wire dedicated line detection circuit of the present invention;

[0041] The RX end receives the signal;

[0042] Check whether the DETECT1 signal and the DETECT2 signal change; if the DETECT1 signal and the DETECT2 signal continuously change, it indicates that the corresponding link is normal; if the DETECT1 signal and the DETECT2 signal remain unchanged, it indicates that the corresponding link is disconnected.

[0043] The embodiment of the present application also provides an electronic device, Figure 3 The structure of the electronic device provided by the embodiment of the present invention is shown. For example, the electronic device 30 may include a processor 31, a memory 32 and a transmission device 33. The processor 31 is used to execute the link detection method in the dedicated line communication process mentioned in the above embodiment, wherein the processor and the memory may be connected by a bus or other means, taking the bus connection as an example. The transmission device may be connected to the processor and the memory by wire or wirelessly. The memory, as a non-transient computer-readable storage medium, may be used to store non-transient software programs, non-transient computer executable programs and modules, such as program instructions / modules corresponding to the link detection method in the dedicated line communication process in the embodiment of the present application. The processor executes various functional applications and data processing of the processor by running the non-transient software programs, instructions and modules stored in the memory, that is, the link detection method in the dedicated line communication process in the above method embodiment is implemented. The memory may include a program storage area and a data storage area, wherein the program storage area may store an operating system, an application required by at least one function; the data storage area may store data created by the processor, etc. In addition, the memory may include a high-speed random access memory, and may also include a non-transient memory, such as at least one disk storage device, a flash memory device, or other non-transient solid-state storage device. In some embodiments, the memory may optionally include a memory remotely arranged relative to the processor, and these remote memories may be connected to the processor via a network. Examples of the above-mentioned network include, but are not limited to, the Internet, an intranet, a local area network, a mobile communication network, and a combination thereof. The one or more modules are stored in the memory, and when executed by the processor, the link detection method in the dedicated line communication process in the embodiment is executed.

[0044] As another aspect, the present application also provides a computer-readable storage medium, which may be a computer-readable storage medium included in the device described in the above embodiment; or it may be a computer-readable storage medium that exists independently and is not assembled into the device. The computer-readable storage medium may be a tangible storage medium, such as a random access memory (RAM), a memory, a read-only memory (ROM), an electrically programmable ROM, an electrically erasable programmable ROM, a register, a floppy disk, a hard disk, a removable storage disk, a CD-ROM, or any other form of storage medium known in the technical field. The computer-readable storage medium stores one or more programs, and the programs are used by one or more processors to execute the link detection method described in the dedicated line communication process of the present application.

[0045] In summary, the above are only preferred embodiments of the present invention and are not intended to limit the protection scope of the present invention. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the present invention should be included in the protection scope of the present invention.

Claims

1. A link detection circuit in a dedicated line communication process, characterized in that: It includes a 4-wire dedicated line detection circuit and a 2-wire dedicated line detection circuit; the 4-wire dedicated line detection circuit includes a first inverting follower circuit and a first comparison circuit, the first inverting follower circuit introduces the signal received at the RX end into the comparison circuit, the first comparison circuit is used to detect the change of the signal received at the RX end, and the result is output to the output pin of the operational amplifier in the first comparison circuit, which is recorded as the DETECT1 signal; the 2-wire dedicated line detection circuit includes a second inverting follower circuit, a third inverting follower circuit and a second comparison circuit; the second inverting follower circuit inverts the signal received at the RX end and introduces it into the comparison circuit; the third inverting follower circuit inverts the local TX signal and introduces it into the second comparison circuit; the second comparison circuit is used to detect the comparison between the signal received at the RX end and the local TX signal, and the result is output to the output pin of the operational amplifier in the second comparison circuit, which is recorded as the DETECT2 signal; whether the dedicated line link is disconnected is determined according to whether the DETECT1 and DETECT2 signals change.

2. The circuit according to claim 1, characterized in that Resistor R12, resistor R13 and the first operational amplifier constitute a first inverting follower circuit; resistor R14, resistor R15, resistor R16 and the second operational amplifier constitute a first comparison circuit; wherein, the signal received at the RX end is connected to the inverting input terminal of the first operational amplifier through resistor R12, the VREF reference voltage is connected to the non-inverting input terminal of the first operational amplifier through resistor R13, and the feedback resistor R11 is connected between the output pin and the inverting input terminal of the first operational amplifier; the signal received at the RX end after inversion is connected to the inverting input terminal of the second operational amplifier through resistor R14, VREF is connected to the non-inverting input terminal of the second operational amplifier through resistor R15, and the feedback resistor R16 is connected between the output pin and the non-inverting input terminal of the second operational amplifier.

3. The circuit according to claim 2, characterized in that The value range of resistors R11, R12 and R13 is 5KΩ~10KΩ; the value range of resistors R14 and R15 is 5KΩ~10KΩ; the value of resistor R16 is 80~100 times of R15.

4. The circuit according to claim 1, characterized in that , resistor R1, resistor R2, resistor R3 and the third operational amplifier constitute a second inverting follower circuit; resistor R5, resistor R6, resistor R7 and the fourth operational amplifier constitute a third inverting follower circuit; resistor R4, resistor R8, resistor 9 and the fifth operational amplifier constitute a second comparison circuit; wherein, the signal received at the RX end passes through resistor R2 to the inverting input terminal of the third operational amplifier, the VREF reference voltage passes through resistor R3 to the non-inverting input terminal of the third operational amplifier, and the feedback resistor R1 is connected to the output pin and the inverting input terminal of the first operational amplifier; the local TX signal passes through resistor R6 to the inverting input terminal of the fourth operational amplifier, VREF passes through resistor R7 to the non-inverting input terminal of the fourth operational amplifier, and the feedback resistor R5 is connected between the output pin and the non-inverting input terminal of the fourth operational amplifier; the signal received at the RX end after inversion passes through resistor R4 to the inverting input terminal of the fifth operational amplifier, the local TX signal after inversion passes through resistor R8 to the non-inverting input terminal of the fifth operational amplifier, and the feedback resistor R9 is connected between the output pin and the non-inverting input terminal of the fifth operational amplifier.

5. The circuit according to claim 4, characterized in that The value range of resistors R1, R2, R3, R5, R6 and R7 is 5KΩ to 10KΩ; the value range of resistors R4 and R8 is 5KΩ to 10KΩ; the value of resistor R9 is 80 to 100 times that of R8.

6. The circuit according to any one of claims 1 to 5, characterized in that ,The continuous jump of DETECT1 and DETECT2 signals indicates that the corresponding link is normal, and the ,DETECT1 and DETECT2 signals remain unchanged indicating that the corresponding link is disconnected.

7. The circuit according to claim 6, characterized in that ,The 4-wire dedicated line detection circuit and the 2-wire dedicated line detection circuit are implemented by using 3 dual operational amplifiers or 5 single operational amplifiers.

8. A link detection method in a dedicated line communication process, characterized in that , including the following steps: Constructing the 4-wire dedicated line detection circuit and the 2-wire dedicated line detection circuit as described in any one of claims 1 to 7; the RX end receives the signal; Check whether the DETECT1 signal and the DETECT2 signal change; if the DETECT1 signal and the DETECT2 signal continuously change, it indicates that the corresponding link is normal; if the DETECT1 signal and the DETECT2 signal remain unchanged, it indicates that the corresponding link is disconnected.

9. An electronic device, characterized in that: The electronic device includes a processor and a memory for storing executable instructions of the processor; the processor is used to read the executable instructions from the memory and execute the instructions to implement the link detection method in the dedicated line communication process described in claim 8 above.

10. A computer-readable storage medium, characterized in that: The storage medium stores a computer program, and the computer program is used to execute the link detection method in the dedicated line communication process described in claim 8 above.

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