Integrated circuit test system and test method

Abstract

The invention discloses an integrated circuit test system and test method, and belongs to the technical field of integrated circuit test, and the test method comprises the steps: strip test: carrying out the function and performance detection of a product cut into strips; uV irradiation: using ultraviolet rays to irradiate the product, and carrying out UV decomposition treatment; film tearing: removing the UV film on the surface of the product; and testing and packaging: carrying out electric leakage testing on the products through an NY20 automatic sorting machine and an MS7000 semiconductor testing machine, screening out EOS qualified products, and packaging the products which are tested to be qualified. In QFN packaging, an original OS2000 test system is replaced by an MS7000 test system, an electric leakage test function is added, the quality and reliability of a product are remarkably improved, EOS abnormity is effectively intercepted, possible customer complaints are avoided, the market competitiveness of the product is ensured, in addition, the method is suitable for mass production of a production line, and the production efficiency is improved. And remarkable technical progress and economic benefits can be brought to the field of integrated circuit testing.

Description

Technical Field

[0001] The present invention belongs to the technical field of integrated circuit testing, and in particular relates to an integrated circuit testing system and a testing method. Background Art

[0002] In the field of integrated circuit testing, electrical over stress (EOS) is a common challenge that may cause product failure. The OS2000 test system currently used in the packaging process can only screen out waste products through the OS program, but cannot effectively identify the EOS failure problem of the QFN package type. However, after a detailed investigation according to the production process, no obvious cause of the abnormality was found. Therefore, in order to solve this problem, it is necessary to propose a new test solution in order to intercept EOS abnormalities by replacing the test system and improve the overall quality of the product. Summary of the invention

[0003] In view of the above situation, in order to overcome the defects of the prior art, the present invention replaces the test system to intercept EOS anomalies and improve the overall quality of the product.

[0004] In order to achieve the above-mentioned purpose, the following technical solutions are adopted: On the one hand, the present invention provides an integrated circuit testing method, comprising:

[0005] Strip test: Function and performance testing of products cut into strips;

[0006] UV exposure: Use ultraviolet rays to irradiate the product for UV treatment;

[0007] Film removal: remove the UV film on the surface of the product;

[0008] Testing and packaging: The products are tested for leakage current using the NY20 automatic sorting machine and the MS7000 semiconductor testing machine to select EOS qualified products, and the qualified products are packaged.

[0009] On the other hand, the present invention also provides an integrated circuit testing system, comprising:

[0010] Semiconductor testing machine;

[0011] An automatic sorting machine connected to the semiconductor testing machine;

[0012] a load board mounted above the semiconductor testing machine;

[0013] A unit under test fixedly mounted on the automatic sorting machine;

[0014] A chip test socket mounted on the unit under test;

[0015] A cable with two ends connected to the load board and the unit under test respectively.

[0016] Furthermore, the load board provides an additional electrical interface for the unit under test during the test process.

[0017] Furthermore, the semiconductor tester can send a test signal to the unit under test and receive a response signal from the unit under test to evaluate whether its performance and function meet the requirements.

[0018] Furthermore, one end of the cable is inserted into the card slot of the load board to establish an electrical connection between the semiconductor tester and the load board, and the other end of the cable is inserted into the card slot of the unit under test to form a complete test loop.

[0019] Furthermore, the semiconductor testing machine comprises:

[0020] Channel board, used to control the corresponding test channel to test the integrated circuit;

[0021] HVI board is a high voltage input board that provides voltage in a single channel and detects the current of product pins;

[0022] DVI board is a dual-channel voltage input board that provides high voltage in two channels and detects the current of product pins;

[0023] OVI board is an eight-way voltage / current source board, which provides eight high voltages and detects the current of product pins;

[0024] ACS board is a mother-child card;

[0025] AWG board, an arbitrary waveform generator board, is used for mixed signals;

[0026] TMU board, a time measurement unit board, is used to accurately measure time-related parameters

[0027] The DCBH board is a low-speed digital board that tests DC current.

[0028] The beneficial effects of the present invention are as follows: in the QFN package, the present invention adds a leakage test function by replacing the original OS2000 test system with an MS7000 test system, significantly improving the quality and reliability of the product, effectively intercepting EOS anomalies, thereby avoiding possible customer complaints and ensuring the market competitiveness of the product. In addition, the method of the present invention is suitable for mass production of production lines, and can bring significant technological progress and economic benefits to the field of integrated circuit testing. BRIEF DESCRIPTION OF THE DRAWINGS

[0029] Figure 1 A schematic diagram of the structure of an integrated circuit testing system of the present invention;

[0030] Figure 2 The present invention is a flow chart of an integrated circuit testing method.

[0031] The accompanying drawings are used to provide further understanding of the present invention and constitute a part of the specification. They are used to explain the present invention together with the embodiments of the present invention and do not constitute a limitation of the present invention.

[0032] Legend: 1. Semiconductor testing machine; 2. Automatic sorting machine; 3. Load board; 4. Unit under test; 5. Chip test socket; 6. Cable. DETAILED DESCRIPTION

[0033] The technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, rather than all the embodiments. Based on the embodiments in the present invention, all other embodiments obtained by ordinary technicians in this field without making creative work are within the scope of protection of the present invention.

[0034] Unless otherwise defined, all professional and scientific terms used herein have the same meanings as those familiar to those skilled in the art. In addition, any methods and materials similar or equivalent to those described herein may be applied to the present invention. The preferred implementation methods and materials described herein are for demonstration purposes only and are not intended to limit the content of this application.

[0035] The experimental methods in the following examples are conventional methods unless otherwise specified, and the experimental materials used in the following examples are purchased from commercial channels unless otherwise specified.

[0036] Example 1

[0037] A method for testing integrated circuits

[0038] The test method includes:

[0039] Strip test: Function and performance testing of products cut into strips;

[0040] UV exposure: Use ultraviolet rays to irradiate the product for UV treatment;

[0041] Film removal: remove the UV film on the surface of the product;

[0042] Testing and packaging: The products are tested for leakage current using the NY20 automatic sorting machine and the MS7000 semiconductor testing machine to select EOS qualified products, and the qualified products are packaged.

[0043] Example 2

[0044] Integrated circuit testing system

[0045] An integrated circuit testing system, comprising:

[0046] Semiconductor testing machine 1;

[0047] An automatic sorting machine 2 connected to the semiconductor testing machine 1;

[0048] A load board 3 mounted above the semiconductor testing machine 1;

[0049] A unit under test 4 fixedly mounted on the automatic sorting machine;

[0050] A chip test socket 5 mounted on the unit under test;

[0051] A cable 6 with two ends connected to the load board and the unit under test respectively.

[0052] The load board 3 provides an additional electrical interface for the unit under test 4 during the test process.

[0053] The semiconductor tester 1 can send a test signal to the unit under test 4 and receive a response signal from the unit under test 4 to evaluate whether its performance and function meet the requirements.

[0054] One end of the cable 6 is inserted into the card slot of the load board 3 to establish an electrical connection between the semiconductor tester 1 and the load board 3 , and the other end of the cable 6 is inserted into the card slot of the unit under test 4 to form a complete test loop.

[0055] The semiconductor testing machine 1 comprises:

[0056] Channel board, used to control the corresponding test channel to test the integrated circuit;

[0057] HVI board is a high voltage input board that provides voltage in a single channel and detects the current of product pins;

[0058] DVI board is a dual-channel voltage input board that provides high voltage in two channels and detects the current of product pins;

[0059] OVI board is an eight-way voltage / current source board, which provides eight high voltages and detects the current of product pins;

[0060] ACS board is a mother-child card;

[0061] AWG board, an arbitrary waveform generator board, is used for mixed signals;

[0062] TMU board, a time measurement unit board, is used to accurately measure time-related parameters

[0063] The DCBH board is a low-speed digital board that tests DC current.

[0064] Comparative Example 1

[0065] This comparative example provides a method for testing an integrated circuit using an OS2000 test system, comprising:

[0066] Strip testing: testing the function and performance of products cut into strips;

[0067] UV treatment: use ultraviolet rays to irradiate the product for UV treatment;

[0068] Tear off the film and remove the UV film on the surface of the product;

[0069] Testing and packaging: Use automatic sorting machines and OS2000 semiconductor testing machines to perform OS testing on products, and package qualified products.

[0070] The OS2000 semiconductor tester comprises: an OS board.

[0071] Results Analysis

[0072] Comparing the detection methods of Example 1 and Comparative Example 1, since the OS2000 semiconductor tester only has a Channel board, it only supports OS testing and does not support other functional parameter tests, while the MS7000 semiconductor tester includes Channel, OVI, DVI, TMU, DCBL and other boards. Since the leakage current test requires the above boards, the MS7000 semiconductor tester supports leakage current testing. Therefore, the present invention can significantly improve the quality and reliability of the product and effectively intercept EOS anomalies.

[0073] Although embodiments of the present invention have been shown and described, it will be appreciated by those skilled in the art that various changes, modifications, substitutions and variations may be made to the embodiments without departing from the principles and spirit of the present invention, and that the scope of the present invention is defined by the appended claims and their equivalents.

[0074] The present invention and its implementation methods are described above, which is not restrictive. The drawings are only one of the implementation methods of the present invention, and the actual application is not limited thereto. In short, if ordinary technicians in the field are inspired by it and design methods and embodiments similar to the technical solution without creativity without departing from the purpose of the invention, they should all fall within the protection scope of the present invention.

Claims

1. An integrated circuit testing method, characterized in that: include: Strip test: Function and performance testing of products cut into strips; UV exposure: Use ultraviolet rays to irradiate the product for UV treatment; Film removal: remove the UV film on the surface of the product; Testing and packaging: The products are tested for leakage current using the NY20 automatic sorting machine and the MS7000 semiconductor testing machine to select EOS qualified products, and the qualified products are packaged.

2. An integrated circuit testing system for testing using the method of claim 1, characterized in that: include: Semiconductor tester (1); An automatic sorting machine (2) connected to the semiconductor testing machine (1); A load board (3) mounted above the semiconductor testing machine (1); A unit to be tested (4) fixedly mounted on the automatic sorting machine; A chip test socket (5) mounted on the unit under test; A cable (6) having two ends connected to the load board and the unit under test respectively.

3. The integrated circuit testing system according to claim 2, wherein: The load board (3) provides an additional electrical interface for the unit under test (4) during the test process.

4. The integrated circuit testing system according to claim 2, wherein: The semiconductor tester (1) is capable of sending a test signal to a unit under test (4) and receiving a response signal from the unit under test (4) to evaluate whether its performance and function meet the requirements.

5. The integrated circuit testing system according to claim 2, wherein: One end of the cable (6) is inserted into a slot of a load board (3) to establish an electrical connection between the semiconductor tester (1) and the load board (3), and the other end of the cable (6) is inserted into a slot of a unit under test (4) to form a complete test loop.

6. The integrated circuit testing system according to claim 2, wherein: The semiconductor testing machine (1) comprises: Channel board, used to control the corresponding test channel to test the integrated circuit; HVI board is a high voltage input board that provides voltage in a single channel and detects the current of product pins; DVI board is a dual-channel voltage input board that provides high voltage in two channels and detects the current of product pins; The OVI board is an eight-way voltage / current source board that provides eight high voltages and detects the current of product pins; the ACS board is a mother-daughter card; AWG board, an arbitrary waveform generator board, is used for mixed signals; The TMU board is a time measurement unit board used to accurately measure time-related parameters. The DCBH board is a low-speed digital board used to test DC current.

Images