Clock-free wake-up circuit and method for low-power-consumption MCU (Microprogrammed Control Unit)

Abstract

The invention discloses a clock-free wake-up circuit of a low-power-consumption MCU (Microprogrammed Control Unit). The clock-free wake-up circuit comprises an external signal wake-up module, a linear voltage regulator, a power management unit, a clock generation control module and a CPU (Central Processing Unit), the external signal wake-up module receives an external wake-up signal of the MCU, and generates a clock enable signal and a power enable signal based on the external wake-up signal; the clock generation control module generates an internal wake-up signal after receiving the clock enable signal and sends the internal wake-up signal to the power management unit; and the power supply management unit is used for performing reset power supply on the clock generation control module and the CPU and awakening the CPU, the linear voltage regulator and the clock generation control module after receiving an internal awakening signal. According to the invention, the PMU is started by using the external wake-up signal to complete wake-up, so that the PMU is prevented from using a low-speed clock which runs all the time, and the power consumption of the PMU and the MCU is reduced; and the wake-up mark is cleared by using the clearing signal, so that the adverse effect of a plurality of wake-up marks is avoided.

Description

Technical Field

[0001] The present invention relates to the field of chip technology, and in particular to a clock-free wake-up circuit and method for a low-power MCU. Background Art

[0002] With the continuous development of Internet of Things technology, MCU plays an increasingly important role in it. The important indicator for measuring an MCU in the Internet of Things system is power consumption. The demand for low power consumption of MCU is gradually increasing. Low-power MCU can not only reduce the service life of the Internet of Things system in a battery-powered environment, but also reduce the operating temperature of the MCU chip to extend its service life.

[0003] At present, the main MCU low power processing method is to divide multiple power domains, and then shut down as many clocks and power supplies inside the MCU as possible when the CPU is not working. This is usually achieved through the power management unit PMU in conjunction with the clock reset power switch to control the MCU low power consumption. When the MCU is in low power mode, the MCU needs to have real-time response functions. In general technology, the MCU needs to maintain a low-speed clock for the PMU to detect various wake-up signals to wake up the low power mode. This undoubtedly increases the power consumption of the MCU chip in low power mode, which is not conducive to the use of scenarios with strict power consumption requirements. In addition, because the wake-up flag is often used when waking up the low-power MCU, the MCU may not be able to wake up when it repeatedly enters the low power mode.

[0004] In other words, the current MCU low power consumption processing method includes at least the following two problems: 1) The MCU needs to set a low-speed clock that always runs for the PMU to detect whether there is a wake-up signal, which undoubtedly increases the power consumption of the PMU and thus increases the power consumption of the MCU; 2) Due to the influence of the wake-up flag, the low-power MCU may not be able to wake up when repeatedly entering the low-power mode. Summary of the invention

[0005] In view of the above two problems, the purpose of the present invention is to propose a clock-free wake-up circuit and method for a low-power MCU, which uses an external wake-up signal to start the PMU and then complete the wake-up, so that the PMU does not need to use a low-speed clock that is always running, effectively reducing the power consumption of the PMU when the MCU is in low-power mode; at the same time, the wake-up flag is cleared by a clear signal to avoid the problem of multiple wake-up flags and failure to wake up.

[0006] This is achieved through the following technical solutions: In the first aspect, a clock-free wake-up circuit for a low-power MCU is proposed, comprising an external signal wake-up module, a linear regulator, a power management unit, a clock generation control module and a CPU; wherein the external signal wake-up module is used to receive an external wake-up signal of the MCU, and then generate a clock enable signal and a power enable signal based on the external wake-up signal; the clock generation control module is used to generate an internal wake-up signal after receiving the clock enable signal and send it to the power management unit; the power management unit is used to reset and power the clock generation control module and the CPU via the linear regulator after receiving the power enable signal, and is also used to wake up the CPU, the linear regulator and the clock generation control module after receiving the internal wake-up signal.

[0007] By waking up the power management unit through the external signal wake-up module, the PMU does not need to use the low-speed clock that is always running to detect the wake-up signal, which effectively reduces the power consumption of the MCU when it is in low-power mode.

[0008] Preferably, the clock generation control module includes an HSI oscillator and a counter module. After the clock generation control module receives a clock enable signal, the HSI oscillator and the counter module are turned on; the counter module counts according to the clock enable signal, and when the count reaches a threshold, the HSI oscillator generates an internal wake-up signal and sends it to the power management unit.

[0009] Preferably, the low power consumption mode of the MCU includes a stop mode and a standby mode, and the CPU has a built-in fclk fast clock; when the MCU enters any low power consumption mode, the power management unit stops supplying power to the clock generation control module; when the MCU exits from any low power consumption mode, the power management unit supplies power to the clock generation control module and the fclk fast clock.

[0010] Preferably, the external signal wake-up module includes a wake-up edge detection register, a wake-up record register and a power control register; wherein the wake-up edge detection register acts as a wake-up trigger, records the wake-up source and sets a wake-up flag when an external wake-up signal is detected; the wake-up record register records the wake-up status according to the external wake-up signal; the power control register is based on software configuration, and is used to generate a clear signal when an external wake-up signal is received to clear the wake-up flag.

[0011] Preferably, the CPU is connected to an LSE low-speed external oscillator. Before the MCU enters the low-power mode, the LSE low-speed external oscillator is used as the RTC real-time clock, and the signal of the RTC real-time clock when an alarm event occurs is set as the alarm interrupt signal; when the MCU is in the low-power mode and an alarm event occurs on the RTC real-time clock, the external signal wake-up module generates a clock enable signal and a power enable signal based on the alarm interrupt signal.

[0012] Preferably, the power management unit is provided with a state machine and an ana_ctrl analog controller, the state machine is used to control the power supply and MCU mode, the ana_ctrl analog controller outputs based on the state of the state machine, or outputs based on the settings of external software, or outputs based on the default values ​​of the ana_ctrl analog controller.

[0013] Preferably, when the ana_ctrl analog controller outputs based on the settings of the external software, the SYNC synchronization circuit is used to synchronize the clock of the external software and the clock of the state machine, and then MUX multiplexing processing is performed based on the settings of the external software and the state of the state machine, and the processing result is used as the output of the ana_ctrl analog controller.

[0014] In the second aspect, a clock-free wake-up method for a low-power MCU is proposed, and the MCU is woken up by using the above-mentioned clock-free wake-up circuit of the low-power MCU, including the following steps: S1, using an external signal wake-up module to receive an external wake-up signal of the MCU, and then generating a clock enable signal and a power enable signal based on the external wake-up signal; S2, using a clock generation control module to receive the clock enable signal in step S1, generate an internal wake-up signal and send it to a power management unit; using the power management unit to receive the power enable signal in step S1, and after receiving the power enable signal, reset the clock generation control module and the CPU through a linear regulator; S3, using the power management unit to receive the internal wake-up signal in step S2, and wake up the CPU, the linear regulator and the clock generation control module based on the internal wake-up signal.

[0015] Compared with the prior art, the present invention has the following beneficial effects: The technical solution of the present invention uses an external wake-up signal to start the PMU and then complete the wake-up, so that the PMU does not need to use a low-speed clock that is always running, effectively reducing the power consumption of the PMU when the MCU is in a low-power mode; at the same time, a clear signal is also used to clear the wake-up flag to avoid the problem of multiple wake-up flags and failure to wake up. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] Figure 1 It is a schematic diagram of the structure of a clock-free wake-up circuit for a low-power MCU; Figure 2 Schematic diagram of the structure that sends enable signals to the HSI oscillator and linear regulator; Figure 3 This is a schematic diagram of the structure of the three control register outputs. DETAILED DESCRIPTION

[0017] The technical solutions in the embodiments of the present invention will be described in detail below in conjunction with the accompanying drawings in the embodiments of the present invention.

[0018] like Figure 1 The figure shows a schematic diagram of the structure of a clockless wake-up circuit of a low-power MCU, which uses an external wake-up signal to wake up the PMU, and then wake up the entire MCU, effectively reducing the power consumption of the PMU. The clockless wake-up circuit of the low-power MCU specifically includes an external signal wake-up module, a linear regulator, a power management unit, a clock generation control module, and a CPU.

[0019] The external signal wake-up module is used to receive the external wake-up signal of the MCU, and then generate a clock enable signal and a power enable signal based on the external wake-up signal. The clock enable signal is sent to the clock generation control module, and the power enable signal is sent to the power management unit. The external signal wake-up module includes a wake-up edge detection register, a wake-up record register, and a power control register. Among them, the wake-up edge detection register acts as a wake-up trigger, records the wake-up source and sets a wake-up flag when an external wake-up signal is detected; the wake-up record register records the wake-up status according to the external wake-up signal; the power control register is based on software configuration, and is used to generate a clear signal when an external wake-up signal is received to clear the wake-up flag.

[0020] The clock generation control module is used to generate an internal wake-up signal after receiving a clock enable signal and send it to the power management unit. The clock generation control module includes an HSI oscillator and a counter module. After the clock generation control module receives the clock enable signal, the HSI oscillator and the counter module are turned on; the counter module counts according to the clock enable signal, and when the count reaches the threshold, the HSI oscillator generates an internal wake-up signal and sends it to the power management unit. Among them, whether the threshold is reached can be compared by the comparator CMP, and the current value of the count in the enable signal is compared with the threshold set in the comparator CMP. When the current value meets the threshold, the HSI oscillator is allowed to generate an internal wake-up signal and send it to the power management unit.

[0021] The power management unit is used to reset the clock generation control module and the CPU via the linear regulator after receiving the power enable signal, and is also used to wake up the CPU, the linear regulator and the clock generation control module after receiving the internal wake-up signal. The power management unit is provided with a state machine and an ana_ctrl analog controller. The state machine is used to control the power supply and the mode of the MCU. The ana_ctrl analog controller outputs based on the state of the state machine, or outputs based on the settings of the external software, or outputs based on the default value of the ana_ctrl analog controller.

[0022] In this embodiment, the low power consumption mode of the MCU includes a stop mode and a standby mode, and the CPU has a built-in fclk fast clock; when the MCU enters any low power consumption mode, the power management unit stops supplying power to the clock generation control module; when the MCU exits from any low power consumption mode, the power management unit supplies power to the clock generation control module and the fclk fast clock.

[0023] In this embodiment, the CPU is connected to an LSE low-speed external oscillator. Before the MCU enters the low-power mode, the LSE low-speed external oscillator is used as the RTC real-time clock, and the signal of the RTC real-time clock when an alarm event occurs is set as the alarm interrupt signal; when the MCU is in the low-power mode and an alarm event occurs on the RTC real-time clock, the external signal wake-up module generates a clock enable signal and a power enable signal based on the alarm interrupt signal.

[0024] It should be noted that the MCU's low-power mode is divided into two types, one is the stop mode that turns off the clock, and the other is the standby mode that turns off the clock and power. The stop mode is implemented based on the CPU's built-in deep sleep mode combined with the peripheral clock control mechanism. In the power-down domain of the MMCU, all clocks except the fclk fast clock of the CPU core are stopped. The fclk fast clock needs to be used as a wake-up clock to wake up, and the functions of the HSI oscillator and HSE oscillator in the CGU module are disabled; the LSI oscillator and LSE oscillator can remain running to maintain the use of the timer module, and as a wake-up source to generate an interrupt to wake up the low-power mode and the fclk fast clock.

[0025] The standby mode is implemented based on the deep sleep mode of the CPU core module combined with clock power control. Turn off the power of the power-down domain, and configure to retain the LSE for RTC real-time clock wakeup, and all other crystal oscillators are enabled and turned off. Only the rising and falling edges of the WKUP pin or the RTC alarm after triggering and various reset signals can wake up the MCU from standby mode.

[0026] In this implementation case, since the MCU will turn off the clock in standby mode, and there is no clock when the wake-up signal comes, it is impossible to use the usual synchronous register to register the wake-up source and the edge detection of the wake-up, so an asynchronous circuit is used to implement it. Before entering the standby mode, the edge_sel register and the wkup_en register need to be configured by the CPU to confirm the rising and falling edges triggered by the wake-up signal and the shielding source. By configuring the edge_sel register, the trigger edge of the wake-up signal can be specified as the rising edge, the falling edge, or the double edge, and by configuring the wkup_en register, a specific wake-up source can be enabled or disabled. These configurations ensure that the MCU can correctly respond to external events in low-power mode, thereby achieving efficient low-power management.

[0027] Use the WKUP_pad_x input signal WKUP_pad_i_x as the clock of the WKUP_edge_det_x wake-up edge detection register. The data input of the register is connected to a high level to detect the WKUP_pad_x edge and record the wake-up source. Use the edge_sel register to select the WKUP_pad_x rising edge or falling edge detection result output. Use WKUP_EN to shield and summarize the wake-up source. The output signal WKUP_det_i is used as the WKUP_record register clock to record the wake-up status. The WKUP_clear wake-up clear signal generated by the power control register configured by the software is logically ORed with the vdd_rstn power supply reset signal, and the result of the logical OR is used as the Rstn reset signal to clear and reset each register and counter that needs to be reset. Since there is no clock, the Rstn reset signal is not synchronized.

[0028] RTC wake-up requires that before entering low power mode, the CPU configuration retains LSE as the RTC clock, and the RTC interrupt signal rtc_int is used as the clock input of rtc_posedge_det. When an RTC alarm event occurs, an RTC interrupt will be generated. At this time, rtc_int is pulled high, and rtc_posedge_det will detect the occurrence of a rising edge. The output signal rtc_posedge_det_o is used as the WKUP_record register clock to record the wake-up status. After completing the wake-up from low power mode, the WKUP_clear wake-up clear signal can be generated by software to complete the clearing of the wake-up flag to avoid the problem of being unable to wake up due to entering low power mode again.

[0029] like Figure 2 As shown, it is a schematic diagram of the structure of the enable signal sent by the HSI oscillator and the linear regulator. The enable signal of the HSI oscillator and the linear regulator needs to be operated through corresponding combinational logic in different modes.

[0030] In stop mode, the OR gate OR_1 receives the en_hsi_fr_ctrl signal from the state machine in the PMU and asks it to be set to 0. At this time, the other two inputs of OR_1 are also 0, then en_hsi becomes 0 to turn off the HSI oscillator. When exiting stop mode, the en_stop signal is logically ORed with the !sleepdp_en signal and set to 1. This signal comes from the system clock domain and reaches the working clock domain through the synchronization circuit sync. The other two inputs remain unchanged, then the en_hsi output by OR_1 becomes 1 to turn on the HSI oscillator. The HSI_clk_cnt counter completes the clk count of the HSI oscillator output, that is, the clock count; when the threshold is reached, the output signal hsi_stable indicates validity. At the same time, en_hsi serves as the reset interface of the counter. Each time the en_hsi falling edge occurs, the counter will be cleared to ensure the next count works normally. The clock gating of PMU is controlled by hsi_stable. When hsi_stable is valid, the clock gating of PMU is turned on to provide clock to PMU. After PMU is turned on, en_hsi_fr_ctrl is set to 1. At this time, the output of OR_1 is controlled by en_hsi_fr_ctrl, and the other two changes will not affect the enable signal of HSI.

[0031] In standby mode, after OR_1 receives en_hsi_fr_ctrl set to 0 from the PMU state machine control, the other two inputs of OR_1 are also 0, then en_hsi becomes 0 to turn off HSI, and the control signal en_ldo_fr_ctrl corresponding to the en_ldo signal is required to be set to 0. At this time, the other input of the OR gate OR_2 is 0, then en_ldo becomes 0 to turn off the LDO linear regulator. When exiting standby mode, the wkup_flag wake-up flag from WKUP_region is set to 1. At this time, the other two signals of OR_1 remain unchanged, en_hsi becomes 1 to turn on HSI, and en_ldo output by OR_2 becomes 1 to turn on the LDO linear regulator. The clk count of HSI output is completed through the HSI_clk_cnt counter. When the threshold is reached, the output hsi_stable is valid. At the same time, en_hsi is used as the clearing interface of the counter. Every time the falling edge of en_hsi occurs, the counter will be cleared to ensure the normal operation of the next count. Control the clock gating of PMU through hsi_stable. When hsi_stable is valid, turn on the clock gating of PMU to provide clock to PMU. After PMU is turned on, set en_hsi_fr_ctrl to 1. At this time, the output of OR_1 is controlled by en_hsi_fr_ctrl, and the other two changes will not affect the enable signal of HSI. At the same time, set en_ldo_fr_ctrl to 1. At this time, the output of OR_2 is controlled by en_ldo_fr_ctrl. Clearing the wkup_flag wake-up flag does not affect the enable signal of OR gate OR_3 to the LDO linear regulator.

[0032] like Figure 3As shown in the figure, it is a schematic diagram of the structure of the output of the three power control registers, which correspond to the structure when the output state of the HSE oscillator, HSI oscillator and PLL phase-locked loop is ON. When the ana_ctrl analog controller outputs based on the settings of the external software, the SYNC synchronization circuit is used to synchronize the system clock signal of the external software and the clock signal of the state machine, and then MUX multiplexing is performed based on the settings of the external software and the state signal of the state machine, and the processing result is used as the output of the ana_ctrl analog controller. MUX is a multiplexer. When the MCU is powered off and enters any low-power mode, the power management unit will control the shutdown of the HSI oscillator and the linear regulator. Therefore, when waking up from the low-power mode of power off, the linear regulator and HSI oscillator must be turned on first, and after the clock is stable, the clock is provided to the PMU to start the PMU wake-up process. The external software here is the same software as the software connected to the power control register. The en_hsi_fr_ctrl signal that controls the oscillator and the en_ldo_fr_ctrl signal that controls the corresponding register are both generated by the ana_ctrl analog controller of the PMU. The ana_ctrl analog controller is also responsible for controlling the switches of all oscillators in the clock generation control module.

[0033] Specifically, the three outputs of the ana_ctrl analog controller are: hardware control output based on the PMU state machine. When the PMU state machine enters the shutdown state of the LDO linear regulator, the output is controlled by the state machine signal PMU_fsm_state, and the HSE oscillator is in the HSEON state; the register and PLL phase-locked loop connected to the oscillator are changed by software based on the bus interface to control the switch of the oscillator. This method has a lower priority than hardware control and cannot be used to control the LDO linear regulator. The PLL phase-locked loop is in the PLLON state and can generate a higher frequency clock signal; after the register is reset, the output default value is controlled, where the HSI oscillator and the linear regulator are global reset signals of the normally open domain, the HSI oscillator is in the HSION state, and the remaining crystal oscillators can be reset by the power-off domain. Except for the linear regulator, the other peripherals can be controlled by the PMU state machine and the bus interface. The bus interface connects to the software, and its clock is the system clock. The PMU state machine and the PMU clock need to be synchronized. A sync circuit is connected to the bus interface to complete the synchronization of the system clock to the PMU clock, and then the two are MUXed as the input of the ana_ctrl control register.

[0034] In addition, the present application also proposes a clockless wake-up method for a low-power MCU, which uses the above-mentioned clockless wake-up circuit of the low-power MCU to wake up the MCU, including the following steps: S1, using an external signal wake-up module to receive an external wake-up signal of the MCU, and then generating a clock enable signal and a power enable signal based on the external wake-up signal; S2, using a clock generation control module to receive the clock enable signal in step S1, generating an internal wake-up signal and sending it to a power management unit; using the power management unit to receive the power enable signal of step S1, after receiving the power enable signal, the clock generation control module and the CPU are reset and powered via a linear regulator; S3, using the power management unit to receive the internal wake-up signal in step S2, based on the internal wake-up signal, the CPU, the linear regulator and the clock generation control module are woken up. The beneficial effects of this method can refer to the description of the clockless wake-up circuit of the low-power MCU mentioned above, which will not be repeated here.

[0035] In summary, the present invention uses an external wake-up signal to start the PMU and then complete the wake-up, so that the PMU does not need to use a low-speed clock that is always running, effectively reducing the power consumption of the PMU when the MCU is in low-power mode; at the same time, the wake-up flag is cleared by a clear signal to avoid the problem of multiple wake-up flags and failure to wake up, which is significantly progressive.

[0036] The above embodiments are only for illustrating the technical idea of ​​the present invention, and cannot be used to limit the protection scope of the present invention. Any changes made on the basis of the technical solution in accordance with the technical idea proposed by the present invention shall fall within the protection scope of the present invention.

Claims

1. A clock-free wake-up circuit for a low-power MCU, characterized in that: It includes an external signal wake-up module, a linear regulator, a power management unit, a clock generation control module and a CPU; wherein the external signal wake-up module is used to receive an external wake-up signal of the MCU, and then generate a clock enable signal and a power enable signal based on the external wake-up signal; the clock generation control module is used to generate an internal wake-up signal after receiving the clock enable signal and send it to the power management unit; the power management unit is used to reset and power the clock generation control module and the CPU via the linear regulator after receiving the power enable signal, and is also used to wake up the CPU, the linear regulator and the clock generation control module after receiving the internal wake-up signal.

2. The clock-free wake-up circuit of a low-power MCU according to claim 1, characterized in that: The clock generation control module includes an HSI oscillator and a counter module. After the clock generation control module receives a clock enable signal, the HSI oscillator and the counter module are turned on; the counter module counts according to the clock enable signal, and when the count reaches a threshold, the HSI oscillator generates an internal wake-up signal and sends it to the power management unit.

3. The clock-free wake-up circuit of a low-power MCU according to claim 1, characterized in that: The low power consumption modes of MCU include stop mode and standby mode, and the CPU has a built-in fclk fast clock; When the MCU enters any low power mode, the power management unit stops supplying power to the clock generation control module; when the MCU exits any low power mode, the power management unit supplies power to the clock generation control module and the fclk fast clock.

4. The clock-free wake-up circuit of a low-power MCU according to claim 1, characterized in that: The external signal wake-up module includes a wake-up edge detection register, a wake-up record register and a power control register; Among them, the wake-up edge detection register acts as a wake-up trigger, which records the wake-up source and sets a wake-up flag when an external wake-up signal is detected; the wake-up record register records the wake-up status according to the external wake-up signal; the power control register is based on software configuration and is used to generate a clear signal when an external wake-up signal is received to clear the wake-up flag.

5. The clock-free wake-up circuit of a low-power MCU according to claim 1, characterized in that: The CPU is connected to an LSE low-speed external oscillator. Before the MCU enters low-power mode, the LSE low-speed external oscillator is used as the RTC real-time clock. At the same time, the signal of the RTC real-time clock when an alarm event occurs is set as the alarm interrupt signal; When the MCU is in low power mode and an alarm event occurs in the RTC real-time clock, the external signal wake-up module generates a clock enable signal and a power enable signal based on the alarm interrupt signal.

6. The clock-free wake-up circuit of a low-power MCU according to claim 1, characterized in that: The power management unit is provided with a state machine and an ana_ctrl analog controller. The state machine is used to control the power supply and the mode of the MCU. The ana_ctrl analog controller outputs based on the state of the state machine, or outputs based on the settings of the external software, or outputs based on the default value of the ana_ctrl analog controller.

7. The clock-free wake-up circuit of a low-power MCU according to claim 6, characterized in that: When the ana_ctrl analog controller outputs based on the settings of the external software, the SYNC synchronization circuit is used to synchronize the clock of the external software and the clock of the state machine, and then MUX multiplexing processing is performed based on the settings of the external software and the state of the state machine, and the processing result is used as the output of the ana_ctrl analog controller.

8. A clockless wake-up method for a low-power MCU, using the clockless wake-up circuit for a low-power MCU as claimed in any one of claims 1 to 7 to wake up the MCU, characterized in that: The steps include: S1. Use the external signal wake-up module to receive the external wake-up signal of the MCU, and then generate a clock enable signal and a power enable signal based on the external wake-up signal; S2, using the clock generation control module to receive the clock enable signal in step S1, generate an internal wake-up signal and send it to the power management unit; Utilizing a power management unit to receive the power enable signal of step S1, and after receiving the power enable signal, resetting power supply for the clock generation control module and the CPU via a linear regulator; S3. Utilize the power management unit to receive the internal wake-up signal in step S2, and wake up the CPU, the linear regulator, and the clock generation control module based on the internal wake-up signal.

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