Self-adaptive loop optimization method, reconfigurable processor and device

Abstract

The invention relates to a self-adaptive loop optimization method, a reconfigurable processor and a device, and the method comprises the steps: carrying out the classification processing of a to-be-optimized initial loop code, obtaining a classification result representing the characteristics of a loop structure in the initial loop code, determining a target optimization strategy from a plurality of pre-established candidate optimization strategies according to the classification result, and carrying out the optimization of the target optimization strategy. And performing optimization processing on the initial loop code by adopting a target optimization strategy to obtain a target loop code. The loop optimization code is automatically generated, manual writing is not needed, the optimization efficiency is improved, the performance of the reconfigurable processor can be improved for the loop-intensive application program through loop optimization, the optimized loop structure can more effectively utilize computing resources and memory bandwidth of the processor, and the performance of the reconfigurable processor is improved. And the execution speed of circulation is accelerated, so that the performance of the whole application program is improved.

Description

Technical Field

[0001] The present application relates to the field of artificial intelligence technology, and in particular to an adaptive loop optimization method, a reconfigurable processor and a device. Background Art

[0002] Loops are one of the most common syntaxes in programming and are usually hot spots in programs. Especially in compute-intensive business scenarios (such as big data processing, audio and video processing, and artificial intelligence), reconfigurable processors are often used to execute code. If the code contains inefficient loop algorithms or data structures, it may cause the reconfigurable processor to handle more computing tasks, thereby increasing the load. Traditional loop optimization methods are often optimized through manual coding, which is inefficient. Summary of the invention

[0003] Based on this, it is necessary to provide an adaptive loop optimization method, a reconfigurable processor and a device that can improve efficiency in response to the above technical problems.

[0004] In a first aspect, the present application provides an adaptive loop optimization method, the method comprising:

[0005] The initial loop code to be optimized is classified to obtain a classification result of the initial loop code; the classification result is used to characterize the characteristics of the loop structure in the initial loop code;

[0006] Determine a target optimization strategy from a plurality of pre-established candidate optimization strategies according to the classification result;

[0007] The target optimization strategy is used to optimize the initial loop code to obtain the target loop code.

[0008] In one embodiment, determining the target optimization strategy from a plurality of pre-established candidate optimization strategies according to the classification results includes:

[0009] Selecting at least one intermediate optimization strategy from a plurality of candidate optimization strategies according to the classification result;

[0010] A performance test is performed on each intermediate optimization strategy, and a target optimization strategy is determined according to the performance test result; the target optimization strategy includes at least one of a target loop unrolling factor, a target loop scheduling algorithm, and a target data layout.

[0011] In one embodiment, the above-mentioned performance test processing is performed on each intermediate optimization strategy, and the target optimization strategy is determined according to the performance test result, including:

[0012] The initial loop code is optimized according to each intermediate optimization strategy to obtain a plurality of candidate loop codes;

[0013] Input each candidate loop code into the reconfigurable simulator for performance testing, and obtain the performance test result of each candidate loop code;

[0014] Determine the performance test results of each intermediate optimization strategy according to the corresponding relationship between the candidate loop code and the intermediate optimization strategy;

[0015] Determine the target optimization strategy based on the performance test results of each intermediate optimization strategy.

[0016] In one embodiment, the target optimization strategy is determined according to the performance test results of each intermediate optimization strategy, including:

[0017] According to the pre-acquired system state and task characteristics, a target optimization strategy is determined from a plurality of intermediate optimization strategies; the system state includes at least one of execution time, resource utilization and energy consumption.

[0018] In one embodiment, the method further comprises:

[0019] Performing performance evaluation on the target optimization strategy to obtain evaluation results; the evaluation results include execution time evaluation results, resource utilization evaluation results and energy consumption evaluation results;

[0020] When the evaluation result does not meet the preset conditions, the parameters in the target optimization strategy are adjusted to obtain an adjusted target optimization strategy; the parameters include loop unrolling factor, vectorization width and parallelization degree.

[0021] In one embodiment, the classification process of the initial loop code to be optimized is performed to obtain the classification result of the initial loop code, including:

[0022] Perform static analysis on the initial loop code to obtain the loop structure of the initial loop code;

[0023] Performing feature extraction processing on the loop structure to obtain feature results of the loop structure;

[0024] The characteristic results are classified to obtain a classification result of the initial loop code; the classification result includes one of a computationally intensive loop, a memory access intensive loop, and a data dependency loop.

[0025] In one embodiment, the static analysis of the initial loop code to obtain the loop structure of the initial loop code includes:

[0026] Get the loop keyword of the initial loop code;

[0027] Perform static analysis on loop keywords to obtain the loop structure of the initial loop code.

[0028] In one embodiment, the feature extraction process is performed on the loop structure to obtain the feature result of the loop structure, including:

[0029] The number of iterations of the loop structure, the computationally intensive operations in the loop body, the memory access pattern and the data dependency are extracted and processed respectively to obtain the characteristic results of the loop structure.

[0030] In a second aspect, the present application also provides an adaptive cycle optimization device. The device comprises:

[0031] A classification module is used to classify the initial loop code to be optimized to obtain a classification result of the initial loop code; the classification result is used to characterize the characteristics of the loop structure in the initial loop code;

[0032] A strategy determination module, used to determine a target optimization strategy from a plurality of pre-established candidate optimization strategies according to the classification result;

[0033] The code optimization module is used to optimize the initial loop code by adopting a target optimization strategy to obtain a target loop code.

[0034] In a third aspect, the present application further provides a reconfigurable processor, including a storage unit and a processing unit, wherein the storage unit stores a computer program, and the processor implements the following steps when executing the computer program:

[0035] The initial loop code to be optimized is classified to obtain a classification result of the initial loop code; the classification result is used to characterize the characteristics of the loop structure in the initial loop code;

[0036] Determine a target optimization strategy from a plurality of pre-established candidate optimization strategies according to the classification result;

[0037] The target optimization strategy is used to optimize the initial loop code to obtain the target loop code.

[0038] In a fourth aspect, the present application further provides a computer device. The computer device includes a memory and a processor, the memory stores a computer program, and the processor implements the following steps when executing the computer program:

[0039] The initial loop code to be optimized is classified to obtain a classification result of the initial loop code; the classification result is used to characterize the characteristics of the loop structure in the initial loop code;

[0040] Determine a target optimization strategy from a plurality of pre-established candidate optimization strategies according to the classification result;

[0041] The target optimization strategy is used to optimize the initial loop code to obtain the target loop code.

[0042] In a fifth aspect, the present application further provides a computer-readable storage medium. The computer-readable storage medium stores a computer program, and when the computer program is executed by a processor, the following steps are implemented:

[0043] The initial loop code to be optimized is classified to obtain a classification result of the initial loop code; the classification result is used to characterize the characteristics of the loop structure in the initial loop code;

[0044] Determine a target optimization strategy from a plurality of pre-established candidate optimization strategies according to the classification result;

[0045] The target optimization strategy is used to optimize the initial loop code to obtain the target loop code.

[0046] In a sixth aspect, the present application further provides a computer program product. The computer program product includes a computer program, and when the computer program is executed by a processor, the following steps are implemented:

[0047] The initial loop code to be optimized is classified to obtain a classification result of the initial loop code; the classification result is used to characterize the characteristics of the loop structure in the initial loop code;

[0048] Determine a target optimization strategy from a plurality of pre-established candidate optimization strategies according to the classification result;

[0049] The target optimization strategy is used to optimize the initial loop code to obtain the target loop code.

[0050] The above-mentioned adaptive loop optimization method, reconfigurable processor and device classify the initial loop code to be optimized to obtain a classification result that characterizes the characteristics of the loop structure in the initial loop code, determine the target optimization strategy from multiple pre-established candidate optimization strategies according to the classification result, and optimize the initial loop code using the target optimization strategy to obtain the target loop code. The loop optimization code of the present application is automatically generated, and no manual writing is required, which improves the optimization efficiency. In addition, loop optimization enables the reconfigurable processor to achieve performance improvement for loop-intensive applications. The optimized loop structure can more effectively utilize the processor's computing resources and memory bandwidth, accelerate the execution speed of the loop, and thus improve the performance of the entire application. BRIEF DESCRIPTION OF THE DRAWINGS

[0051] Figure 1 An application environment diagram of an adaptive loop optimization method in an embodiment;

[0052] Figure 2 A schematic diagram of a flow chart of an adaptive loop optimization method in one embodiment;

[0053] Figure 3A schematic diagram of a process for determining a target optimization strategy in one embodiment;

[0054] Figure 4 A schematic diagram of a process for obtaining a target optimization strategy in one embodiment;

[0055] Figure 5 A schematic flow chart of an adaptive loop optimization method according to another embodiment;

[0056] Figure 6 A schematic diagram of a process for obtaining a classification result of an initial cycle code in one embodiment;

[0057] Figure 7 A schematic diagram of a flow chart of a loop structure for obtaining an initial loop code in one embodiment;

[0058] Figure 8 is a structural block diagram of an adaptive cycle optimization device in one embodiment;

[0059] Fig. 9 is a diagram of the internal structure of a reconfigurable processor in one embodiment;

[0060] Fig.10 FIG. 4 is a diagram showing the internal structure of a computer device in one embodiment. DETAILED DESCRIPTION

[0061] In order to make the purpose, technical solution and advantages of the present application more clearly understood, the present application is further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present application and are not used to limit the present application.

[0062] The adaptive loop optimization method provided in the embodiment of the present application can be applied to Figure 1 In the application environment shown. Among them, the terminal 102 may include a reconfigurable processor, and the terminal 102 communicates with the server 104 through the network. The data storage system can store data that the server 104 needs to process. The data storage system can be integrated on the server 104, or it can be placed on the cloud or other network servers. The initial loop code to be optimized is classified and processed to obtain a classification result of the initial loop code; according to the classification result, a target optimization strategy is determined from a plurality of pre-established candidate optimization strategies; the initial loop code is optimized using the target optimization strategy to obtain a target loop code. Among them, the terminal 102 can be but is not limited to various personal computers, laptops, smart phones, tablet computers, Internet of Things devices and portable wearable devices, and the server 104 can be implemented with an independent server or a server cluster consisting of multiple servers.

[0063] In an exemplary embodiment, Figure 2As shown, the embodiment of the present application provides an adaptive loop optimization method, which is applied to Figure 1 The terminal 102 in the example is used as an example to illustrate, including the following S201 to S203. Among them:

[0064] S201, classify the initial loop code to be optimized to obtain the classification result of the initial loop code, wherein the classification result is used to characterize the characteristics of the loop structure in the initial loop code.

[0065] In an embodiment of the present application, first, the terminal can obtain the initial loop code from the target program, and all loop structures can be extracted through a static analysis tool. Then, the extracted loop code is subjected to feature analysis, including but not limited to the following aspects: number of loops (fixed, dynamic), loop nesting depth, range of loop iteration variables, and dependencies within the loop body (data dependency, control dependency). The extracted loop code is classified according to the established classification rules, and a classification result is generated. Each category will receive a corresponding description, including its characteristics, scope of application, and optimization suggestions. Based on the loop classification results, the terminal will provide corresponding optimization strategies for each type of loop.

[0066] S202: Determine a target optimization strategy from a plurality of pre-established candidate optimization strategies according to the classification result.

[0067] In the embodiment of the present application, first, the loop structure in the target program is analyzed through the aforementioned loop code classification process in the above embodiment, and a classification result is generated. A set of candidate optimization strategy libraries are established in advance, and the library contains a variety of optimization methods, such as: loop unrolling, loop splitting, parallelization, vectorization, loop merging, and each optimization strategy should be accompanied by applicable conditions and expected effects. Based on the loop classification results and the candidate optimization strategy library, a set of strategy selection rules are formulated. The rules should cover the characteristics of different categories of loops and their suitable optimization strategies.

[0068] According to the cyclic classification results and strategy selection rules, the most appropriate target optimization strategy is automatically selected from the candidate optimization strategy library.

[0069] S203, optimizing the initial loop code using a target optimization strategy to obtain a target loop code.

[0070] In the embodiment of the present application, the terminal optimizes the initial loop code according to the determined target optimization strategy. The specific implementation method is as follows: Loop unrolling: copy the loop body multiple times to reduce the overhead of loop control and condition judgment and improve instruction parallelism.

[0071] The terminal can also use multithreading or GPU parallel computing to process multiple loop iterations simultaneously. For example, the loop can be split into multiple parts and run in parallel on multiple cores. The loop execution efficiency can also be improved by using the processor's single instruction multiple data instructions. After optimization, the target loop code will be obtained, which has a simpler structure and higher execution efficiency.

[0072] The above-mentioned adaptive loop optimization method classifies the initial loop code to be optimized to obtain a classification result that characterizes the characteristics of the loop structure in the initial loop code, determines the target optimization strategy from a plurality of pre-established candidate optimization strategies according to the classification result, and optimizes the initial loop code using the target optimization strategy to obtain the target loop code. The loop optimization code of the embodiment of the present application is automatically generated, and does not need to be manually written, which improves the optimization efficiency. In addition, loop optimization enables the reconfigurable processor to achieve performance improvement for loop-intensive applications. The optimized loop structure can more effectively utilize the computing resources and memory bandwidth of the processor, accelerate the execution speed of the loop, and thus improve the performance of the entire application.

[0073] In an exemplary embodiment, based on the above embodiment, see Figure 3 The embodiment of the present application is related to determining a target optimization strategy from a plurality of pre-established candidate optimization strategies according to the classification result, including the following S301 to S302. Among them:

[0074] S301: Select at least one intermediate optimization strategy from a plurality of candidate optimization strategies according to the classification result.

[0075] In the embodiment of the present application, first, the loop structure in the target program is classified using the aforementioned loop classification process, and a classification result is generated. According to the classification result, at least one intermediate optimization strategy is selected from a plurality of pre-set candidate optimization strategies. Examples of candidate optimization strategies: loop unrolling, loop scheduling, data layout adjustment.

[0076] S302, performing performance testing on each intermediate optimization strategy, and determining a target optimization strategy according to the performance testing result.

[0077] The target optimization strategy includes at least one of a target loop unrolling factor, a target loop scheduling algorithm, and a target data layout.

[0078] In the embodiment of the present application, the selected intermediate optimization strategy is subjected to performance testing. First, a suitable test environment is constructed and test input data is prepared. The following steps are included: Optimization application: the intermediate optimization strategy is applied to the loop code to generate a new optimized version of the code. Performance evaluation: the optimized code is subjected to performance testing, such as using a benchmark tool, measuring execution time, memory usage and other indicators. The performance test results of each intermediate optimization strategy will be recorded and analyzed.

[0079] According to the performance test results, evaluate the execution efficiency of each intermediate optimization strategy and select the strategy with the best performance as the target optimization strategy. The target optimization strategy may include: Target loop unrolling factor: the optimized loop unrolling factor (such as how many times to unroll the loop). Target loop scheduling algorithm: the best selected scheduling algorithm to optimize the execution efficiency on multi-core processors. Target data layout: determine the best layout of data in memory to improve cache hit rate. Apply the determined target optimization strategy to the loop code for final optimization implementation.

[0080] The embodiments of the present application can realize dynamic target optimization strategy selection and significantly improve code execution efficiency.

[0081] In an exemplary embodiment, based on the above embodiment, see Figure 4 The embodiment of the present application relates to a process of performing performance testing on each intermediate optimization strategy and determining a target optimization strategy based on the performance testing results, including the following S401 to S404. Among them:

[0082] S401, optimizing the initial loop code according to various intermediate optimization strategies to obtain a plurality of candidate loop codes.

[0083] In the embodiment of the present application, the initial loop code is input into the intermediate optimization processing module, and multiple intermediate optimization strategies (such as loop unrolling, loop splitting, parallelization, etc.) are used to optimize the code, and multiple candidate loop codes are output. After the intermediate optimization processing, the following multiple candidate loop codes can be generated: loop unrolling version, parallelization version, and vectorization version.

[0084] S402, inputting each candidate loop code into a reconfigurable simulator for performance testing, and obtaining a performance test result of each candidate loop code.

[0085] In the embodiment of the present application, each candidate loop code is input into the reconfigurable simulator for performance testing. The simulator measures the performance indicators such as execution time and memory usage of each candidate code under different loads and conditions to obtain the performance test results of each candidate loop code. For example, the following performance test results may be obtained: loop unrolling version: execution time 8ms; parallelization version: execution time 6ms; vectorization version: execution time 7ms.

[0086] S403, determining the performance test results of each intermediate optimization strategy according to the correspondence between the candidate loop codes and the intermediate optimization strategies.

[0087] In the embodiment of the present application, the performance test results of each intermediate optimization strategy are summarized according to the corresponding relationship between the candidate loop code and the intermediate optimization strategy. This step is intended to provide a basis for subsequent strategy selection.

[0088] S404: Determine a target optimization strategy based on the performance test results of each intermediate optimization strategy.

[0089] In the embodiment of the present application, the performance test results of each intermediate optimization strategy are compared to determine the target optimization strategy. The optimization strategy with the best performance is selected as the final target optimization strategy, and the optimization suggestion is output. For example, the optimal strategy is "parallelization" because its performance test result (6ms) is the lowest.

[0090] The target optimization strategy selection based on performance testing of the present invention can efficiently and automatically find the best optimization solution by performing systematic performance evaluation on multiple candidate loop codes, thereby improving program performance and reducing the workload of developers.

[0091] In an exemplary embodiment, based on the above embodiments, the embodiment of the present application determines the process of the target optimization strategy according to the performance test results of each intermediate optimization strategy, including: determining the target optimization strategy from multiple intermediate optimization strategies according to the pre-acquired system status and task characteristics; the system status includes at least one of execution time, resource utilization and energy consumption.

[0092] In the embodiment of the present application, the terminal can obtain the system's execution time, resource utilization, energy consumption and other state parameters in real time through sensors or monitoring tools. These parameters will help determine the performance bottleneck of the current system. Next, analyze the characteristics of the task to be optimized, including but not limited to task computational complexity, data dependency, memory access mode, etc. According to the characteristics of the task, it can be divided into computationally intensive, memory intensive and hybrid tasks.

[0093] Then, predefine multiple intermediate optimization strategies, such as "loop unrolling", "multi-thread parallelization", "memory optimization", etc. These strategies have different applicable scenarios and effects. Based on the previously obtained system status and task characteristics, algorithm analysis (such as weight analysis or decision tree method) is used to evaluate the feasibility of each intermediate optimization strategy. Apply the selected target optimization strategy to the code or task execution. This stage may involve operations such as algorithm rewriting, resource scheduling, and memory management. After implementation, continuously monitor the system status and feed the latest data back to the optimization selection process to achieve dynamic adjustment and ensure continuous optimization.

[0094] The embodiments of the present application achieve effective screening and application of multiple intermediate optimization strategies through systematic steps and algorithms, which can significantly improve program performance and optimize resource utilization.

[0095] In an exemplary embodiment, based on the above embodiment, see Figure 5 The method of the present application further includes the following S501 to S502. Wherein:

[0096] S501, performing performance evaluation on the target optimization strategy to obtain an evaluation result.

[0097] The evaluation results include execution time evaluation results, resource utilization evaluation results and energy consumption evaluation results.

[0098] In the embodiment of the present application, a comprehensive performance evaluation is performed on the target optimization strategy. The evaluation process includes the following aspects: Execution time evaluation results: record the execution time of the code after the implementation of the target optimization strategy, and calculate the average execution time. Resource utilization evaluation results: monitor the utilization of resources such as CPU, memory and I / O, and analyze the resource consumption during the execution process. Energy consumption evaluation results: evaluate the energy consumption involved in the code execution process through monitoring tools in order to evaluate the energy efficiency of the optimization strategy. The evaluation results will form a comprehensive performance report, including the values ​​of the above three evaluation dimensions and the corresponding analysis.

[0099] S502: When the evaluation result does not meet the preset conditions, the parameters in the target optimization strategy are adjusted to obtain an adjusted target optimization strategy.

[0100] Among them, the parameters include loop unrolling factor, vectorization width, and parallelization degree.

[0101] In the embodiment of the present application, after obtaining the evaluation result, if it does not meet the preset conditions (for example, the execution time is too long, the resource utilization is too low, and the energy consumption is too high), the step further adjusts the target optimization strategy parameters. The parameter adjustment includes: loop expansion factor: according to the evaluation result, modify the loop expansion factor to optimize the execution of the loop. Vectorization width: adjust the vectorization width to improve the data parallel processing capability. Parallelization degree: according to the resource utilization evaluation, dynamically adjust the degree of parallelization to make full use of the multi-core or multi-threaded capabilities of the system.

[0102] Specific adjustment process: Configuration analysis: According to the specific values ​​of the evaluation results, determine the direction that needs to be adjusted (for example, increasing the degree of parallelization may be a suitable choice). Parameter iteration: Iterate and try the parameters that need to be adjusted, gradually optimize through small adjustments, and record the performance evaluation results after each adjustment. Determine the best parameter configuration: In a series of adjustment processes, find the best combination of parameters to form the adjusted target optimization strategy.

[0103] The embodiments of the present application can effectively improve program performance and ensure its high efficiency in different operating environments through the method of dynamic evaluation and parameter adjustment.

[0104] In an exemplary embodiment, based on the above embodiment, see Figure 6 The present application relates to a process of classifying the initial loop code to be optimized and obtaining the classification result of the initial loop code, including the following S601 to S603. Among them:

[0105] S601, static analysis is performed on the initial loop code to obtain the loop structure of the initial loop code.

[0106] In the embodiment of the present application, the initial loop code is statically analyzed to extract the loop structure in the code. This step includes parsing the source code, building an abstract syntax tree (AST), and identifying the loop structure and its characteristics. The static analysis module will identify the "for" loop structure and obtain its starting condition, termination condition, loop body and other information.

[0107] S602, performing feature extraction processing on the loop structure to obtain a feature result of the loop structure.

[0108] In the embodiment of the present application, the extracted loop structure is deeply analyzed to identify its characteristic results. The characteristic extraction includes but is not limited to memory access pattern, computational complexity, data dependency, etc.

[0109] For example, for the above loop, the following features can be extracted: the array access pattern within the loop body (a[i], b[i], c[i]), the type of operation involved in the loop (addition), and the data dependency (each iteration is independent).

[0110] S603, classify the characteristic results to obtain the classification results of the initial cycle code.

[0111] The classification result includes one of a computationally intensive loop, a memory access intensive loop, and a data dependency loop.

[0112] In the embodiment of the present application, the obtained characteristic results are classified to determine the classification results of the initial loop code. The classification is performed according to the following types: Computationally intensive loops: rely on a large number of computing operations. Memory access intensive loops: rely on frequent memory read and write operations. Data dependency loops: There are data dependencies between loop iterations, which affects parallelism. Based on the extracted characteristics, for the above loop, it can be identified as a "memory access intensive loop" because its memory access operation frequency is high (involving the reading and writing of three arrays).

[0113] The initial loop code classification process based on static analysis in the embodiment of the present application not only improves the maintainability of the code through systematic analysis and classification of the loop code, but also lays the foundation for subsequent optimization and reconstruction.

[0114] In an exemplary embodiment, based on the above embodiment, see Figure 7 The embodiment of the present application relates to a process of performing static analysis on the initial loop code to obtain the loop structure of the initial loop code, including the following S701 to S702. Among them:

[0115] S701, obtaining a loop keyword of an initial loop code.

[0116] In the embodiment of the present application, the loop keyword of the initial loop code is obtained; the source code text to be analyzed is received, and the code can be in C, C++, Java and other languages. Keyword recognition: extract loop-related keywords in the source code through lexical analysis technology. These keywords usually include: for, while, do while Keyword storage: store the identified loop keywords in a structured form in the memory for subsequent analysis.

[0117] S702, statically analyzing the loop keywords to obtain the loop structure of the initial loop code.

[0118] The loop structure includes one of a for loop structure, a while loop structure and a do-while loop structure.

[0119] In the embodiment of the present application, the loop keyword is statically analyzed to construct the loop structure: for each identified loop keyword, the corresponding grammatical structure is parsed to construct a representation of the loop structure. Including: loop type (such as for, while, do while), loop variables, loop boundary conditions, loop body dependency analysis: dependency analysis is performed on the variables in the loop body, input and output variables are identified, and the control flow and data flow in the loop body are analyzed to understand the execution logic of the loop. Structural storage: the parsed loop structure information is stored in the form of a data object, including necessary attributes and relationships, for subsequent optimization algorithm calls.

[0120] The embodiment of the present application provides a basis for subsequent program optimization by automatically identifying and analyzing loop keywords and their structures in source code.

[0121] In an exemplary embodiment, based on the above embodiments, the embodiments of the present application involve a process of performing feature extraction processing on a loop structure to obtain feature results of the loop structure, including: extracting and processing the number of iterations of the loop structure, computationally intensive operations in the loop body, memory access patterns, and data dependencies, respectively, to obtain feature results of the loop structure.

[0122] The embodiment of the present application specifically includes the following steps:

[0123] Step 1: Loop structure identification.

[0124] First, static analysis is performed on the given code to identify loop structures in the program, including but not limited to for loops, while loops, etc.

[0125] Step 2: Extract the number of iterations.

[0126] For each identified loop structure, extract the iteration count feature: Static iteration count evaluation: Use constants and expressions in the program to deduce the fixed iteration count of the loop. Dynamic iteration count evaluation: If the iteration count depends on the input data at runtime, use historical running data for analysis to give the possible maximum, minimum and average iteration counts.

[0127] Step 3: Extract computationally intensive operations.

[0128] Classify and measure the operations within the loop body, especially identifying compute-intensive operations: Operation category analysis: Determine whether each operation in the loop body is compute-intensive, memory-intensive, or I / O-intensive.

[0129] Complexity evaluation: Quantify the number of computationally intensive operations based on the number and complexity of operations within the loop (such as addition, subtraction, multiplication, division, function calls, etc.).

[0130] Step 4: Extract memory access patterns.

[0131] Monitor the memory access pattern in the loop. The specific steps are as follows: Memory access analysis: record the order of data read in the loop body, including sequential access, random access, etc. Locality analysis: evaluate the locality of memory access, including spatial locality and temporal locality. Use the usage of data structures to determine whether cache misses are likely to occur.

[0132] Step 5: Extract data dependencies.

[0133] Analyze the dependencies between variables in the loop body to identify potential parallelism: Dependency identification: Use program analysis technology to determine the read and write dependencies of variables in the loop, independent variables, dependent variables and their dependency graphs. Parallelism evaluation: Evaluate whether the loop can be processed in parallel by analyzing the strength of data dependencies.

[0134] Finally, the characteristic results are output. Based on the results of the above extraction steps, a summary of the characteristic results of the loop structure is generated, which mainly includes the following: Number of iterations: static and dynamic evaluation results (such as fixed number, range). Number of computationally intensive operations: quantify the complexity and type of computational operations. Memory access mode: access type (sequential / random) and its impact analysis.

[0135] The embodiments of the present application lay a foundation for subsequent program optimization by analyzing various aspects of the loop, are applicable to various program optimization needs, have good flexibility and adaptability, and can be widely used in the fields of software development and performance optimization.

[0136] In an exemplary embodiment, based on the above embodiment, the method of the embodiment of the present application further includes:

[0137] Step 1: Obtain loop keywords of the initial loop code; perform static analysis on the loop keywords to obtain the loop structure of the initial loop code;

[0138] Step 2: Extract and process the number of iterations of the loop structure, the computationally intensive operations in the loop body, the memory access pattern, and the data dependency to obtain the characteristic results of the loop structure; classify the characteristic results to obtain the classification results of the initial loop code;

[0139] Step 3: Select at least one intermediate optimization strategy from multiple candidate optimization strategies according to the classification results;

[0140] Step 4: Optimize the initial loop code according to each intermediate optimization strategy to obtain multiple candidate loop codes; input each candidate loop code into the reconfigurable simulator for performance testing to obtain the performance test results of each candidate loop code; determine the performance test results of each intermediate optimization strategy according to the corresponding relationship between the candidate loop code and the intermediate optimization strategy;

[0141] Step 5: Determine the target optimization strategy from multiple intermediate optimization strategies based on the pre-acquired system status and task characteristics;

[0142] Step 6: Perform performance evaluation on the target optimization strategy to obtain evaluation results; the evaluation results include execution time evaluation results, resource utilization evaluation results and energy consumption evaluation results; when the evaluation results do not meet the preset conditions, adjust the parameters in the target optimization strategy to obtain an adjusted target optimization strategy.

[0143] It should be understood that, although the various steps in the flowcharts involved in the above-mentioned embodiments are displayed in sequence according to the indication of the arrows, these steps are not necessarily executed in sequence according to the order indicated by the arrows. Unless there is a clear explanation in this article, the execution of these steps does not have a strict order restriction, and these steps can be executed in other orders. Moreover, at least a part of the steps in the flowcharts involved in the above-mentioned embodiments can include multiple steps or multiple stages, and these steps or stages are not necessarily executed at the same time, but can be executed at different times, and the execution order of these steps or stages is not necessarily to be carried out in sequence, but can be executed in turn or alternately with other steps or at least a part of the steps or stages in other steps.

[0144] Based on the same inventive concept, the embodiment of the present application also provides an adaptive loop optimization device for implementing the adaptive loop optimization method involved above. The implementation scheme for solving the problem provided by the device is similar to the implementation scheme recorded in the above method, so the specific limitations in one or more adaptive loop optimization device embodiments provided below can refer to the limitations of the adaptive loop optimization method above, and will not be repeated here.

[0145] In one embodiment, Figure 8 As shown, an adaptive cycle optimization device 800 is provided, comprising:

[0146] The classification module 801 is used to classify the initial loop code to be optimized to obtain the classification result of the initial loop code; the classification result is used to characterize the characteristics of the loop structure in the initial loop code;

[0147] A strategy determination module 802 is used to determine a target optimization strategy from a plurality of pre-established candidate optimization strategies according to the classification result;

[0148] The code optimization module 803 is used to optimize the initial loop code using a target optimization strategy to obtain a target loop code.

[0149] In one embodiment, the policy determination module includes:

[0150] A strategy selection unit, used to select at least one intermediate optimization strategy from a plurality of candidate optimization strategies according to the classification result;

[0151] The strategy determination unit is used to perform performance testing on each intermediate optimization strategy and determine a target optimization strategy based on the performance test results; the target optimization strategy includes at least one of a target loop unrolling factor, a target loop scheduling algorithm, and a target data layout.

[0152] In one embodiment, the policy determination unit includes:

[0153] A code optimization subunit is used to optimize the initial loop code according to various intermediate optimization strategies to obtain multiple candidate loop codes;

[0154] A performance test subunit is used to input each candidate cycle code into the reconfigurable simulator for performance test processing, and obtain the performance test result of each candidate cycle code;

[0155] A result determination subunit, used to determine the performance test results of each intermediate optimization strategy according to the corresponding relationship between the candidate loop code and the intermediate optimization strategy;

[0156] The strategy determination subunit is used to determine the target optimization strategy based on the performance test results of each intermediate optimization strategy.

[0157] In one embodiment, the above-mentioned strategy determination subunit is specifically used for:

[0158] According to the pre-acquired system state and task characteristics, a target optimization strategy is determined from a plurality of intermediate optimization strategies; the system state includes at least one of execution time, resource utilization and energy consumption.

[0159] In one embodiment, the above device further comprises:

[0160] An evaluation module is used to perform performance evaluation on the target optimization strategy to obtain evaluation results; the evaluation results include execution time evaluation results, resource utilization evaluation results and energy consumption evaluation results;

[0161] The parameter adjustment module is used to adjust the parameters in the target optimization strategy when the evaluation result does not meet the preset conditions to obtain the adjusted target optimization strategy; the parameters include loop expansion factor, vectorization width and parallelization degree.

[0162] In one embodiment, the classification module includes:

[0163] An analysis unit, used for performing static analysis on the initial loop code to obtain a loop structure of the initial loop code;

[0164] A feature extraction unit, used for performing feature extraction processing on the cyclic structure to obtain a feature result of the cyclic structure;

[0165] The classification unit is used to classify the characteristic results to obtain a classification result of the initial loop code; the classification result includes one of a computationally intensive loop, a memory access intensive loop, and a data dependency loop.

[0166] In one embodiment, the analysis unit comprises:

[0167] A keyword acquisition subunit is used to acquire a loop keyword of an initial loop code;

[0168] The analysis subunit is used to perform static analysis on loop keywords to obtain the loop structure of the initial loop code.

[0169] In one embodiment, the feature extraction unit includes:

[0170] The extraction subunit is used to extract and process the number of iterations of the loop structure, the computationally intensive operations in the loop body, the memory access pattern and the data dependency, and obtain the characteristic results of the loop structure.

[0171] Each module in the above-mentioned adaptive cycle optimization device can be implemented in whole or in part by software, hardware and a combination thereof. Each of the above-mentioned modules can be embedded in or independent of a processor in a computer device in the form of hardware, or can be stored in a memory in a computer device in the form of software, so that the processor can call and execute the operations corresponding to each of the above modules.

[0172] In one embodiment, the present application also provides a reconfigurable processor, such as Fig. 9 As shown, it includes a storage unit and a processing unit.

[0173] Among them, 64 PEs (Processing Element) support FP32, Int32 and Int16 precision 4 lines. LSU (Load Store Unit) has up to 32 simultaneous read and write channels, providing calculation data for PE. ConfigControl (32-bit control network interface) and Data Control (256-bit data network interface) provide configuration and data for PE respectively. DMA (Direct Memory Access) moves configuration or data, supports Scatter and Gather functions, and moves image data in DDR (Double Data Rate) to a specific internal address according to the configured format. The 32-bit control network interface and the 256-bit data network interface are connected to the 32-bit control network and the 256-bit data network respectively.

[0174] In one embodiment, a computer device is provided. The computer device may be a terminal, and its internal structure diagram may be as follows: Fig.10 As shown. The computer device includes a processor, a memory, an input / output interface, a communication interface, a display unit and an input device. Among them, the processor, the memory and the input / output interface are connected through a system bus, and the communication interface, the display unit and the input device are connected to the system bus through the input / output interface. Among them, the processor of the computer device is used to provide computing and control capabilities. The memory of the computer device includes a non-volatile storage medium and an internal memory. The non-volatile storage medium stores an operating system and a computer program. The internal memory provides an environment for the operation of the operating system and the computer program in the non-volatile storage medium. The input / output interface of the computer device is used to exchange information between the processor and the external device. The communication interface of the computer device is used to communicate with an external terminal in a wired or wireless manner, and the wireless manner can be realized through WIFI, a mobile cellular network, NFC (near field communication) or other technologies. When the computer program is executed by the processor, an adaptive loop optimization method is realized. The display unit of the computer device is used to form a visually visible picture, which can be a display screen, a projection device or a virtual reality imaging device. The display screen can be a liquid crystal display screen or an electronic ink display screen, and the input device of the computer device can be a touch layer covering the display screen, or a button, trackball or touchpad set on the computer device shell, or an external keyboard, touchpad or mouse.

[0175] In one embodiment, a computer device is provided, including a memory and a processor, wherein a computer program is stored in the memory, and when the processor executes the computer program, the following steps are implemented:

[0176] The initial loop code to be optimized is classified to obtain a classification result of the initial loop code; the classification result is used to characterize the characteristics of the loop structure in the initial loop code;

[0177] Determine a target optimization strategy from a plurality of pre-established candidate optimization strategies according to the classification result;

[0178] The target optimization strategy is used to optimize the initial loop code to obtain the target loop code.

[0179] In one embodiment, when the processor executes the computer program, the processor further implements the following steps:

[0180] Selecting at least one intermediate optimization strategy from a plurality of candidate optimization strategies according to the classification result;

[0181] A performance test is performed on each intermediate optimization strategy, and a target optimization strategy is determined according to the performance test result; the target optimization strategy includes at least one of a target loop unrolling factor, a target loop scheduling algorithm, and a target data layout.

[0182] In one embodiment, when the processor executes the computer program, the processor further implements the following steps:

[0183] The initial loop code is optimized according to each intermediate optimization strategy to obtain a plurality of candidate loop codes;

[0184] Input each candidate loop code into the reconfigurable simulator for performance testing, and obtain the performance test result of each candidate loop code;

[0185] Determine the performance test results of each intermediate optimization strategy according to the corresponding relationship between the candidate loop code and the intermediate optimization strategy;

[0186] Determine the target optimization strategy based on the performance test results of each intermediate optimization strategy.

[0187] In one embodiment, when the processor executes the computer program, the processor further implements the following steps:

[0188] According to the pre-acquired system state and task characteristics, a target optimization strategy is determined from a plurality of intermediate optimization strategies; the system state includes at least one of execution time, resource utilization and energy consumption.

[0189] In one embodiment, when the processor executes the computer program, the processor further implements the following steps:

[0190] Performing performance evaluation on the target optimization strategy to obtain evaluation results; the evaluation results include execution time evaluation results, resource utilization evaluation results and energy consumption evaluation results;

[0191] When the evaluation result does not meet the preset conditions, the parameters in the target optimization strategy are adjusted to obtain an adjusted target optimization strategy; the parameters include loop unrolling factor, vectorization width and parallelization degree.

[0192] In one embodiment, when the processor executes the computer program, the processor further implements the following steps:

[0193] Perform static analysis on the initial loop code to obtain the loop structure of the initial loop code;

[0194] Performing feature extraction processing on the loop structure to obtain feature results of the loop structure;

[0195] The characteristic results are classified to obtain a classification result of the initial loop code; the classification result includes one of a computationally intensive loop, a memory access intensive loop, and a data dependency loop.

[0196] In one embodiment, when the processor executes the computer program, the processor further implements the following steps:

[0197] Get the loop keyword of the initial loop code;

[0198] Perform static analysis on loop keywords to obtain the loop structure of the initial loop code.

[0199] In one embodiment, when the processor executes the computer program, the processor further implements the following steps:

[0200] The number of iterations of the loop structure, the computationally intensive operations in the loop body, the memory access pattern and the data dependency are extracted and processed respectively to obtain the characteristic results of the loop structure.

[0201] In one embodiment, a computer readable storage medium is provided, on which a computer program is stored, and when the computer program is executed by a processor, the following steps are implemented:

[0202] The initial loop code to be optimized is classified to obtain a classification result of the initial loop code; the classification result is used to characterize the characteristics of the loop structure in the initial loop code;

[0203] Determine a target optimization strategy from a plurality of pre-established candidate optimization strategies according to the classification result;

[0204] The target optimization strategy is used to optimize the initial loop code to obtain the target loop code.

[0205] In one embodiment, when the computer program is executed by a processor, the following steps are also implemented:

[0206] Selecting at least one intermediate optimization strategy from a plurality of candidate optimization strategies according to the classification result;

[0207] A performance test is performed on each intermediate optimization strategy, and a target optimization strategy is determined according to the performance test result; the target optimization strategy includes at least one of a target loop unrolling factor, a target loop scheduling algorithm, and a target data layout.

[0208] In one embodiment, when the computer program is executed by a processor, the following steps are also implemented:

[0209] The initial loop code is optimized according to each intermediate optimization strategy to obtain a plurality of candidate loop codes;

[0210] Input each candidate loop code into the reconfigurable simulator for performance testing, and obtain the performance test result of each candidate loop code;

[0211] Determine the performance test results of each intermediate optimization strategy according to the corresponding relationship between the candidate loop code and the intermediate optimization strategy;

[0212] Determine the target optimization strategy based on the performance test results of each intermediate optimization strategy.

[0213] In one embodiment, when the computer program is executed by a processor, the following steps are also implemented:

[0214] According to the pre-acquired system state and task characteristics, a target optimization strategy is determined from a plurality of intermediate optimization strategies; the system state includes at least one of execution time, resource utilization and energy consumption.

[0215] In one embodiment, when the computer program is executed by a processor, the following steps are also implemented:

[0216] Performing performance evaluation on the target optimization strategy to obtain evaluation results; the evaluation results include execution time evaluation results, resource utilization evaluation results and energy consumption evaluation results;

[0217] When the evaluation result does not meet the preset conditions, the parameters in the target optimization strategy are adjusted to obtain an adjusted target optimization strategy; the parameters include loop unrolling factor, vectorization width and parallelization degree.

[0218] In one embodiment, when the computer program is executed by a processor, the following steps are also implemented:

[0219] Perform static analysis on the initial loop code to obtain the loop structure of the initial loop code;

[0220] Performing feature extraction processing on the loop structure to obtain feature results of the loop structure;

[0221] The characteristic results are classified to obtain a classification result of the initial loop code; the classification result includes one of a computationally intensive loop, a memory access intensive loop, and a data dependency loop.

[0222] In one embodiment, when the computer program is executed by a processor, the following steps are also implemented:

[0223] Get the loop keyword of the initial loop code;

[0224] Perform static analysis on loop keywords to obtain the loop structure of the initial loop code.

[0225] In one embodiment, when the computer program is executed by a processor, the following steps are also implemented:

[0226] The number of iterations of the loop structure, the computationally intensive operations in the loop body, the memory access pattern and the data dependency are extracted and processed respectively to obtain the characteristic results of the loop structure.

[0227] In one embodiment, a computer program product is provided, comprising a computer program, which, when executed by a processor, implements the following steps:

[0228] The initial loop code to be optimized is classified to obtain a classification result of the initial loop code; the classification result is used to characterize the characteristics of the loop structure in the initial loop code;

[0229] Determine a target optimization strategy from a plurality of pre-established candidate optimization strategies according to the classification result;

[0230] The target optimization strategy is used to optimize the initial loop code to obtain the target loop code.

[0231] In one embodiment, when the computer program is executed by a processor, the following steps are also implemented:

[0232] Selecting at least one intermediate optimization strategy from a plurality of candidate optimization strategies according to the classification result;

[0233] A performance test is performed on each intermediate optimization strategy, and a target optimization strategy is determined according to the performance test result; the target optimization strategy includes at least one of a target loop unrolling factor, a target loop scheduling algorithm, and a target data layout.

[0234] In one embodiment, when the computer program is executed by a processor, the following steps are also implemented:

[0235] The initial loop code is optimized according to each intermediate optimization strategy to obtain a plurality of candidate loop codes;

[0236] Input each candidate loop code into the reconfigurable simulator for performance testing, and obtain performance test results of each candidate loop code;

[0237] Determine the performance test results of each intermediate optimization strategy according to the corresponding relationship between the candidate loop code and the intermediate optimization strategy;

[0238] Determine the target optimization strategy based on the performance test results of each intermediate optimization strategy.

[0239] In one embodiment, when the computer program is executed by a processor, the following steps are also implemented:

[0240] According to the pre-acquired system state and task characteristics, a target optimization strategy is determined from a plurality of intermediate optimization strategies; the system state includes at least one of execution time, resource utilization and energy consumption.

[0241] In one embodiment, when the computer program is executed by a processor, the following steps are also implemented:

[0242] Performing performance evaluation on the target optimization strategy to obtain evaluation results; the evaluation results include execution time evaluation results, resource utilization evaluation results and energy consumption evaluation results;

[0243] When the evaluation result does not meet the preset conditions, the parameters in the target optimization strategy are adjusted to obtain an adjusted target optimization strategy; the parameters include loop unrolling factor, vectorization width and parallelization degree.

[0244] In one embodiment, when the computer program is executed by a processor, the following steps are also implemented:

[0245] Perform static analysis on the initial loop code to obtain the loop structure of the initial loop code;

[0246] Performing feature extraction processing on the loop structure to obtain feature results of the loop structure;

[0247] The characteristic results are classified to obtain a classification result of the initial loop code; the classification result includes one of a computationally intensive loop, a memory access intensive loop, and a data dependency loop.

[0248] In one embodiment, when the computer program is executed by a processor, the following steps are also implemented:

[0249] Get the loop keyword of the initial loop code;

[0250] Perform static analysis on loop keywords to obtain the loop structure of the initial loop code.

[0251] In one embodiment, when the computer program is executed by a processor, the following steps are also implemented:

[0252] The number of iterations of the loop structure, the computationally intensive operations in the loop body, the memory access pattern and the data dependency are extracted and processed respectively to obtain the characteristic results of the loop structure.

[0253] It should be noted that the user information (including but not limited to user device information, user personal information, etc.) and data (including but not limited to data used for analysis, stored data, displayed data, etc.) involved in this application are all information and data authorized by the user or fully authorized by all parties, and the collection, use and processing of relevant data must comply with relevant laws, regulations and standards of relevant countries and regions.

[0254] Those skilled in the art can understand that all or part of the processes in the above-mentioned embodiment methods can be completed by instructing the relevant hardware through a computer program, and the computer program can be stored in a non-volatile computer-readable storage medium. When the computer program is executed, it can include the processes of the embodiments of the above-mentioned methods. Among them, any reference to the memory, database or other medium used in the embodiments provided in this application can include at least one of non-volatile and volatile memory. Non-volatile memory can include read-only memory (ROM), magnetic tape, floppy disk, flash memory, optical memory, high-density embedded non-volatile memory, resistive random access memory (ReRAM), magnetoresistive random access memory (MRAM), ferroelectric random access memory (FRAM), phase change memory (PCM), graphene memory, etc. Volatile memory can include random access memory (RAM) or external cache memory, etc. As an illustration and not limitation, RAM can be in various forms, such as static random access memory (SRAM) or dynamic random access memory (DRAM). The database involved in each embodiment provided in this application may include at least one of a relational database and a non-relational database. Non-relational databases may include distributed databases based on blockchains, etc., but are not limited to this. The processor involved in each embodiment provided in this application may be a general-purpose processor, a central processing unit, a graphics processor, a digital signal processor, a programmable logic device, a data processing logic device based on quantum computing, etc., but are not limited to this.

[0255] The technical features of the above embodiments may be combined arbitrarily. To make the description concise, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0256] The above-described embodiments only express several implementation methods of the present application, and the descriptions thereof are relatively specific and detailed, but they cannot be understood as limiting the scope of the present application. It should be pointed out that, for a person of ordinary skill in the art, several variations and improvements can be made without departing from the concept of the present application, and these all belong to the protection scope of the present application. Therefore, the protection scope of the present application shall be subject to the attached claims.

Claims

1. An adaptive loop optimization method, characterized in that: The method comprises: Classifying the initial loop code to be optimized to obtain a classification result of the initial loop code; the classification result is used to characterize the characteristics of the loop structure in the initial loop code; Determining a target optimization strategy from a plurality of pre-established candidate optimization strategies according to the classification result; The target optimization strategy is used to optimize the initial loop code to obtain the target loop code.

2. The method according to claim 1, characterized in that Determining a target optimization strategy from a plurality of pre-established candidate optimization strategies according to the classification result includes: Selecting at least one intermediate optimization strategy from the plurality of candidate optimization strategies according to the classification result; A performance test is performed on each of the intermediate optimization strategies, and the target optimization strategy is determined according to the performance test results; the target optimization strategy includes at least one of a target loop unrolling factor, a target loop scheduling algorithm, and a target data layout.

3. The method according to claim 2, characterized in that The performing of performance testing on each of the intermediate optimization strategies and determining the target optimization strategy according to the performance testing results includes: Optimizing the initial loop code according to each of the intermediate optimization strategies to obtain a plurality of candidate loop codes; Inputting each of the candidate cycle codes into a reconfigurable simulator for performance testing, respectively, to obtain performance test results of each of the candidate cycle codes; Determining the performance test results of each of the intermediate optimization strategies according to the corresponding relationship between the candidate loop codes and the intermediate optimization strategies; The target optimization strategy is determined according to the performance test results of each of the intermediate optimization strategies.

4. The method according to claim 3, characterized in that Determining the target optimization strategy according to the performance test results of each of the intermediate optimization strategies includes: The target optimization strategy is determined from a plurality of intermediate optimization strategies according to a pre-acquired system state and task characteristics; the system state includes at least one of execution time, resource utilization and energy consumption.

5. The method according to claim 4, characterized in that The method further comprises: Performing performance evaluation on the target optimization strategy to obtain evaluation results; the evaluation results include execution time evaluation results, resource utilization evaluation results and energy consumption evaluation results; When the evaluation result does not meet the preset conditions, the parameters in the target optimization strategy are adjusted to obtain an adjusted target optimization strategy; the parameters include a loop expansion factor, a vectorization width, and a parallelization degree.

6. The method according to claim 1, characterized in that The classifying process of the initial cycle code to be optimized to obtain the classification result of the initial cycle code includes: Performing static analysis on the initial loop code to obtain a loop structure of the initial loop code; Performing feature extraction processing on the loop structure to obtain a feature result of the loop structure; The characteristic results are classified to obtain a classification result of the initial loop code; the classification result includes one of a computationally intensive loop, a memory access intensive loop, and a data dependency loop.

7. The method according to claim 6, characterized in that The static analysis of the initial loop code to obtain the loop structure of the initial loop code includes: Obtaining a loop keyword of the initial loop code; Static analysis is performed on the loop keyword to obtain the loop structure of the initial loop code.

8. The method according to claim 6, characterized in that The performing feature extraction processing on the loop structure to obtain a feature result of the loop structure includes: The number of iterations of the loop structure, the computationally intensive operations in the loop body, the memory access pattern and the data dependency are extracted and processed respectively to obtain characteristic results of the loop structure.

9. A reconfigurable processor, comprising a storage unit and a processing unit, wherein the storage unit stores a computer program, characterized in that: When the processing unit executes the computer program, the steps of the method according to any one of claims 1 to 8 are implemented.

10. An adaptive cycle optimization device, characterized in that: The device comprises: A classification module, used for classifying the initial loop code to be optimized to obtain a classification result of the initial loop code; the classification result is used to characterize the characteristics of the loop structure in the initial loop code; A strategy determination module, used to determine a target optimization strategy from a plurality of pre-established candidate optimization strategies according to the classification result; The code optimization module is used to optimize the initial loop code by adopting the target optimization strategy to obtain the target loop code.

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