Synchronous rectification control circuit and method for bidirectional inversion LLC circuit topology, and storage medium

Abstract

The invention provides a synchronous rectification control circuit and method of a bidirectional inversion LLC circuit topology and a storage medium. The circuit comprises an MCU driving unit, a high-voltage side circuit, a transformer and a low-voltage side circuit. The high-voltage side circuit comprises a first power switch circuit, a first driving module, a high-voltage side resonant cavity loop and a first synchronous rectification signal processing circuit. The low-voltage side circuit comprises a second power switch circuit, a second driving module and a second synchronous rectification signal processing circuit. When energy flows from a high-voltage side to a low-voltage side, the MCU driving unit firstly obtains the control right of the high-voltage side, the second synchronous rectification signal processing circuit controls the low-voltage side, and forward synchronous rectification driving is completed; when energy flows from the low-voltage side to the high-voltage side, the MCU driving unit firstly obtains the control right of the low-voltage side, the first synchronous rectification signal processing circuit controls the high-voltage side, and reverse synchronous rectification driving is completed. According to the invention, efficient synchronous rectification control of the bidirectional inversion LLC circuit is realized, and the energy conversion efficiency is improved.

Description

Technical Field

[0001] The present application belongs to the technical field of bidirectional inverter circuits, and in particular, relates to a synchronous rectification control circuit, method and storage medium of a bidirectional inverter LLC circuit topology. Background Art

[0002] The current inverter power supply technology is a full-bridge LLC resonant bidirectional inverter topology circuit type with a relatively high power density, which can achieve high power output in a relatively small volume. However, the LLC resonant converter has a characteristic that the switching frequency is higher than the resonant frequency of the circuit resonator, that is, the switch tube drive signal lags behind the output rectifier current by a certain angle. For example, when the inverter transfers energy from the high-voltage side to the low-voltage side, the four groups of MOS tubes on the high-voltage side work in the switching state, cutting into the high-frequency square wave energy for the loop. At this time, the four groups of MOS tubes on the low-voltage side should be in the rectification state. At this time, if you want to drive the four MOS tubes on the low-voltage side to completely follow their body diode current phase to achieve synchronous rectification effect, then the distributed inductance of the loop will be difficult to measure, and the inductance and capacitance of the loop will decay to a certain extent with the use time of the product, which makes it impossible to know the accurate loop resonant frequency point, and it is difficult to use the algorithm to derive the accurate low-voltage side synchronous drive signal through the driving working frequency on the high-voltage side. Therefore, the current common practice is to turn off the synchronous drive on the low-voltage side and only use the rectifier circuit composed of the MOS tube body diode for rectification, which greatly reduces the energy efficiency. Summary of the invention

[0003] In response to the defects of the above-mentioned prior art, the present application provides a synchronous rectification control circuit, method and storage medium of a bidirectional inverter LLC circuit topology. By adding a first and a second synchronous rectification signal processing circuit to the digital power supply full-bridge LLC bidirectional inverter topology, the control right transfer between the MCU drive unit and the first or second synchronous rectification signal processing circuit is realized, which greatly improves the efficiency of the synchronous rectification conversion process of the bidirectional LLC inverter.

[0004] To achieve the above objectives, the present application provides a synchronous rectification control circuit of a bidirectional inverter LLC circuit topology, the circuit comprising: an MCU drive unit, a high-voltage side circuit, a transformer and a low-voltage side circuit.

[0005] The high-voltage side circuit includes a first power switching circuit, a first driving module, a high-voltage side resonant cavity loop and a first synchronous rectification signal processing circuit; wherein, one end of the first driving module is connected to one end of the MCU driving unit, the other end of the first driving module is connected to the first end of the first power switching circuit, the second end of the first power switching circuit is connected to the high-voltage side of the transformer after passing through the high-voltage side resonant cavity loop, the high-voltage side of the transformer is also connected to one end of the first synchronous rectification signal processing circuit, and the other end of the first synchronous rectification signal processing circuit is connected to one end of the first driving module; the third end of the first power switching circuit is connected to the first synchronous rectification signal processing circuit.

[0006] The low-voltage side circuit includes a second power switching circuit, a second driving module and a second synchronous rectification signal processing circuit; wherein, a first end of the second power switching circuit is connected to the low-voltage side of the transformer, a second end of the second power switching circuit is connected to one end of the second driving module, the other end of the second driving module is connected to the other end of the MCU driving unit, the other end of the second driving module is also connected to one end of the second synchronous rectification signal processing circuit, the other end of the second synchronous rectification signal processing circuit is connected to the low-voltage side of the transformer, and a third end of the second power switching circuit is connected to the second synchronous rectification signal processing circuit.

[0007] In the present application, the first power switch circuit includes at least: analog switch module 1, analog switch module 2, analog switch module 3 and analog switch module 4; the first drive module includes at least: drive chip 1 and drive chip 2; one end of the MCU drive unit includes port 1 and port 2.

[0008] Among them, the port one is respectively connected to the 3rd pin of the driver chip one and the 2nd pin of the driver chip two, and the port two is respectively connected to the 2nd pin of the driver chip one and the 3rd pin of the driver chip two; the 7th pin of the driver chip one is connected to one end of the analog switch module one, the 5th pin of the driver chip one is connected to one end of the analog switch module two, the other end of the analog switch module one is connected to the other end of the analog switch module two, and is also connected to the 6th pin of the driver chip one, and the other end of the analog switch module one is also connected to the high-voltage side resonant cavity loop; the 7th pin of the driver chip two is connected to one end of the analog switch module three, the 5th pin of the driver chip two is connected to one end of the analog switch module four, the other end of the analog switch module three is connected to the other end of the analog switch module four, and is also connected to the 6th pin of the driver chip two, and the other end of the analog switch module three is also connected to the first synchronous rectification signal processing circuit.

[0009] In the present application, the high-voltage side resonant cavity loop at least includes a capacitor C1 and an inductor L1; the high-voltage side resonant cavity loop is formed by connecting the capacitor C1, the inductor L1 and the high-voltage side of the transformer.

[0010] One end of the capacitor C1 is connected to the sixth pin of the driver chip 1, one end of the capacitor C1 is connected to one end of the inductor L1, and the other end of the inductor L1 is connected to the high voltage side of the transformer.

[0011] In the present application, the first synchronous rectification signal processing circuit includes at least a first current transformer, a first comparator and a first inverter; wherein the first comparator includes comparator 1 and comparator 2, and the first inverter includes inverter 1 and inverter 2.

[0012] The primary side of the first current transformer is connected to the 6th pin of the second driver chip, and is also connected to the high voltage side of the transformer; the secondary side of the first current transformer is connected to the input end of the first comparator, the output end of the first comparator is connected to the input end of the first inverter, the output end of the first inverter is connected to the 3rd pin of the first driver chip, and the output end of the first inverter is also connected to the 2nd pin of the second driver chip; the secondary side of the first current transformer is also connected to the input end of the second comparator, the output end of the second comparator is connected to the input end of the second inverter, the output end of the second inverter is connected to the 2nd pin of the first driver chip, and the output end of the second inverter is also connected to the 3rd pin of the second driver chip.

[0013] In the present application, the second power switch circuit includes at least: analog switch module five, analog switch module six, analog switch module seven and analog switch module eight; the second drive module includes at least: drive chip three and drive chip four; the other end of the MCU drive unit includes port three and port four.

[0014] Among them, the port three is respectively connected to the third pin of the driver chip three and the second pin of the driver chip four, and the port four is respectively connected to the second pin of the driver chip three and the third pin of the driver chip four; the seventh pin of the driver chip three is connected to one end of the analog switch module five, the fifth pin of the driver chip three is connected to one end of the analog switch module six, the other end of the analog switch module five is connected to the other end of the analog switch module six, and is also connected to the sixth pin of the driver chip three, and the other end of the analog switch module five is also connected to the low-voltage side of the transformer; the seventh pin of the driver chip four is connected to one end of the analog switch module seven, the fifth pin of the driver chip four is connected to one end of the analog switch module eight, the other end of the analog switch module seven is connected to the other end of the analog switch module eight, and is also connected to the sixth pin of the driver chip four, and the other end of the analog switch module seven is also connected to the second synchronous rectification signal processing circuit.

[0015] In the present application, the second synchronous rectification signal processing circuit includes at least a second current transformer, a second comparator and a second inverter; wherein the second comparator includes comparator three and comparator four, and the second inverter includes inverter three and inverter four.

[0016] The primary side of the second current transformer is connected to the 6th pin of the driver chip four, and is also connected to the low voltage side of the transformer; the secondary side of the second current transformer is connected to the input end of the comparator three, the output end of the comparator three is connected to the input end of the inverter three, the output end of the inverter three is connected to the 3rd pin of the driver chip three, and the output end of the inverter three is also connected to the 2nd pin of the driver chip four; the secondary side of the second current transformer is also connected to the input end of the comparator four, the output end of the comparator four is connected to the input end of the inverter four, the output end of the inverter four is connected to the 2nd pin of the driver chip three, and the output end of the inverter four is also connected to the 3rd pin of the driver chip four.

[0017] To achieve the above object, the present application also provides a synchronous rectification control method of a bidirectional inverter LLC circuit topology, which is applied to any of the above-mentioned synchronous rectification control circuits of a bidirectional inverter LLC circuit topology, and the method includes: When energy flows from the high-voltage side circuit to the low-voltage side circuit, a first drive signal is output through one end of the MCU drive unit to control the first power switch circuit to enter the first working mode, so that the working frequency output from the first power switch circuit is higher than the resonant frequency of the high-voltage side resonant cavity loop; when it is detected that the low-voltage side of the current transformer is in a voltage output state, the interface at the other end of the MCU drive unit is set to a high-impedance state; when the low-voltage side of the current transformer is in a positive half-cycle voltage output state, the second power switch circuit is controlled to enter the second working mode through the second synchronous rectification signal processing circuit; when the low-voltage side of the current transformer is in a negative half-cycle voltage output state, the second power switch circuit is controlled to enter the third working mode through the second synchronous rectification signal processing circuit to complete the forward synchronous rectification drive.

[0018] When energy flows from the low-voltage side circuit to the high-voltage side circuit, a second drive signal is output through the other end of the MCU drive unit to control the second power switch circuit to enter the fourth working mode, so that the working frequency output from the second power switch circuit is higher than the resonant frequency of the high-voltage side resonant cavity loop; when it is detected that the high-voltage side of the current transformer is in a voltage output state, the interface at one end of the MCU drive unit is set to a high-impedance state; when the high-voltage side of the current transformer is in a positive half-cycle voltage output state, the first power switch circuit is controlled to enter the fifth working mode through the first synchronous rectification signal processing circuit; when the high-voltage side of the current transformer is in a negative half-cycle voltage output state, the first power switch circuit is controlled to enter the sixth working mode through the first synchronous rectification signal processing circuit to complete the reverse synchronous rectification drive.

[0019] In this application, the first working mode includes: A high-level signal is output through port 1 of the MCU driving unit to the 3rd pin of the driving chip 1 and the 2nd pin of the driving chip 2 to control the analog switch module 2 and the analog switch module 3 to be turned on; a low-level signal is output through port 2 of the MCU driving unit to the 2nd pin of the driving chip 1 and the 3rd pin of the driving chip 2 to control the analog switch module 1 and the analog switch module 4 to be turned off, so that the voltage of the high-voltage side resonant cavity loop is in a negative half-cycle state with negative upper part and positive lower part.

[0020] Alternatively, a low-level signal is output through port 1 of the MCU driving unit to the 3rd pin of the driving chip 1 and the 2nd pin of the driving chip 2 to control the analog switch module 2 and the analog switch module 3 to be disconnected; a high-level signal is output through port 2 of the MCU driving unit to the 2nd pin of the driving chip 1 and the 3rd pin of the driving chip 2 to control the analog switch module 1 and the analog switch module 4 to be turned on, so that the voltage of the high-voltage side resonant cavity loop is in a positive half-cycle state with positive on top and negative on the bottom.

[0021] In this application, the second working mode includes: When the current direction of the secondary side of the second current transformer is from the first pin to the second pin, the comparator four outputs a high-level signal which is input to the second pin of the driver chip three and the third pin of the driver chip four after passing through the inverter four, so as to control the analog switch module five and the analog switch module eight to be turned on synchronously; when the current direction of the secondary side of the second current transformer is from the first pin to the second pin, the comparator three also outputs a low-level signal which is input to the third pin of the driver chip three and the second pin of the driver chip four after passing through the inverter three, so as to control the analog switch module six and the analog switch module seven to be turned off synchronously.

[0022] The third working mode includes: When the current direction of the secondary side of the second current transformer is from the second pin to the first pin, the comparator four outputs a low-level signal which is input to the second pin of the driver chip three and the third pin of the driver chip four after passing through the inverter four, so as to control the analog switch module five and the analog switch module eight to be disconnected synchronously; when the current direction of the secondary side of the second current transformer is from the second pin to the first pin, the comparator three also outputs a high-level signal which is input to the third pin of the driver chip three and the second pin of the driver chip four after passing through the inverter three, so as to control the analog switch module six and the analog switch module seven to be turned on synchronously.

[0023] Furthermore, a first negative bias module is set at the connection between the reverse input terminal and the non-inverting input terminal of comparator three, and the first negative bias module is composed of a first resistor voltage divider network for providing a first bias voltage; a second negative bias module is set at the connection between the reverse input terminal and the non-inverting input terminal of comparator four, and the second negative bias module is composed of a second resistor voltage divider network for providing a second bias voltage.

[0024] In this application, the fourth working mode includes: A high-level signal is output through port three of the MCU driving unit to the third pin of the driving chip three and the second pin of the driving chip four to control the analog switch module six and the analog switch module seven to be turned on; a low-level signal is output through port four of the MCU driving unit to the second pin of the driving chip three and the third pin of the driving chip four to control the analog switch module five and the analog switch module eight to be turned off, so that the winding voltage on the low-voltage side of the transformer is in a negative half-cycle state with negative upper part and positive lower part.

[0025] Alternatively, a low-level signal is output through port three of the MCU driving unit to the third pin of the driving chip three and the second pin of the driving chip four to control the analog switch module six and the analog switch module seven to be disconnected; a high-level signal is output through port four of the MCU driving unit to the second pin of the driving chip three and the third pin of the driving chip four to control the analog switch module five and the analog switch module eight to be turned on, so that the winding voltage on the low-voltage side of the transformer is in a positive half-cycle state with positive on top and negative on the bottom.

[0026] In this application, the fifth working mode includes: When the current direction of the secondary side of the first current transformer is from the first pin to the second pin, the comparator 2 outputs a high-level signal which is input to the second pin of the driver chip 1 and the third pin of the driver chip 2 after passing through the inverter 2, so as to control the analog switch module 1 and the analog switch module 4 to be turned on synchronously; when the current direction of the secondary side of the first current transformer is from the first pin to the second pin, the comparator 1 also outputs a low-level signal which is input to the third pin of the driver chip 1 and the second pin of the driver chip 2 after passing through the inverter 1, so as to control the analog switch module 2 and the analog switch module 3 to be turned off synchronously.

[0027] The sixth working mode includes: When the current direction of the secondary side of the first current transformer is from the second pin to the first pin, the comparator 2 outputs a low-level signal which is input to the second pin of the driver chip 1 and the third pin of the driver chip 2 after passing through the inverter 2, so as to control the analog switch module 1 and the analog switch module 4 to be disconnected synchronously; when the current direction of the secondary side of the first current transformer is from the second pin to the first pin, the comparator 1 also outputs a high-level signal which is input to the third pin of the driver chip 1 and the second pin of the driver chip 2 after passing through the inverter 1, so as to control the analog switch module 2 and the analog switch module 3 to be turned on synchronously.

[0028] Furthermore, a third negative bias module is set at the connection between the reverse input terminal and the non-inverting input terminal of comparator one, and the third negative bias module is composed of a third resistor voltage divider network, which is used to provide a third bias voltage; a fourth negative bias module is set at the connection between the reverse input terminal and the non-inverting input terminal of comparator two, and the fourth negative bias module is composed of a fourth resistor voltage divider network, which is used to provide a fourth bias voltage.

[0029] To achieve the above objectives, the present application also provides a storage medium, which is a computer-readable storage medium, on which a computer program is stored. When the computer program is executed by a processor, it implements the synchronous rectification control method of the bidirectional inverter LLC circuit topology as described above.

[0030] Compared with the prior art, the present invention has the following beneficial effects: The present application proposes a synchronous rectification control circuit, method and storage medium of a bidirectional inverter LLC circuit topology. By adding the first and second synchronous rectification signal processing circuits to the digital power full-bridge LLC bidirectional inverter topology, when energy flows from the high-voltage side to the low-voltage side, the MCU driving unit first obtains the control right of the high-voltage side, and the second synchronous rectification signal processing circuit controls the low-voltage side to complete the forward synchronous rectification drive; when energy flows from the low-voltage side to the high-voltage side, the MCU driving unit first obtains the control right of the low-voltage side, and the first synchronous rectification signal processing circuit controls the high-voltage side to complete the reverse synchronous rectification drive. This process realizes the transfer of control rights between the MCU driving unit and the first or second synchronous rectification signal processing circuit, so that whether in the energy flow process from the high-voltage side to the low-voltage side or from the low-voltage side to the high-voltage side, the synchronous rectification drive can be completed efficiently and reliably, significantly improving the energy conversion efficiency of the bidirectional LLC inverter, not only ensuring the synchronization and efficiency of the rectification process, but also optimizing the overall performance of the circuit. BRIEF DESCRIPTION OF THE DRAWINGS

[0031] Figure 1 It is a schematic diagram of the framework of a synchronous rectification control circuit of a bidirectional inverter LLC circuit topology in one embodiment of the present application.

[0032] Figure 2 It is a circuit schematic diagram of a synchronous rectification control circuit of a bidirectional inverter LLC circuit topology in one embodiment of the present application. DETAILED DESCRIPTION

[0033] In order to make the purpose, technical scheme and advantages of the embodiments of the present application clearer, the technical scheme will be clearly and completely described below in conjunction with the embodiments of the present application. Obviously, the described embodiments are part of the embodiments of the present application, rather than all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of this application.

[0034] Embodiment 1: As attached Figure 1 As shown, in order to solve the above technical problems, the present application provides a synchronous rectification control circuit of a bidirectional inverter LLC circuit topology, which improves the conversion efficiency of the synchronous rectification of the bidirectional LLC inverter through a combination of software and hardware design.

[0035] In this embodiment, the circuit of the hardware part includes: an MCU driving unit, a high-voltage side circuit, a transformer and a low-voltage side circuit.

[0036] It should be noted that in this embodiment, the high-voltage side circuit and the low-voltage side circuit are coupled and electrically isolated through a transformer. The type of the transformer can be selected according to actual application requirements, such as an isolation transformer, a high-frequency transformer or a pulse width modulation (PWM) transformer, etc., but are not limited thereto. The transformer can be represented by the symbol TX1 in this embodiment.

[0037] The high-voltage side circuit includes a first power switching circuit, a first driving module, a high-voltage side resonant cavity loop and a first synchronous rectification signal processing circuit; wherein, one end of the first driving module is connected to one end of the MCU driving unit, the other end of the first driving module is connected to the first end of the first power switching circuit, the second end of the first power switching circuit is connected to the high-voltage side of the transformer after passing through the high-voltage side resonant cavity loop, the high-voltage side of the transformer is also connected to one end of the first synchronous rectification signal processing circuit, and the other end of the first synchronous rectification signal processing circuit is connected to one end of the first driving module; the third end of the first power switching circuit is connected to the first synchronous rectification signal processing circuit.

[0038] It should be noted that in this embodiment, the state setting of the I / O port of the MCU driving unit determines that the MCU driving unit or the synchronous rectification signal processing circuit controls the driving module to implement the control of the on or off of the power switch circuit.

[0039] Among them, the first power switch circuit at least includes: analog switch module 1, analog switch module 2, analog switch module 3 and analog switch module 4; the first drive module at least includes: drive chip 1 and drive chip 2; one end of the MCU drive unit includes port 1 and port 2.

[0040] It should be noted that, as attached Figure 2As shown, in this embodiment, analog switch module 1, analog switch module 2, analog switch module 3 and analog switch module 4 can all be composed of MOS tubes of the same model structure, which can be represented by symbols M1, M2, M3, and M4 respectively. Among them, M1 and M2 form a half-bridge bridge arm; M3 and M4 form another half-bridge bridge arm, wherein the half-bridge bridge arm refers to a bridge arm composed of two MOSFET transistors, which are alternately turned on to provide AC output. The M1 and M2 half-bridge bridge arms are driven by a driver chip U1, and the M3 and M4 half-bridge bridge arms are driven by a driver chip U3. U1 and U3 are both half-bridge dedicated driver chips, and the half-bridge dedicated driver chip refers to an integrated circuit specially designed to drive the MOSFET transistors in the half-bridge bridge arm. These driver chips usually provide isolation, protection, gate drive and fault protection functions to ensure the safe and efficient operation of MOSFET. Port 1 and port 2 are represented by the symbols IO_PWM_HA and IO_PWM_HB, respectively, which are I / O ports connected to the MCU drive unit and the high-voltage side circuit.

[0041] Preferably, the half-bridge dedicated driver chip may be NCP3020, UCC27211A-Q1, etc., and may be used according to actual usage, but is not limited thereto.

[0042] Further, the port one is respectively connected to the third pin of the driver chip one and the second pin of the driver chip two, and the port two is respectively connected to the second pin of the driver chip one and the third pin of the driver chip two; the seventh pin of the driver chip one is connected to one end of the analog switch module one, the fifth pin of the driver chip one is connected to one end of the analog switch module two, the other end of the analog switch module one is connected to the other end of the analog switch module two, and is also connected to the sixth pin of the driver chip one, and the other end of the analog switch module one is also connected to the high-voltage side resonant cavity loop; the seventh pin of the driver chip two is connected to one end of the analog switch module three, the fifth pin of the driver chip two is connected to one end of the analog switch module four, the other end of the analog switch module three is connected to the other end of the analog switch module four, and is also connected to the sixth pin of the driver chip two, and the other end of the analog switch module three is also connected to the first synchronous rectification signal processing circuit.

[0043] In this embodiment, as shown in the attached Figure 2 As shown, in the upper left area of ​​the circuit principle structure diagram, resistors R1 to R6, resistors R14 to R19, capacitors, diodes and other devices may also be connected.

[0044] In the present application, the high-voltage side resonant cavity loop at least includes a capacitor C1 and an inductor L1; the high-voltage side resonant cavity loop is formed by connecting the capacitor C1, the inductor L1 and the high-voltage side of the transformer. One end of the capacitor C1 is connected to the sixth pin of the driver chip 1, one end of the capacitor C1 is connected to one end of the inductor L1, and the other end of the inductor L1 is connected to the high-voltage side of the transformer.

[0045] It should be noted that, as attached Figure 2 As shown, in this embodiment, the high-voltage side resonant cavity loop is composed of capacitors C1 and L1 and pins 3-4 on the high-voltage side of the transformer. The resonant cavity loop is a characteristic loop of the LLC topology, which helps to achieve efficient energy transmission and voltage conversion. It also provides flexible voltage regulation and optimized current waveforms, allowing energy to be transferred back and forth between capacitors and inductors, thereby achieving voltage increases and decreases. This energy transfer occurs during a portion of the switching cycle. When the switching device is turned off, the current in the resonant circuit begins to increase, and energy is stored in the inductor and capacitor. When the switching device is turned on, the stored energy is transferred to the low-voltage side through the transformer.

[0046] In this embodiment, the first synchronous rectification signal processing circuit includes at least a first current transformer, a first comparator and a first inverter; wherein the first comparator includes comparator 1 and comparator 2, and the first inverter includes inverter 1 and inverter 2.

[0047] As attached Figure 2 As shown, the first current transformer can be represented by the symbol TX2, the comparator 1 and the comparator 2 are represented by the symbols IC1_A and IC1_B respectively, the inverter 1 includes two inverters connected in series, namely IC2_A and IC2_B, and the inverter 2 includes two inverters connected in series, namely IC2_C and IC2_D.

[0048] In this embodiment, Figure 2In the circuit principle structure connection shown, multiple resistors are connected around the input terminals of comparator 1 and comparator 2. For example, resistors R8, R9, R34, R37 and R47 are connected to comparator 1 IC1_A. Among them, the input Vi- of comparator 1 IC1_A is connected to resistors R9, R34 and R37 in sequence, and then connected to the input Vi+ of comparator 1 IC1_A. Resistor R9 is also connected to resistor R8 and then connected to the +3.3V power supply of comparator 1; resistor R37 is also connected to resistor R47 and then connected to GND of comparator 1 IC1_A. The resistor voltage divider network formed by the entire connection loop realizes the reverse bias. Through this resistor voltage divider network, the inverting input terminal (-terminal) of comparator IC3_A is set to a voltage value lower than the power supply voltage 3.3V, and the non-inverting input terminal (+terminal) is connected to GND. This ensures that the comparator output is low, even when there is no input signal or the input signal is very low, the voltage at the non-inverting input will be higher than the voltage at the inverting input.

[0049] Similarly, the comparator 2 IC1_B is connected with resistors R23, R24, R34, R56 and R57 respectively. Among them, the input Vi- of the comparator 2 IC1_B is connected to the resistors R24, R34 and R56 in sequence, and then connected to the input Vi+ of the comparator 2 IC1_B. The resistor R24 ​​is also connected to the resistor R23 and then connected to the +3.3V power supply of the comparator 2; the resistor R56 is also connected to the resistor R57 and then connected to the GND of the comparator 2 IC1_B. The whole connection loop constitutes the reverse bias. This reverse bias ensures that the output of the comparator can be maintained at a stable low level when the input signal does not appear or is very small; and, when there is no input signal or the input signal is very small, it prevents the comparator from malfunctioning due to noise or other interference, resulting in unstable output level.

[0050] The specific circuit working principle of the above reverse bias is: when the secondary side current of the transformer TX3 flows through the detection resistor R36, a voltage will be generated on R36 according to the direction of the current. This voltage will be coupled to the input of the comparator through R54 and R49 (for IC3_B) or R10 and R38 (for IC3_A).

[0051] When the TX1 low-voltage side output is in the positive half cycle, the output level of IC3_B turns from low to high, while IC3_A remains low, causing Q1 and Q4 to turn on and Q2 and Q3 to turn off. When the TX1 low-voltage side output is in the negative half cycle, the output level of IC3_B turns low, while the output level of IC3_A becomes high, causing Q2 and Q3 to turn on and Q1 and Q4 to turn off.

[0052] In this way, the circuit can automatically switch the conduction state of the MOSFET according to the current direction of the secondary side of the transformer, realizing synchronous drive management. The reverse bias setting improves the stability and reliability of the entire circuit.

[0053] It should be noted that the function of the first synchronous rectification signal processing circuit is to monitor and control the current in the high-voltage side circuit to ensure high efficiency and stability during the synchronous rectification process. The joint operation of the first current transformer, the first comparator and the first inverter circuit components ensures that the current in the high-voltage side circuit can be effectively converted during the rectification process, while protecting the circuit from faults such as overcurrent. By monitoring the current and adjusting the conduction and cutoff of the power switch circuit accordingly, the first synchronous rectification signal processing circuit helps to improve the efficiency and stability of the rectification process.

[0054] Furthermore, the primary side of the first current transformer is connected to the 6th pin of the second driver chip, and is also connected to the high voltage side of the transformer; the secondary side of the first current transformer is connected to the input end of the first comparator, the output end of the first comparator is connected to the input end of the first inverter, the output end of the first inverter is connected to the 3rd pin of the first driver chip, and the output end of the first inverter is also connected to the 2nd pin of the second driver chip; the secondary side of the first current transformer is also connected to the input end of the second comparator, the output end of the second comparator is connected to the input end of the second inverter, the output end of the second inverter is connected to the 2nd pin of the first driver chip, and the output end of the second inverter is also connected to the 3rd pin of the second driver chip.

[0055] It should be noted that the primary side of the first current transformer is connected to the 6th pin of the driver chip 2 and is connected to the high-voltage side of the transformer. The purpose of this is to detect the current in the high-voltage side circuit. The current transformer converts the current into a voltage signal through the induction principle, and this voltage signal reflects the current level on the high-voltage side.

[0056] The voltage signal output from the secondary side of the first current transformer is connected to the input of comparator 1. Comparator 1 compares this voltage signal with a preset threshold voltage. If the current exceeds the threshold, the output of comparator 1 will change; similarly, the secondary side of the first current transformer is also connected to the input of comparator 2, and another comparison is performed, which may be to detect different current conditions or to achieve other functions.

[0057] The output of comparator 1 is connected to the input of inverter 1. Inverter 1 inverts the output signal of the comparator, which can provide a complementary logic signal. The output of inverter 1 is connected to the third pin of driver chip 1 and also to the second pin of driver chip 2, which can provide a drive signal to the MOSFET tube on the high-voltage side to control its conduction or cutoff; similarly, the output of comparator 2 is connected to the input of inverter 2, and inverter 2 also performs a logical inversion on the output signal of the comparator. The output of inverter 2 is connected to the second pin of driver chip 1 and also to the third pin of driver chip 2. These can provide another drive signal for controlling the MOSFET tube of the other half-bridge arm.

[0058] This embodiment detects the current on the high-voltage side through a current transformer and determines whether the current reaches a preset threshold through a comparator. The inverter is used for logic processing and provides complementary signals so that the driver chip can control the switching state of the MOSFET according to these signals. The driver chip receives signals from the inverter and generates appropriate drive waveforms according to these signals to control the MOSFET tube in the high-voltage side circuit to achieve synchronous rectification control.

[0059] The low-voltage side circuit includes a second power switching circuit, a second driving module and a second synchronous rectification signal processing circuit; wherein, a first end of the second power switching circuit is connected to the low-voltage side of the transformer, a second end of the second power switching circuit is connected to one end of the second driving module, the other end of the second driving module is connected to the other end of the MCU driving unit, the other end of the second driving module is also connected to one end of the second synchronous rectification signal processing circuit, the other end of the second synchronous rectification signal processing circuit is connected to the low-voltage side of the transformer, and a third end of the second power switching circuit is connected to the second synchronous rectification signal processing circuit.

[0060] It should be noted that the hardware design and connection principle of the low-voltage side circuit and the high-voltage side circuit in this embodiment are similar, and the second power switch circuit can be composed of multiple power switch devices, such as MOSFET or IGBT, for controlling the low-voltage side current of the transformer. The first end is connected to the low-voltage side of the transformer for receiving the electric energy after the transformer steps down.

[0061] The second driving module is responsible for converting the control signal generated by the MCU into a driving signal suitable for the power switch circuit, and can also control the on and off of the power switch device. The second synchronous rectification signal processing circuit is used to improve the efficiency of circuit energy transfer and reduce energy loss.

[0062] The low-voltage side circuit is connected to the low-voltage side of the transformer through the second power switch circuit to achieve energy transfer and conversion. When the high-voltage side transfers energy to the low-voltage side, the second power switch circuit is turned on, so that the energy is transferred to the low-voltage side through the transformer.

[0063] One end of the second driving module is connected to the other end of the MCU driving unit, so that the MCU can control the second driving module, and then control the conduction and cutoff of the second power switch circuit. The other end of the second driving module is also connected to one end of the second synchronous rectification signal processing circuit to receive the control signal from the synchronous rectification signal processing circuit.

[0064] The second synchronous rectification signal processing circuit is used to monitor and control the current in the low-voltage side circuit to ensure high efficiency and stability during the synchronous rectification process. When the IO port at the other end of the MCU driving unit is set to a high-impedance state, the control right belongs to the second synchronous rectification signal processing circuit, which is used to control the conduction and cutoff of the power switch circuit, which helps to improve the efficiency and stability of the rectification process.

[0065] It should be noted that the high impedance state means that the input impedance of the corresponding port of the MCU driver unit is set to be very high, almost equivalent to an open circuit, so that almost no current will flow into or out of the port. Preferably, in the high impedance output mode, the high impedance state means that the port will not drive a high level or a low level, but remain in an intermediate state without providing any output drive; in the high impedance input mode, the high impedance state can be used to read external signals without affecting the signal source. For example, when the port is configured in input mode, setting it to a high impedance state can prevent the port from having a load effect on the signal source.

[0066] The design of the low-voltage side circuit is similar to that of the high-voltage side circuit, following similar control logic and operating principles. The circuits on both sides maintain consistency in operation, which is easy to control and maintain. Both use synchronous rectification signal processing circuits to control the conduction and cutoff of the power switch circuit, thereby achieving efficient and stable energy conversion, which helps to improve the conversion efficiency of the entire circuit, reduce losses, and improve system reliability.

[0067] Furthermore, the second power switch circuit at least includes: analog switch module five, analog switch module six, analog switch module seven and analog switch module eight; the second drive module at least includes: drive chip three and drive chip four; the other end of the MCU drive unit includes port three and port four.

[0068] It should be noted that, as attached Figure 2As shown, in this embodiment, analog switch module five, analog switch module six, analog switch module seven and analog switch module eight can all be composed of MOS tubes of the same model structure, which can be represented by symbols Q1, Q2, Q3, and Q4 respectively. Among them, Q1 and Q2 form a half-bridge bridge arm; Q3 and Q4 form another half-bridge bridge arm. The Q1 and Q2 half-bridge bridge arms are driven by driver chip three U2, and the Q3 and Q4 half-bridge bridge arms are driven by driver chip four U4. U2 and U4 are also half-bridge dedicated driver chips. Port three and port four are represented by symbols IO_PWM_LA and IO_PWM_LB respectively, which are I / O ports connecting the MCU driver unit to the low-voltage side circuit.

[0069] Among them, the port three is respectively connected to the third pin of the driver chip three and the second pin of the driver chip four, and the port four is respectively connected to the second pin of the driver chip three and the third pin of the driver chip four; the seventh pin of the driver chip three is connected to one end of the analog switch module five, the fifth pin of the driver chip three is connected to one end of the analog switch module six, the other end of the analog switch module five is connected to the other end of the analog switch module six, and is also connected to the sixth pin of the driver chip three, and the other end of the analog switch module five is also connected to the low-voltage side of the transformer; the seventh pin of the driver chip four is connected to one end of the analog switch module seven, the fifth pin of the driver chip four is connected to one end of the analog switch module eight, the other end of the analog switch module seven is connected to the other end of the analog switch module eight, and is also connected to the sixth pin of the driver chip four, and the other end of the analog switch module seven is also connected to the second synchronous rectification signal processing circuit.

[0070] In this embodiment, as shown in the attached Figure 2 As shown, in the upper right area of ​​the circuit principle structure diagram, resistors R27~R31, resistors R42~R46, capacitors, diodes and other devices can also be connected.

[0071] In the present application, the second synchronous rectification signal processing circuit includes at least a second current transformer, a second comparator and a second inverter; wherein the second comparator includes comparator three and comparator four, and the second inverter includes inverter three and inverter four.

[0072] As attached Figure 2 As shown, the second current transformer can be represented by the symbol TX3, the comparator three and the comparator four are represented by the symbols IC3_A and IC3_B respectively, the inverter three includes two inverters connected in series, namely IC4_A and IC4_B, and the inverter four includes two inverters connected in series, namely IC4_C and IC4_D.

[0073] In this embodiment, Figure 2In the circuit principle structure connection shown, multiple resistors are connected around the input terminals of comparator three and comparator four. For example, resistor R11, resistor R10, resistor R36, resistor R38 and resistor R50 are connected to comparator three IC3_A respectively. Among them, the input Vi- of comparator three IC3_A is connected to resistor R10, resistor R36 and resistor R38 in sequence, and then connected to the input Vi+ of comparator three IC3_A. Resistor R10 is also connected to resistor R11 and then connected to the +3.3V power supply of comparator three; resistor R38 is also connected to resistor R50 and then connected to GND of comparator three IC3_A. The resistor voltage divider network formed by the entire connection loop realizes the reverse bias. Through this resistor voltage divider network, the inverting input terminal (-terminal) of comparator IC3_A is set to a voltage value lower than the power supply voltage 3.3V, and the non-inverting input terminal (+terminal) is connected to GND. This ensures that the comparator output is low, even when there is no input signal or the input signal is very low, the voltage at the non-inverting input will be higher than the voltage at the inverting input.

[0074] Similarly, the comparator IC3_B is connected with resistors R48, R49, R36, R54 and R58 respectively. The input Vi- of the comparator IC3_B is connected to the resistors R49, R36 and R54 in sequence, and then connected to the input Vi+ of the comparator IC3_B. The resistor R49 is also connected to the resistor R48 and then connected to the +3.3V power supply of the comparator. The resistor R54 is also connected to the resistor R58 and then connected to the GND of the comparator IC3_B. The whole connection loop constitutes a reverse bias.

[0075] When the second current transformer detects current, the voltage signal output by its secondary side is compared with the reference voltage provided by the resistor divider network. If the output voltage of the current transformer is higher than the reference voltage, the comparator will output a high level, indicating that the current exceeds the preset threshold. The inverter inverts the output signal of the comparator so that the driver chip can control the switching state of the MOSFET based on these signals. The circuit can dynamically adjust the switching action according to the actual level of current, thereby improving the efficiency and reliability of synchronous rectification.

[0076] The primary side of the second current transformer is connected to the 6th pin of the driver chip four, and is also connected to the low voltage side of the transformer; the secondary side of the second current transformer is connected to the input end of the comparator three, the output end of the comparator three is connected to the input end of the inverter three, the output end of the inverter three is connected to the 3rd pin of the driver chip three, and the output end of the inverter three is also connected to the 2nd pin of the driver chip four; the secondary side of the second current transformer is also connected to the input end of the comparator four, the output end of the comparator four is connected to the input end of the inverter four, the output end of the inverter four is connected to the 2nd pin of the driver chip three, and the output end of the inverter four is also connected to the 3rd pin of the driver chip four.

[0077] It should be noted that the design principle of the second synchronous rectification signal processing circuit is similar to that of the high-voltage side circuit, both of which are intended to monitor and control the current in the low-voltage side circuit, ensure the efficiency and stability of the synchronous rectification process, enable the low-voltage side circuit to effectively manage the current, improve the efficiency and reliability of the synchronous rectification, ensure efficient energy conversion, and protect the circuit from overcurrent and other faults.

[0078] In summary, the embodiments of the present application help to achieve efficient energy transmission and voltage conversion through the resonant circuit design on the high-voltage side and the low-voltage side, while providing flexible voltage regulation and optimized current waveforms. The first and second synchronous rectification signal processing circuits can monitor and control the current on the high-voltage side and the low-voltage side in real time, ensuring the efficiency and stability of the synchronous rectification process, while protecting the circuit from faults such as overcurrent. The present application also sets a reverse bias so that the circuit can work stably in the absence of an input signal or a very low input signal, thereby improving the stability and reliability of the entire circuit. The present application helps to improve the conversion efficiency of the entire circuit, reduce losses, and improve the reliability of the system.

[0079] Embodiment 2: In order to solve the above-mentioned technical problems, the present application also proposes a synchronous rectification control method for a bidirectional inverter LLC circuit topology, which is applied to a synchronous rectification control circuit of any of the above-mentioned bidirectional inverter LLC circuit topologies, and is mainly reflected in the software method design part of this embodiment. By combining the software and hardware in Embodiment 1, even if the product is used for a period of time and the resonant inductor and capacitor are attenuated, it will not affect the safety and stability of the circuit, and can completely solve the phase problem of synchronous rectification.

[0080] In this embodiment, the method includes: When energy flows from the high-voltage side circuit to the low-voltage side circuit, a first drive signal is output through one end of the MCU drive unit to control the first power switch circuit to enter the first working mode, so that the working frequency output from the first power switch circuit is higher than the resonant frequency of the high-voltage side resonant cavity loop; when it is detected that the low-voltage side of the current transformer is in a voltage output state, the interface at the other end of the MCU drive unit is set to a high-impedance state; when the low-voltage side of the current transformer is in a positive half-cycle voltage output state, the second power switch circuit is controlled to enter the second working mode through the second synchronous rectification signal processing circuit; when the low-voltage side of the current transformer is in a negative half-cycle voltage output state, the second power switch circuit is controlled to enter the third working mode through the second synchronous rectification signal processing circuit to complete the forward synchronous rectification drive.

[0081] It should be noted that the working principle of the circuit in this embodiment is specifically as follows: In the attached Figure 2 In the circuit schematic diagram shown, when it is necessary to control the energy transfer from the HV high-voltage side to the LV low-voltage side, M1, M2, M3, and M4 work in a complementary alternating conduction state, that is, when M1 is turned on, M4 is controlled to be turned on, and M2 and M3 are controlled to be turned off at the same time. After a short dead time, all four MOS are turned off, and then M2 and M3 are turned on and M1 and M4 are turned off at the same time, and the control action is cycled. At this time, Q1, Q2, Q3, and Q4 on the low-voltage side work to drive them to be turned on when their body diodes are turned on. In this state, by adjusting the switching operating frequency of M1-M4 to make it higher than the resonant frequency of L1 and C1, the power transferred from the high-voltage side to the low-voltage side can be controlled. The higher the operating frequency, the lower the output power, and the closer the operating frequency is to the resonant frequency, the greater the output power. In this mode, M1-M4 is controlled by the signals IO_PWM_HA and IO_PWM_HB of the MCU's IO port, and the MCU will set these two IO ports to push-pull PWM output. Because the MCU's IO port has a current sinking capability of more than 20 mA, it has a very low internal resistance. When the resistance of R33 and R20 is set to 1KΩ, the synchronous drive signal on the right cannot affect the level state of the IO_PWM_HA and IO_PWM_HB networks, so the IO_PWM_HA and IO_PWM_HB signals are coupled to the second pin of U1 and the third pin of U3 through R1, R4, R14, and R17, that is, Figure 2 HIN and LIN in order to control M1-M4.

[0082] The first drive signal refers to a signal generated and output by the MCU drive unit, which is used to control the working state of the first power switch circuit. Specifically, when energy needs to be transferred from the high-voltage side circuit to the low-voltage side circuit, the MCU drive unit will output the first drive signal to control the first power switch circuit to enter the first working mode.

[0083] This first drive signal is output in the form of PWM (pulse width modulation) through the MCU's IO ports, such as IO_PWM_HA and IO_PWM_HB. The PWM signal can control the switching frequency of the MOSFET, thereby regulating the power transferred from the high-voltage side to the low-voltage side. When the frequency of the PWM signal is higher than the resonant frequency of the high-voltage side resonant circuit, the output power is low; when the frequency of the PWM signal is close to the resonant frequency, the output power increases.

[0084] The first drive signal also includes dead time management to ensure that M2 and M3 are turned off when M1 and M4 are turned on, and vice versa, to avoid short circuit caused by simultaneous conduction. This control method not only improves the efficiency of energy conversion, but also reduces switching losses and enhances the reliability and stability of the system.

[0085] Furthermore, when it is detected that the low-voltage side of the transformer is in a voltage output state, the MCU driving unit will set the corresponding interface to a high-impedance state, which allows the second synchronous rectification signal processing circuit to take over control and control the second power switching circuit to enter the second or third operating mode according to the voltage state of the low-voltage side of the transformer (positive half cycle or negative half cycle), thereby realizing forward synchronous rectification drive.

[0086] In this embodiment, the first working mode includes: A high-level signal is output through port 1 of the MCU driving unit to the 3rd pin of the driving chip 1 and the 2nd pin of the driving chip 2 to control the analog switch module 2 and the analog switch module 3 to be turned on; a low-level signal is output through port 2 of the MCU driving unit to the 2nd pin of the driving chip 1 and the 3rd pin of the driving chip 2 to control the analog switch module 1 and the analog switch module 4 to be turned off, so that the voltage of the high-voltage side resonant cavity loop is in a negative half-cycle state with negative upper part and positive lower part.

[0087] It should be noted that when IO_PWM_HA output is high, the third pin LIN of U1 and the second pin HIN of U3 are high, controlling M2 and M3 to be turned on. At the same time, IO_PWM_HB is low, the second pin HIN of U1 and the third pin LIN of U3 are low, controlling M1 and M4 to be turned off. At this time, the voltage output to the resonant cavity is the negative half cycle with negative on the top and positive on the bottom.

[0088] Alternatively, a low-level signal is output through port 1 of the MCU driving unit to the 3rd pin of the driving chip 1 and the 2nd pin of the driving chip 2 to control the analog switch module 2 and the analog switch module 3 to be disconnected; a high-level signal is output through port 2 of the MCU driving unit to the 2nd pin of the driving chip 1 and the 3rd pin of the driving chip 2 to control the analog switch module 1 and the analog switch module 4 to be turned on, so that the voltage of the high-voltage side resonant cavity loop is in a positive half-cycle state with positive on top and negative on the bottom.

[0089] It should be noted that when IO_PWM_HA output is low, the third pin LIN of U1 and the second pin HIN of U3 are low, which controls M2 and M3 to be cut off. At the same time, IO_PWM_HB is high, the second pin HIN of U1 and the third pin LIN of U3 are high, which controls M1 and M4 to be turned on, and the voltage output to the resonant cavity is the positive half cycle with positive on top and negative on the bottom.

[0090] In this embodiment, by controlling the on and off of the switch module, the first working mode can realize the transfer of energy from the high-voltage side to the low-voltage side. The PWM signal output by the MCU driving unit can adjust the operating frequency of the switch module, thereby controlling the rate and power of energy transfer. Among them, when switching between the negative half-cycle and the positive half-cycle states, the voltage waveform of the resonant cavity can be optimized to improve the energy conversion efficiency. The first working mode reduces the switching loss and improves the stability and reliability of the circuit by accurately controlling the on and off of the switch module. Since the voltage state of the resonant cavity can be controlled, this embodiment can provide flexible voltage regulation to meet different application requirements. By controlling the time series of the signal, the phase problem of synchronous rectification can be solved to ensure that the circuit can remain synchronized under different working conditions.

[0091] In summary, the first working mode realizes the flexible adjustment of the high-voltage side resonant cavity loop in the bidirectional inverter LLC circuit topology through the precise control of the MCU drive unit, improves the performance and efficiency of the circuit, and ensures the stable operation of the circuit.

[0092] Next, the energy is transferred from the high-voltage side circuit to the low-voltage side circuit through the transformer TX1. The driving logic of this part is: The two IO ports connected to IO_PWM_LA and IO_PWM_LB by MCU are set to high impedance state, and MCU no longer takes over the drive of Q1-Q4, which is controlled by the second synchronous drive management circuit instead.

[0093] In this application, the second working mode includes: When the current direction of the secondary side of the second current transformer is from the first pin to the second pin, the comparator four outputs a high-level signal which is input to the second pin of the driver chip three and the third pin of the driver chip four after passing through the inverter four, so as to control the analog switch module five and the analog switch module eight to be turned on synchronously; when the current direction of the secondary side of the second current transformer is from the first pin to the second pin, the comparator three also outputs a low-level signal which is input to the third pin of the driver chip three and the second pin of the driver chip four after passing through the inverter three, so as to control the analog switch module six and the analog switch module seven to be turned off synchronously.

[0094] It should be noted that, as attached Figure 2 As shown, when the low-voltage side output of transformer TX1 is a positive half-cycle voltage waveform, the high-voltage side of transformer TX1 includes pins 3 and 4, and the low-voltage side of transformer TX1 includes pins 1 and 2. At this time, pin 2 of transformer TX1 is positive and pin 1 is negative, so that the output current causes the body diodes of Q1 and Q4 to turn on. The current direction of the second current transformer TX3 is from pin 1 to pin 2 of TX3. The current detection resistor R36 on the secondary side of the transformer generates a positive voltage at the top and a negative voltage at the bottom, which is coupled to the + and - terminals of comparator 4 IC3_B through resistors R54 and R49, causing the output level of IC3_B to change from low to high. After pulse shaping by inverter 7 IC4_C and inverter 8 IC4_D, the output high level is coupled to HIN of U2 through R25 and R29 to complete the synchronous conduction drive of Q1. The high level is also coupled to LIN of U4 through R25 and R46 to complete the synchronous conduction drive of Q4. Because R36 is positive at the top and negative at the bottom during the positive half-cycle output, it is coupled to the + and - input terminals of the comparator IC3_A through R10 and R38, and the coupled voltage maintains the comparator control output at a low level. Finally, after being shaped by IC4_A and IC4_B, it is coupled to LIN of U2 and HIN of U4 through R35 and R41 respectively, and finally controls Q2 and Q3 to be turned off.

[0095] The second working mode realizes synchronous rectification control of Q1-Q4 on the low-voltage side by detecting the current direction, thereby improving the rectification efficiency. Since Q1 and Q4 are synchronously turned on during the positive half-cycle voltage waveform, and Q2 and Q3 are turned off, the switching action is reduced, thereby reducing the switching loss. By precisely controlling the on and off of Q1-Q4, the energy transfer process of the transformer is optimized and the overall energy conversion efficiency is improved. In addition, the introduction of the second synchronous drive management circuit makes the circuit more stable during the energy transfer process and reduces the burden on the MCU. The current transformer directly detects the current direction, and the fast response of the comparator and inverter ensures the real-time and accuracy of the synchronous rectification.

[0096] The third working mode includes: When the current direction of the secondary side of the second current transformer is from the second pin to the first pin, the comparator four outputs a low-level signal which is input to the second pin of the driver chip three and the third pin of the driver chip four after passing through the inverter four, so as to control the analog switch module five and the analog switch module eight to be disconnected synchronously; when the current direction of the secondary side of the second current transformer is from the second pin to the first pin, the comparator three also outputs a high-level signal which is input to the third pin of the driver chip three and the second pin of the driver chip four after passing through the inverter three, so as to control the analog switch module six and the analog switch module seven to be turned on synchronously.

[0097] It should be noted that when the low-voltage side output of TX1 is in the negative half cycle, the 1st pin of TX1 is positive and the 2nd pin is negative, the current causes the body diodes of Q2 and Q3 to turn on, and the current direction of the transformer TX3 is from the 2nd pin of TX3 to the 1st pin. The current detection resistor R36 on the secondary side of the transformer generates a negative voltage at the top and a positive voltage at the bottom, which is coupled to the + and - terminals of the comparator IC3_B through resistors R54 and R49, causing the output level of IC3_B to turn low. After pulse shaping by IC4_C and IC4_D, the output low level is coupled to the HIN of U2 through R25 and R29 to complete the shutdown drive of Q1. At the same time, it is also coupled to the LIN of U4 through R25 and R46 to complete the shutdown drive of Q4. Because R36 is negative at the top and positive at the bottom during the negative half cycle output, it is coupled to the + and - input terminals of the comparator IC3_A through R10 and R38, and the coupled voltage controls the output of the comparator to be high. Finally, after being shaped by IC4_A and IC4_B, it is coupled to LIN of U2 and HIN of U4 through R35 and R32 respectively, finally controlling Q2 and Q3 to turn on.

[0098] The third working mode realizes synchronous rectification control of Q1-Q4 on the low-voltage side by detecting the current direction, thereby improving the rectification efficiency. Since Q2 and Q3 are synchronously turned on during the negative half-cycle voltage waveform, Q1 and Q4 are turned off, reducing switching actions and thus reducing switching losses. By precisely controlling the on and off of Q1-Q4, the energy transfer process of the transformer is optimized, and the overall energy conversion efficiency is improved.

[0099] In summary, the second working mode or the third working mode realizes accurate synchronous rectification of the low-voltage side switch through automatic control of the second synchronous drive management circuit, improves the performance and efficiency of the circuit, and ensures the stability and reliability of the circuit.

[0100] Furthermore, a first negative bias module is set at the connection between the reverse input terminal and the non-inverting input terminal of comparator three, and the first negative bias module is composed of a first resistor voltage divider network for providing a first bias voltage; a second negative bias module is set at the connection between the reverse input terminal and the non-inverting input terminal of comparator four, and the second negative bias module is composed of a second resistor voltage divider network for providing a second bias voltage.

[0101] It should be noted that the first resistor voltage divider network in this embodiment is specifically composed of the following: The first resistor voltage divider network is connected between the inverting input terminal (-terminal) and the in-phase input terminal (+terminal) of the comparator IC1_A. It includes the following resistors: resistor R8: connected to the +3.3V power supply of the comparator; resistor R9: connected between resistor R8 and input Vi- of the comparator IC1_A; resistor R34: connected between input Vi- and input Vi+ of the comparator IC1_A; resistor R37: connected between input Vi+ of the comparator IC1_A and resistor R47; resistor R47: connected to GND of the comparator.

[0102] The first bias voltage refers to the voltage value of the inverting input terminal of the comparator IC1_A being set to a voltage value lower than the power supply voltage 3.3 V through this resistor voltage divider network. This voltage value is jointly determined by the resistors R9, R34 and R37.

[0103] The second resistor divider network is specifically composed as follows: The second resistor voltage divider network is connected between the inverting input terminal (-terminal) and the in-phase input terminal (+terminal) of the second comparator IC1_B. It includes the following resistors: resistor R23: connected to the +3.3V power supply of the comparator; resistor R24: connected between resistor R23 and input Vi- of comparator IC1_B; resistor R34: connected between input Vi- and input Vi+ of comparator IC1_B; resistor R56: connected between input Vi+ of comparator IC1_B and resistor R57; resistor R57: connected to GND of the comparator.

[0104] The second bias voltage provides a stable low level state for the reverse input terminal of the comparator IC1_B through the second resistor voltage divider network. This voltage value is also determined by the resistors R24, R34 and R56.

[0105] The specific circuit working principle is as follows: The circuit provides a fixed bias voltage for the inverting input of the comparator through a resistor divider network. This bias voltage is lower than the power supply voltage of the comparator. In this way, even when there is no input signal or the input signal is very low, the voltage at the non-inverting input of the comparator will be higher than the voltage at the inverting input, thus ensuring that the comparator outputs a low level.

[0106] The reverse bias setting improves the stability of the circuit and prevents the comparator from malfunctioning due to missing input signals or noise interference. By ensuring that the comparator outputs a low level when there is no signal or a low signal input, the reverse bias improves the reliability of the circuit and reduces erroneous operations caused by unstable comparator output levels. The reverse bias setting enables the circuit to automatically switch the conduction state of the MOSFET according to the current direction on the secondary side of the transformer, realizes synchronous drive management, and improves rectification efficiency.

[0107] In summary, the first resistor voltage divider network and the second resistor voltage divider network provide stable reverse bias voltages for the first comparator and the second comparator respectively, so that the comparators output reliable low levels when the circuit is static, making the circuit work more stable.

[0108] The above embodiments are to complete the energy flow process of the forward synchronous rectification drive. The following is to complete the energy flow process of the reverse synchronous rectification drive. The circuit working principle is similar to that of the forward synchronous rectification drive, and is specifically as follows: When energy flows from the low-voltage side circuit to the high-voltage side circuit, a second drive signal is output through the other end of the MCU drive unit to control the second power switch circuit to enter the fourth working mode, so that the working frequency output from the second power switch circuit is higher than the resonant frequency of the high-voltage side resonant cavity loop; when it is detected that the high-voltage side of the current transformer is in a voltage output state, the interface at one end of the MCU drive unit is set to a high-impedance state; when the high-voltage side of the current transformer is in a positive half-cycle voltage output state, the first power switch circuit is controlled to enter the fifth working mode through the first synchronous rectification signal processing circuit; when the high-voltage side of the current transformer is in a negative half-cycle voltage output state, the first power switch circuit is controlled to enter the sixth working mode through the first synchronous rectification signal processing circuit to complete the reverse synchronous rectification drive.

[0109] It should be noted that when it is necessary to control the energy transfer from the LV low-voltage side to the HV high-voltage side, Q1, Q2, Q3, and Q4 work in a complementary alternating conduction state, that is, when Q1 is turned on, Q4 is controlled to be turned on, and Q2 and Q3 are controlled to be turned off at the same time. After a short dead time, all four MOS are turned off, and then Q2 and Q3 are turned on and Q1 and Q4 are turned off at the same time, and the cycle repeats. M1, M2, M3, and M4 on the high-voltage side drive them to be turned on when their body diodes are turned on. In this state, by adjusting the switching operating frequency of Q1-Q4 to make it higher than the resonant frequency of L1 and C2, the power transferred from the LV low-voltage side to the HV high-voltage side can be controlled. The higher the operating frequency, the lower the output power, and the closer the operating frequency is to the resonant frequency, the greater the output power. In this mode, Q1-Q4 is controlled by the signals IO_PWM_LA and IO_PWM_LB of the MCU's IO port, and the MCU will set these two IO ports to push-pull PWM output. Because the MCU's IO port has a current sinking capability of more than 20 mA, it has a very low internal resistance. The resistance of R35 and R25 is 1KΩ. At this time, the synchronous drive signal on the left cannot affect the level state of the IO_PWM_LA and IO_PWM_LB networks, so the IO_PWM_LA and IO_PWM_LB signals are coupled to the HIN and LIN of U2 and U4 through R29, R32, R41, and R46 to control Q1-Q4.

[0110] In this application, the fourth working mode includes: A high-level signal is output through port three of the MCU driving unit to the third pin of the driving chip three and the second pin of the driving chip four to control the analog switch module six and the analog switch module seven to be turned on; a low-level signal is output through port four of the MCU driving unit to the second pin of the driving chip three and the third pin of the driving chip four to control the analog switch module five and the analog switch module eight to be turned off, so that the winding voltage on the low-voltage side of the transformer is in a negative half-cycle state with negative upper part and positive lower part.

[0111] It should be noted that when IO_PWM_LA is at a high level, LIN of U2 and HIN of U4 are at a high level, controlling Q2 and Q3 to turn on. At the same time, IO_PWM_LB is at a low level, HIN of U2 and LIN of U4 are at a low level, controlling Q1 and Q4 to turn off. At this time, the voltage output to the low-voltage side winding of the transformer TX1 is a negative half cycle with negative on top and positive on the bottom.

[0112] Alternatively, a low-level signal is output through port three of the MCU driving unit to the third pin of the driving chip three and the second pin of the driving chip four to control the analog switch module six and the analog switch module seven to be disconnected; a high-level signal is output through port four of the MCU driving unit to the second pin of the driving chip three and the third pin of the driving chip four to control the analog switch module five and the analog switch module eight to be turned on, so that the winding voltage on the low-voltage side of the transformer is in a positive half-cycle state with positive on top and negative on the bottom.

[0113] When IO_PWM_LA is at a low level, LIN of U2 and HIN of U4 are at a low level, controlling Q2 and Q3 to be cut off. At the same time, IO_PWM_LB is at a high level, HIN of U2 and LIN of U4 are at a high level, controlling Q1 and Q4 to be turned on, and the voltage output to the low-voltage side winding of the transformer TX1 is a positive half cycle with positive on top and negative on the bottom.

[0114] In this embodiment, the driving logic of the corresponding output system of the high-voltage side of the transformer TX1 is: the two IO ports connected to the MCU and IO_PWM_HA and IO_PWM_HB are set to a high-impedance state, and the MCU no longer takes over the driving of M1-M4, but is instead controlled by the first synchronous driving management circuit. The specific working mode is as follows: The fifth working mode includes: When the current direction of the secondary side of the first current transformer is from the first pin to the second pin, the comparator 2 outputs a high-level signal which is input to the second pin of the driver chip 1 and the third pin of the driver chip 2 after passing through the inverter 2, so as to control the analog switch module 1 and the analog switch module 4 to be turned on synchronously; when the current direction of the secondary side of the first current transformer is from the first pin to the second pin, the comparator 1 also outputs a low-level signal which is input to the third pin of the driver chip 1 and the second pin of the driver chip 2 after passing through the inverter 1, so as to control the analog switch module 2 and the analog switch module 3 to be turned off synchronously.

[0115] It should be noted that when the high-voltage side output of TX1 is in the positive half cycle, the 3rd pin of TX1 is positive and the 4th pin is negative, the current causes the body diodes of M1 and M4 to turn on, and the current direction of the transformer TX2 is from the 1st pin to the 2nd pin of TX2. The current detection resistor R34 on the secondary side of the transformer generates a positive voltage at the top and a negative voltage at the bottom, which is coupled to the + and - terminals of the comparator IC1_B through resistors R56 and R24, causing the output level of IC1_B to turn high. After pulse shaping by IC2_C and IC2_D, the output high level is coupled to the HIN of U1 through R20 and R1 to complete the synchronous conduction drive of M1. The high level is also coupled to the LIN of U3 through R20 and R17 to complete the synchronous conduction drive of M4. Because R34 is positive at the top and negative at the bottom during the positive half cycle output, it is coupled to the + and - input terminals of the comparator IC1_A through R37 and R9, and the coupled voltage maintains the comparator control output at a low level. Finally, after being shaped by IC2_A and IC2_B, it is coupled to LIN of U1 and HIN of U3 through R33 and R4 respectively, and finally controls M2 and M3 to be closed.

[0116] The sixth working mode includes: When the current direction of the secondary side of the first current transformer is from the second pin to the first pin, the comparator 2 outputs a low-level signal which is input to the second pin of the driver chip 1 and the third pin of the driver chip 2 after passing through the inverter 2, so as to control the analog switch module 1 and the analog switch module 4 to be disconnected synchronously; when the current direction of the secondary side of the first current transformer is from the second pin to the first pin, the comparator 1 also outputs a high-level signal which is input to the third pin of the driver chip 1 and the second pin of the driver chip 2 after passing through the inverter 1, so as to control the analog switch module 2 and the analog switch module 3 to be turned on synchronously.

[0117] When the high-voltage side output of TX1 is in the negative half cycle, the 3rd pin of TX1 is positive and the 4th pin is negative. The current causes the body diodes of M2 and M3 to conduct. The current direction of the transformer TX2 is from the 2nd pin of TX2 to the 1st pin. The current detection resistor R34 on the secondary side of the transformer generates a negative voltage at the top and a positive voltage at the bottom. It is coupled to the + and - terminals of the comparator IC1_B through resistors R56 and R24, causing the output level of IC1_B to turn low. After pulse shaping by IC2_C and IC2_D, the output low level is coupled to the HIN of U1 through R20 and R1 to complete the shutdown drive of M1. The low level is also coupled to the LIN of U3 through R20 and R17 to complete the shutdown drive of M4. Because R34 is negative at the top and positive at the bottom during the negative half cycle output, it is coupled to the + and - input terminals of the comparator IC1_A through R37 and R9. The coupled voltage controls the output of the comparator to be high. Finally, after being shaped by IC2_A and IC2_B, it is coupled to LIN of U1 and HIN of U3 through R33 and R4 respectively, thus controlling M2 and M3 to conduct.

[0118] Furthermore, a third negative bias module is set at the connection between the reverse input terminal and the non-inverting input terminal of comparator one, and the third negative bias module is composed of a third resistor voltage divider network, which is used to provide a third bias voltage; a fourth negative bias module is set at the connection between the reverse input terminal and the non-inverting input terminal of comparator two, and the fourth negative bias module is composed of a fourth resistor voltage divider network, which is used to provide a fourth bias voltage.

[0119] It should be noted that the third resistor voltage divider network is connected between the inverting input terminal (-terminal) and the non-inverting input terminal (+terminal) of the comparator IC3_A. It includes the following resistors: Resistor R11: connected to the +3.3V power supply of the comparator; Resistor R10: connected between resistor R11 and input Vi- of comparator IC3_A; Resistor R36: connected between input Vi- and input Vi+ of comparator IC3_A; Resistor R38: connected between input Vi+ of comparator IC3_A and resistor R50; Resistor R50: connected to GND of the comparator.

[0120] The third bias voltage means that through this resistor voltage divider network, the inverting input terminal of the comparator IC3_A is set to a voltage value lower than the power supply voltage 3.3 V. This voltage value is jointly determined by the resistors R10, R36 and R38.

[0121] The fourth resistor divider network is connected between the inverting input terminal (-terminal) and the non-inverting input terminal (+terminal) of the comparator IC3_B. It includes the following resistors: Resistor R48: connected to the +3.3V power supply of the comparator; Resistor R49: connected between resistor R48 and input Vi- of comparator IC3_B; Resistor R36: connected between input Vi- and input Vi+ of comparator IC3_B; Resistor R54: connected between input Vi+ of comparator IC3_B and resistor R58; Resistor R58: connected to GND of the comparator.

[0122] The fourth bias voltage refers to that the fourth resistor divider network provides a stable low level state for the reverse input terminal of the comparator IC3_B, and the fourth bias voltage value is also jointly determined by the resistors R49, R36 and R54.

[0123] The specific circuit working principle is: The circuit provides a fixed bias voltage for the inverting input of the comparator through a resistor divider network. This bias voltage is lower than the power supply voltage of the comparator. In this way, even when there is no input signal or the input signal is very low, the voltage at the inverting input of the comparator will be higher than the voltage at the inverting input, thereby ensuring that the comparator outputs a low level, allowing the comparator to output a reliable low level when the circuit is static, making the circuit more stable.

[0124] In this embodiment, when the MCU sets the corresponding IO port to a high impedance state and does not take over the IO_PWM_HA and IO_PWM_HB networks, the circuit implements the synchronous rectification drive logic of the high-voltage side HV power tubes M1-M4 through hardware logic.

[0125] In summary, Example 2 analyzes and introduces in detail the control logic of both sides of the high-voltage side and the low-voltage side of the bidirectional inverter circuit. If the energy is transferred from the high-voltage side to the low-voltage side, the single-chip MCU output IO port outputs a push-pull PWM control signal mode on the high-voltage side, and the four switch tubes on the high-voltage side are completely taken over in a complementary and symmetrical wave-generating manner, and the input of energy on the high-voltage side is controlled by frequency conversion. At this time, the single-chip MCU output IO port corresponding to the output low-voltage side is set to a high-impedance state, and the drive signal is taken over by a hardware circuit. The corresponding MOS is turned on at the corresponding time when the current passes through the body diode to complete the synchronous drive. On the contrary, if the energy is transferred from the low-voltage side to the high-voltage side, the single-chip MCU output IO port outputs a push-pull PWM control signal mode on the low-voltage side, and the four switch tubes on the low-voltage side are completely taken over in a complementary and symmetrical wave-generating manner, and the input of energy on the low-voltage side is controlled by frequency conversion. At this time, the MCU output IO port corresponding to the output high-voltage side is set to a high-impedance state, and the drive signal is taken over by a hardware circuit. The corresponding MOS is turned on at the corresponding time when the current passes through the body diode to complete the synchronous drive. This process perfectly realizes the synchronous rectification of the bidirectional LLC inverter and improves the conversion efficiency. Moreover, this embodiment uses a combination of software and hardware. Even if the resonant inductor and capacitor decay after the product has been used for a period of time, it will not affect the safety and stability of the circuit, and completely solve the phase problem of synchronous rectification. In addition, this embodiment also saves software expenses and eliminates the inaccuracy caused by pure software algorithms.

[0126] Embodiment three: The present application also provides a storage medium, which is a computer-readable storage medium, on which a computer program is stored. When the computer program is executed by a processor, the synchronous rectification control method of the bidirectional inverter LLC circuit topology as described above is implemented.

[0127] It should be noted that the storage medium plays a key role in the synchronous rectification control method for implementing the bidirectional inverter LLC circuit topology. It is usually a computer-readable storage medium, such as a solid-state drive (SSD), a hard disk drive (HDD), a USB flash drive, an optical disk, or other types of storage devices. The following is the implementation process of the storage medium in this embodiment: First, a written computer program containing the algorithm and logic of the synchronous rectification control method for implementing the bidirectional inverter LLC circuit topology needs to be stored on a computer-readable storage medium. This usually involves compiling the program code into executable files and then saving these files to the storage medium. The storage medium will be inserted into the computer system or connected to the computer system through a network. In this way, the computer can access the program on the storage medium. The computer's processor reads the programs on the storage medium and executes them. During execution, the program controls the synchronous rectification of the bidirectional inverter LLC circuit according to the predetermined algorithm and logic.

[0128] The program on the storage medium enables the synchronous rectification control of the bidirectional inverter LLC circuit to be automated, reducing the need for human intervention. The program can accurately control the working state of the circuit, including the on and off time of the switch, thereby optimizing the energy conversion efficiency and power output. The program on the storage medium can be adjusted according to different working conditions and application requirements, so that the circuit can adapt to different working environments. Through program control, human errors can be reduced and the stability and reliability of the circuit can be improved.

[0129] In other embodiments, the program on the storage medium can be easily maintained and upgraded to adapt to new technology development and application requirements. The program can also record the working data of the circuit to provide data support for subsequent performance analysis and fault diagnosis.

[0130] In summary, the storage medium plays a key role in realizing the synchronous rectification control method of the bidirectional inverter LLC circuit topology, which makes the circuit control more automated, precise and flexible, while improving the stability and reliability of the circuit.

[0131] The processor may be a central processing unit (CPU), or other general-purpose processors, digital signal processors (DSP), application-specific integrated circuits (ASIC), field-programmable gate arrays (FPGA) or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. A general-purpose processor may be a microprocessor or the processor may be any conventional processor, etc. The memory is used to store an operating system, an application program, a boot loader, data, and other programs, such as the program code of the computer program, etc. The memory may also be used to temporarily store data that has been output or is to be output.

[0132] In several embodiments provided in the present application, it is understood that each box in the flow chart or block diagram can represent a module, a program segment or a part of a code, and the module, a program segment or a part of a code contains one or more executable instructions for realizing the specified logical function. It should also be noted that in some alternative implementations, the functions marked in the box can also occur in a different order from that marked in the accompanying drawings. For example, two consecutive boxes can actually be executed substantially in parallel, and they can sometimes be executed in the opposite order, depending on the functions involved.

[0133] If the functions are implemented in the form of software function modules and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present application can be essentially or partly embodied in the form of a software product that contributes to the prior art. The computer software product is stored in a storage medium and includes several instructions for a computer device to execute all or part of the steps of the methods described in the various embodiments of the present application. The aforementioned storage media include: U disk, mobile hard disk, read-only memory (ROM, Read-Only Memory), random access memory (RAM, Random Access Memory), disk or optical disk, and other media that can store program codes.

[0134] The specific embodiments described above further describe the purpose, technical solutions and beneficial effects of the present application in detail. It should be understood that the above description is only a specific embodiment of the present application and is not intended to limit the scope of protection of the present application. It is particularly pointed out that for those skilled in the art, any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application should be included in the scope of protection of the present application.

Claims

1. A synchronous rectification control circuit of a bidirectional inverter LLC circuit topology, comprising: MCU drive unit, high voltage side circuit, transformer and low voltage side circuit; characterized in that, The high-voltage side circuit includes a first power switch circuit, a first driving module, a high-voltage side resonant cavity loop and a first synchronous rectification signal processing circuit; Among them, one end of the first driving module is connected to one end of the MCU driving unit, the other end of the first driving module is connected to the first end of the first power switching circuit, the second end of the first power switching circuit is connected to the high-voltage side of the transformer after passing through the high-voltage side resonant cavity loop, the high-voltage side of the transformer is also connected to one end of the first synchronous rectification signal processing circuit, and the other end of the first synchronous rectification signal processing circuit is connected to one end of the first driving module; the third end of the first power switching circuit is connected to the first synchronous rectification signal processing circuit; The low-voltage side circuit includes a second power switch circuit, a second drive module and a second synchronous rectification signal processing circuit; Among them, the first end of the second power switching circuit is connected to the low-voltage side of the transformer, the second end of the second power switching circuit is connected to one end of the second driving module, the other end of the second driving module is connected to the other end of the MCU driving unit, the other end of the second driving module is also connected to one end of the second synchronous rectification signal processing circuit, the other end of the second synchronous rectification signal processing circuit is connected to the low-voltage side of the transformer, and the third end of the second power switching circuit is connected to the second synchronous rectification signal processing circuit.

2. The synchronous rectification control circuit of the bidirectional inverter LLC circuit topology according to claim 1, characterized in that: The first power switch circuit at least includes: an analog switch module 1, an analog switch module 2, an analog switch module 3 and an analog switch module 4; The first driving module at least includes: a driving chip 1 and a driving chip 2; One end of the MCU driving unit includes port 1 and port 2; The port 1 is connected to the 3rd pin of the driver chip 1 and the 2nd pin of the driver chip 2 respectively, and the port 2 is connected to the 2nd pin of the driver chip 1 and the 3rd pin of the driver chip 2 respectively; The 7th pin of the driver chip 1 is connected to one end of the analog switch module 1, the 5th pin of the driver chip 1 is connected to one end of the analog switch module 2, the other end of the analog switch module 1 is connected to the other end of the analog switch module 2, and is also connected to the 6th pin of the driver chip 1, and the other end of the analog switch module 1 is also connected to the high-voltage side resonant cavity loop; The 7th pin of the driver chip 2 is connected to one end of the analog switch module 3, the 5th pin of the driver chip 2 is connected to one end of the analog switch module 4, the other end of the analog switch module 3 is connected to the other end of the analog switch module 4, and is also connected to the 6th pin of the driver chip 2, and the other end of the analog switch module 3 is also connected to the first synchronous rectification signal processing circuit.

3. The synchronous rectification control circuit of the bidirectional inverter LLC circuit topology according to claim 1, characterized in that: The high-voltage side resonant cavity loop at least includes a capacitor C1 and an inductor L1; The high-voltage side resonant cavity loop is formed by connecting the capacitor C1, the inductor L1 and the high-voltage side of the transformer; One end of the capacitor C1 is connected to the sixth pin of the driver chip 1, one end of the capacitor C1 is connected to one end of the inductor L1, and the other end of the inductor L1 is connected to the high voltage side of the transformer.

4. The synchronous rectification control circuit of the bidirectional inverter LLC circuit topology according to claim 1, characterized in that: The first synchronous rectification signal processing circuit at least includes a first current transformer, a first comparator and a first inverter; wherein the first comparator includes a comparator 1 and a comparator 2, and the first inverter includes an inverter 1 and an inverter 2; The primary side of the first current transformer is connected to the sixth pin of the second driver chip, and is also connected to the high voltage side of the transformer; The secondary side of the first current transformer is connected to the input end of the comparator 1, the output end of the comparator 1 is connected to the input end of the inverter 1, the output end of the inverter 1 is connected to the third pin of the driver chip 1, and the output end of the inverter 1 is also connected to the second pin of the driver chip 2; The secondary side of the first current transformer is also connected to the input end of comparator 2, the output end of comparator 2 is connected to the input end of inverter 2, the output end of inverter 2 is connected to the second pin of driver chip 1, and the output end of inverter 2 is also connected to the third pin of driver chip 2.

5. The synchronous rectification control circuit of the bidirectional inverter LLC circuit topology according to claim 1, characterized in that: The second power switch circuit at least includes: an analog switch module five, an analog switch module six, an analog switch module seven and an analog switch module eight; The second driving module at least includes: a driving chip three and a driving chip four; The other end of the MCU driving unit includes port three and port four; The port three is respectively connected to the third pin of the driver chip three and the second pin of the driver chip four, and the port four is respectively connected to the second pin of the driver chip three and the third pin of the driver chip four; The 7th pin of the driver chip 3 is connected to one end of the analog switch module 5, the 5th pin of the driver chip 3 is connected to one end of the analog switch module 6, the other end of the analog switch module 5 is connected to the other end of the analog switch module 6, and is also connected to the 6th pin of the driver chip 3, and the other end of the analog switch module 5 is also connected to the low-voltage side of the transformer; The 7th pin of the driving chip four is connected to one end of the analog switch module seven, the 5th pin of the driving chip four is connected to one end of the analog switch module eight, the other end of the analog switch module seven is connected to the other end of the analog switch module eight, and is also connected to the 6th pin of the driving chip four, and the other end of the analog switch module seven is also connected to the second synchronous rectification signal processing circuit.

6. The synchronous rectification control circuit of the bidirectional inverter LLC circuit topology according to claim 1, characterized in that: The second synchronous rectification signal processing circuit at least includes a second current transformer, a second comparator and a second inverter; wherein the second comparator includes a comparator three and a comparator four, and the second inverter includes an inverter three and an inverter four; The primary side of the second current transformer is connected to the sixth pin of the driver chip 4, and is also connected to the low voltage side of the transformer; The secondary side of the second current transformer is connected to the input end of the comparator 3, the output end of the comparator 3 is connected to the input end of the inverter 3, the output end of the inverter 3 is connected to the third pin of the driver chip 3, and the output end of the inverter 3 is also connected to the second pin of the driver chip 4; The secondary side of the second current transformer is also connected to the input end of comparator four, the output end of comparator four is connected to the input end of inverter four, the output end of inverter four is connected to the second pin of driver chip three, and the output end of inverter four is also connected to the third pin of driver chip four.

7. A synchronous rectification control method for a bidirectional inverter LLC circuit topology, applied to a synchronous rectification control circuit for a bidirectional inverter LLC circuit topology as claimed in any one of claims 1 to 6, characterized in that: include: When energy flows from the high-voltage side circuit to the low-voltage side circuit, a first drive signal is output through one end of the MCU drive unit to control the first power switch circuit to enter a first working mode, so that the working frequency output from the first power switch circuit is higher than the resonant frequency of the high-voltage side resonant cavity loop; When it is detected that the low-voltage side of the current transformer is in a voltage output state, the interface at the other end of the MCU driving unit is set to a high impedance state; when the low-voltage side of the current transformer is in a positive half-cycle voltage output state, the second power switch circuit is controlled to enter a second working mode through the second synchronous rectification signal processing circuit; when the low-voltage side of the current transformer is in a negative half-cycle voltage output state, the second power switch circuit is controlled to enter a third working mode through the second synchronous rectification signal processing circuit to complete the forward synchronous rectification drive; When energy flows from the low-voltage side circuit to the high-voltage side circuit, a second drive signal is output through the other end of the MCU drive unit to control the second power switch circuit to enter a fourth working mode, so that the working frequency output from the second power switch circuit is higher than the resonant frequency of the high-voltage side resonant cavity loop; When it is detected that the high-voltage side of the current transformer is in a voltage output state, the interface at one end of the MCU driving unit is set to a high-impedance state; when the high-voltage side of the current transformer is in a positive half-cycle voltage output state, the first synchronous rectification signal processing circuit controls the first power switch circuit to enter a fifth working mode; when the high-voltage side of the current transformer is in a negative half-cycle voltage output state, the first synchronous rectification signal processing circuit controls the first power switch circuit to enter a sixth working mode to complete the reverse synchronous rectification drive.

8. The synchronous rectification control method of a bidirectional inverter LLC circuit topology according to claim 7, characterized in that: The first working mode includes: Outputting a high level signal to the third pin of the driver chip one and the second pin of the driver chip two through the port one of the MCU driver unit, so as to control the analog switch module two and the analog switch module three to be turned on; Outputting a low-level signal to the second pin of the driver chip one and the third pin of the driver chip two through the port two of the MCU driver unit to control the analog switch module one and the analog switch module four to be disconnected, so that the voltage of the high-voltage side resonant cavity loop is in a negative half-cycle state with negative upper part and positive lower part; Alternatively, a low level signal is outputted to the third pin of the driver chip one and the second pin of the driver chip two through the port one of the MCU driver unit to control the analog switch module two and the analog switch module three to be disconnected; A high-level signal is outputted through port 2 of the MCU driving unit to the second pin of the driving chip one and the third pin of the driving chip two to control the analog switch module one and the analog switch module four to be turned on, so that the voltage of the high-voltage side resonant cavity loop is in a positive half-cycle state with positive on top and negative on the bottom.

9. The synchronous rectification control method of a bidirectional inverter LLC circuit topology according to claim 7, characterized in that: The second working mode includes: When the current direction of the secondary side of the second current transformer is from the first pin to the second pin, the comparator 4 outputs a high level signal which is input to the second pin of the driver chip 3 and the third pin of the driver chip 4 after passing through the inverter 4, so as to control the analog switch module 5 and the analog switch module 8 to be turned on synchronously; When the current direction of the secondary side of the second current transformer is from the first pin to the second pin, the comparator 3 also outputs a low-level signal which is input to the third pin of the driver chip 3 and the second pin of the driver chip 4 after passing through the inverter 3, so as to control the analog switch module 6 and the analog switch module 7 to be disconnected synchronously; The third working mode includes: When the current direction of the secondary side of the second current transformer is from the second pin to the first pin, the comparator 4 outputs a low level signal which is input to the second pin of the driver chip 3 and the third pin of the driver chip 4 after passing through the inverter 4, so as to control the analog switch module 5 and the analog switch module 8 to be disconnected synchronously; When the current direction of the secondary side of the second current transformer is from the second pin to the first pin, the comparator three also outputs a high-level signal which is input to the third pin of the driver chip three and the second pin of the driver chip four after passing through the inverter three, so as to control the analog switch module six and the analog switch module seven to be turned on synchronously.

10. The synchronous rectification control method of a bidirectional inverter LLC circuit topology according to claim 9, characterized in that: A first negative bias module is provided between the inverting input terminal and the non-inverting input terminal of the comparator 3, wherein the first negative bias module is composed of a first resistor voltage divider network and is used to provide a first bias voltage; A second negative bias module is provided between the inverting input terminal and the non-inverting input terminal of the comparator 4. The second negative bias module is composed of a second resistor voltage divider network and is used to provide a second bias voltage.

11. The synchronous rectification control method of a bidirectional inverter LLC circuit topology according to claim 7, characterized in that: The fourth working mode includes: Outputting a high level signal to the third pin of the driver chip three and the second pin of the driver chip four through the port three of the MCU driver unit to control the analog switch module six and the analog switch module seven to be turned on; Outputting a low-level signal to the second pin of the driver chip three and the third pin of the driver chip four through the port four of the MCU driver unit to control the analog switch module five and the analog switch module eight to be disconnected, so that the winding voltage on the low-voltage side of the transformer is in a negative half-cycle state with negative on the top and positive on the bottom; Alternatively, a low level signal is outputted through port 3 of the MCU driving unit to pin 3 of the driving chip 3 and pin 2 of the driving chip 4 to control the analog switch module 6 and the analog switch module 7 to be disconnected; A high-level signal is outputted through port four of the MCU driving unit to the second pin of the driving chip three and the third pin of the driving chip four to control the analog switch module five and the analog switch module eight to be turned on, so that the winding voltage on the low-voltage side of the transformer is in a positive half-cycle state with positive on top and negative on the bottom.

12. The synchronous rectification control method of a bidirectional inverter LLC circuit topology according to claim 7, characterized in that: The fifth working mode includes: When the current direction of the secondary side of the first current transformer is from the first pin to the second pin, the comparator 2 outputs a high level signal which is input to the second pin of the driver chip 1 and the third pin of the driver chip 2 after passing through the inverter 2, so as to control the analog switch module 1 and the analog switch module 4 to be turned on synchronously; When the current direction of the secondary side of the first current transformer is from the first pin to the second pin, the comparator 1 also outputs a low-level signal which is input to the third pin of the driver chip 1 and the second pin of the driver chip 2 after passing through the inverter 1, so as to control the analog switch module 2 and the analog switch module 3 to be disconnected synchronously; The sixth working mode includes: When the current direction of the secondary side of the first current transformer is from the second pin to the first pin, the comparator 2 outputs a low level signal which is input to the second pin of the driver chip 1 and the third pin of the driver chip 2 after passing through the inverter 2, so as to control the analog switch module 1 and the analog switch module 4 to be disconnected synchronously; When the current direction of the secondary side of the first current transformer is from the second pin to the first pin, the comparator 1 also outputs a high-level signal which is input to the third pin of the driver chip 1 and the second pin of the driver chip 2 after passing through the inverter 1, so as to control the analog switch module 2 and the analog switch module 3 to be turned on synchronously.

13. The synchronous rectification control method of a bidirectional inverter LLC circuit topology according to claim 12, characterized in that: A third negative bias module is provided at the connection between the inverting input terminal and the non-inverting input terminal of the comparator 1, wherein the third negative bias module is composed of a third resistor voltage divider network and is used to provide a third bias voltage; A fourth negative bias module is provided between the inverting input terminal and the non-inverting input terminal of the second comparator. The fourth negative bias module is composed of a fourth resistor voltage divider network and is used to provide a fourth bias voltage.

14. A storage medium, being one of computer-readable storage media, characterized in that: A computer program is stored thereon, and when the computer program is executed by a processor, a synchronous rectification control method for a bidirectional inverter LLC circuit topology as described in any one of claims 7 to 13 is implemented.

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