High-linearity noise cancellation radio frequency receiver

Abstract

The invention discloses a high-linearity noise cancellation radio frequency receiver which comprises an antenna, a multi-way switch-capacitor filtering structure and two radio frequency receiving IQ modules with the same structure. Any one of the radio frequency receiving IQ modules comprises a passive mixer, a signal main transmission circuit and a signal auxiliary transmission circuit used for noise cancellation. The on resistance of the passive mixer is smaller than a reference value so as to realize high linearity and low noise; the antenna and the passive mixer are connected with the multi-way switch-capacitor filtering structure; the signal main transmission circuit and the signal auxiliary transmission circuit are connected with the passive mixer; the reference value is 1 / 10 of the source resistance of the antenna. The radio frequency receiver can improve signal linearity, improve signal transmission quality and reduce self power consumption. The radio frequency circuit can be widely applied to the technical field of radio frequency circuits.

Description

Technical Field

[0001] The present application relates to the technical field of radio frequency circuits, and in particular to a high linearity noise cancellation radio frequency receiver. Background Art

[0002] The RF receivers in the related technology currently mainly include frequency-shift noise cancellation receivers and baseband noise cancellation receivers. Among them, the frequency-shift noise cancellation receiver uses two separate down-conversion paths based on passive mixing. By making the output gains of the two paths equal but inverted, and the noise voltage gains equal and in phase, the noise cancellation effect is achieved. The frequency-shift noise cancellation receiver can achieve a low noise figure but a narrow passband bandwidth and low linearity; the baseband noise cancellation receiver is based on it, and all active circuits are designed to work at the baseband. The baseband noise cancellation receiver can achieve a low noise figure and a wide passband bandwidth, but the linearity is still low and consumes a lot of power. Therefore, there are technical problems that need to be solved in the related technology. Summary of the invention

[0003] The purpose of this application is to solve one of the technical problems existing in the prior art to at least a certain extent.

[0004] To this end, an object of an embodiment of the present application is to provide a high-linearity noise-cancelling radio frequency receiver, which can improve the linearity of the signal, enhance the signal transmission quality and reduce its own power consumption.

[0005] In order to achieve the above technical objectives, the technical solutions adopted by the embodiments of the present application include: a high-linearity noise cancellation radio frequency receiver, including an antenna, a multi-way switch-capacitor filter structure and two radio frequency receiving IQ modules with the same structure;

[0006] Wherein, any one of the RF receiving IQ modules includes a passive mixer, a signal main transmission circuit and a signal auxiliary transmission circuit for noise cancellation; the on-resistance of the passive mixer is less than the reference value to achieve high linearity and low noise;

[0007] The antenna and the passive mixer are connected to the multi-way switch-capacitor filter structure; the main signal transmission circuit and the auxiliary signal transmission circuit are connected to the passive mixer.

[0008] In addition, the high linearity noise cancellation radio frequency receiver according to the above embodiment of the present invention may also have the following additional technical features:

[0009] Furthermore, in an embodiment of the present application, the multi-way switch-capacitor filter structure includes four filter sub-structures connected in parallel; each of the filter sub-structures includes a first NMOS tube and a first capacitor; the drain of the first NMOS tube is connected to one end of the first capacitor; the source of the first NMOS tube is grounded; the gate of the first NMOS tube is connected to a first external local oscillator LO signal; and the other end of the first capacitor is connected to the antenna.

[0010] Further, in the embodiment of the present application, the passive mixer includes a first passive mixing structure and a second passive mixing structure; the signal main transmission circuit includes a first positive phase input terminal and a first negative phase input terminal; the signal auxiliary transmission circuit includes a second positive phase input terminal and a second negative phase input terminal;

[0011] The first passive mixing structure includes a second NMOS tube and a second capacitor; the drain of the second NMOS tube, the first positive phase input terminal and the second positive phase input terminal are connected to one end of the second capacitor; the source of the second NMOS tube is connected to the antenna; the gate of the second NMOS tube is connected to a second external local oscillator LO signal, and the other end of the second capacitor is grounded;

[0012] The second passive mixing structure includes a third NMOS tube and a third capacitor; the drain of the third NMOS tube, the first inverting input terminal and the second inverting input terminal are connected to one end of the third capacitor; the source of the third NMOS tube is connected to the antenna; the gate of the third NMOS tube is connected to the second external local oscillator LO signal, and the other end of the third capacitor is grounded.

[0013] Further, in the embodiment of the present application, the main signal transmission circuit includes a matching resistor group and a first transimpedance differential amplifier module; the matching resistor group includes two matching resistors with equal resistance values;

[0014] One end of any one of the matching resistors is connected to the first positive phase sub-input end of the first transimpedance differential amplifier module; the other end of any one of the matching resistors serves as the first positive phase input end;

[0015] One end of the other matching resistor is connected to the first inverting sub-input end of the first transimpedance differential amplifier module; and the other end of one of the matching resistors serves as the first inverting input end.

[0016] Further, in an embodiment of the present application, the signal auxiliary transmission circuit includes a first transconductance amplifier, a second transconductance amplifier and a second transimpedance differential amplifier module;

[0017] One end of the first transconductance amplifier is connected to the second positive phase sub-input end of the second transimpedance differential amplifier module; the other end of the first transconductance amplifier serves as the second positive phase input end;

[0018] One end of the second transconductance amplifier is connected to the second inverting sub-input end of the second transimpedance differential amplifier module; the other end of the second transconductance amplifier serves as the second inverting input end.

[0019] Furthermore, in the embodiment of the present application, the transconductance of the first transconductance amplifier and the second transconductance amplifier are both 100 mS, where mS is the transconductance unit of milliSiemens.

[0020] Further, in the embodiment of the present application, the second transimpedance differential amplifier module has the same structure as the first transimpedance differential amplifier module, and any one of the transimpedance differential amplifier modules includes a first operational amplifier, a first resistor, a second resistor, a third resistor, a fourth resistor, a fifth resistor, a fourth capacitor, a fifth capacitor, a sixth capacitor, a seventh capacitor, and an eighth capacitor;

[0021] One end of the fourth capacitor, one end of the fifth capacitor, one end of the seventh capacitor, one end of the eighth capacitor, one end of the fifth resistor and one end of the first resistor are connected to the non-inverting input terminal of the first operational amplifier;

[0022] The other end of the first resistor, the other end of the fourth capacitor and one end of the second resistor are connected to the inverting output end of the first operational amplifier;

[0023] The other end of the fifth resistor, the other end of the eighth capacitor and one end of the fourth resistor are connected to the non-inverting output end of the first operational amplifier;

[0024] The other end of the second resistor, the other end of the seventh capacitor and one end of the third resistor are connected to one end of the sixth capacitor;

[0025] The other end of the fourth resistor, the other end of the fifth capacitor, the other end of the third resistor and the other end of the sixth capacitor are connected.

[0026] Furthermore, in the embodiment of the present application, the second resistor and the fourth resistor have the same resistance value; the resistance value of the third resistor is twice the resistance value of the fourth resistor.

[0027] Furthermore, in the embodiment of the present application, the reference value is 1 / 10 of the source resistance of the antenna.

[0028] Further, in an embodiment of the present application, the RF receiving IQ module also includes a signal recombination circuit; the signal main transmission circuit and the signal auxiliary transmission circuit are connected to the signal recombination circuit, and the signal recombination circuit includes a second operational amplifier, a sixth resistor, a seventh resistor, an eighth resistor, a ninth resistor, a tenth resistor, an eleventh resistor, a ninth capacitor, and a tenth capacitor;

[0029] One end of the sixth resistor is connected to the positive phase output end of the main signal transmission circuit; one end of the seventh resistor is connected to the negative phase output end of the auxiliary signal transmission circuit; one end of the eighth resistor is connected to the negative phase output end of the main signal transmission circuit; one end of the ninth resistor is connected to the positive phase output end of the auxiliary signal transmission circuit;

[0030] One end of the ninth capacitor, one end of the tenth resistor, the other end of the sixth resistor and the other end of the seventh resistor are connected to the non-inverting input terminal of the second operational amplifier;

[0031] One end of the tenth capacitor, one end of the eleventh resistor, the other end of the eighth resistor and the other end of the ninth resistor are connected to the inverting input end of the second operational amplifier;

[0032] The other end of the ninth capacitor and the other end of the tenth resistor are connected to the inverting output end of the second operational amplifier;

[0033] The other end of the tenth capacitor and the other end of the eleventh resistor are connected to the non-inverting output terminal of the second operational amplifier.

[0034] The advantages and benefits of the present application will be partially given in the following description, and partially become apparent from the following description, or be understood through the practice of the present application:

[0035] The present application can set up a multi-way switch-capacitor filtering structure and a passive mixer between the antenna, the main signal transmission circuit and the auxiliary signal transmission circuit. The on-resistance of the passive mixer is small to achieve high linearity and low noise. The passive mixer with an on-resistance less than the reference value set between the antenna, the main signal transmission circuit and the auxiliary signal transmission circuit can improve the linearity of the signals of the input signal main transmission circuit and the auxiliary signal transmission circuit; and the multi-way switch-capacitor filtering structure can filter out out-band signals, which can further improve the linearity. BRIEF DESCRIPTION OF THE DRAWINGS

[0036] Figure 1 A schematic diagram of a module of a high linearity noise cancellation radio frequency receiver in a specific embodiment of the present invention;

[0037] Figure 2A schematic diagram of the circuit structure of a high-linearity noise cancellation radio frequency receiver in a specific embodiment of the present invention;

[0038] Figure 3 A schematic diagram of the circuit structure of a transconductance amplifier in a specific embodiment of the present invention;

[0039] Figure 4 It is a schematic diagram of the circuit structure of an operational amplifier in a specific embodiment of the present invention;

[0040] Figure 5 A schematic diagram of the circuit structure of a high-linearity noise-cancelling radio frequency receiver in another specific embodiment of the present invention;

[0041] Figure 6 A schematic diagram of the circuit structure of a local oscillator signal source used in a specific embodiment of the present invention;

[0042] Figure 7 It is a circuit structure diagram of a Mixer-first receiver in the prior art;

[0043] Figure 8 A simplified model of a high linearity noise cancellation radio frequency receiver when analyzing noise cancellation in a specific embodiment of the present invention;

[0044] Fig. 9 A schematic diagram of the circuit structure of a transconductance amplifier in another specific embodiment of the present invention;

[0045] Fig.10 FIG. 4 is a schematic diagram of a circuit structure of an operational amplifier in another specific embodiment of the present invention. DETAILED DESCRIPTION

[0046] The embodiments of the present invention are described in detail below in conjunction with the accompanying drawings to illustrate the principle and process of the high linearity noise cancellation radio frequency receiver in the embodiments of the present invention.

[0047] The present application provides a high linearity noise cancellation radio frequency receiver. Figure 1, a high linearity noise cancellation RF receiver may include an antenna 1, a multi-way switch-capacitor filter structure 4 and two RF receiving IQ modules with the same structure. The two RF receiving IQ modules with the same structure are a first RF receiving IQ module 2 and a second RF receiving IQ module 3. The signals between the first RF receiving IQ module 2 and the second RF receiving IQ module 3 are orthogonal. The first RF receiving IQ module 2 and the second RF receiving IQ module 3 may each include a passive mixer 11, a main signal transmission circuit 12 and a signal auxiliary transmission circuit 13 for noise cancellation. The on-resistance of the passive mixer 11 is small (less than 1 / 10 of the source resistance of the antenna) to achieve high linearity and low noise. In some feasible embodiments of the present application, the RF receiver 1 may also include a signal recombination circuit 14. The main signal transmission circuit 12 and the auxiliary signal transmission circuit 13 may be connected to the signal recombination circuit 14.

[0048] Further, in some feasible embodiments of the present application, referring to Figure 2 The multi-way switch-capacitor filter structure 15 may include four filter substructures connected in parallel. Each filter substructure may include a first NMOS tube M1 and a first capacitor C1. The drain of the first NMOS tube M1 may be connected to one end of the first capacitor C1. The source of the first NMOS tube M1 is grounded. The gate of the first NMOS tube M1 may be connected to a first external signal. The other end of the first capacitor C1 may be connected to the antenna X.

[0049] Further, in some feasible embodiments of the present application, referring to Figure 2 The passive mixer 11 may include a first passive mixing structure and a second passive mixing structure. The main signal transmission circuit 12 may include a first positive phase input terminal and a first negative phase input terminal. The auxiliary signal transmission circuit 13 may include a second positive phase input terminal and a second negative phase input terminal.

[0050] The first passive mixing structure may include a second NMOS transistor M2 and a second capacitor C2. The drain, the first positive phase input terminal and the second positive phase input terminal of the second NMOS transistor M2 may be connected to one end of the second capacitor C2. The source of the second NMOS transistor M2 may be connected to an antenna. The gate of the second NMOS transistor M2 may be connected to a second external signal, and the other end of the second capacitor C2 is grounded; wherein the first external signal and the second external signal are both external local oscillator LO signals.

[0051] The second passive mixing structure may include a third NMOS tube M3 and a third capacitor C3. The drain, the first inverting input terminal and the second inverting input terminal of the third NMOS tube M3 may be connected to one end of the third capacitor C3. The source of the third NMOS tube M3 may be connected to the antenna. The gate of the third NMOS tube M3 may be connected to the second external signal, and the other end of the third capacitor C3 is grounded.

[0052] Further, in some feasible embodiments of the present application, the signal main transmission circuit 12 may include a matching resistor group and a first transimpedance differential amplifier module. The matching resistor group may include two matching resistors R m Any matching resistor R m One end of can be connected to the first positive phase sub-input end of the first transimpedance differential amplifier module. m The other end of is used as the first non-inverting input terminal. Another matching resistor R m One end of can be connected to the first inverting input terminal of the first transimpedance differential amplifier module. One matching resistor R m The other end of is used as the first inverting input terminal.

[0053] Further, in some feasible embodiments of the present application, the signal auxiliary transmission circuit 13 may include a first transconductance amplifier G1, a second transconductance amplifier G2 and a second transimpedance differential amplifier module. One end of the first transconductance amplifier G1 can be connected to the second positive phase sub-input of the second transimpedance differential amplifier module. The other end of the first transconductance amplifier G1 serves as the second positive phase input. One end of the second transconductance amplifier G2 can be connected to the second negative phase sub-input of the second transimpedance differential amplifier module. The other end of the second transconductance amplifier G2 serves as the second negative phase input. Further, in some feasible embodiments of the present application, the transconductance of the first transconductance amplifier and the second transconductance amplifier G2 is 100mS, where mS is the transconductance unit millisiemens.

[0054] Further, in some feasible embodiments of the present application, referring to Figure 2 ,from Figure 2It can be seen that the second transimpedance differential amplifier module can have the same structure as the first transimpedance differential amplifier module. Any transimpedance differential amplifier module can include a first operational amplifier A1, a first resistor R1, a second resistor R2, a third resistor R3, a fourth resistor R4, a fifth resistor R5, a fourth capacitor C4, a fifth capacitor C5, a sixth capacitor C6, a seventh capacitor C7 and an eighth capacitor C8. One end of the fourth capacitor C4, one end of the fifth capacitor C5, one end of the seventh capacitor C7, one end of the eighth capacitor C8, one end of the fifth resistor R5 and one end of the first resistor R1 can be connected to the positive input terminal of the first operational amplifier A1. The other end of the first resistor R1, the other end of the fourth capacitor C4 and one end of the second resistor R2 can be connected to the inverting output terminal of the first operational amplifier A1. The other end of the fifth resistor R5, the other end of the eighth capacitor C8 and one end of the fourth resistor R4 can be connected to the positive output terminal of the first operational amplifier A1. The other end of the second resistor R2, the other end of the seventh capacitor C7 and one end of the third resistor R3 can be connected to one end of the sixth capacitor C6. The other end of the fourth resistor R4, the other end of the fifth capacitor C5, and the other end of the third resistor R3 can be connected to the other end of the sixth capacitor C6; wherein the first resistor R1 and the fifth resistor R5 are negative feedback resistors. The fourth capacitor C4 and the eighth capacitor C8 are negative feedback capacitors. The second resistor R2, the third resistor R3, the fourth resistor R4, the fifth capacitor C5, the sixth capacitor C6, and the seventh capacitor C7 realize positive feedback of the signal through cross coupling.

[0055] Furthermore, in some feasible embodiments of the present application, the second resistor R2 and the fourth resistor R4 have the same resistance value. The resistance value of the third resistor R3 is twice the resistance value of the fourth resistor R4. The second resistor R2, the fourth resistor R4 and the third resistor R3 achieve a gain of 0.5 after cross-coupling.

[0056] Further, in some feasible embodiments of the present application, referring to Figure 2 The signal recombining circuit may include a second operational amplifier A2, a sixth resistor R6, a seventh resistor R7, an eighth resistor R8, a ninth resistor R9, a tenth resistor R 10 11th resistor R 11 , the ninth capacitor C9 and the tenth capacitor C 10 One end of the sixth resistor R6 can be connected to the positive phase output end of the main signal transmission circuit 12. One end of the seventh resistor R7 can be connected to the negative phase output end of the auxiliary signal transmission circuit 13. One end of the eighth resistor R8 can be connected to the negative phase output end of the main signal transmission circuit 12. One end of the ninth resistor R9 can be connected to the positive phase output end of the auxiliary signal transmission circuit 13. One end of the ninth capacitor C9 and the tenth resistor R 10One end of the sixth resistor R6, the other end of the seventh resistor R7 can be connected to the non-inverting input terminal of the second operational amplifier A2. 10 One end of the eleventh resistor R 11 One end of the ninth capacitor C9, the other end of the eighth resistor R8 and the other end of the ninth resistor R9 can be connected to the inverting input terminal of the second operational amplifier A2. The other end of the ninth capacitor C9 and the tenth resistor R 10 The other end of the tenth capacitor C can be connected to the inverting output terminal of the second operational amplifier A2. 10 The other end and the eleventh resistor R 11 The other end of can be connected to the positive phase output end of the second operational amplifier A2. The sixth resistor R6, the seventh resistor R7, the eighth resistor R8, and the ninth resistor R9 are used to convert the voltage signal into a current signal and superimpose it. The second operational amplifier A2 is connected to the tenth resistor R 10 11th resistor R 11 The tenth resistor R 10 11th resistor R 11 is a negative feedback resistor. The ninth capacitor C9 and the tenth capacitor C 10 is the negative feedback capacitor.

[0057] Further, refer to Figure 3 The first transconductance amplifier G1 and the second transconductance amplifier G2 may include a twelfth resistor R 12 、Thirteenth resistor R 13 The specific connection method of the fifth MOS tube M5 and the fourth MOS tube M4 is as follows: Figure 3 As shown. The twelfth resistor R 12 、Thirteenth resistor R 13 It is the source stage negative feedback resistor, which can enhance linearity.

[0058] Further, refer to Figure 4 The second operational amplifier A2 and the first operational amplifier A1 may include a sixth MOS tube M6, a seventh MOS tube M7, an eighth MOS tube M8, a ninth MOS tube M9, a tenth MOS tube M 10 、Eleventh MOS tube M 11 The specific connection method can be referred to Figure 4 .

[0059] Combine the following Figure 5-Figure 10 The principle of this application is explained.

[0060] First, the nouns appearing in this embodiment are described:

[0061] Down-conversion: A signal processing technique used to reduce the carrier frequency of a signal or directly convert the carrier frequency to DC to obtain a baseband signal.

[0062] Mixer-first receiver: A receiver that down-converts the received antenna signal to baseband directly through a passive mixer without first passing it through a low-noise amplifier.

[0063] Anti-PVT disturbance capability: Changes in process angle, voltage and temperature (PVT) will affect circuit performance. Anti-PVT disturbance capability refers to the ability of the circuit to work under better indicators under different process angles, voltages and temperatures.

[0064] Secondly, if Figure 5 The high linearity noise cancellation receiver shown in the figure. After the antenna signal is transmitted to the receiver, it first passes through a multi-way switch-capacitor filter with a bandpass filter function to filter out the interference of out-of-band blocking as much as possible, and then the signal is down-converted to baseband through a passive mixer with a very small on-resistance; in the main path of the receiver, the baseband signal must first pass through a matching resistor R m The resistor is used for matching because it is a passive device with very good linearity. Then the baseband low-noise transimpedance amplifier outputs the signal I +,main ,I -,main , Q +,main , Q -,main In the noise cancellation auxiliary path, the baseband signal first passes through a low-noise transconductance amplifier working at the baseband, and then passes through a low-noise transimpedance amplifier to output the signal I +,aux ,I -,aux , Q +,aux , Q -,aux ; Positive feedback capacitors are added to the feedback loops of the baseband operational amplifiers of the main channel and the noise cancellation auxiliary channel of the receiver to achieve bandwidth expansion; Finally, the receiver's 8-channel output I +,main ,I -,main , Q +,main , Q -,main ,I +,aux ,I -,aux , Q +,aux , Q -,aux The signal is reassembled through the signal reassembly module and amplified again to finally output the signal I + ,I - , Q + , Q - ; Among them, the multi-way switch-capacitor filter LO1, LO2, LO3, LO4 and the mixer drive signal LO 1’ ,LO 2’ ,LO 3’ and LO 4’ By Figure 8The local oscillator signal source shown is generated, and the input of the local oscillator signal source is a pair of differential sinusoidal wave signals.

[0065] The receiver of this embodiment is first proposed based on Figure 7 The Mixer-first receiver shown in the figure is often used to implement high-linearity receivers. Noise performance is usually measured by noise factor F or NF, where NF = 10lgF. The smaller the F or NF, the better the receiver's performance in processing and suppressing noise. The input third-order intercept point (IIP3) is usually used to measure linearity performance. The larger the IIP3, the better the linearity of the receiver. IIP3 often appears in the form of power consumption, in dBm, and can also be expressed in voltage form.

[0066] Assume R s is the source resistance of the antenna input, R sw is the on-resistance of the passive mixer, R sh Represents the equivalent power loss of harmonic up-conversion through passive mixer, R F is the transimpedance amplifier feedback resistor, N is the number of channels of the RF receiver, then Figure 7 The noise figure F of the Mixer-first receiver shown is expressed as:

[0067]

[0068]

[0069] IIP3 voltage V IIP3 It means that its expression can be written as:

[0070]

[0071] From the above F and V IIP3 It can be seen from the expression that if the noise figure is small and the linearity is high, the most critical design lies in the on-resistance R of the passive mixer. sw To be very small.

[0072] In order to further improve the out-of-band linearity, it is necessary to filter out the out-of-band signal at the front end as early as possible. Therefore, the present invention adds a multi-way switch-capacitor filter with a bandpass characteristic connected in parallel to the ground at the front end of the mixer of the receiver, and the filter connects the source end of the NMOS tube to the ground. When the NMOS tube switch is closed, the drain end voltage V D will be pulled to ground level, and V GS To a fixed value, the intermodulation distortion is reduced and the linearity of the receiver can be improved.

[0073] The source resistance of the antenna is Rs Usually 50Ω, in order to achieve impedance matching, a matching resistor R needs to be added to the main path of the receiver. m . R m It will generate great thermal noise, which will affect the noise performance of the entire receiver. By introducing a noise cancellation auxiliary path, the thermal noise can be cancelled at the output end, thereby achieving low noise. The receiver of the present invention can be simplified to analyze the noise cancellation as follows: Figure 8 The model shown, where V n The matching resistor R m The noise voltage generated; at the output end, the useful signal is amplified and appears inverted in the main path and the auxiliary path, while the noise voltage appears in phase in the main path and the auxiliary path. After the output signals of the two paths are subtracted, the useful signal is superimposed into a signal with a larger gain, and the noise is canceled. n The noise voltage at the output of the main path is V n,main =V n R F1 / (R B +R ES );V n The noise voltage at the output of the auxiliary path is V n,aux =V n R F2 R ES G m / (R B +R ES ). In order to allow R m The noise is completely offset, the circuit design needs to meet the condition V n,main =V n,aux , that is, R F1 =R ES R F2 G m .

[0074] The internal structure of the baseband low-noise operational amplifier of the main path and auxiliary path is as follows Fig.10 As shown in the figure, a single-stage inverter is used as an amplifier circuit, and the PMOS tube M cm1 and M cm2 Having large resistors can suppress common-mode gain, and their gate input terminals connected to the output terminals of the op amp can play the role of common-mode negative feedback. Since the op amp is differential, the noise from the power supply or ground will be offset at the output, thereby enhancing the baseband amplifier's resistance to noise; at the same time, the WL of the amplifier tube needs to be designed to be larger to suppress flicker noise. In addition, positive feedback capacitors are added to the feedback loop of the baseband amplifier to expand the bandwidth. Due to the differential structure of the receiver, the positive feedback is achieved by cross-coupling capacitors and resistors, and a gain of 0.5 is achieved through low-resistance, very linear resistor elements; and the main factor affecting the performance of this technology is C F / C n The resistance ratio in the cross-coupling resistor has a certain resistance to process, voltage and temperature (PVT) disturbances.

[0075] As a noise cancellation auxiliary path, a low noise transconductance amplifier (such as Fig. 9 As shown in the figure, the noise introduced by itself is very small, so its transconductance gm should be large; and the transconductance amplifier works in the baseband, the frequency is low, and the flicker noise is more prominent, so WL needs to be designed to be large to ensure small flicker noise. At the same time, the tube size is designed so that the PMOS and NMOS in the inverter have the same transconductance value, which can improve linearity.

[0076] exist Figure 6 In the local oscillator signal source generation circuit, the input is a differential sinusoidal signal, and their frequency is the local oscillator frequency f LO Twice 2f LO First, a large-gain, self-biased inverter is used to generate square wave clocks 2LO_P and 2LO_N with a duty cycle of 50%. After 2LO_P and 2LO_N enter the clock input of the "÷2 divider", two D flip-flops Q, The output waveform of is operated with the square wave clock by "AND gate", and finally a duty cycle of 25% and a frequency of f is obtained. LO The clocks LO1, LO2, LO3, and LO4 are different from those of LO1, LO2, LO3, and LO4. After LO1, LO2, LO3, and LO4 pass through an RC network, a clock LO with a bias voltage different from that of LO1, LO2, LO3, and LO4 is obtained. 1’ ,LO 2’ ,LO 3’ ,LO 4’ , where the bias voltage is determined by the potential of Vss, and the inverter before the RC network is used to improve the driving capability.

[0077] In the above description of this specification, the description with reference to the terms "one embodiment / example", "another embodiment / example" or "certain embodiments / examples" etc. means that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present application. In this specification, the schematic representation of the above terms does not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described may be combined in any one or more embodiments or examples in a suitable manner.

[0078] Although the embodiments of the present application have been shown and described, those skilled in the art will appreciate that various changes, modifications, substitutions and variations may be made to the embodiments without departing from the principles and spirit of the present application, and that the scope of the present application is defined by the claims and their equivalents.

[0079] The above is a specific description of the preferred implementation of the present application, but the present application is not limited to the described embodiments. Technical personnel familiar with the field may make various equivalent modifications or substitutions without violating the spirit of the present application. These equivalent modifications or substitutions are all included in the scope defined by the claims of the present application.

Claims

1. A high linearity noise cancellation radio frequency receiver, characterized in that: It includes an antenna, a multi-way switch-capacitor filter structure and two radio frequency receiving IQ modules with the same structure; Wherein, any one of the RF receiving IQ modules includes a passive mixer, a signal main transmission circuit and a signal auxiliary transmission circuit for noise cancellation; the on-resistance of the passive mixer is less than the reference value to achieve high linearity and low noise; The antenna and the passive mixer are connected to the multi-way switch-capacitor filter structure; the main signal transmission circuit and the auxiliary signal transmission circuit are connected to the passive mixer.

2. A high linearity noise cancellation radio frequency receiver according to claim 1, characterized in that: The multi-way switch-capacitor filter structure includes four filter substructures connected in parallel; each of the filter substructures includes a first NMOS tube and a first capacitor; the drain of the first NMOS tube is connected to one end of the first capacitor; the source of the first NMOS tube is grounded; the gate of the first NMOS tube is connected to a first external local oscillator LO signal; and the other end of the first capacitor is connected to the antenna.

3. A high linearity noise cancellation radio frequency receiver according to claim 1, characterized in that: The passive mixer includes a first passive mixing structure and a second passive mixing structure; the main signal transmission circuit includes a first positive phase input terminal and a first negative phase input terminal; the auxiliary signal transmission circuit includes a second positive phase input terminal and a second negative phase input terminal; The first passive mixing structure includes a second NMOS tube and a second capacitor; the drain of the second NMOS tube, the first positive phase input terminal and the second positive phase input terminal are connected to one end of the second capacitor; the source of the second NMOS tube is connected to the antenna; the gate of the second NMOS tube is connected to a second external local oscillator LO signal, and the other end of the second capacitor is grounded; The second passive mixing structure includes a third NMOS tube and a third capacitor; the drain of the third NMOS tube, the first inverting input terminal and the second inverting input terminal are connected to one end of the third capacitor; the source of the third NMOS tube is connected to the antenna; the gate of the third NMOS tube is connected to the second external local oscillator LO signal, and the other end of the third capacitor is grounded.

4. A high linearity noise cancellation radio frequency receiver according to claim 1, characterized in that: The signal main transmission circuit includes a matching resistor group and a first transimpedance differential amplifier module; the matching resistor group includes two matching resistors with equal resistance values; One end of any one of the matching resistors is connected to the first positive phase sub-input end of the first transimpedance differential amplifier module; the other end of any one of the matching resistors serves as the first positive phase input end; One end of the other matching resistor is connected to the first inverting sub-input end of the first transimpedance differential amplifier module; and the other end of one of the matching resistors serves as the first inverting input end.

5. A high linearity noise cancellation radio frequency receiver according to claim 4, characterized in that: The signal auxiliary transmission circuit includes a first transconductance amplifier, a second transconductance amplifier and a second transimpedance differential amplifier module; One end of the first transconductance amplifier is connected to the second positive phase sub-input end of the second transimpedance differential amplifier module; the other end of the first transconductance amplifier serves as the second positive phase input end; One end of the second transconductance amplifier is connected to the second inverting sub-input end of the second transimpedance differential amplifier module; the other end of the second transconductance amplifier serves as the second inverting input end.

6. A high linearity noise cancellation radio frequency receiver according to claim 5, characterized in that: The transconductance of the first transconductance amplifier and the second transconductance amplifier are both 100 mS, where mS is a transconductance unit of milliSiemens.

7. A high linearity noise cancellation radio frequency receiver according to claim 5, characterized in that: The second transimpedance differential amplifier module has the same structure as the first transimpedance differential amplifier module, and any one of the transimpedance differential amplifier modules includes a first operational amplifier, a first resistor, a second resistor, a third resistor, a fourth resistor, a fifth resistor, a fourth capacitor, a fifth capacitor, a sixth capacitor, a seventh capacitor, and an eighth capacitor; One end of the fourth capacitor, one end of the fifth capacitor, one end of the seventh capacitor, one end of the eighth capacitor, one end of the fifth resistor and one end of the first resistor are connected to the non-inverting input terminal of the first operational amplifier; The other end of the first resistor, the other end of the fourth capacitor and one end of the second resistor are connected to the inverting output end of the first operational amplifier; The other end of the fifth resistor, the other end of the eighth capacitor and one end of the fourth resistor are connected to the non-inverting output end of the first operational amplifier; The other end of the second resistor, the other end of the seventh capacitor and one end of the third resistor are connected to one end of the sixth capacitor; The other end of the fourth resistor, the other end of the fifth capacitor, the other end of the third resistor and the other end of the sixth capacitor are connected.

8. A high linearity noise cancellation radio frequency receiver according to claim 7, characterized in that: The second resistor and the fourth resistor have the same resistance value; the resistance value of the third resistor is twice the resistance value of the fourth resistor.

9. A high linearity noise cancellation radio frequency receiver according to claim 1, characterized in that: The reference value is 1 / 10 of the source resistance of the antenna.

10. The high linearity noise cancellation radio frequency receiver according to claim 1, characterized in that: The RF receiving IQ module also includes a signal recombination circuit; the signal main transmission circuit and the signal auxiliary transmission circuit are connected to the signal recombination circuit; the signal recombination circuit includes a second operational amplifier, a sixth resistor, a seventh resistor, an eighth resistor, a ninth resistor, a tenth resistor, an eleventh resistor, a ninth capacitor, and a tenth capacitor; One end of the sixth resistor is connected to the positive phase output end of the main signal transmission circuit; one end of the seventh resistor is connected to the negative phase output end of the auxiliary signal transmission circuit; one end of the eighth resistor is connected to the negative phase output end of the main signal transmission circuit; one end of the ninth resistor is connected to the positive phase output end of the auxiliary signal transmission circuit; One end of the ninth capacitor, one end of the tenth resistor, the other end of the sixth resistor and the other end of the seventh resistor are connected to the non-inverting input terminal of the second operational amplifier; One end of the tenth capacitor, one end of the eleventh resistor, the other end of the eighth resistor and the other end of the ninth resistor are connected to the inverting input end of the second operational amplifier; The other end of the ninth capacitor and the other end of the tenth resistor are connected to the inverting output end of the second operational amplifier; The other end of the tenth capacitor and the other end of the eleventh resistor are connected to the non-inverting output terminal of the second operational amplifier.

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