Semiconductor light receiving element

Abstract

This semiconductor light-receiving element (1) is provided with a substrate (10), a semiconductor laminated part (20) formed on a first region (RB) of the substrate (10), and a first electrode (40) and a second electrode (50) electrically connected to the semiconductor laminated part (20). The semiconductor laminated part (20) comprises: a light-absorbing layer (24) of a first conductivity type containing InxGa1-xAs; a buffer layer (30) of the first conductivity type provided between the substrate (10) and the light-absorbing layer (24); and a light-absorbing layer (24) located on the opposite side of the substrate (10) with respect to the light-absorbing layer (24). In composition x in the light absorption layer (24) is 0.55 or more, and the thickness of the light absorption layer (24) is 0.6 [mu] m to 1.8 [mu] m (inclusive). The semiconductor light-receiving element (1) is of a back incidence type that receives the incidence of the light from the substrate (10) side toward the semiconductor laminated part (20), or of a surface incidence type that receives the incidence of the light from the opposite side of the substrate toward the semiconductor laminated part.

Description

Technical Field

[0001] The present disclosure relates to a semiconductor light-receiving element. Background Art

[0002] Patent document 1 describes a photodiode. The photodiode is composed of an inclined reflection part, a light receiving part, and an n-electrode formed on an InP substrate, and the light receiving part is composed of a p-electrode, a diffraction grating, and an InGaAs light absorption layer. Light incident from the surface in a vertical direction is completely reflected by the inclined reflection part, and the optical path is changed to an oblique upward direction, and is incident on the light absorption layer in the light receiving part from an oblique downward direction. After the obliquely incident light propagates in the light absorption layer, it is reflected in the direction opposite to the incident direction by the diffraction grating and the p-electrode provided on the upper part of the light receiving part, and is absorbed by the light absorption layer again.

[0003] Prior art literature

[0004] Patent Literature

[0005] Patent Document 1: Japanese Patent Application Publication No. 2009-117499 Summary of the invention

[0006] Problems to be solved by the invention

[0007] However, in the above-mentioned technical field, it is desired to further increase the speed of operation. Therefore, it is considered to shorten the moving distance of electrons by thinning the light absorbing layer. However, if the light absorbing layer is thinned, the sensitivity is reduced. In contrast, in the photodiode described in Patent Document 1, the effective absorption layer thickness is increased by propagating light using an optical path in an inclined direction relative to the light absorbing layer. Based on this, it is also considered that the sensitivity reduction caused by the thinning of the light absorbing layer is suppressed and the speed is increased.

[0008] However, in the photodiode described in Patent Document 1, in order to form an optical path inclined with respect to the light absorbing layer, it is necessary to form an inclined reflecting portion on the substrate, and this may increase the cost.

[0009] An object of the present disclosure is to provide a semiconductor light-receiving element capable of increasing the speed while suppressing an increase in cost.

[0010] Technical solutions to solve problems

[0011] The semiconductor light receiving element disclosed in the present invention is [1] "a semiconductor light receiving element, which is used to receive incident light of at least one of the 1.3 μm band, the 1.55 μm band, and the 1.6 μm band, and generate an electrical signal according to the incident light, wherein the semiconductor light receiving element comprises: a substrate; a semiconductor stack portion, which is formed on a first region of the substrate; and a first electrode and a second electrode, which are electrically connected to the semiconductor stack portion, wherein the semiconductor stack portion comprises: a first conductivity type light absorption layer, which comprises In x Ga 1-x As; a buffer layer of the first conductivity type, which is arranged between the substrate and the light absorbing layer; and a second region of a second conductivity type different from the first conductivity type, which is located on the opposite side of the substrate relative to the light absorbing layer and is bonded to the light absorbing layer, the first electrode is connected to a first portion of the first conductivity type in the semiconductor stack portion, which is located on the substrate side relative to the light absorbing layer, and the second electrode is connected to a second portion of the second conductivity type in the semiconductor stack portion, which is located on the opposite side of the substrate relative to the light absorbing layer, the In composition x in the light absorbing layer is greater than 0.55, the thickness of the light absorbing layer is greater than 0.6μm and less than 1.8μm, and the semiconductor light receiving element is a back-incident type that receives the incident light from the substrate side toward the semiconductor stack portion, or a surface-incident type that receives the incident light from the opposite side of the substrate toward the semiconductor stack portion.

[0012] The semiconductor light-receiving element of [1] is for receiving light in the wavelength bands used for optical communication such as the 1.3 μm band (O-band (Original-band)), the 1.55 μm band (C-band (Conventional-band)), and the 1.6 μm band (L-band (Long-wavelength-band)). In the semiconductor light-receiving element, the light absorption layer provided on the substrate includes In x Ga 1-x As. Moreover, the In composition x of the light absorbing layer is greater than 0.55 (and less than 1). x Ga 1-xWhen the In composition x of As is set to be greater than 0.55, for example, the absorption coefficient is increased compared to the case where the In composition x is 0.53 (for example, by setting the composition x to 0.62 in the 1.55μm band, the absorption coefficient is increased to about 2 times). Therefore, even if the thickness of the light absorption layer is thinned to a level of greater than 0.6μm and less than 1.8μm, a decrease in sensitivity can be avoided. That is, it is possible to increase the speed. Furthermore, in the semiconductor light receiving element of [1], when increasing the speed, there is no need to form an additional structure (such as the bevel reflection portion of the photodiode described in Patent Document 1). Therefore, according to the semiconductor light receiving element of [1], it is possible to increase the speed while suppressing the increase in cost.

[0013] The semiconductor light-receiving element disclosed in the present invention may also be, [2] "the semiconductor light-receiving element according to [1], wherein the buffer layer includes a strain relaxation layer having a lattice constant between the lattice constant of the substrate and the lattice constant of the light-absorbing layer". According to the semiconductor light-receiving element of [2], the crystallinity of the semiconductor stacking part is improved.

[0014] The semiconductor light-receiving element of the present invention may also be, [3] "According to the semiconductor light-receiving element described in [2], wherein the buffer layer includes a plurality of strain relief layers, and the plurality of strain relief layers are configured so that the lattice constant gradually approaches the lattice constant of the light-absorbing layer as it moves from the substrate toward the light-absorbing layer". Alternatively, the semiconductor light-receiving element of the present invention may also be, [4] "According to the semiconductor light-receiving element described in [2], wherein the buffer layer includes a strain relief layer, and the lattice constant of the strain relief layer changes so that the lattice constant continuously approaches the lattice constant of the light-absorbing layer as it moves from the substrate toward the light-absorbing layer". According to the semiconductor light-receiving elements of [3] and [4], the crystallinity of the semiconductor stack portion can be reliably improved.

[0015] The semiconductor light-receiving element disclosed in the present invention may also be, [5] "a semiconductor light-receiving element according to any one of [1] to [4], wherein the semiconductor stack portion includes: a cap layer of the first conductivity type, which is provided on the light-absorbing layer on the opposite side of the substrate relative to the light-absorbing layer and includes InAsP; and a contact layer of the first conductivity type, which is provided on the cap layer on the opposite side of the substrate relative to the light-absorbing layer and includes InGaAs, the second region is formed from the contact layer to the light-absorbing layer via the cap layer, and the second portion connected to the second electrode is formed on the surface of the second region of the contact layer." According to the semiconductor light-receiving element of [5], the contact resistance of the second electrode is reduced.

[0016] The semiconductor light-receiving element disclosed in the present invention may also be, [6] "a semiconductor light-receiving element according to any one of [1] to [5], wherein the semiconductor stack portion comprises: a first semiconductor layer of the first conductivity type, which is arranged between the substrate and the light-absorbing layer; and a second semiconductor layer of the first conductivity type, which has an impurity concentration lower than the impurity concentration of the first semiconductor layer, and is arranged between the first semiconductor layer and the light-absorbing layer". According to the semiconductor light-receiving element of [6], further speed-up is achieved by reducing the capacitance.

[0017] The semiconductor light-receiving element disclosed in the present invention may also be, [7] "according to the semiconductor light-receiving element described in [6], wherein the second semiconductor layer is arranged between the light-absorbing layer and the buffer layer, has an impurity concentration higher than the impurity concentration of the light-absorbing layer, and has a band gap larger than the band gap of the light-absorbing layer". According to the semiconductor light-receiving element of [7], the absorption of light in the second semiconductor layer and the generation of carriers in the second semiconductor layer caused by the absorption of the light are suppressed by the second semiconductor layer having a band gap larger than that of the light-absorbing layer, thereby suppressing the deterioration of the characteristics related to the responsiveness. In addition, because the second semiconductor layer has a larger band gap than the light-absorbing layer, on the other hand, the second semiconductor layer has a higher impurity concentration than the light-absorbing layer, so the potential barrier in the second semiconductor layer is reduced.

[0018] The semiconductor light-receiving element of the present disclosure may also be, [8] "the semiconductor light-receiving element according to [7], wherein the thickness of the second semiconductor layer is greater than or equal to 0.1 μm and less than or equal to 3.0 μm, and the impurity concentration of the second semiconductor layer is less than or equal to 2.0×10 14 cm -3 Above and 3.0×10 16 cm -3 According to the semiconductor light-receiving element of [8], by setting the upper limit of the impurity concentration of the second semiconductor layer as described above, it can be appropriately depleted when a bias voltage is applied. In addition, by setting the thickness of the second semiconductor layer to the above range, it is possible to suppress a decrease in response speed and an increase in series resistance of the semiconductor light-receiving element.

[0019] The semiconductor light-receiving element disclosed in the present invention may also be, [9] "a semiconductor light-receiving element according to [5], wherein the semiconductor stack portion includes a third semiconductor layer, the third semiconductor layer being provided between the light-absorbing layer and the cap layer, and having a band gap between the band gap of the light-absorbing layer and the band gap of the cap layer". According to the semiconductor light-receiving element of [9], the band gap changes sharply between the cap layer and the light-absorbing layer, thereby suppressing the difficulty in extracting carriers.

[0020] The semiconductor light-receiving element disclosed in the present invention may also be

[10] "a semiconductor light-receiving element according to any one of [1] to [9], wherein at least one layer of the buffer layer is semi-insulated by Fe doping". According to the semiconductor light-receiving element of

[10] , crystallinity is improved.

[0021] The semiconductor light receiving element of the present invention may also be,

[11] "a semiconductor light receiving element according to any one of [1] to

[10] , wherein the In composition x in the light absorbing layer is greater than 0.57, and the thickness of the light absorbing layer is less than 1.2 μm". Furthermore, the semiconductor light receiving element of the present invention may also be,

[12] "a semiconductor light receiving element according to any one of [1] to

[11] , wherein the In composition x in the light absorbing layer is greater than 0.59, and the thickness of the light absorbing layer is less than 0.7 μm". According to the semiconductor light receiving element of

[11] and

[12] , high speed is achieved by further thinning the light absorbing layer.

[0022] The semiconductor light receiving element of the present disclosure may also be

[13] "the semiconductor light receiving element according to any one of [1] to

[12] , wherein the substrate includes a semi-insulating semiconductor." According to the semiconductor light receiving element of

[13] , it is possible to reduce the capacitance.

[0023] The semiconductor light-receiving element disclosed in the present invention may also be,

[14] "a semiconductor light-receiving element according to any one of [1] to

[13] , wherein the substrate comprises an insulator or a semi-insulating semiconductor, and the semiconductor stack portion is bonded to the substrate". According to the semiconductor light-receiving element of

[14] , by forming the substrate and the semiconductor stack portion separately and forming the semiconductor light-receiving element by direct bonding, it is possible to achieve a larger aperture and suppress costs by using inexpensive materials to make optical parts.

[0024] Effects of the Invention

[0025] According to the present disclosure, it is possible to provide a semiconductor light receiving element capable of increasing speed while suppressing an increase in cost. BRIEF DESCRIPTION OF THE DRAWINGS

[0026] Figure 1 This is a schematic side view showing a laser device according to an embodiment.

[0027] Figure 2 yes Figure 1 A top view of the semiconductor light-receiving element shown.

[0028] Figure 3 It is along Figure 2 Cross-sectional view along line III-III.

[0029] Figure 4 It is along Figure 2 A cross-sectional view taken along line IV-IV.

[0030] Figure 5 It is along Figure 2 A cross-sectional view of line VV.

[0031] Figure 6 This is a graph illustrating the relationship between the composition of the light absorbing layer and the absorption coefficient.

[0032] Figure 7 It is a schematic side view showing the structure of an optical device according to a modified example. DETAILED DESCRIPTION

[0033] Hereinafter, one embodiment will be described in detail with reference to the drawings. In addition, in each figure, the same reference numerals are attached to the same or corresponding elements, and overlapping descriptions may be omitted.

[0034] Figure 1 1 is a schematic side view of an optical device according to one embodiment. Figure 1 As shown, the optical device A includes a semiconductor light-receiving element 1. The optical device A targets light in a wavelength band used for optical communication, such as the 1.3μm band (O-band (Original-band)), the 1.55μm band (C-band (Conventional-band)), and the 1.6μm band (L-band (Long-wavelength-band)), and is used to convert the light into an electrical signal for output. The 1.3μm band is, for example, a wavelength range of greater than 1.26μm and less than 1.36μm. The 1.55μm band is, for example, a wavelength range of greater than 1.53μm and less than 1.565μm. The 1.6μm band is, for example, a wavelength range of less than 1.625μm, which is larger than 1.565μm. In addition, light in a wavelength band used for communication is light having a peak within the wavelength range of any of the above-mentioned bands (that is, wavelengths other than the peak may also be outside the wavelength range of the above-mentioned bands).

[0035] Therefore, the semiconductor light receiving element 1 is also targeted at the above-mentioned wavelength band, and is used to receive the incident light L of a wavelength belonging to at least one wavelength band in the wavelength band, and generate an electrical signal according to the incident light. The semiconductor light receiving element 1 is mounted on the sub-base A1. The light L is guided by the optical fiber A4 and focused toward the light receiving part of the semiconductor light receiving element 1 by the lens A3.

[0036] The electrical signal generated in the semiconductor light receiving element 1 is transmitted via the electrode pads (in Figure 1etc., schematically indicated by shading) and the wires are input into the transformer impedance amplifier (TIA) A5, and are output to the outside after being converted into a voltage by the transformer impedance amplifier A5. In addition, here, the semiconductor light receiving element 1 is mounted on the sub-base A1 in a state where the back side 10b of the substrate 10 described later is facing the lens A3 and the optical fiber A4 side. That is, here, the semiconductor light receiving element 1 is a back-incident type that receives incident light from the substrate 10 side toward the semiconductor stack portion 20 described later. More specifically, in this example, the semiconductor light receiving element 1 receives incident light from the back side 10b described later, and the light is guided from the substrate 10 side to the semiconductor stack portion 20.

[0037] Figure 2 yes Figure 1 A top view of the semiconductor light-receiving element shown. Figure 3 It is along Figure 2 The cross-sectional view of line III-III. Figure 2 , 3 As shown, the semiconductor light-receiving element 1 includes a substrate 10 , a semiconductor stacked portion 20 , a first electrode 40 (a cathode in this case), and a second electrode 50 (an anode in this case).

[0038] The substrate 10 includes a semi-insulating semiconductor. Here, the substrate 10 is, for example, a semi-insulating semiconductor substrate composed of InP. The substrate 10 includes a surface 10a and a back side 10b on the opposite side of the surface 10a. In addition, the substrate 10 includes a plurality of regions RA, a region RB (first region), and a region RC arranged in sequence along the surface 10a and the back side 10b. Region RB is a region between region RA and region RC, and is a region where the semiconductor stacking portion 20 is provided. More specifically, region RB includes a region RB1 on the center side, and a region RB2 located on both sides of region RB1 (region RA, RC side). Here, the back side 10b of the substrate 10 is the incident surface of the light L, and a lens RL is formed for focusing the light L. The lens RL is formed to partially overlap with region RB2 with region RB1 as the center.

[0039] As described above, the semiconductor stack portion 20 is formed on the region RB of the substrate 10, and forms a semiconductor mesa protruding from the surface 10a. The semiconductor stack portion 20 includes a back surface 20b on the substrate 10 side and a surface 20a on the opposite side of the substrate 10. As described above, in this example, light enters the semiconductor stack portion 20 from the back surface 20b side. The semiconductor stack portion 20 includes a first conductivity type (here, N type, as an example, N + The buffer layer 30 is provided so as to overlap with the region RB2 with the region RB1 as the center. Here, the semiconductor stacked portion 20 is in contact with the surface 10a of the substrate 10 at the buffer layer 30.

[0040] The layers other than the buffer layer 30 of the semiconductor stack 20 are provided in a portion overlapping with the region RB1 in the buffer layer 30 when viewed from a direction intersecting the surface 10a. The buffer layer 30 has a first portion 31 exposed from other layers of the semiconductor stack 20 (and a protective film 60 described later) when viewed from a direction intersecting the surface 10a, and a junction with the first electrode 40 is formed in the first portion 31. The buffer layer 30 includes, for example, InP. As an example, the buffer layer 30 is made of N + -InP composition.

[0041] The semiconductor stacked portion 20 includes buffer layers 21, 22, 23, a light absorbing layer 24, a cap layer 25, and a contact layer 26 stacked on the buffer layer 30 in order from the substrate 10 side. The buffer layers 21 and 22 have a first conductivity type (e.g., N + The buffer layer 23 has a first conductivity type (eg, N - The buffer layers 21, 22, and 23 include InAsP. As an example, the buffer layer 21 is made of N + -InAs 0.05 P, the buffer layer 22 is composed of N + -InAs 0.10 P, the buffer layer 23 is composed of N - -InAs 0.15 P(or,N - -InGaAsP) composition.

[0042] Thus, the buffer layers 21, 22, and 23 function as strain relaxation layers having a lattice constant between the lattice constant of the substrate 10 and the lattice constant of the light absorbing layer 24. That is, the semiconductor stack portion 20 includes a plurality of strain relaxation layers (step layers) configured such that the lattice constant approaches the lattice constant of the light absorbing layer 24 stepwise as the lattice constant approaches the lattice constant of the light absorbing layer 24 from the substrate 10 toward the light absorbing layer 24.

[0043] In addition, the buffer layer 23 is arranged on the light absorbing layer 24 side relative to the buffer layers 21 and 22, and has an impurity concentration lower than the impurity concentrations of the buffer layers 21 and 22. Therefore, the semiconductor stacked portion 20 includes a first semiconductor layer (buffer layer 21 or buffer layer 22) arranged between the substrate 10 and the light absorbing layer 24, and a second semiconductor layer (buffer layer 23) having an impurity concentration lower than that of the first semiconductor layer and arranged between the first semiconductor layer and the light absorbing layer 24.

[0044] The light absorbing layer 24 is of the first conductivity type (eg N - The light absorbing layer 24 includes InGaAs. Here, the light absorbing layer 24 is made of N - -In x Ga 1-xAs. Moreover, the In composition x of the light absorbing layer 24 is greater than 0.55 (and less than 1). As an example, here, the In composition x is 0.59. In addition, the thickness of the light absorbing layer 24 (the thickness along the stacking direction of the semiconductor stacking part 20) is greater than 0.6μm and less than 1.8μm, and here, as an example, it is 0.7μm. In addition, the light absorbing layer 24 can also form an absorption layer of a mixed crystal of Al, P, Sb, N, other materials and InGaAs within a band gap range of less than 0.72eV. The proportion of Al, P, Sb, and N (or other materials) mixed in InGaAs can be set to, for example, less than 5% or less than 10%.

[0045] Here, the buffer layer 23 has an impurity concentration higher than that of the light absorbing layer 24. As an example, the impurity concentration of the buffer layer 23 is 2.0×10 14 cm -3 Above and 3.0×10 16 cm -3 The impurity concentration of the light absorbing layer 24 is 1.0×10 14 cm -3 Above and 1.0×10 16 cm -3 In addition, the buffer layer 23 has a band gap larger than the band gap of the light absorbing layer 24. As described above, when the band gap of the light absorbing layer 24 is 0.72 eV or less, the band gap of the buffer layer 23 can be set to a range larger than 0.72 eV and 1.35 eV or less.

[0046] Thus, the semiconductor stacked portion 20 has a capacitance reduction layer (buffer layer 23, second semiconductor layer) disposed between the first semiconductor layer and the light absorbing layer 24. The matters required as the capacitance reduction layer are that the impurity concentration is higher than that of the light absorbing layer 24 and that it is depleted when a bias voltage is applied, as described above. The reason for this is that, as described above, the capacitance reduction layer has a larger band gap than the light absorbing layer 24, and therefore, when the impurity concentration is low, a potential barrier is formed in the conduction band, and the movement of carriers with a large potential barrier is hindered, and it may not be properly taken out.

[0047] In addition, as a capacitance reducing layer, it is necessary to be depleted when a bias is applied, and therefore, as mentioned above, the upper limit of its impurity concentration can be set to 3.0×10 16 cm -3 Furthermore, as a capacitance reduction layer, it can also be a composition that does not absorb incident light (that is, the band gap can also be wider than the light absorbing layer 24). This is because if the capacitance reduction layer absorbs incident light, carriers are generated in the capacitance reduction layer. The carriers are taken out from the capacitance reduction layer via the light absorbing layer 24 as a signal, and therefore become slow carriers, which may deteriorate the responsiveness characteristics.

[0048] In other words, by setting the relationship between the buffer layer 23 and the light absorbing layer 24 as described above, the buffer layer 23 can function as a capacitance reducing layer that can reduce capacitance without reducing the response of carriers. The capacitance reducing layer can achieve the effect as long as it is provided, so the thickness of the buffer layer 23 as a capacitance reducing layer is not particularly limited, but as an example, it can be set to 0.1 μm or more and 3 μm or less.

[0049] In addition, by providing a P between the light absorbing layer 24 and the second conductivity type semiconductor region 27 described later, - The semiconductor layer of N type can also be used as a capacitance reduction layer. - The production of semiconductor layers of type P - The semiconductor layer of the type is easy to have electrons than carriers in P - In view of the high mobility in the layer, it is considered that N is formed just below the light absorbing layer 24 (between the light absorbing layer 24 and the first semiconductor layer and in contact with the light absorbing layer 24). - It is more effective to use the buffer layer 23 of the type as a capacitance reducing layer (to make it function).

[0050] In addition, in the semiconductor light-receiving element 1, the light-absorbing layer 24 is a single layer. The light-absorbing layer 24 is a single layer, which means that the light-absorbing layer 24 does not have a stacked structure composed of two or more layers with different stacked compositions or characteristics. More specifically, the light-absorbing layer 24 is a single layer, which means that, for example, it does not have a superlattice structure composed of a plurality of layers with different compositions repeatedly stacked.

[0051] The cap layer 25 has a first conductivity type (eg N - The cap layer 25 includes InAsP. As an example, the cap layer 25 is made of N - -InAs 0.15 The contact layer 26 has a first conductivity type (eg, N - The contact layer 26 includes InGaAs. As an example, the contact layer 26 is made of N - -InGaAs composition.

[0052] The semiconductor stacked portion 20 is formed with a second conductivity type (here P + The semiconductor region 27 may be formed by, for example, impurity diffusion or ion implantation. The semiconductor region 27 extends from the surface 20a of the semiconductor stack 20 toward the substrate 10. Here, the surface 20a of the semiconductor stack 20 (the surface on the opposite side facing the substrate 10) is the surface of the contact layer 26. + The semiconductor region 27 of the MOSFET type is formed from the contact layer 26 to the light absorbing layer 24 via the cap layer 25 .

[0053] Here, the semiconductor region 27 is also formed in the light absorbing layer 24. In the example where the thickness of the light absorbing layer 24 is 0.7 μm, the range of about 0.2 μm on the cap layer 25 side of the light absorbing layer 24 is set as the semiconductor region 27. That is, in this example, the light absorbing layer 24 includes N with a thickness of 0.5 μm. - area and thickness 0.2μm P + regions and form their boundaries. As an example, P + The terminal of the region is a P-type impurity concentration of 1×10 17 cm -3 However, N - Area and P + The region boundary may be formed outside the light absorbing layer 24. That is, the lower limit of the thickness of the semiconductor region 27 in the light absorbing layer 24 is 0. On the other hand, as an example, the upper limit of the thickness of the semiconductor region 27 in the light absorbing layer 24 is about 0.5 μm.

[0054] In addition, in the above example, N + The N-type impurity concentration is 1×10 17 cm -3 N - The N-type impurity concentration is 3.0×10 16 cm -3 The degree is below, which is relatively low compared with N+ type. + The concentration of P-type impurities is 1×10 17 cm -3 above the level.

[0055] Here, the semiconductor light receiving element 1 includes a protective film 60. The protective film 60 is, for example, an insulating film. A portion of the surface 20a (top surface) of the semiconductor stacked portion 20 and a side surface 20s of the semiconductor stacked portion 20 extending from the periphery of the surface 20a toward the substrate 10 are covered by the protective film 60. On the other hand, the remaining portion of the surface 20a of the semiconductor stacked portion 20, here P + The surface of the semiconductor region 27 of the second conductivity type is exposed from the protective film 60. In addition, the second electrode 50 is formed on the portion of the surface 20a exposed from the protective film 60, and the second electrode 50 and the semiconductor region 27 (contact layer 26) are bonded. That is, the second electrode 50 is connected to the second portion (semiconductor region 27) of the second conductivity type in the semiconductor stack 20, which is located on the opposite side of the substrate 10 relative to the light absorbing layer 24. On the other hand, the first electrode 40 is connected to the first portion 31 of the first conductivity type (the portion exposed from the protective film 60 in the buffer layer 30) located on the substrate 10 side relative to the light absorbing layer 24 in the semiconductor stack 20.

[0056] Figure 4It is along Figure 2 The cross-sectional view of the IV-IV line. Figure 2 , 4 As shown, on the surface 10a of the substrate 10, a semiconductor stacked portion 70 is formed via a buffer layer 30. + The structure of the semiconductor stack portion 70 is the same as that of the semiconductor stack portion 20 except for the buffer layer 30 , except for the semiconductor region 27 of the type 110 . The entire semiconductor stack portion 70 is covered with a protective film 60 .

[0057] Here, the second electrode 50 extends from the surface 20a of the semiconductor stack portion 20 to the top surface 70a (the surface facing the opposite side of the substrate 10) of the semiconductor stack portion 70, and an anode pad 55 is formed on the top surface 70a. That is, on the top surface 70a of the semiconductor stack portion 70, an anode pad 55 electrically connected to the second electrode 50 is formed via the protective film 60.

[0058] Figure 5 It is along Figure 2 The cross-sectional view of the VV line. Figure 2 , 5 As shown, on the surface 10a of the substrate 10, semiconductor stacked portions 80 and 90 are formed via the buffer layer 30. + The structure of the semiconductor stacked parts 80 and 90 is the same as that of the semiconductor stacked part 20 except for the buffer layer 30. The semiconductor stacked parts 80 and 90 are entirely covered by the protective film 60. Moreover, here, the first electrode 40 extends from the portion bonded to the buffer layer 30 to the top surface 90a (the surface on the opposite side facing the substrate 10) of the semiconductor stacked part 90, and a cathode pad 45 is formed on the top surface 90a.

[0059] That is, on the top surface 90a of the semiconductor stacked portion 90, a cathode pad 45 electrically connected to the first electrode 40 is formed via the protective film 60. On the other hand, on the top surface 80a of the semiconductor stacked portion 80, a dummy pad 100 is formed via the protective film 60. Figure 2 As shown, a pair of cathode pads 45 (and semiconductor stack portion 90 ) are formed so as to sandwich anode pad 55 (and semiconductor stack portion 70 ), and a pair of dummy pads 100 (and semiconductor stack portion 80 ) are also formed.

[0060] In the optical device A, the semiconductor light receiving element 1 is mounted on the sub-base A1, and is configured such that the surface 10a of the substrate 10 faces the sub-base A1 side, that is, the back surface 10b of the substrate 10 faces the opposite side of the sub-base A1. Thus, a pair of cathode pads 45, anode pads 55, and a pair of dummy pads 100 are connected to the electrode pads provided on the sub-base A1. As a result, the cathode pads 45 and the anode pads 55 are connected to the electrodes electrically connected to the transformer impedance amplifier A5 on the sub-base A1.

[0061] As described above, the semiconductor light receiving element 1 receives light in a wavelength band for optical communication such as the 1.3 μm band, the 1.55 μm band, and the 1.6 μm band. In the semiconductor light receiving element 1, the light absorbing layer 24 provided on the substrate 10 of the semi-insulating semiconductor includes In x Ga 1-x As. Moreover, the In composition x of the light absorbing layer 24 is greater than 0.55 (and less than 1). x Ga 1-x The In composition x of As is set to be 0.55 or more ( Figure 6 When the curve G2) is Figure 6 Compared with the case where the In composition x is 0.53, the absorption coefficient is increased (in Figure 6 In the example above, the improvement is twice as high in the 1.55 μm band. Figure 6 The curve G0 shows the case where a light absorbing layer composed of InGaAsP is used.

[0062] Therefore, even if the thickness of the light absorbing layer 24 is thinned to a level of not less than 0.6 μm and not more than 1.8 μm, a decrease in sensitivity can be avoided. That is, it is possible to increase the speed. Furthermore, in the semiconductor light receiving element 1, it is not necessary to form an additional structure (such as the bevel reflection portion of the photodiode described in the above-mentioned patent document 1) when increasing the speed. Therefore, according to the semiconductor light receiving element 1, it is possible to increase the speed while suppressing the increase in cost. However, if the viewpoint of increasing the speed is taken into consideration, the semiconductor light receiving element 1 can also be configured to form an optical path on the light absorbing layer 24 that is inclined relative to the thickness direction of the light absorbing layer 24.

[0063] In addition, if Figure 6As shown in the curves G1 and G2, by increasing the In composition x of the light absorbing layer 24, the wavelength of the absorption end is lengthened. However, in the semiconductor light receiving element 1, the absorption end is not lengthened in wavelength, and the absorption coefficient in the wavelength band that becomes the target material (the 1.3μm band, 1.55μm band, and 1.6μm band for optical communication mentioned above) is improved. That is, in the semiconductor light receiving element 1, by improving the absorption coefficient in the wavelength band that becomes the target material, the light absorbing layer 24 can be thinned and high-speed operation can be achieved. In other words, in the semiconductor light receiving element 1, the combination of the wavelength band that becomes the target material and the prescribed In composition x and thickness of the light absorbing layer 24 is very important. Furthermore, the thinner the light absorbing layer 24 is, the more significant the influence of the absorption coefficient on the light receiving sensitivity is. Therefore, a structure that takes into account both limited response and high light receiving sensitivity as in the semiconductor light receiving element 1 is effective.

[0064] On the other hand, when the In composition x of the light absorbing layer 24 is changed (increased), the deviation between the lattice constant of the light absorbing layer 24 and the lattice constant of the substrate 10 tends to become larger, and when the light absorbing layer 24 is grown on the substrate 10 , the crystallinity may deteriorate.

[0065] Therefore, in the semiconductor light-receiving element 1, the semiconductor stacked portion 20 has the buffer layers 21 to 23 functioning as strain relaxation layers, and the buffer layers 21 to 23 have lattice constants between the lattice constant of the substrate 10 and the lattice constant of the light-absorbing layer 24. Thus, the crystallinity of the semiconductor stacked portion 20 including the light-absorbing layer 24 is improved. In particular, in the semiconductor light-receiving element 1, the buffer layers 21 to 23 function as a plurality of strain relaxation layers, and the plurality of strain relaxation layers are arranged so that the lattice constants gradually approach the lattice constant of the light-absorbing layer 24 as they go from the substrate 10 toward the light-absorbing layer 24. Therefore, the crystallinity of the semiconductor stacked portion 20 is reliably improved.

[0066] In addition, in the semiconductor light receiving element 1, the semiconductor stacked portion 20 includes a first conductivity type cap layer 25 provided on the light absorbing layer 24 on the opposite side of the substrate 10 relative to the light absorbing layer 24 and including InAsP, and a first conductivity type contact layer 26 provided on the cap layer 25 on the opposite side of the substrate 10 relative to the light absorbing layer 24 and including InGaAs, and a second conductivity type semiconductor region 27 is formed from the contact layer 26 to the light absorbing layer 24 via the cap layer 25. The portion connected to the second electrode 50 is the surface of the semiconductor region 27 formed on the contact layer 26. Thus, the contact resistance of the second electrode 50 is reduced.

[0067] In addition, in the semiconductor light-receiving element 1, the semiconductor stacked portion 20 includes a first semiconductor layer (buffer layer 21 or buffer layer 22) of the first conductivity type disposed between the substrate 10 and the light-absorbing layer 24, and a second semiconductor layer (buffer layer 23) of the first conductivity type having an impurity concentration lower than that of the first semiconductor layer and disposed between the first semiconductor layer and the light-absorbing layer 24. Therefore, further speed-up is achieved by reducing the capacitance.

[0068] In addition, in the semiconductor light receiving element 1, the substrate 10 includes a semi-insulating semiconductor. When a conductive substrate is used as the substrate 10, the substrate and the semiconductor stack portion 20 are electrically conductive, and therefore, they are at the same potential. In this case, the coupling on the capacitance of the anode and the cathode is also carried out via the protective film 60 (insulating film), and the reduction of capacitance is not foreseen. In contrast, in the semiconductor light receiving element 1, the growth layer that becomes the semiconductor stack portion 20 is etched to a semi-insulating or insulating substrate 10, which can be electrically separated. As a result, the coupling on the capacitance can be prevented and the reduction of capacitance can be achieved. The substrate 10 can be semi-insulated, for example, by doping Fe or the like into InP or GaAs. The lattice constant of InP is consistent with the lattice constant of InGaAs, and therefore, an InGaAs layer with good crystallinity can be grown directly on the semi-insulating substrate 10.

[0069] In addition, in the semiconductor light receiving element 1, the buffer layer 23 is provided between the light absorbing layer 24 and the first semiconductor layer, and has an impurity concentration higher than the impurity concentration of the light absorbing layer 24, and has a band gap larger than the band gap of the light absorbing layer 24. In this way, since the buffer layer 23 has a larger band gap than the light absorbing layer 24, the absorption of light in the buffer layer 23 and the generation of carriers in the buffer layer 23 caused by the absorption of light are suppressed, and the deterioration of the responsiveness characteristics is suppressed. In addition, since the buffer layer 23 has a larger band gap than the light absorbing layer 24, and on the other hand, the buffer layer 23 has a higher impurity concentration than the light absorbing layer 24, the potential barrier in the buffer layer 23 is reduced.

[0070] Furthermore, in the semiconductor light receiving element 1, the thickness of the buffer layer 23 is 0.1 μm or more and 3.0 μm or less, and the impurity concentration of the buffer layer 23 is 2.0×10 14 cm -3 Above and 3.0×10 16 cm -3 In this way, by setting the upper limit of the impurity concentration of the buffer layer 23 as described above, it is appropriately depleted when a bias voltage is applied. In addition, by setting the thickness of the buffer layer 23 to the above range, it is possible to suppress a decrease in response speed and an increase in series resistance when multiple semiconductor light-receiving elements are connected in series and used.

[0071] The above embodiment describes one aspect of the present disclosure. Therefore, the present disclosure is not limited to the above aspect, and can be arbitrarily modified. Next, a modification example will be described.

[0072] Figure 7 FIG. 1 is a diagram showing a modified example of a method for mounting a semiconductor light-receiving element. Figure 7 In the optical device B shown in (a), the semiconductor light receiving element 1 is mounted on the glass substrate B1 in such a manner that the back surface 10b of the substrate 10 faces the glass substrate B1, and is directly electrically connected to the transformer impedance amplifier A5 also mounted on the glass substrate B1 by means of a wire. The lens A3 and the optical fiber A4 are arranged on the surface of the glass substrate B1 opposite to the surface on which the semiconductor light receiving element 1 is mounted, and the light L is incident on the semiconductor light receiving element 1 from the back surface 10b side via the glass substrate B1. In addition, Figure 7 In the optical device C shown in (b), Figure 1 Compared with the optical device A shown in the figure, the lens A3 is omitted. Furthermore, the semiconductor light receiving element 1 may be directly mounted on the transformer impedance amplifier A5.

[0073] Thus, various methods are considered for the mounting method of the semiconductor light receiving element 1 and the optical device including the semiconductor light receiving element 1. In addition, in the above examples, the semiconductor light receiving element 1 is used as a back-incident type. However, the semiconductor light receiving element 1 can also be configured as a surface-incident type that receives incident light from the opposite side of the substrate 10 toward the semiconductor stacking portion 20. That is, the semiconductor light receiving element 1 can also be configured to receive incident light from the surface 10a side of the substrate 10. In this case, it is sufficient to form an opening so that the light receiving portion is exposed relative to the second electrode 50 provided on the light receiving portion (semiconductor region 27).

[0074] Furthermore, when the semiconductor light receiving element 1 is used as a back-incident type (a method in which light is incident from the substrate 10 side toward the semiconductor stack portion 20), it can also be set to a structure that receives light incident from the side of the substrate 10 toward the semiconductor stack portion 20 by reflection or refraction of the side of the substrate 10. In this case, the incident surface of the light in the substrate 10 can be the surface 10a or the back surface 10b. In addition, the side surface of the substrate 10 is a surface that intersects the back surface 10b and the surface 10a between the back surface 10b and the surface 10a. According to this structure, an optical path inclined relative to the thickness direction of the light absorption layer 24 can be formed on the light absorption layer 24, which can further suppress the sensitivity reduction and increase the speed.

[0075] In the above example, 0.7 μm is cited as the thickness of the light absorbing layer 24, and 0.59 is cited as the In composition x of the light absorbing layer 24. However, the thickness of the light absorbing layer 24 only needs to be 1.8 μm or less, and the In composition x only needs to be 0.55 or more. In particular, the In composition x in the light absorbing layer 24 may be 0.57 or more, and the thickness of the light absorbing layer may be 1.2 μm or less. Furthermore, the In composition x in the light absorbing layer 24 may be 0.59 or more, and the thickness of the light absorbing layer 24 may be 0.7 μm or less. In these cases, the speed is increased by further thinning the light absorbing layer.

[0076] In addition, the following lists examples of combinations of each wavelength band, the thickness of the light absorbing layer 24, and the In composition x of the light absorbing layer 24. In addition, for example, the following (5) is not limited to the C-band, and can be configured similarly in the O-band and L-band.

[0077] (1) C-band.

[0078] Sensitivity: 0.86A / W or more.

[0079] Cut-off frequency: 20 GHz or more (in the case of 28 GB, etc.).

[0080] Absorption layer thickness: 1.5μm (Details: N - Area 1.3μm, P + area 0.2μm).

[0081] In composition x: x=0.55.

[0082] (2) C-band.

[0083] Sensitivity: 0.90A / W or more.

[0084] Cut-off frequency: 20 GHz or more (in the case of 28 GB high sensitivity products).

[0085] Absorption layer thickness: 1.5μm (Details: N - Area 1.3μm, P + area 0.2μm).

[0086] In composition x: x=0.57.

[0087] (3) C-band.

[0088] Sensitivity: 0.80A / W or more.

[0089] Cut-off frequency: 30 GHz or more (for example, 56 GB).

[0090] Absorption layer thickness: 1.2μm (Details: N - Area 1.0μm, P + area 0.2μm).

[0091] In composition x: x=0.57.

[0092] (4) C-band.

[0093] Sensitivity 0.85A / W or above.

[0094] Cut-off frequency: 30 GHz or more (in the case of 56 GB high sensitivity products).

[0095] Absorption layer thickness: 1.2μm (Details: N - Area 1.0μm, P + area 0.2μm).

[0096] In composition x: x=0.59.

[0097] (5) C-band.

[0098] Sensitivity above 0.7A / W.

[0099] Cut-off frequency: 45 GHz or higher (for 96 GB, etc.).

[0100] Absorption layer thickness: 0.7μm (Details: N - Area 0.5μm, P + area 0.2μm).

[0101] In composition x: x=0.59.

[0102] (6) C-band.

[0103] Sensitivity 0.90A / W or above.

[0104] Cut-off frequency: 16 GHz or higher (for example, 25 GB).

[0105] Absorption layer thickness: 1.8μm (Details: N - Area 1.6μm, P + area 0.2μm).

[0106] In composition x: x=0.55.

[0107] (7) C-band.

[0108] Sensitivity 0.93A / W or above.

[0109] Cut-off frequency: 16 GHz or higher (for example, 25 GB).

[0110] Absorption layer thickness: 1.8μm (Details: N - Area 1.6μm, P + area 0.2μm).

[0111] In composition x: x=0.57.

[0112] In addition, in the semiconductor light-receiving element 1, the semiconductor stacked portion 20 may also include a third semiconductor layer, which is provided between the light-absorbing layer 24 and the cap layer 25 and has a band gap between the band gap of the light-absorbing layer 24 and the band gap of the cap layer 25. The third semiconductor layer has a first conductivity type (e.g., N - Type), as an example, N - -InAsGaP composition In this case, since the band gap changes sharply between the cap layer 25 and the light absorbing layer 24, it is suppressed that carriers become difficult to extract.

[0113] In the semiconductor light-receiving element 1, at least one of the buffer layers 21 to 23 and 30 may be semi-insulated and thickened by doping with Fe. In this case, crystallinity is improved.

[0114] In addition, the buffer layers 21 to 23 and 30 are not limited to those containing InAsP, but may contain InGaAsP (or may be composed of InGaAsP) for the purpose of increasing the band gap and improving the transmittance in the 1.3 μm band, the 1.55 μm band, and the 1.6 μm band. Furthermore, each layer of the semiconductor stacked portion 20 may contain other elements such as Al.

[0115] In addition, in the semiconductor light receiving element 1, the buffer layers 21 to 23 whose lattice constant changes stepwise from the substrate 10 toward the light absorbing layer 24 are used, but a strain relaxation layer (buffer layer) whose lattice constant changes continuously toward the lattice constant of the light absorbing layer 24 from the substrate 10 toward the light absorbing layer 24 may be used. In addition, in the above-mentioned example, the semiconductor light receiving element 1 has the cap layer 25 and the contact layer 26 sequentially stacked on the light absorbing layer 24, and the second electrode 50 is connected to the surface of the semiconductor region 27 formed on the contact layer 26. However, in the semiconductor light receiving element 1, the cap layer 25 may be omitted, and the contact layer 26 may be directly formed on the light absorbing layer 24. In this case, the contact resistance of the second electrode 50 is also reduced.

[0116] In addition, in the case of focusing on the viewpoint of high speed, the above-mentioned light absorption layer 24 can also be applied to a waveguide type semiconductor light receiving element. In a waveguide type semiconductor light receiving element, a ridge waveguide is formed on a semi-insulating InP substrate, and a light receiving portion including the light absorption layer 24 is formed in the ridge waveguide. In this way, even if it is a waveguide type, by adopting a light absorption layer 24 with improved absorptivity, the length of the light receiving surface along the extension direction of the waveguide can be shortened and the capacitance can be reduced. In addition, even if the thickness is set to the same, the responsiveness is improved by increasing the propagation speed of electrons.

[0117] Furthermore, in the semiconductor light-receiving element 1, for example, after removing the substrate 10 by etching or grinding, the semiconductor stacking part 20 may be bonded to a substrate made of an insulator such as quartz or a semi-insulating semiconductor other than InP (for example, gallium arsenide, etc.). In other words, in the semiconductor light-receiving element 1, the substrate 10 may also include an insulator or a semi-insulating semiconductor, and be configured separately from the semiconductor stacking part 20, and the semiconductor stacking part 20 may be bonded to the substrate 10 (for example, directly). In this way, by configuring the substrate 10 and the semiconductor stacking part 20 separately and manufacturing the semiconductor light-receiving element 1 by bonding, it is possible to achieve a larger diameter and suppress costs by using inexpensive materials to make optical parts.

[0118] In addition, when the substrate 10 and the semiconductor stacked portion 20, which are separately constructed, are bonded, direct bonding or bonding using resin can be adopted. When resin is used to bond the substrate 10 and the semiconductor stacked portion 20, light in the target wavelength band may be absorbed depending on the properties of the resin, but this possibility does not exist in direct bonding.

[0119] In addition, the semiconductor light receiving element disclosed in the present invention can also be used to receive the incident light of at least one of the 1.3 μm band, the 1.55 μm band, and the 1.6 μm band, and generate an electrical signal according to the incident light, wherein the semiconductor light receiving element comprises a substrate, a semiconductor stacking portion formed on a first region of the substrate, and a first electrode and a second electrode electrically connected to the semiconductor stacking portion, wherein the semiconductor stacking portion includes an In x Ga 1-x A first conductivity type light absorption layer of As, a first conductivity type buffer layer arranged between a substrate and the light absorption layer, and a second region of a second conductivity type different from the first conductivity type which is located on the opposite side of the substrate relative to the light absorption layer and bonded to the light absorption layer, a first electrode is connected to a first portion of the first conductivity type located on the substrate side relative to the light absorption layer in a semiconductor stack portion, a second electrode is connected to a second portion of the second conductivity type located on the opposite side of the substrate relative to the light absorption layer in a semiconductor stack portion, an In composition x in the light absorption layer is greater than 0.55, and a thickness of the light absorption layer is less than 1.5 μm.

[0120] Industrial Applicability

[0121] A semiconductor light-receiving element capable of increasing speed while suppressing an increase in cost can be provided.

[0122] Description of Reference Numerals

[0123] 1…semiconductor light-receiving element, 20…semiconductor stacked portion, 21, 22…buffer layer (strain relief layer, first semiconductor layer), 23…buffer layer (strain relief layer, second semiconductor layer, capacitance reduction layer), 24…light absorption layer, 25…cap layer, 26…contact layer, 27…semiconductor region (second portion), 31…first portion, 40…first electrode, 50…second electrode.

Claims

1. A semiconductor light-receiving element, wherein: A semiconductor light receiving element for receiving incident light in at least one of the 1.3 μm band, the 1.55 μm band, and the 1.6 μm band, and generating an electrical signal based on the incident light. The semiconductor light receiving element comprises: substrate; a semiconductor stacked portion formed on the first region of the substrate; and A first electrode and a second electrode, which are electrically connected to the semiconductor stacked portion, The semiconductor stack portion comprises: The first conductive type light absorbing layer includes In x Ga 1-x As; The first conductive type buffer layer is disposed between the substrate and the light absorbing layer; and a second region of a second conductivity type different from the first conductivity type, which is located on the opposite side of the substrate with respect to the light absorbing layer and is bonded to the light absorbing layer, The first electrode is connected to a first portion of the semiconductor stacked portion that is located on the substrate side relative to the light absorbing layer. The second electrode is connected to a second portion of the second conductivity type located on the opposite side of the substrate with respect to the light absorbing layer in the semiconductor stacked portion. The In composition x in the light absorbing layer is greater than 0.55, The thickness of the light absorbing layer is greater than or equal to 0.6 μm and less than or equal to 1.8 μm. The semiconductor light receiving element is a back-incident type that receives the light incident from the substrate side toward the semiconductor stack portion, or a front-incident type that receives the light incident from the opposite side of the substrate toward the semiconductor stack portion.

2. The semiconductor light receiving element according to claim 1, wherein The buffer layer includes a strain relaxation layer having a lattice constant between a lattice constant of the substrate and a lattice constant of the light absorbing layer.

3. The semiconductor light receiving element according to claim 2, wherein: The buffer layer includes the plurality of strain relaxation layers arranged such that a lattice constant gradually approaches a lattice constant of the light absorbing layer as it moves from the substrate toward the light absorbing layer.

4. The semiconductor light receiving element according to claim 2, wherein: The buffer layer includes the strain relaxation layer whose lattice constant changes so as to continuously approach the lattice constant of the light absorbing layer as it moves from the substrate toward the light absorbing layer.

5. The semiconductor light receiving element according to claim 1, wherein The semiconductor stack portion comprises: The first conductive type cap layer is provided on the light absorbing layer on the opposite side of the substrate relative to the light absorbing layer, and includes InAsP; and The first conductivity type contact layer is provided on the cap layer on the opposite side of the substrate relative to the light absorbing layer and comprises InGaAs, The second region is formed from the contact layer to the light absorbing layer via the cap layer, The second portion to which the second electrode is connected is formed on a surface of the second region of the contact layer.

6. The semiconductor light receiving element according to claim 1, wherein The semiconductor stack portion comprises: The first semiconductor layer of the first conductivity type is disposed between the substrate and the light absorbing layer; and The first conductivity type second semiconductor layer has an impurity concentration lower than that of the first semiconductor layer, and is disposed between the first semiconductor layer and the light absorbing layer.

7. The semiconductor light receiving element according to claim 6, wherein: The second semiconductor layer has an impurity concentration higher than that of the light absorbing layer and a band gap larger than that of the light absorbing layer, and is provided between the light absorbing layer and the buffer layer.

8. The semiconductor light receiving element according to claim 7, wherein: The thickness of the second semiconductor layer is greater than or equal to 0.1 μm and less than or equal to 3.0 μm. The impurity concentration of the second semiconductor layer is 2.0×10 14 cm -3 Above and 3.0×10 16 cm -3 the following.

9. The semiconductor light receiving element according to claim 5, wherein: The semiconductor stacked portion includes a third semiconductor layer provided between the light absorbing layer and the cap layer and having a band gap between a band gap of the light absorbing layer and a band gap of the cap layer.

10. The semiconductor light receiving element according to claim 1, wherein At least one layer of the buffer layer is semi-insulating by Fe doping.

11. The semiconductor light receiving element according to claim 1, wherein The In composition x in the light absorbing layer is greater than 0.57, The light absorbing layer has a thickness of 1.2 μm or less.

12. The semiconductor light receiving element according to claim 1, wherein The In composition x in the light absorbing layer is greater than 0.59, The light absorbing layer has a thickness of 0.7 μm or less.

13. The semiconductor light receiving element according to claim 1, wherein The substrate includes a semi-insulating semiconductor.

14. The semiconductor light-receiving element according to any one of claims 1 to 13, wherein The substrate comprises an insulator or a semi-insulating semiconductor, The semiconductor stacked portion is bonded to the substrate.

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