Display device and test method thereof

Abstract

The invention discloses a display device and a testing method thereof. The display device comprises a substrate and a metal layer, the display device is bound with a driving chip and a flexible circuit board; the first chip bonding pad, the first panel bonding pad, the first metal wire of the metal layer, the second panel bonding pad, the first circuit board bonding pad, the first internal wire of the flexible circuit board, the third circuit board bonding pad and the first control board bonding pad are connected in sequence to form a first branch; a second metal wire of the metal layer, a third panel bonding pad, a second circuit board bonding pad, a second internal wire of the flexible circuit board, a fourth circuit board bonding pad and a second control board bonding pad are sequentially connected to form a second branch; the first chip bonding pads of the two first branches are electrically connected through the third metal wires of the metal layers to form a first test loop; and the second metal wires of the two second branches are electrically connected through the fourth metal wires of the metal layers to form a second test loop. According to the technical scheme provided by the invention, the resistance value of the IC bonding can be conveniently and accurately measured.

Description

Technical Field

[0001] The present invention relates to the field of display technology, and in particular to a display device and a testing method thereof. Background Art

[0002] The display panel needs to be bound to a driver chip (Integrated Circuit, IC) to provide a driving signal for the display area. Generally, there are two ways to bind the IC: the first is Chip On Film (COF), which fixes the IC on a flexible printed circuit (FPC), and the FPC is bound to the substrate of the display panel; the second is Chip on Glass (COG), which binds the IC to the glass substrate of the display panel, and the FPC is bound to the substrate of the display panel, thereby electrically connecting with the IC. After the IC is bound, it is connected through a flexible printed circuit (FPC) and a control circuit board (PCB).

[0003] During the binding process, the binding resistance between the terminal (PAD) of the display panel and the IC PAD, and between the terminal (PAD) of the display panel and the FPC PAD will affect the connection effect between the display panel and the control circuit board, so it is necessary to detect the binding resistance after binding.

[0004] In the prior art, the resistance of IC bonding of the vehicle-mounted display device cannot be measured directly, and it is all calculated through theoretical values. Specifically, the total resistance of the entire test loop can be tested through the test terminals set on the PCB, and the resistance of IC bonding can be obtained by subtracting the binding resistance of the FPC PAD, the binding resistance of the PCB PAD, and the resistance of the in-plane wiring in the test loop. Among them, the binding resistance of the FPC PAD can be directly measured by the FPC impedance test point, but the resistance of the in-plane wiring needs to be measured by piercing the PAD, which wastes a lot of time and energy and is not easy to operate. Summary of the invention

[0005] The embodiment of the present invention provides a display device and a test method thereof, so as to accurately measure the resistance value of ICbonding in a simpler way.

[0006] In a first aspect, an embodiment of the present invention provides a display device, comprising: a substrate and a metal layer disposed on the substrate; the metal layer comprises a first panel pad, a second panel pad and a third panel pad;

[0007] The display device is bound with a driving chip and a flexible circuit board; the first chip pad of the driving chip is bound with the first panel pad; the first circuit board pad of the flexible circuit board is bound with the second panel pad; the second circuit board pad of the flexible circuit board is bound with the third panel pad; the third circuit board pad of the flexible circuit board is bound with the first control board pad on the control circuit board; the fourth circuit board pad of the flexible circuit board is bound with the second control board pad on the control circuit board;

[0008] The first chip pad, the first panel pad, the first metal trace of the metal layer, the second panel pad, the first circuit board pad, the first internal trace of the flexible circuit board, the third circuit board pad and the first control board pad are connected in sequence to form a first branch; the second metal trace of the metal layer, the third panel pad, the second circuit board pad, the second internal trace of the flexible circuit board, the fourth circuit board pad and the second control board pad are connected in sequence to form a second branch; the first chip pads of the two first branches are electrically connected through the third metal trace of the metal layer to form a first test loop; the second metal traces of the two second branches are electrically connected through the fourth metal trace of the metal layer to form a second test loop; wherein the length of the first metal trace is substantially the same as the length of the second metal trace;

[0009] The control circuit board includes: a first test point, a second test point, a third test point and a fourth test point; the first test point is electrically connected to the first control board pad at the first end of the first test loop; the second test point is electrically connected to the first control board pad at the second end of the first test loop; the third test point is electrically connected to the second control board pad at the first end of the second test loop; the fourth test point is electrically connected to the second control board pad at the second end of the second test loop.

[0010] In a second aspect, an embodiment of the present invention further provides a method for testing a display device, which is applicable to a display device provided by any embodiment of the present invention, and includes:

[0011] Measuring a first test resistance R1 of a first test circuit in the display device through the first test point and the second test point;

[0012] Measuring a second test resistance R2 of a second test circuit in the display device through the third test point and the fourth test point;

[0013] The binding resistance R=(R1-R2) / 2 of the first chip pad of the driving chip of the display device is obtained according to the first test resistance R1 and the second test resistance R2.

[0014] In the present invention, the display panel includes a substrate and a metal layer formed on the substrate, and the display device includes a display panel and a driving chip and a flexible circuit board bound to the display panel. The metal layer forms a panel pad, the driving chip includes a first chip pad, and the flexible circuit board includes a circuit board pad. Among them, the first chip pad, the first panel pad, the first metal trace of the metal layer, the second panel pad, the first circuit board pad, the first internal trace of the flexible circuit board, the third circuit board pad and the first control board pad are connected in sequence to form a first branch; the second metal trace of the metal layer, the third panel pad, the second circuit board pad, the second internal trace of the flexible circuit board, the fourth circuit board pad and the second control board pad are connected in sequence to form a second branch; the two first branches form a first test loop, and the two second branches form a second test loop. In this embodiment, the resistance of the first test loop and the resistance of the second test loop can be tested by setting a test point, and the binding resistance of the first chip pad can be obtained by the difference between the resistances of the two loops. It is not necessary to use a probe to pierce the resistance of the metal trace in the metal layer to infer the binding resistance of the first chip pad, saving the actual measurement operation that is not easy to operate and avoiding a lot of time and energy loss. In addition, the present embodiment measures the binding resistance of the first chip pad through the first test loop and the second test loop, thereby effectively reducing the error caused by actual measurement and improving the accuracy of the binding resistance of the chip pad. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] Figure 1 It is a schematic diagram of the structure of a display device in the prior art;

[0016] Figure 2 A schematic diagram of the structure of a display device provided by an embodiment of the present invention;

[0017] Figure 3 A partial structural schematic diagram of a display device provided by an embodiment of the present invention;

[0018] Figure 4 A partial structural schematic diagram of another display device provided by an embodiment of the present invention;

[0019] Figure 5 A partial structural schematic diagram of another display device provided by an embodiment of the present invention;

[0020] Figure 6 A schematic diagram of the structure of a test circuit provided by an embodiment of the present invention;

[0021] Figure 7 A schematic diagram of the structure of another test circuit provided by an embodiment of the present invention;

[0022] Figure 8 A schematic diagram of the structure of another test circuit provided by an embodiment of the present invention;

[0023] Fig. 9 A schematic diagram of the structure of another test circuit provided by an embodiment of the present invention;

[0024] Fig.10 A partial structural schematic diagram of another display device provided by an embodiment of the present invention;

[0025] Fig.11 A partial structural schematic diagram of another display device provided by an embodiment of the present invention;

[0026] Fig.12 A partial structural schematic diagram of another display device provided by an embodiment of the present invention;

[0027] Fig.13 for Fig.12 Schematic diagram of the cross-sectional structure along line segment a-a';

[0028] Fig.14 A schematic flow chart of a method for testing a display device provided in an embodiment of the present invention. DETAILED DESCRIPTION

[0029] The present invention will be further described in detail below in conjunction with the accompanying drawings and embodiments. It is to be understood that the specific embodiments described herein are only used to explain the present invention, rather than to limit the present invention. It should also be noted that, for ease of description, only parts related to the present invention, rather than all structures, are shown in the accompanying drawings.

[0030] Figure 1 FIG. 1 is a schematic diagram of the structure of a display device in the prior art. Figure 1 As shown, in the prior art, a display device, especially a vehicle-mounted device, has a display panel 11' bound with a driver chip 12' and a flexible circuit board 13'. The flexible circuit board 13' is used to transmit signals between the control board 14' and the driver chip 12'. Specifically, the signal transmission path at least includes: a binding resistance R1' between the pad 131' of the flexible circuit board 13' and the pad of the control board 14', a binding resistance R2' between the pad 133' of the flexible circuit board 13' and the pad of the display panel 11', a resistance R3' of the in-plane wiring 111' of the display panel 11', and a binding resistance R4' between the pad 121' of the driver chip 12' and the pad on the display panel 11'. Among them, the internal wiring of the flexible circuit board 13' and the control board 14' are copper wirings, and the resistance is almost zero, which can be ignored. The resistance R3' of the in-plane wiring 111' is greater than 1Ω, which cannot be ignored. During the design of the display device, the IC bonding resistance between the display panel 11' and the driver chip 12' needs to be measured to obtain the chip bonding effect and signal transmission loss, and to optimize the IC bonding resistance according to the measured resistance value to reduce signal loss. Figure 1 As shown, the resistance is estimated by theoretical value, and the transmission paths of two adjacent signals form a test loop, R4'=R'-2R1'-2R2'-2R3'; wherein, R' is the resistance measurement value of the test loop between two adjacent test terminals 141'; the resistance values ​​of R1' and R2' can be directly measured according to the impedance test points on the flexible circuit board 13', but the resistance value R3' of the in-plane wiring 111' needs to be measured by inserting a probe into the pad. In the process of implementing the present invention, the inventor found that: first, the measured resistance value R3' of the in-plane wiring 111' is prone to measurement errors due to problems with the test position and the measuring equipment; second, the operator needs to perform a large number of probe measurement processes, and the operator needs to first laser the two ends of the in-plane wiring 111' and operate the needle under a magnifying glass, which is difficult and difficult to operate, and requires a lot of time and energy to be wasted, and is not easy to operate.

[0031] To solve the above problems, an embodiment of the present invention provides a display device, such as Figure 2 and Figure 3 As shown, Figure 2 A schematic diagram of the structure of a display device provided by an embodiment of the present invention, Figure 3 A partial structural schematic diagram of a display device provided by an embodiment of the present invention, the display device comprises: a substrate 11 and a metal layer 12 disposed on the substrate; the metal layer 12 comprises a first panel pad 121, a second panel pad 122 and a third panel pad 123;

[0032] The display device is bound with a driving chip 13 and a flexible circuit board 14; the first chip pad 131 of the driving chip 13 is bound with the first panel pad 121; the first circuit board pad 141 of the flexible circuit board 14 is bound with the second panel pad 122; the second circuit board pad 142 of the flexible circuit board 14 is bound with the third panel pad 123; the third circuit board pad 143 of the flexible circuit board 14 is bound with the first control board pad 151 on the control circuit board 15; the fourth circuit board pad 144 of the flexible circuit board 14 is bound with the second control board pad 152 on the control circuit board 15;

[0033] The first chip pad 131, the first panel pad 121, the first metal trace 12a of the metal layer 12, the second panel pad 122, the first circuit board pad 141, the first internal trace 14a of the flexible circuit board 14, the third circuit board pad 143 and the first control board pad 151 are connected in sequence to form a first branch 21; the second metal trace 12b of the metal layer 12, the third panel pad 123, the second circuit board pad 142, the second internal trace 14b of the flexible circuit board 14, the fourth circuit board pad 144 and the second control board pad 152 are connected in sequence to form a second branch 22; the first chip pads 131 of the two first branches 21 are electrically connected through the third metal trace 12c of the metal layer 12 to form a first test loop 31; the second metal traces 12b of the two second branches 22 are electrically connected through the fourth metal trace 12d of the metal layer 12 to form a second test loop 32; wherein the length of the first metal trace 12a is substantially the same as the length of the second metal trace 12b;

[0034] The control circuit board 15 includes: a first test point 15a, a second test point 15b, a third test point 15c and a fourth test point 15d; the first test point 15a is electrically connected to the first control board pad 151 at the first end of the first test loop 31; the second test point 15b is electrically connected to the first control board pad 151 at the second end of the first test loop 31; the third test point 15c is electrically connected to the second control board pad 152 at the first end of the second test loop 32; and the fourth test point 15d is electrically connected to the second control board pad 152 at the second end of the second test loop 32.

[0035] In an embodiment of the present invention, a display panel includes a substrate and a metal layer formed on the substrate, and a display device includes a display panel and a driving chip and a flexible circuit board bound to the display panel. The metal layer forms a panel pad, the driving chip includes a first chip pad, and the flexible circuit board includes a circuit board pad. Among them, the first chip pad, the first panel pad, the first metal trace of the metal layer, the second panel pad, the first circuit board pad, the first internal trace of the flexible circuit board, the third circuit board pad and the first control board pad are connected in sequence to form a first branch; the second metal trace of the metal layer, the third panel pad, the second circuit board pad, the second internal trace of the flexible circuit board, the fourth circuit board pad and the second control board pad are connected in sequence to form a second branch; the two first branches form a first test loop, and the two second branches form a second test loop. In this embodiment, the resistance of the first test loop and the resistance of the second test loop can be tested by setting a test point, and the binding resistance of the first chip pad can be obtained by the difference between the resistances of the two loops. It is not necessary to use a probe to pierce the resistance of the metal trace in the metal layer to infer the binding resistance of the first chip pad, saving the actual measurement operation that is not easy to operate and avoiding a lot of time and energy loss. In addition, the present embodiment measures the binding resistance of the first chip pad through the first test loop and the second test loop, thereby effectively reducing the error caused by actual measurement and improving the accuracy of the binding resistance of the chip pad.

[0036] The above is the core idea of ​​the present invention. The technical scheme in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0037] Specifically, the display device in this embodiment includes a display panel and a driving chip 13 and a flexible printed circuit (FPC) 14 bound to the display panel. Among them, the flexible circuit board 14 can be a printed circuit board made of polyimide or polyester film as a substrate with high reliability and excellent flexibility. It has the characteristics of high wiring density, light weight, thin thickness and good bendability. In this embodiment, the flexible circuit board 14 can be bent to the back of the display panel and bound to the control circuit board (Printed Circuit Board, PCB) 15 of the display device. The control circuit board 15 can be an alumina ceramic circuit board or an aluminum nitride ceramic circuit board. The circuit board makes the circuit miniaturized and intuitive, which plays an important role in the mass production of fixed circuits and the optimization of electrical appliance layout. For easy observation, Figure 2The control circuit board 15 on the back of the display panel is extended to a position that is flat with the display panel. In this embodiment, the display device can be a display device of electronic devices such as mobile phones, computers, televisions, notebooks, and wearable devices. This embodiment does not specifically limit the specific use of the display device. Optionally, the display device in this embodiment can be a vehicle-mounted display device. In this embodiment, the working process of the display device is that the control circuit board 15 outputs control signals, timing signals, and power signals to the flexible circuit board 14. The flexible circuit board 14 can transmit the above signals to the driving chip 13. The driving chip 13 generates display signals required for the display process of the display panel such as data signals according to the above signals, and transmits the above display signals to each pixel driving circuit formed in the display panel. The display panel is provided with an array-arranged pixel driving circuit for driving the corresponding light-emitting device to display a picture. In a direction perpendicular to the display panel, the display panel may include a substrate 11 and a driving circuit layer and a light-emitting device layer sequentially arranged on the substrate 11. Among them, the driving circuit layer includes an insulating layer and a metal layer 12 arranged alternately to form a plurality of pixel driving circuits; the light-emitting device layer is formed with an array-arranged light-emitting device. That is, the display panel in this embodiment can be an OLED display panel or a micro LED display panel. In addition, the display panel in this embodiment can also be an LCD display panel, including an array plate and a color film plate arranged relatively, and this embodiment does not specifically limit the specific type of the display panel.

[0038] refer to Figure 3 , the driver chip 13 is bound to the display panel, and the pad is the basic component unit of the surface mount assembly, which can realize the binding process. Then the driver chip 13 is provided with a chip pad, and a panel pad bound to it needs to be formed on the display panel. In this embodiment, the panel pad is arranged on the metal layer 12. The chip pad and the panel pad are electrically connected by hot pressing binding with anisotropic conductive film (ACF), soldering, etc. The pads include two aspects: the size of the pad and the shape of the pad. In this embodiment, the two pads bound to each other can have the same shape and similar size, such as Figure 3 As shown, the first panel pad 121 and the first chip pad 131 can both be rectangular, and the first panel pad 121 can be slightly larger than the first chip pad 131 to ensure the binding effect between the first panel pad 121 and the first chip pad 131. When the alignment accuracy of the driver chip 13 and the first chip pad 131 is not high enough, the slightly larger first panel pad 121 can still ensure that the binding area between the first panel pad 121 and the first chip pad 131 is larger, thereby improving the binding effect. Similarly, the flexible circuit board 14 is formed with circuit board pads, some of which are bound to the panel pads, and some of which are bound to the control board pads on the control circuit board 15. For example, refer to Figure 3 , the metal layer 12 includes a first panel pad 121, a second panel pad 122 and a third panel pad 123, the flexible circuit board 14 includes a first circuit board pad 141, a second circuit board pad 142, a third circuit board pad 143 and a fourth circuit board pad 144, and the control circuit board 15 includes a first control board pad 151 and a second control board pad 152. Among them, the first panel pad 121 is bound to the first chip pad 131, the first circuit board pad 141 is bound to the second panel pad 122, the second circuit board pad 142 is bound to the third panel pad 123, the third circuit board pad 143 is bound to the first control board pad 151, and the fourth circuit board pad 144 is bound to the second control board pad 152.

[0039] It should be noted that the binding resistance R between the panel pad and the chip pad forms a voltage drop in the signal transmission path, reducing the signal transmission effect, and thus reducing the picture display effect of the display panel. The resistance measurement of the binding resistance R is of great significance for the optimization of ICbonding. However, the binding resistance R cannot be measured directly, and calculating the binding resistance R through the metal routing in the metal layer 12 has poor measurement accuracy and wastes labor. In addition to the signal transmission path formed by the display panel, the driving chip 13 and the flexible circuit board 14, the present embodiment also has other branches, and a first test loop 31 and a second test loop 32 are formed through the branches. A binding resistance R between the first panel pad 121 and the first chip pad 131 is set in the first test loop 31, and the binding resistance R between the first panel pad 121 and the first chip pad 131 is omitted in the second test loop 32. The measured resistance values ​​of the two test loops are subtracted to obtain the binding resistance R between the first panel pad 121 and the first chip pad 131 separately. While saving labor costs, the resistance values ​​formed by other components in the test loop tend to be the same, and the measurement accuracy is high.

[0040] Specifically, Figure 2 and Figure 3As shown, the first chip pad 131 of the driver chip 13, the first panel pad 121, the first metal trace 12a of the metal layer 12, the second panel pad 122, the first circuit board pad 141, the first internal trace 14a of the flexible circuit board 14, the third circuit board pad 143 and the first control board pad 151 are sequentially connected to form a first branch 21. The first chip pad 131 and the first panel pad 121 form a binding resistance R11, the first metal trace 12a forms a resistance R12, the second panel pad 122 and the first circuit board pad 141 form a binding resistance R13, the resistance of the first internal trace 14a is extremely small and can be ignored, the third circuit board pad 143 and the first control board pad 151 form a binding resistance R14, the two first branches 21 can form a first test loop 31 through the third metal trace 12c of the metal layer 12, the third metal trace 12c forms a resistance R15, and the control circuit board 15 is provided with a first test point 15a and a second Test point 15b, the first test point 15a is connected to the first control board pad 151 of a first branch 21 in the first test loop 31 through the first auxiliary connecting line 154, and the second test point 15b is connected to the first control board pad 151 of another first branch 21 in the first test loop 31 through the first auxiliary connecting line 154. The control circuit board 15 is a copper trace, then the resistance of the first test point 15a, the second test point 15b and the first auxiliary connecting line 154 is almost zero and can be ignored, then the resistance of the first test loop 31 is (2R11+2R12+2R13+2R14+R15).

[0041] The second metal trace 12b of the metal layer 12 of the driver chip 13, the third panel pad 123, the second circuit board pad 142, the second internal trace 14b of the flexible circuit board 14, the fourth circuit board pad 144 and the second control board pad 152 are sequentially connected to form a second branch 22. The resistance of the second metal trace 12b is R22, the third panel pad 123 and the second circuit board pad 142 form a binding pad R23, the resistance of the second internal trace 14b can be ignored, the fourth circuit board pad 144 and the second control board pad 152 form a binding resistance R24, the two second branches 22 can form a second test loop 32 through the fourth metal trace 12d of the metal layer 12, the fourth metal trace 12d forms a resistance R25, the control circuit board 15 is provided with a third test point 15c and a fourth test point 15d, the third test point 15c is a plurality of test points, and the fourth test point 15d is a plurality of test points. c is connected to the second control board pad 152 of a second branch 22 in the second test loop 32 through the second auxiliary connecting line 155, and the fourth test point 15d is connected to the second control board pad 152 of another second branch 22 in the second test loop 32 through the second auxiliary connecting line 155. The control circuit board 15 is a copper trace. The resistance of the third test point 15c, the fourth test point 15d and the second auxiliary connecting line 155 are almost zero and can be ignored. Then the resistance of the second test loop 32 is (2R22+2R23+2R24+R25).

[0042] In the panel manufacturing process, the length of the first metal trace 12a and the second metal trace 12b can be set to be substantially the same. In this embodiment, substantially the same means include two: one is that the length of the first metal trace 12a and the second metal trace 12b can be exactly the same, and the other is that the difference between the length of the first metal trace 12a and the length of the second metal trace 12b is less than a set range, and the set range can be set according to user needs so that the resistance R12 of the first metal trace 12a and the resistance R22 of the second metal trace 12b tend to be the same, so that the difference between the resistance of the second test loop 32 and the resistance of the first test loop 31 does not affect the calculation of the binding resistance R11 between the first chip pad 131 and the first panel pad 121. In addition, in this embodiment, by controlling the pad preparation process, the binding resistance R13 between the second panel pad 122 and the first circuit board pad 141 can be controlled to be substantially the same as the binding resistance R11 between the third panel pad 123 and the second circuit board pad 142; the binding resistance R14 between the third circuit board pad 143 and the first control board pad 151 is substantially the same as the binding resistance R24 between the fourth circuit board pad 144 and the second control board pad 152; then the binding resistance R11 between the first chip pad 131 and the first panel pad 121 is equal to ((2R22+2R23+2R24+R25)-(2R11+2R12+2R13+2R14+R15)) / 2. That is, because the other parts constituting the test loop are all one-to-one corresponding and have the same resistance, the resistance difference between the first test loop 31 and the second test loop 32 is only the binding resistance R11 of the first chip pad 131. This embodiment does not require manual probes to obtain the resistance values ​​of the first metal trace 12a and the second metal trace 12b, which can reduce labor costs, avoid errors caused by manual detection, and improve the accuracy of R11 measurement.

[0043] Optionally, the control circuit board 15 can also be used to measure a first test resistance R1 between the first test point 15a and the second test point 15b, and to measure a second test resistance R2 between the third test point 15c and the fourth test point 15d; the control circuit board 15 is also used to obtain the binding resistance R11 of the first chip pad 131 based on the first test resistance R1 and the second test resistance R2.

[0044] In this embodiment, the measured resistance between the first test point 15a and the second test point 15b is called the first test resistance R1, and the measured resistance between the third test point 15c and the fourth test point 15d is called the second test resistance R2. The first test resistance R1 is the resistance (2R11+2R12+2R13+2R14+R15), and the second test resistance R2 is the resistance (2R22+2R23+2R24+R25). Then the binding resistance R11 of the first chip pad 131 is equal to (R1-R2) / 2. In this embodiment, a first test point 15a, a second test point 15b, a third test point 15c and a fourth test point 15d are additionally set on the control circuit board 15, so as to measure the resistance values ​​of the two test loops, and obtain the binding resistance R11 of the first chip pad 131 and the first panel pad 121 through the difference between the measured resistance values ​​of the two test loops. There is no need to measure the first metal trace 12a in the test loop by a probe for calculation, and the measurement method is simpler and easier to operate with smaller errors.

[0045] Optionally, the widths of the first metal trace 12a and the second metal trace 12b may be the same. Because the present embodiment requires that the resistance R12 of the first metal trace 12a is the same as or tends to be consistent with the resistance R22 of the second metal trace 12b, in order to further ensure that R12 and R22 are the same, the present embodiment may also set the widths of the first metal trace 12a and the second metal trace 12b to be the same when the lengths of the first metal trace 12a and the second metal trace 12b are required to be substantially the same. The metal traces on the metal layer have the same width and the same length, and their resistances tend to be consistent. In the present embodiment, when the binding resistance R11 of the first chip pad 131 is obtained by the difference between the first test resistance R1 and the second test resistance R2, because R12 and R22 are completely the same or tend to be consistent, the measurement accuracy of the binding resistance R11 of the first chip pad 131 is improved.

[0046] Optionally, the first metal wiring 12a and the second metal wiring 12b may be arranged in the same layer. The display panel may include a substrate 11 and a metal layer 12 on the substrate 11. The substrate 11 may be a rigid material such as glass, or a polymer material, such as polyimide (PI), polyethylene terephthalate (PET), etc. The substrate 11 may include multiple metal layers 12, and an insulating layer is arranged between two adjacent metal layers 12. The multiple metal layers 12 may form a driving circuit layer. In a plane parallel to the substrate 11, the driving circuit layer includes an array-arranged pixel driving circuit. A light-emitting device layer may also be provided on the side of the driving circuit layer away from the substrate 11, and the light-emitting device layer is provided with a light-emitting device corresponding to the pixel driving circuit, which can emit light of corresponding color under the control of the pixel driving circuit. In this embodiment, the first metal trace 12a and the second metal trace 12b can be formed on the same metal layer 12, and the material and film thickness of the first metal trace 12a and the second metal trace 12b are the same, so that the resistance value can be controlled directly by the length of the first metal trace 12a and the second metal trace 12b, so that R12 and R22 are the same. Optionally, in this embodiment, the length and width of the first metal trace 12a and the second metal trace 12b set on the same layer are the same, so as to further achieve the same R12 and R22, and improve the measurement accuracy of the binding resistance R11 of the final first chip pad 131.

[0047] On the basis of the above embodiment, optionally, the difference between the length of the third metal routing 12c and the length of the fourth metal routing 12d may be less than or equal to the first set threshold. In addition to the first metal routing 12a and the second metal routing 12b, the third metal routing 12c in the first test loop 31 and the fourth metal routing 12d in the second test loop 32 are also metal routings of the metal layer 12, and their resistance values ​​cannot be ignored. In this embodiment, the resistance R15 of the third metal routing 12c and the resistance R25 of the fourth metal routing 12d are substantially the same. That is, the resistance R15 of the third metal routing 12c and the resistance R25 of the fourth metal routing 12d are the same or the difference is less than a certain set resistance value. In this embodiment, the third metal trace 12c and the fourth metal trace 12d can be controlled to be arranged in the same layer, and the difference between the length of the third metal trace 12c and the length of the fourth metal trace 12d can be less than or equal to the first set threshold value, so as to control R15 and R25 to be substantially the same, thereby improving the measurement accuracy of the binding resistance R11 of the first chip pad 131. Optionally, the first set threshold value can be 1% of the length of the first metal trace 12a; or, the first set threshold value is 5% of the length of the third metal trace 12c. In the calculation process of R11, in order to improve the calculation accuracy of R11, the difference between R15 and R25 is less than or equal to 1% of the length of the first metal trace 12a, or less than or equal to 5% of the length of the third metal trace 12c, thereby reducing the measurement error of the first test resistance R1 and the second test resistance R2, thereby further reducing the measurement error of the binding resistance R11 of the first chip pad 131.

[0048] Optionally, the length of the third metal trace 12c and the length of the fourth metal trace 12d may be the same. In this embodiment, the length of the third metal trace 12c and the length of the fourth metal trace 12d may be precisely controlled to be the same, so that R15 and R25 are exactly the same, further improving the measurement accuracy of the binding resistance R11 of the first chip pad 131.

[0049] Optionally, the size of the first circuit board pad 141 and the second circuit board pad 142 may be the same; the size of the third circuit board pad 143 and the fourth circuit board pad 144 may be the same. The shape and area of ​​the first circuit board pad 141 in the first test loop 31 and the second circuit board pad 142 in the second test loop 32 may be the same; then when the flexible circuit board 14 is successfully aligned with the display panel and bound, the binding resistor R13 formed by the first circuit board pad 141 and the second panel pad 122 of the display panel is the same as the binding resistor R23 formed by the second circuit board pad 142 and the third panel pad 123 of the display panel. In this embodiment, the spacing between the two adjacent circuit board pads in the flexible circuit board 14 is the same, and the spacing between the two adjacent panel pads of the flexible circuit board 14 is also the same. Then, when the flexible circuit board 14 is successfully aligned with the display panel, the overlapping area of ​​the first circuit board pad 141 and the second panel pad 122 is the same as the overlapping area of ​​the second circuit board pad 142 and the third panel pad 123, and thus the binding resistor R13 and the binding resistor R23 are the same.

[0050] Figure 4 A partial structural schematic diagram of another display device provided in an embodiment of the present invention, optionally, the driving chip 13 further includes a second chip pad 132; the driving chip 13 is bound to the fourth panel pad 124 of the metal layer 12 through the second chip pad 132; the flexible circuit board 14 further includes a fifth circuit board pad 145 and a sixth circuit board pad 146; the flexible circuit board 14 is bound to the fifth panel pad 125 of the metal layer 12 through the fifth circuit board pad 145; the flexible circuit board 14 is bound to the third control board pad 153 of the control circuit board 15 through the sixth circuit board pad 146; the second chip pad 132, the fourth panel pad 124, the seventh metal trace 12g of the metal layer 12, the fifth panel pad 125, the fifth circuit board pad 145, the third internal trace 14c of the flexible circuit board 14, the sixth circuit board pad 146 and the third control board pad 153 are sequentially connected to form a third branch 23; the third branch 23 is used to transmit the signal output by the control circuit board 15 to the driving chip 13.

[0051] During the display process of the display device, the control circuit board 15 needs to output a control signal to the flexible circuit board 14, and the flexible circuit board 14 controls the driving chip 13, and the driving chip 13 sends a signal to the display panel to control the pixel driving circuit of the display panel to realize the picture display. In addition to the first branch 21 and the second branch 22, a third branch 23 may also be included. The first branch 21 and the second branch 22 are used to form a test loop for testing the binding resistance R11, and the third branch 23 is used to transmit the signal output by the control circuit board 15. Specifically, the third branch 23 includes the second chip pad 132 of the driving chip 13, the fourth panel pad 124 of the display panel, the seventh metal trace 12g of the metal layer 12, the fifth panel pad 125 of the display panel, the fifth circuit board pad 145 of the flexible circuit board 14, the third internal trace 14c of the flexible circuit board 14, the sixth circuit board pad 146 of the flexible circuit board 14 and the third control board pad 153 of the control circuit board 15. Among them, the second chip pad 132 is bound to the fourth panel pad 124, the fifth panel pad 125 is bound to the fifth circuit board pad 145, and the sixth circuit board pad 146 is bound to the third control board pad 153. Optionally, the first chip pad 131 and the second chip pad 132 have the same size, so that the binding resistance of the second chip pad 132 and the fourth panel pad 124 is substantially the same as R11; the first circuit board pad 141, the second circuit board pad 142 and the fifth circuit board pad 145 have the same size, so that the binding resistance of the fifth panel pad 125 and the fifth circuit board pad 145 is substantially the same as R13 or R23; the third circuit board pad 143, the fourth circuit board pad 144 and the sixth circuit board pad 146 have the same size, so that the binding resistance of the sixth circuit board pad 146 and the third control board pad 153 is substantially the same as R14 or R24. In addition, the resistance of the seventh metal wiring 12g of the metal layer 12 is substantially the same as the resistance of the first metal wiring 12a or the second metal wiring 12b. Therefore, in this embodiment, the overall resistance of the third branch 23 is substantially the same as the overall resistance of the first branch 21 or the overall resistance of the second branch 22. When the binding resistance of the driver chip 13 is measured by the resistance difference between the first test loop and the second test loop, the measurement accuracy is high, and the measurement method is simple and easy to operate.

[0052] Optionally, the flexible circuit board 14 may include a first edge L1 and a second edge L2 that are relatively arranged; the first edge L1 and the second edge L2 extend along a first direction X; the first direction X is parallel to the plane where the substrate 11 is located; the first circuit board pad 141, the second circuit board pad 142 and a plurality of fifth circuit board pads 145 are arranged along the first edge L1; along the first direction X, the first circuit board pad 141 and the second circuit board pad 142 are arranged on at least one side of the fifth circuit board pad 145.

[0053] The flexible circuit board 14 includes a first edge L1 close to the display panel and a second edge L2 away from the display panel. The first edge L1 and the second edge L2 may extend along a first direction X, where the first direction X is the direction of a straight line parallel to the plane of the substrate. The first circuit board pad 141, the second circuit board pad 142 and a plurality of fifth circuit board pads 145 are arranged along the first edge L1, and the first circuit board pad 141 and the second circuit board pad 142 are disposed on at least one side of the fifth circuit board pad 145. Figure 4 As shown, the first circuit board pad 141 and the second circuit board pad 142 can be arranged on one side of the fifth circuit board pad 145. Similarly, the third circuit board pad 143 and the fourth circuit board pad 144 can be arranged on one side of the fifth circuit board pad 145. Then, the first test loop 31 and the second test loop 32 are arranged at the edge of the flexible circuit board 14 along the first direction X, which does not affect the wiring space of the third branch 23. In this embodiment, only corresponding pads and wiring settings are added to the edges of the driver chip 13, the display panel and the flexible circuit board 14, and a simple process line test is completed to achieve a good wiring scheme to shield the influence of various display panel designs on impedance testing. In addition, as Figure 5 As shown, Figure 5 A partial structural diagram of another display device provided by an embodiment of the present invention, wherein a first circuit board pad 141 and a second circuit board pad 142 may be provided on opposite sides of the fifth circuit board pad 145 along the first direction X. Then, along the first direction X, two opposite edges of the flexible circuit board 14 are provided with a test circuit for testing the binding resistance of the driver chip, so that an operator can select the test circuit on either side for testing, or, in order to enhance the accuracy of the test result, a test current may be passed through the test circuits on opposite sides of the flexible circuit board 14, thereby obtaining two test results, and averaging the two test results, thereby further enhancing the measurement accuracy of the binding resistance of the driver chip 13 in this embodiment.

[0054] Figure 6 A schematic diagram of a test circuit structure provided by an embodiment of the present invention. Figure 3 , Figure 4 and Figure 6 Optionally, along the first direction X, the flexible circuit board 14 may be provided with a first circuit board pad 141, a first circuit board pad 141, a second circuit board pad 142, and a second circuit board pad 142 in sequence; then along the first direction X, the display device includes a first branch 21, a first branch 21, a second branch 22, and a second branch 22 arranged in sequence; two adjacent first branches 21 are connected by a third metal trace 12c; two adjacent second branches 22 are connected by a fourth metal trace 12d; the length of the third metal trace 12c is substantially the same as the length of the fourth metal trace 12d.

[0055] refer to Figure 6 , along the first direction X, the first test loop 31 and the second test loop 32 are arranged in sequence. Specifically, the following arrangement sequence is formed along the first direction X: first branch 21, first branch 21, second branch 22, second branch 22; wherein the first branch 21 and the adjacent first branch 21 are connected through the third metal wiring 12c to form the first test loop 31, and the second branch 22 and the adjacent second branch 22 are connected through the fourth metal wiring 12d to form the second test loop 32. If the length of the third metal wiring 12c is substantially the same as the length of the fourth metal wiring 12d, then Figure 6 It can be seen that the difference between the first test loop 31 and the second test loop 32 is only the binding resistance R11 between the two first chip pads 131 and the first panel pad 121. In this embodiment, a single variable is formed between the first test loop 31 and the second test loop 32 so that the variable can be obtained through the difference between the two test loops, without the need for the operator to use a probe to measure the metal traces of the display panel, thereby improving the convenience of measurement and the accuracy of measurement.

[0056] The test circuit is set up in addition to Figure 6 In addition to the structure shown, other forms are possible, such as Figure 7 As shown, Figure 7 A schematic diagram of the structure of another test circuit provided by an embodiment of the present invention. Optionally, along the first direction X, the flexible circuit board 14 may be sequentially provided with a first circuit board pad 141, a second circuit board pad 142, a second circuit board pad 142, and a first circuit board pad 141; then along the first direction X, the display device includes a first branch 21, a second branch 22, a second branch 22, and a first branch 21 sequentially provided; two adjacent first branches 21 are connected by a fifth metal trace 12e; two adjacent second branches 22 are connected by a sixth metal trace 12f; the length of the fifth metal trace 12e is slightly different from the length of the sixth metal trace 12f, so that the effect on the measurement of resistance is very small, then in this embodiment, it can be considered that the length of the fifth metal trace 12e is substantially the same as the length of the sixth metal trace 12f.

[0057] In this embodiment, the first test loop 31 can be nested in the second test loop 32. Specifically, the following arrangement order is formed along the first direction X: the first branch 21, the second branch 22, the second branch 22, the first branch 21; wherein, the two first branches 21 are connected through the fifth metal trace 12e to form the first test loop 31, and the two second branches 22 are connected through the sixth metal trace 12f to form the second test loop 32. Similarly, the length of the fifth metal trace 12e is substantially the same as the length of the sixth metal trace 12f, to ensure that the difference between the first test loop 31 and the second test loop 32 is only the binding resistance R11 between the two first chip pads 131 and the first panel pad 121. In this embodiment, the operator does not need to measure the metal traces in the display panel with a probe, thereby improving the convenience of measuring the binding resistance R11.

[0058] Figure 8 A schematic diagram of the structure of another test circuit provided by an embodiment of the present invention. Fig. 9 A schematic diagram of another test loop structure provided by an embodiment of the present invention. Optionally, the sixth metal trace 12f extends in a serpentine or zigzag shape along the first direction X. In this embodiment, because the first test loop 31 is nested in the second test loop 32, if the sixth metal trace 12f and the fifth metal trace 12e are straight along the same direction, it is easy for the length of the sixth metal trace 12f to be less than the length of the fifth metal trace 12e. To ensure that the length of the fifth metal trace 12e is substantially the same as the length of the sixth metal trace 12f, as Figure 8 As shown, the sixth metal routing line 12f may be in a zigzag shape. Although the sixth metal routing line 12f and the fifth metal routing line 12e both extend along the first direction X, the zigzag shape of the sixth metal routing line 12f may effectively extend its substantial length, so that the substantial length of the sixth metal routing line 12f is equal to that of the fifth metal routing line 12e. Fig. 9 As shown, the sixth metal routing 12f can be serpentine to extend the actual length of the sixth metal routing 12f so that the actual length of the sixth metal routing 12f is equal to that of the fifth metal routing 12e, thereby ensuring that the difference between the first test loop 31 and the second test loop 32 is only the binding resistance R11 between the two first chip pads 131 and the first panel pad 121, thereby improving the measurement accuracy of the binding resistance R11.

[0059] Continue to refer Figure 2Optionally, the display device may include a display area AA and a non-display area NA at least partially surrounding the display area AA; the non-display area NA includes a first non-display area NA1 and a second non-display area NA2 arranged relatively along a second direction Y; the second direction Y is parallel to the plane where the substrate 11 is located; the first non-display area NA1 is bound with a driver chip 13 and a flexible circuit board 14; the flexible circuit board 14 is arranged on a side of the driver chip 13 away from the display area; the driver chip 13 is a source driver chip; the first metal trace 12a and the second metal trace 12b are straight lines.

[0060] The display panel includes a display area AA and a non-display area NA arranged around the display area AA. In this embodiment, the non-display area NA may include a first non-display area NA1 and a second non-display area NA2 arranged relatively along a second direction Y. The second direction Y is a direction parallel to the plane where the substrate 11 is located. The second direction Y intersects with the first direction X. Optionally, the first direction X and the second direction Y may be perpendicular to each other. The first non-display area NA1 is bound with a driver chip 13 and a flexible circuit board 14. In this embodiment, the driver chip 13 is a source driver chip, which is used to receive a control signal input by the flexible circuit board 14 to generate a signal to drive the display panel. In this embodiment, the first metal trace 12a and the second metal trace 12b between the driver chip 13 and the flexible circuit board 14 can be straight lines. In this embodiment, a test circuit is set in the source driver chip to accurately obtain the binding resistance value of the source driver chip. Optionally, the first metal trace 12a and the second metal trace 12b may be arranged in parallel so that the first metal trace 12a and the second metal trace 12b are equal in length and are in the same environment, thereby reducing the resistance difference between the first metal trace 12a and the second metal trace 12b in the display panel.

[0061] Fig.10 A partial structural schematic diagram of another display device provided in an embodiment of the present invention, optionally, the display device may include a display area AA and a non-display area NA at least partially surrounding the display area; the display area AA includes a first non-display area NA1 and a second non-display area NA2 relatively arranged along a second direction Y, and a third non-display area NA3 and a fourth non-display area NA4 relatively arranged along a first direction X; the first direction X and the second direction Y intersect; the third non-display area NA3 is bound with a driver chip 13; the first non-display area NA1 is bound with a flexible circuit board 14; the driver chip 13 is a gate driver chip; the first metal trace 12a and the second metal trace 12b are in the shape of a zigzag line extending along the display area AA.

[0062] In the embodiment, the non-display area NA of the display panel includes not only the first non-display area NA1 and the second non-display area NA2 relatively arranged along the second direction Y, but also the third non-display area NA3 and the fourth non-display area NA4 relatively arranged along the first direction X. The first non-display area NA1 and the third non-display area NA3 are arranged adjacent to each other, the third non-display area NA3 is bound with the driver chip 13 (gate driver chip 61), the first non-display area NA1 is bound with the source driver chip 62 and the flexible circuit board 14, and the first test loop set for the driver chip 13 and the flexible circuit board 14 needs to set a longer first metal trace 12a, and the second test loop needs to set a longer second metal trace 12b. Then the first metal trace 12a and the second metal trace 12b can be a broken line extending along the edge of the display area AA. In this embodiment, a test loop is set in the gate driver chip 61 to accurately obtain the binding resistance value of the source driver chip 62. Optionally, the fold line segments of the first metal routing 12a and the second metal routing 12b may be arranged in parallel so that the first metal routing 12a and the second metal routing 12b are equal in length and are in the same environment, thereby reducing the resistance difference between the first metal routing 12a and the second metal routing 12b in the display panel. Fig.10 The wiring method of the first test loop nesting the second test loop is shown. The specific wiring method can be Figures 7 to 9 The structure shown in FIG. 1 is shown in FIG. 1 . Of course, the test circuit of the gate drive chip 61 can also be Figure 6 The test circuit shown in the figure does not impose any special restrictions on its specific arrangement in this embodiment. Fig.11 As shown, Fig.11 This is a partial structural diagram of another display device provided by an embodiment of the present invention, in which a first test loop 31 and a second test loop 32 are arranged side by side. Fig.10 and Fig.11 In this embodiment, the first metal trace 12a and the second metal trace 12b in a zigzag shape can be arranged in the same metal layer to ensure that the resistance values ​​of the first metal trace 12a and the second metal trace 12b are the same.

[0063] Continue to refer Fig.11Optionally, along the first direction X, the second circuit board pad 142 can be arranged on the side of the first circuit board pad 141 away from the display area AA; along the first direction X, the fourth circuit board pad 144 is arranged on the side of the third circuit board pad 143 close to the edge of the flexible circuit board 14. In this embodiment, the second test loop 32 is arranged on the side of the first test loop 31 away from the center of the display panel. Specifically, the second circuit board pad 142 is arranged on the side of the first circuit board pad 141 away from the central area, and the fourth circuit board pad 144 is arranged on the side of the third circuit board pad 143 away from the central area, that is, the second test loop 32 is arranged closer to the edge of the display panel than the first test loop 31. Compared with the test loop in the prior art, this embodiment only adds a second test loop at the edge of the flexible circuit board 14 along the first direction X, and the second test loop is only arranged in the edge area, and is not arranged together with other third branches, which is convenient for the layout of each test point, and then the binding resistance of the driver chip 13 is measured quickly and conveniently. It should be noted that not only the second test loop, but also the first test loop and the second test loop can be spaced a certain distance from the third branch of the transmission signal, so that the operator can identify the location of the test loop in time and improve the measurement efficiency.

[0064] Fig.12 A partial structural diagram of another display device provided by an embodiment of the present invention, Fig.13 for Fig.13 Schematic diagram of the cross-sectional structure along the line segment a-a'. Optionally, the metal layer 12 may at least include: a first metal layer 51 and a second metal layer 52; the first metal trace 12a includes in sequence a first sub-metal trace 1211 extending along the second direction Y, a second sub-metal trace 1212 extending along the first direction X, and a third sub-metal trace 1213 extending along the second direction Y; the second metal trace 12b includes in sequence a fourth sub-metal trace 1214 extending along the second direction Y, a fifth sub-metal trace 1215 extending along the first direction X, and a sixth sub-metal trace 1216 extending along the second direction Y; the first sub-metal trace 1211, the third sub-metal trace 1213, The fourth sub-metal routing 1214 and the sixth sub-metal routing 1216 are located in the first metal layer 51; the second sub-metal routing 1212 and the fifth sub-metal routing 1215 are located in the second metal layer 52; the first sub-metal routing 1211 and the second sub-metal routing 1212 are electrically connected through the first via 511; the third sub-metal routing 1213 and the second sub-metal routing 1212 are electrically connected through the second via 512; the fourth sub-metal routing 1214 and the fifth sub-metal routing 1215 are electrically connected through the third via 513; the fifth sub-metal routing 1215 and the sixth sub-metal routing 1216 are electrically connected through the fourth via 513.

[0065] The driving circuit layer in this embodiment includes multiple metal layers. When the lengths of the first metal wiring 12a and the second metal wiring 12b are relatively large, such as Fig.12 As shown, the metal routing of the zigzag row occupies more space in the non-display area. In this embodiment, the first metal routing 12a and the second metal routing 12b can be divided into multiple segments, and different segments can be set in different metal layers, so that for a certain metal layer, the first metal routing 12a and the second metal routing 12b occupy less space, which is conducive to the layout of other devices, or it is convenient to reduce the width of the non-display area and realize the narrow frame design of the display panel. Specifically, in this embodiment, the first metal routing 12a and the second metal routing 12b can be set in the first metal layer 51 and the second metal layer 52. The first metal routing 12a can be sequentially divided into a first sub-metal routing 1211 extending along the second direction Y, a second sub-metal routing 1212 extending along the first direction X, and a third sub-metal routing 1213 extending along the second direction Y; the second metal routing 12b can be sequentially divided into a fourth sub-metal routing 1214 extending along the second direction Y, a fifth sub-metal routing 1215 extending along the first direction X, and a sixth sub-metal routing 1216 extending along the second direction Y. Among them, the second sub-metal routing 1212 and the fifth sub-metal routing 1215 are located in the second metal layer 52, and from the first metal layer 51, the space of the first non-display area NA1 is saved, and the width of the lower frame of the display panel is reduced. And the first metal layer 51 and the second metal layer 52 are connected through vias, so the first sub-metal routing 1211, the first via 511, the second sub-metal routing 1212, the second via 512 and the third sub-metal routing 1213 are electrically connected in sequence to form the first metal routing 12a. Similarly, the fourth sub-metal routing 1214, the third via 513, the fifth sub-metal routing 1215, the fourth via 513 and the sixth sub-metal routing 1216 are electrically connected in sequence to form the second metal routing 12b. In this embodiment, on the basis of ensuring that the circuit setting is simple and the space occupied is small, a corresponding test circuit is set for the gate driver chip 61 to improve the convenience of measuring the binding resistance of the gate driver chip 61.

[0066] In this embodiment, the first sub-metal routing 1211 and the fourth sub-metal routing 1214 are located in the same metal layer, and their materials and thicknesses are the same, which is convenient for controlling the resistance values ​​of the first sub-metal routing 1211 and the fourth sub-metal routing 1214 to be the same; the second sub-metal routing 1212 and the fifth sub-metal routing 1215 are located in the second metal layer 52 at the same time, and their materials and thicknesses are the same, which is convenient for controlling the resistance values ​​of the second sub-metal routing 1212 and the fifth sub-metal routing 1215 to be the same; similarly, the third sub-metal routing 1213 and the sixth sub-metal routing 1216 are arranged in the same layer to facilitate achieving the same resistance values. Optionally, the line width of the first sub-metal routing 1211 and the line width of the fourth sub-metal routing 1214 can be the same; the line width of the second sub-metal routing 1212 and the line width of the fifth sub-metal routing 1215 are the same; the line width of the third sub-metal routing 1213 and the line width of the sixth sub-metal routing 1216 are the same. Exemplarily, if the line width, material and film thickness of the first sub-metal routing 1211 are the same as those of the fourth sub-metal routing 1214, then in this embodiment, the first sub-metal routing 1211 and the fourth sub-metal routing 1214 can be controlled to have the same length to achieve the same resistance value of the first sub-metal routing 1211 and the fourth sub-metal routing 1214. Similarly, the line width of the second sub-metal routing 1212 is the same as that of the fifth sub-metal routing 1215, and the line width of the third sub-metal routing 1213 is the same as that of the sixth sub-metal routing 1216. Although the first metal routing 12a and the second metal routing 12b are arranged in two layers of metal in this embodiment, each section of the sub-metal routing is arranged one-to-one to ensure that the impedance of the corresponding sub-metal routing is the same. When the binding resistance of the gate driver chip is tested through the test loop, a single variable can be effectively controlled to improve the accuracy of the binding resistance measurement.

[0067] Continue to refer Fig.13 Optionally, the apertures of the first via 511 and the third via 513 may be the same; the apertures of the second via 512 and the fourth via 514 may be the same. The aperture D11 of the first via 511 is the same or substantially the same as the aperture D13 of the third via 513, and the aperture D12 of the second via 512 is the same or substantially the same as the aperture D14 of the fourth via 514, so as to further ensure that the impedance values ​​of the first metal trace 12a and the second metal trace 12b are the same, thereby improving the measurement accuracy of the binding resistance of the gate driver chip.

[0068] In summary, the embodiments of the present invention can optimize the IC bonding resistance design of the display device, and directly calculate the actual Source IC (source driver chip) or GATE IC (gate driver chip) bonding resistance using the measured value, and the detection method is convenient and fast. In addition, the via or winding method can be used to minimize the wiring space, realize the narrow frame design of the display panel, and improve the user experience.

[0069] Based on the same concept, an embodiment of the present invention further provides a method for testing a display device. Fig.14 A flow chart of a method for testing a display device provided by an embodiment of the present invention is shown in FIG. Fig.14 As shown, the method of this embodiment includes the following steps:

[0070] Step S101 , measuring a first test resistance R1 of a first test loop in a display device through a first test point and a second test point.

[0071] Step S102 , measuring a second test resistance R2 of a second test loop in the display device through a third test point and a fourth test point.

[0072] Step S103 , obtaining a binding resistance R11 = (R1 − R2) / 2 of the first chip pad of the driving chip of the display device according to the first test resistance R1 and the second test resistance R2 .

[0073] In an embodiment of the present invention, a display panel includes a substrate and a metal layer formed on the substrate, and a display device includes a display panel and a driving chip and a flexible circuit board bound to the display panel. The metal layer forms a panel pad, the driving chip includes a first chip pad, and the flexible circuit board includes a circuit board pad. Among them, the first chip pad, the first panel pad, the first metal trace of the metal layer, the second panel pad, the first circuit board pad, the first internal trace of the flexible circuit board, the third circuit board pad and the first control board pad are connected in sequence to form a first branch; the second metal trace of the metal layer, the third panel pad, the second circuit board pad, the second internal trace of the flexible circuit board, the fourth circuit board pad and the second control board pad are connected in sequence to form a second branch; the two first branches form a first test loop, and the two second branches form a second test loop. In this embodiment, the resistance of the first test loop and the resistance of the second test loop can be tested by setting a test point, and the binding resistance of the first chip pad can be obtained by the difference between the resistances of the two loops. It is not necessary to use a probe to pierce the resistance of the metal trace in the metal layer to infer the binding resistance of the first chip pad, which saves the actual measurement operation that is not easy to operate and avoids a lot of time and energy loss. In addition, the present embodiment measures the binding resistance of the first chip pad through the first test loop and the second test loop, thereby effectively reducing the error caused by actual measurement and improving the accuracy of the binding resistance of the chip pad.

[0074] On the basis of the above embodiment, measuring the first test resistance R1 of the first test circuit in the display device through the first test point and the second test point may include: connecting the first test point and the second test point respectively through a multimeter to obtain the first test resistance R1; measuring the second test resistance R2 of the second test circuit in the display device through the third test point and the fourth test point includes: connecting the third test point and the fourth test point respectively through a multimeter to obtain the second test resistance R2. In this embodiment, the binding resistance of the chip pad can be directly obtained by only piercing the first test point, the second test point, the third test point and the fourth test point through a multimeter, and there is no need to measure the metal traces in the display panel separately, which saves labor costs, improves the convenience of measurement, and avoids errors caused by operators when measuring metal traces with probes, thereby improving the accuracy of measurement.

[0075] Note that the above are only preferred embodiments of the present invention and the technical principles used. Those skilled in the art will understand that the present invention is not limited to the specific embodiments described herein, and that various obvious changes, readjustments and substitutions can be made by those skilled in the art without departing from the scope of protection of the present invention. Therefore, although the present invention has been described in more detail through the above embodiments, the present invention is not limited to the above embodiments, and may include more other equivalent embodiments without departing from the concept of the present invention, and the scope of the present invention is determined by the scope of the appended claims.

Claims

1. A display device, characterized in that: include: A substrate and a metal layer disposed on the substrate; the metal layer comprises a first panel pad, a second panel pad and a third panel pad; The display device is bound with a driving chip and a flexible circuit board; the first chip pad of the driving chip is bound with the first panel pad; the first circuit board pad of the flexible circuit board is bound with the second panel pad; the second circuit board pad of the flexible circuit board is bound with the third panel pad; the third circuit board pad of the flexible circuit board is bound with the first control board pad on the control circuit board; the fourth circuit board pad of the flexible circuit board is bound with the second control board pad on the control circuit board; The first chip pad, the first panel pad, the first metal trace of the metal layer, the second panel pad, the first circuit board pad, the first internal trace of the flexible circuit board, the third circuit board pad and the first control board pad are connected in sequence to form a first branch; the second metal trace of the metal layer, the third panel pad, the second circuit board pad, the second internal trace of the flexible circuit board, the fourth circuit board pad and the second control board pad are connected in sequence to form a second branch; the first chip pads of the two first branches are electrically connected through the third metal trace of the metal layer to form a first test loop; the second metal traces of the two second branches are electrically connected through the fourth metal trace of the metal layer to form a second test loop; wherein the length of the first metal trace is substantially the same as the length of the second metal trace; The control circuit board includes: a first test point, a second test point, a third test point and a fourth test point; the first test point is electrically connected to the first control board pad at the first end of the first test loop; the second test point is electrically connected to the first control board pad at the second end of the first test loop; the third test point is electrically connected to the second control board pad at the first end of the second test loop; the fourth test point is electrically connected to the second control board pad at the second end of the second test loop.

2. The display device according to claim 1, characterized in that The control circuit board is further used to measure a first test resistance between the first test point and the second test point, and to measure a second test resistance between the third test point and the fourth test point; The control circuit board is further used to obtain the binding resistance of the first chip pad according to the first test resistance and the second test resistance.

3. The display device according to claim 1, characterized in that The first metal trace has the same width as the second metal trace.

4. The display device according to claim 1, characterized in that The first metal wiring and the second metal wiring are arranged on the same layer.

5. The display device according to claim 1, characterized in that A difference between a length of the third metal routing line and a length of the fourth metal routing line is less than or equal to a first set threshold.

6. The display device according to claim 5, characterized in that: The length of the third metal routing line is the same as the length of the fourth metal routing line.

7. The display device according to claim 5, characterized in that: The first set threshold is 1% of the length of the first metal trace; or, The first set threshold is 5% of the length of the third metal trace.

8. The display device according to claim 1, characterized in that: The first circuit board pad and the second circuit board pad have the same size; The third circuit board pad and the fourth circuit board pad have the same size.

9. The display device according to claim 1, characterized in that: The driver chip further includes a second chip pad; the driver chip is bonded to the fourth panel pad of the metal layer via the second chip pad; The flexible circuit board also includes a fifth circuit board pad and a sixth circuit board pad; the flexible circuit board is bound to the fifth panel pad of the metal layer through the fifth circuit board pad; the flexible circuit board is bound to the third control board pad of the control circuit board through the sixth circuit board pad; The second chip pad, the fourth panel pad, the seventh metal trace of the metal layer, the fifth panel pad, the fifth circuit board pad, the third internal trace of the flexible circuit board, the sixth circuit board pad and the third control board pad are connected in sequence to form a third branch; the third branch is used to transmit the signal output by the control circuit board to the driver chip.

10. The display device according to claim 9, characterized in that: The first chip pad and the second chip pad have the same size; the first circuit board pad, the second circuit board pad and the fifth circuit board pad have the same size; the third circuit board pad, the fourth circuit board pad and the sixth circuit board pad have the same size.

11. The display device according to claim 9, characterized in that The flexible circuit board comprises a first edge and a second edge which are arranged opposite to each other; the first edge and the second edge extend along a first direction; the first direction is parallel to the plane where the substrate is located; The first circuit board pad, the second circuit board pad and a plurality of the fifth circuit board pads are arranged along the first edge; along the first direction, the first circuit board pad and the second circuit board pad are arranged on at least one side of the fifth circuit board pad.

12. The display device according to claim 11, characterized in that: Along the first direction, the flexible circuit board is sequentially provided with a first circuit board pad, a first circuit board pad, a second circuit board pad, and a second circuit board pad; along the first direction, the display device includes the first branch, the first branch, the second branch, and the second branch sequentially provided; Two adjacent first branches are connected via the third metal routing; two adjacent second branches are connected via the fourth metal routing; and the length of the third metal routing is substantially the same as the length of the fourth metal routing.

13. The display device according to claim 11, characterized in that Along the first direction, the flexible circuit board is sequentially provided with a first circuit board pad, a second circuit board pad, a second circuit board pad, and a first circuit board pad; along the first direction, the display device includes the first branch, the second branch, the second branch, and the first branch sequentially provided; Two adjacent first branches are connected via a fifth metal routing; two adjacent second branches are connected via a sixth metal routing; and the length of the fifth metal routing is substantially the same as the length of the sixth metal routing.

14. The display device according to claim 13, characterized in that: The sixth metal wiring extends in a serpentine or zigzag shape along the first direction.

15. The display device according to claim 1, characterized in that: The display device comprises a display area and a non-display area at least partially surrounding the display area; the non-display area comprises a first non-display area and a second non-display area arranged opposite to each other along a second direction; the second direction is parallel to the plane where the substrate is located; The first non-display area is bound with the driving chip and the flexible circuit board; the flexible circuit board is arranged on a side of the driving chip away from the display area; The driver chip is a source driver chip; the first metal wiring and the second metal wiring are straight lines.

16. The display device according to claim 1, characterized in that: The display device comprises a display area and a non-display area at least partially surrounding the display area; the display area comprises a first non-display area and a second non-display area arranged opposite to each other along a second direction, and a third non-display area and a fourth non-display area arranged opposite to each other along a first direction; the first direction intersects with the second direction; The third non-display area is bound to the driving chip; the first non-display area is bound to the flexible circuit board; The driving chip is a gate driving chip; the first metal wiring and the second metal wiring are in the shape of a broken line extending along the display area.

17. The display device according to claim 16, characterized in that: The metal layer at least includes: a first metal layer and a second metal layer; The first metal routing sequentially includes a first sub-metal routing extending along the second direction, a second sub-metal routing extending along the first direction, and a third sub-metal routing extending along the second direction; the second metal routing sequentially includes a fourth sub-metal routing extending along the second direction, a fifth sub-metal routing extending along the first direction, and a sixth sub-metal routing extending along the second direction; The first sub-metal routing, the third sub-metal routing, the fourth sub-metal routing and the sixth sub-metal routing are located in the first metal layer; the second sub-metal routing and the fifth sub-metal routing are located in the second metal layer; The first sub-metal routing and the second sub-metal routing are electrically connected through a first via; the third sub-metal routing and the second sub-metal routing are electrically connected through a second via; the fourth sub-metal routing and the fifth sub-metal routing are electrically connected through a third via; and the fifth sub-metal routing and the sixth sub-metal routing are electrically connected through a fourth via.

18. The display device according to claim 17, characterized in that: The first via hole and the third via hole have the same aperture; the second via hole and the fourth via hole have the same aperture.

19. The display device according to claim 17, characterized in that: The line width of the first sub-metal routing is the same as the line width of the fourth sub-metal routing; The line width of the second sub-metal routing is the same as the line width of the fifth sub-metal routing; The line width of the third sub-metal wiring is the same as the line width of the sixth sub-metal wiring.

20. The display device according to claim 16, characterized in that Along the first direction, the second circuit board pad is arranged on a side of the first circuit board pad away from the display area; Along the first direction, the fourth circuit board pad is arranged on a side of the third circuit board pad close to an edge of the flexible circuit board.

21. A method for testing a display device, characterized in that: The display device according to any one of claims 1 to 20, comprising: Measuring a first test resistance R1 of a first test circuit in the display device through the first test point and the second test point; Measuring a second test resistance R2 of a second test circuit in the display device through the third test point and the fourth test point; The binding resistance R=(R1-R2) / 2 of the first chip pad of the driving chip of the display device is obtained according to the first test resistance R1 and the second test resistance R2.

22. The display device testing method according to claim 21, characterized in that: Measuring a first test resistance R1 of a first test circuit in the display device through the first test point and the second test point includes: Connect the first test point and the second test point respectively through a multimeter to obtain the first test resistance value R1; Measuring a second test resistance R2 of a second test loop in the display device through the third test point and the fourth test point includes: The third test point and the fourth test point are respectively connected via a multimeter to obtain the second test resistance R2.

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