Wideband and wide-voltage adjustable single-phase high-power inverter circuit based on SiC MOSFET (Metal-Oxide-Semiconductor Field Effect Transistor)

Abstract

The invention discloses a broadband and wide-voltage adjustable single-phase high-power inverter circuit based on a SiC MOSFET (Metal-Oxide-Semiconductor Field Effect Transistor), which is characterized by comprising an input direct-current source, a full-bridge inverter circuit, an output filter circuit and an output alternating-current source which are electrically connected in sequence, the input direct-current source is also electrically connected with an input direct-current voltage sampling module, and the full-bridge inverter circuit is also electrically connected with an output direct-current voltage sampling module. The input DC source is electrically connected with the inductive current sampling module, the output AC source is electrically connected with the load current sampling module and the output AC voltage sampling module, and the input DC voltage sampling module, the inductive current sampling module, the load current sampling module and the output AC voltage sampling module are electrically connected with the DSP control module. And the DSP control module is electrically connected with the full-bridge inverter circuit through the driving module. According to the broadband and wide-voltage adjustable single-phase high-power inverter circuit based on the SiC MOSFET, high-performance sine wave output voltage is obtained under the limited switching frequency, and the system is fast in response, good in steady state and high in reliability.

Description

Technical Field

[0001] The present invention relates to the technical field of inverter power supplies, and in particular to a wide-frequency, wide-voltage adjustable single-phase high-power inverter circuit based on SiC MOSFET. Background Art

[0002] Power supply is the source of power for all electrical equipment. With the continuous development and progress of control technology, electronic technology and semiconductor manufacturing technology, high-power switching power supplies are becoming more and more common in my country's social economy, such as in the financial industry, aerospace, and other industries such as health. In the process of development, the requirements for the performance of switching power supplies are getting higher and higher, making high power and high performance gradually become an important trend in modern power electronic switching power supplies. High-power inverter power supplies are limited by switching losses, skin effects, core losses, etc., and the switching frequency cannot be very high. How to obtain high-performance sinusoidal output voltage at a limited switching frequency is the key issue of high-power and high-performance inverter power supplies. Summary of the invention

[0003] The technical problem to be solved by the present invention is: the present invention provides a wide-band, wide-voltage adjustable single-phase high-power inverter circuit based on SiC MOSFET, which realizes high-performance sinusoidal wave output voltage under limited switching frequency, and the system has fast response, good steady state and high reliability.

[0004] The technical solution adopted by the present invention to solve its technical problems is: a wide-band, wide-voltage adjustable single-phase high-power inverter circuit based on SiC MOSFET, characterized in that it includes an input DC source, a full-bridge inverter circuit, an output filter circuit and an output AC source electrically connected in sequence, the input DC source is also electrically connected to an input DC voltage sampling module, the input DC source is electrically connected to an inductor current sampling module, the output AC source is electrically connected to a load current sampling module and an output AC voltage sampling module, the input DC voltage sampling module, the inductor current sampling module, the load current sampling module and the output AC voltage sampling module are electrically connected to a DSP control module, and the DSP control module is electrically connected to the full-bridge inverter circuit through a drive module.

[0005] Further, the full-bridge inverter circuit includes a chip Q1, a chip Q5, a chip Q15 and a chip Q16, the first end of the chip Q1 is connected to the second end of the resistor R28 and the first end of the resistor R5, the second end of the chip Q1 is connected to the VO+ power supply and the second end of the chip Q15; the third end of the chip Q1 is connected to the second end of the resistor R5, the second end of the chip Q5 and the second end of the inductor L6A, the first end of the chip Q5 is connected to the second end of the resistor R32 and the first end of the resistor R37; the third end of the chip Q5 is connected to the second end of the resistor R37, the VO- power supply and the third end of the chip Q16, the first end of the chip Q15 is connected to the second end of the resistor R35 and the first end of the resistor R4; the third end of the chip Q15 is connected to the second end of the resistor R4, the second end of the chip Q16 and the second end of the inductor L7B, the first end of the chip Q16 is connected to the second end of the resistor R42 and the resistor R29 The first end of the chip Q16 is connected to the second end of the resistor R29, the VO- power supply and the third end of the chip Q5, the first end of the inductor L6A is connected to the second end of the inductor L1, the first end of the inductor L1 is connected to the first end of the chip U1, and the third end of the chip U1 is connected to the -12V1 power supply and the first end of the capacitor C80; the fourth end of the chip U1 is connected to the +12V1 power supply and the first end of the capacitor C45, the second end of the capacitor C80 and the second end of the capacitor C45 are both connected to the AGND1 port, the first end of the inductor L7B is connected to the second end of the inductor L2, the first end of the inductor L2 is connected to the first end of the chip U2, and the third end of the chip U2 is connected to the -12V1 power supply and the first end of the capacitor C79; the fourth end of the chip U1 is connected to the +12V1 power supply and the first end of the capacitor C21, and the second end of the capacitor C79 and the second end of the capacitor C421 are both connected to the AGND1 port.

[0006] Furthermore, the driving module includes a driving chip U3, a first end of the driving chip U3 is connected to a first end of a capacitor C72, and a second end of the capacitor C72 is connected to an AGND1 port; a second end of the driving chip U3 is connected to a first end of a capacitor C59, and a second end of the capacitor C59 is connected to an AGND1 port; a third end of the driving chip U3 is connected to a +5V_bigdsp power supply and a first end of a capacitor C17; a fourth end of the driving chip U3 is connected to an AGND1 port and a second end of the capacitor C17; a fifth end of the driving chip U3 is connected to a first end of a capacitor C58 , the second end of capacitor C58 is connected to the AGND1 port; the sixth end of the driver chip U3 is connected to the first end of the resistor R24 ​​and the first end of the capacitor C20, and the second end of the resistor R24 ​​and the second end of the capacitor C20 are both connected to the AGND1 port; the eighth end of the driver chip U3 is connected to the +5V_bigdsp power supply and the first end of the capacitor C69, and the second end of the capacitor C69 is connected to the AGND1 port; the ninth end of the driver chip U3 is connected to the second end of the capacitor C19 and the GND-T1-V3 port; the tenth end of the driver chip U3 is connected to the diode D7 The second end of the driver chip U3 is connected to the T1-V3 power supply and the first end of the diode D8, the first end of the diode D7 is connected to the T1-V3 power supply, the second end of the diode D8 is connected to the GND-T1-V3 port, the second end of the diode D7 is connected to the first end of the resistor R42 and the first end of the resistor R18, the second end of the resistor R42 is connected to the first end of the diode D62, and the second end of the resistor R18 is connected to the second end of the diode D62; the eleventh end of the driver chip U3 is connected to the T1-V3 power supply and the first end of the capacitor C19; the fourteenth end of the driver chip U3 is connected to the second end of the capacitor C13 and GND -T1-V2 port; the fifteenth end of the driving chip U3 is connected to the second end of the diode D3 and the first end of the diode D4, the first end of the diode D3 is connected to the T1-V2 power supply, the second end of the diode D4 is connected to the GND-T1-V2 port, the second end of the diode D3 is connected to the first end of the resistor R41 and the first end of the resistor R7, the second end of the resistor R41 is connected to the first end of the diode D61, and the second end of the resistor R7 is connected to the second end of the diode D61; the sixteenth end of the driving chip U3 is connected to the T1-V2 power supply and the first end of the capacitor C13.

[0007] Furthermore, the input DC voltage sampling circuit includes a chip U58, a chip U30A, and a chip U16. The first end of the chip U58 is connected to the +5V_amc1301 power supply, the first end of the capacitor C309 and the first end of the capacitor C121, and the second end of the capacitor C309 and the second end of the capacitor C121 are both connected to the AGND-amc1301 port; the second end of the chip U58 is connected to the first end of the capacitor C310, the second end of the resistor R307 and the second end of the resistor R420, and the first end of the resistor R307 and the first end of the resistor R420 are connected to the AGND-amc1301 port; the third end of the chip U58 is connected to the second end of the capacitor C310, the second end of the resistor R307 and the second end of the resistor R420 The second end of the resistor R421 and the second end of the resistor R311, the first end of the resistor R421 and the first end of the resistor R311 are all connected to the AGND-amc1301 port; the fourth end of the chip U58 is connected to the AGND-amc1301 port; the fifth end of the chip U58 is connected to the AGND1 port; the sixth end of the chip U58 is connected to the first end of the resistor R122; the seventh end of the chip U58 is connected to the first end of the resistor R233; the eighth end of the chip U58 is connected to the +3.3V_U48 power supply, the first end of the capacitor C124 and the first end of the capacitor C308, and the second end of the capacitor C124 and the second end of the capacitor C308 are both connected to the AGND1 port;

[0008] The first end of the chip U30A is connected to the second end of the resistor R32, the second end of the capacitor C79 and the first end of the resistor R49; the second end of the chip U30A is connected to the second end of the resistor R233, the first end of the resistor R31, the first end of the resistor R32 and the first end of the capacitor C79, and the second end of the resistor R31 is connected to the AGND1 port; the third end of the chip U30 is connected to the second end of the resistor R122, the first end of the resistor R26, the first end of the resistor R23 and the first end of the capacitor C75, and the second end of the resistor R26 is connected to the 3V+ power supply, the second end of the resistor R23 and the second end of the capacitor C75 are both connected to the AGND1 port; the fourth end of the chip U30 is connected to the +12V1 power supply and the first end of the capacitor C80, and the second end of the capacitor C80 is connected to the AGND1 port; the fifth end of the chip U30A is connected to the seventh end of the chip U30; the sixth end of the chip U30 is connected to the AGND1 port; the eighth end of the chip U30A is connected to the -12V1 power supply and the first end of the capacitor C74, and the second end of the capacitor C74 is connected to the AGND1 port;

[0009] The first end of the chip U16 is connected to the second end of the resistor R49, the first end of the resistor R68 and the first end of the capacitor C368; the second end of the chip U16 is connected to the 1.5V+ power supply and the first end of the capacitor C22; the third end of the chip U16 is connected to the +3.3V-U48 power supply and the first end of the capacitor C73, and the second end of the capacitor C73 is connected to the AGND1 port; the fourth end of the chip U16 is connected to the first end of the resistor R51, the second end of the resistor R68 and the second end of the capacitor C368; the fifth end of the chip U16 is connected to the first end of the resistor R47, the second end of the resistor R30 and the second end of the capacitor C366. end; the sixth end of the chip U16 is connected to the second end of the capacitor C22 and the AGND1 port; the seventh end of the chip U16 is connected to the +3.3V-U48 power supply; the eighth end of the chip U16 is connected to the first end of the resistor R42, the first end of the resistor R30 and the first end of the capacitor C366, and the second end of the resistor R42 is connected to the AGND1 port; the second end of the resistor R51 is connected to the first end of the capacitor C23, the second end of the capacitor C23 is connected to the AGND1 port, and the network label ADCINBC2 is placed; the second end of the resistor R47 is connected to the first end of the capacitor C21, and the second end of the capacitor C21 is connected to the AGND1 port.

[0010] Further, the output AC voltage sampling circuit includes a chip U46A and a chip U14, the first end of the chip U46A is connected to the first end of the resistor R27, the second end of the resistor R401 and the second end of the capacitor C352, and a node X is set; the second end of the chip U46A is connected to the second end of the resistor R286, the first end of the resistor R401 and the first end of the capacitor C352; the third end of the chip U46A is connected to the second end of the resistor R284, the first end of the resistor R402 and the first end of the capacitor C351, and the second end of the resistor R402 and the second end of the capacitor C351 are both connected to the AGND1 port; the fourth end of the chip U46A is connected to the -12V1 power supply and the first end of the capacitor C349, and the second end of the capacitor C349 is connected to the AGND1 port; the eighth end of the chip U46 is connected to the +12V1 power supply and the first end of the capacitor C353, and the second end of the capacitor C353 is connected to the AGND1 port;

[0011] The first end of the chip U14 is connected to the second end of the resistor R27, the first end of the resistor R24, the first end of the capacitor C365 and the third end of the Schottky diode D47, the first end of the Schottky diode D47 is connected to the AGND1 port, and the second end of the Schottky diode D47 is connected to the +3.3V-U48 power supply; the second end of the chip U14 is connected to the 1.5V+ power supply and the first end of the capacitor C6; the third end of the chip U14 is connected to the +3.3V-U48 power supply and the first end of the capacitor C81, and the second end of the capacitor C81 is connected to the AGND1 port; the fourth end of the chip U14 is connected to the first end of the resistor R28, the second end of the resistor R24 ​​and the second end of the capacitor C365; The fifth end of the chip U14 is connected to the first end of the resistor R25, the second end of the resistor R29 and the second end of the capacitor C364; the sixth end of the chip U14 is connected to the second end of the capacitor C6 and the AGND1 port; the seventh end of the chip U14 is connected to the +3.3V-U48 power supply; the eighth end of the chip U14 is connected to the first end of the resistor R22, the first end of the resistor R29 and the first end of the capacitor C364, and the second end of the resistor R22 is connected to the AGND1 port; the second end of the resistor R28 is connected to the first end of the capacitor C14, and the second end of the capacitor C14 is connected to the AGND1 port; the second end of the resistor R25 is connected to the first end of the capacitor C17, and the second end of the capacitor C17 is connected to the AGND1 port. .

[0012] Further, the inductor current sampling circuit includes a chip U46B and a chip U17A, the fifth end of the chip U46B is connected to the second end of the resistor R52, the second end of the resistor R214, the second end of the capacitor C395, the first end of the resistor R50 and the first end of the capacitor C90, and the second end of the resistor R50 and the second end of the capacitor C90 are both connected to the AGND1 port; the sixth end of the chip U46B is connected to the second end of the resistor R58, the second end of the resistor R55, the first end of the capacitor C395, the first end of the resistor R57 and the first end of the capacitor C94, the seventh end of the chip U46B is connected to the first end of the resistor R53, the second end of the resistor R57 and the second end of the capacitor C94, and a node X is set;

[0013] The first end of the chip U17 is connected to the second end of the resistor R53, the first end of the resistor R69 and the first end of the capacitor C369; the second end of the chip U17 is connected to the 1.5V+ power supply and the first end of the capacitor C76; the third end of the chip U17 is connected to the +3.3V-U48 power supply and the first end of the capacitor C78, ​​and the second end of the capacitor C78 is connected to the AGND1 port; the fourth end of the chip U17 is connected to the first end of the resistor R54, the second end of the resistor R69 and the second end of the capacitor C369; the fifth end of the chip U17 is connected to the first end of the resistor R48, the second end of the resistor R33 and the capacitor C76. The second end of capacitor C367; the sixth end of the chip U17 is connected to the second end of capacitor C76 and the AGND1 port; the seventh end of the chip U17 is connected to the +3.3V-U48 power supply; the eighth end of the chip U17 is connected to the first end of resistor R46, the first end of resistor R33 and the first end of capacitor C367, and the second end of resistor R46 is connected to the AGND1 port; the second end of resistor R54 is connected to the first end of capacitor C18, and the second end of capacitor C18 is connected to the AGND1 port; the second end of resistor R48 is connected to the first end of capacitor C19, and the second end of capacitor C19 is connected to the AGND1 port.

[0014] Further, the load current sampling circuit includes a chip U22, a chip U27 and a chip U23, the first end of the chip U22 is connected to the first end of the resistor R359, the second end of the resistor R400, the second end of the capacitor C341 and the second end of the capacitor C344, and a node X1 is set; the second end of the chip U22 is connected to the second end of the resistor R399, the first end of the capacitor C341 and the first end of the capacitor C199, and the second end of the capacitor C199 is connected to the first end of the capacitor C344; the third end of the chip U22 is connected to the AGND1 port; the fourth end of the chip U22 is connected to the first end of the capacitor C223, the first end of the capacitor C206, the first end of the capacitor C159 and the first end of the relay protector FB9, the second end of the capacitor C223 and the second end of the capacitor C206 are connected to the AGND1 port, and the second end of the relay protector FB9 is connected to the -12V1 power supply; the fifth end of the chip U22 is connected to the second end of the resistor R101, the first end of the resistor R83 and the capacitor C1 The first end of the chip U22 is connected to the first end of the resistor R350, the first end of the resistor R351 and the first end of the capacitor C136; the seventh end of the chip U22 is connected to the first end of the resistor R353, the second end of the resistor R351 and the second end of the capacitor C136, and a node X is set, the second end of the resistor R353 is connected to the first end of the capacitor C328, the first end of the capacitor C191, the first end of the resistor R399 and the first end of the resistor R400, the second end of the capacitor C328 and the second end of the capacitor C191 are connected to the AGND1 port; the eighth end of the chip U22 is connected to the first end of the capacitor C122, the first end of the capacitor C131, the second end of the capacitor C159 and the first end of the relay protection device FB14, the second end of the capacitor C122 and the second end of the capacitor C131 are connected to the AGND1 port, and the second end of the relay protection device FB14 is connected to the +12V1 power supply;

[0015] The first end of the chip U27 is connected to the second end of the resistor R360, the first end of the resistor R361 and the first end of the capacitor C106, and the first end of the resistor R360 is connected to the AGND1 port; the second end of the chip U27 is connected to the first end of the capacitor C93; the third end of the chip U27 is connected to the first end of the capacitor C105, the first end of the capacitor C96, the first end of the relay protection device FB8 and the seventh end of the chip U27, the second end of the capacitor C105 and the second end of the capacitor C96 are both connected to the AGND1 port, and the second end of the relay protection device FB8 is connected to the +5V-bigdsp-analog power supply; the fourth end of the chip U27 is connected to the first end of the resistor R92, the second end of the resistor R361 and the capacitor C93; The second end of capacitor C106; the fifth end of the chip U27 is connected to the first end of resistor R84, the second end of resistor R358 and the second end of capacitor C117; the sixth end of the chip U27 is connected to the second end of capacitor C93 and the AGND1 port; the eighth end of the chip U27 is connected to the second end of resistor R359, the first end of resistor R358 and the first end of capacitor C117; the second end of resistor R92 is connected to the first end of capacitor C91 and the third end of the chip U23, the second end of capacitor C91 is connected to the AGND1 port, and the network label IN+ is placed; the second end of resistor R84 is connected to the first end of capacitor C113 and the fourth end of the chip U23, and the second end of capacitor C113 is connected to the AGND1 port;

[0016] The first end of the chip U23 is connected to the 5V+ power supply and the first end of the capacitor C88, and the second end of the capacitor C88 is connected to the AGND1 port; the second end of the chip U23 is connected to the +2.5V power supply and the first end of the capacitor C363, and the second end of the capacitor C363 is connected to the AGND1 port; the fifth end of the chip U23 is connected to the AGND1 port; the ninth end of the chip U23 is connected to the tenth end of the chip U23, the +3.3V-bigdsp power supply and the first end of the capacitor C362, and the second end of the capacitor C362 is connected to the AGND1 port.

[0017] Furthermore, the DSP control module, the input DC voltage sampling module, the inductor current sampling module, the load current sampling module and the output AC voltage adopting module are also connected to an auxiliary power supply.

[0018] Furthermore, the auxiliary power supply includes ±12V auxiliary power supply, ±5V auxiliary power supply, +3.3V auxiliary power supply, +3V auxiliary power supply, +2.5V auxiliary power supply and +1.204V auxiliary power supply.

[0019] Furthermore, the wide-band, wide-voltage adjustable single-phase high-power inverter circuit based on SiC MOSFET has an output AC voltage range of 0-350V, an output voltage resolution of 0.01V, an output frequency range of 16Hz-2.4kHz, an output frequency resolution of 0.01Hz, an output AC voltage range of 0-350V, an output voltage resolution of 0.01V, an output frequency range of 16Hz-2.4kHz, an output frequency resolution of 0.01Hz, a dynamic response of 200μs, a voltage ripple less than 0.4V, and a harmonic analysis upper limit of 50Hz.

[0020] Compared with the prior art, the present invention has the following beneficial effects:

[0021] 1. The present invention is based on the wide-band, wide-voltage adjustable single-phase high-power inverter circuit of SiC MOSFET. The SiC MOSFET power switch tube has lower input capacitance and faster switching speed and is more suitable for high-frequency applications. It also has low conduction loss and low cost, and voltage control is relatively simple.

[0022] 2. The present invention is based on the wide-frequency, wide-voltage adjustable single-phase high-power inverter circuit of SiC MOSFET. Through system design, the circuit can output a sine wave signal with a wide voltage range of 0 to 350V in a wide frequency range of 16Hz to 2.4kHz. The sine wave signal has fast response, good steady state, high precision and high reliability. BRIEF DESCRIPTION OF THE DRAWINGS

[0023] The present invention is further described below in conjunction with the accompanying drawings and embodiments.

[0024] Figure 1 The framework diagram of a wide-band, wide-voltage adjustable single-phase high-power inverter circuit based on SiC MOSFET;

[0025] Figure 2 is a circuit diagram of a full-bridge inverter circuit;

[0026] Figure 3 This is the circuit diagram of the drive module;

[0027] Figure 4 This is the circuit diagram of the DC bus voltage sampling module;

[0028] Figure 5 It is the circuit diagram of the output AC voltage sampling module;

[0029] Figure 6 This is the circuit diagram of the inductor current sampling module;

[0030] Figure 7 This is the circuit diagram of the load current sampling module;

[0031] Figure 8 The circuit diagram of ±12V auxiliary power supply;

[0032] Fig. 9 This is the circuit diagram of ±5V auxiliary power supply;

[0033] Fig.10 This is the circuit diagram of ±5V auxiliary power supply;

[0034] Fig.11 This is the circuit diagram of +3.3V auxiliary power supply;

[0035] Fig.12 This is the circuit diagram of +3V auxiliary power supply;

[0036] Fig.13 The circuit diagram for the +2.5V auxiliary power supply;

[0037] Fig.14 Circuit diagram for +1.204V auxiliary power supply. DETAILED DESCRIPTION

[0038] The present invention will now be described in further detail with reference to the accompanying drawings. These drawings are simplified schematic diagrams, which only illustrate the basic structure of the present invention in a schematic manner, and therefore only show the components related to the present invention.

[0039] In the description of the present invention, it should be understood that the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside", "clockwise", "counterclockwise", "axial", "radial", "circumferential" and the like indicate positions or positional relationships based on the positions or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation on the present invention. In addition, features defined as "first" and "second" may explicitly or implicitly include one or more of the features. In the description of the present invention, unless otherwise specified, "multiple" means two or more.

[0040] In the description of the present invention, it should be noted that, unless otherwise clearly specified and limited, the terms "installed", "connected", and "connected" should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection, or it can be indirectly connected through an intermediate medium, or it can be the internal communication of two components. For ordinary technicians in this field, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.

[0041] like Figure 1 As shown, a wide-band, wide-voltage adjustable single-phase high-power inverter circuit based on SiC MOSFET includes an input DC source, a full-bridge inverter circuit, an output filter circuit and an output AC source electrically connected in sequence, the input DC source is also electrically connected to an input DC voltage sampling module, the input DC source is electrically connected to an inductor current sampling module, the output AC source is electrically connected to a load current sampling module and an output AC voltage adopting module, the input DC voltage sampling module, the inductor current sampling module, the load current sampling module and the output AC voltage sampling module are electrically connected to a DSP control module, and the DSP control module is electrically connected to the full-bridge inverter circuit through a drive module. The input DC voltage sampling module, the output AC voltage sampling module, the inductor current sampling module and the load current sampling module constitute an A / D sampling module. The full-bridge inverter circuit, the auxiliary power supply and the input DC voltage sampling module are connected by the input DC source, the DSP control module is connected by the A / D sampling module and the auxiliary power supply, and the drive circuit module is connected by the DSP control module, and finally transmitted to the full-bridge inverter circuit to form a closed loop; the auxiliary power supply supplies power to the A / D sampling module and the DSP control module.

[0042] Full-bridge inverter circuit design:

[0043] The switching frequency of the power switch tube is 100kHz and the output power is 5kW. Compared with IGBT, SiC MOSFET is more suitable for high-frequency applications due to its lower input capacitance and faster switching speed. It also has low conduction loss and low cost, and voltage control is relatively simple. Therefore, the present invention selects SiC MOSFET power switch tube.

[0044] The specific model of the switch tube is selected mainly based on the corresponding allowable voltage stress and current stress. The input voltage of the present invention is the DC voltage U output by the intermediate stage. dc It is about 630V, and its voltage fluctuation is 5%. Since the rated voltage of SiC MOSFET should be greater than the maximum voltage in the actual circuit, we need to reserve 20% to 50% voltage safety margin for SiC MOSFET. Then according to formula (1):

[0045]

[0046] The voltage stress of SiC MOSFET can be calculated to be 992.25V.

[0047] According to the circuit analysis, when the circuit works in the positive half cycle, the current in the SiC MOSFET power switch tube flows from the drain to the source. In the negative half cycle, the SiC MOSFET switch is turned off, the freewheeling diode connected in parallel is enabled, and the current flows from the positive electrode to the cathode. Therefore, the current i in the SiC MOSFET switch tube is s is the inductor current iL According to formula (2):

[0048]

[0049] The effective current value i flowing through the inductor can be obtained L It is 40.37A.

[0050] In addition, according to formula (3):

[0051] i C =U O ×2πf s C

[0052] The effective value i of the filter capacitor current in the output filter circuit can be calculated C is 39.58A. According to formula (4)

[0053]

[0054] The effective value of the output current of the inverter power system can be calculated as o It is 7.94A.

[0055] Since the rated current of SiC MOSFET should be much larger than the maximum current in the actual circuit, a current safety margin of 1 to 2 times is reserved for SiC MOSFET. Then according to formula (5)

[0056]

[0057] It can be calculated that the current stress of the SiC MOSFET in the present invention is 80.74A.

[0058] As one of the third-generation semiconductor materials, SiC has lower impedance than Si tubes, which can reduce the size of this design; it has a higher operating frequency, which can improve work efficiency; it has higher temperature resistance, which can simplify its cooling system.

[0059] Therefore, after comprehensive consideration, the present invention finally selects SiC MOSFET of ON Semiconductor Model NTHL022N120M3S as the power switch element, and its specification is 1200V / 89A. In the circuit of the present invention, the gate drive of the silicon carbide tube is 21V. Since the selected silicon carbide tube is optimized in fast switching applications, it performs reliably under negative gate voltage drive and can effectively suppress gate V pole spikes.

[0060] Output filter circuit design:

[0061] When the inverter circuit generates AC output, it may introduce harmonics and high-frequency noise due to the switching process of the switching device, which may cause interference to other electronic devices in the system. Therefore, it is necessary to design a low-pass filter to effectively filter out or reduce harmonics and high-frequency noise, and ensure that the output voltage waveform is closer to a pure sine wave while maintaining the electromagnetic compatibility of the system. In addition, under some load conditions, there may be harmonic problems in current or voltage. The output filter can adjust the frequency response of the circuit to better adapt it to different loads.

[0062] The output filter inductance value under single-stage frequency-doubled SPWM modulation is generally determined by the maximum ripple of the inductor current, which is taken as 15% of the peak value of the output current under full load. The output power of the inverter of the present invention is 5KW, the output voltage is 350V, and the frequency is 50Hz. According to formula (6):

[0063]

[0064] Where ΔI L is the ripple current, P o is the output power, U o is the output voltage, it can be calculated that the maximum inductor current ripple in the output filter module of the present invention is 3.03A.

[0065] In the unipolar double frequency SPWM modulation mode, according to formula (7):

[0066]

[0067] The cutoff frequency of the LC filter is set to one tenth of the switching frequency of the switch tube to ensure that the ripple voltage is effectively filtered out to prevent excessive attenuation or delay to the system.

[0068] Formula (8):

[0069]

[0070] Obviously, at that time The inductor current ripple is maximum.

[0071] According to the actual circuit and formula (9) The final inductance is L=3.3mH.

[0072] In the actual circuit, due to the non-ideal characteristics of each device, the reference sine is also a non-standard sine signal, and the dead zone affects the output waveform, so the output waveform will contain low-order harmonics. Substitute the calculated inductance value into formula (7) and formula (10):

[0073]

[0074] In combination with the actual circuit, the present invention appropriately increases the capacitance value to effectively suppress low-order harmonics, that is, C=0.1μF.

[0075] From the above analysis, the main circuit diagram of the single-phase full-bridge inverter can be drawn, as shown in Figure 2 As shown, the first end of chip Q1 (NTHL022N120M3S) is connected to the second end of resistor R28 and the first end of resistor R5, and the first end of R28 is placed with a network label T2-V1-Driver; the second end of chip Q1 is connected to VO+ power supply and the second end of chip Q15; the third end of chip Q1 is connected to the second end of resistor R5, the second end of chip Q5 and the second end of inductor L6A, and a wire is separately led out and placed with a network label T2-V1-3.3V. The first end of chip Q5 (NTHL022N120M3S) is connected to the second end of resistor R32 and the first end of resistor R37, and the first end of R32 is placed with a network label T2-V2-Driver; the third end of chip Q5 is connected to the second end of resistor R37, VO- power supply and the third end of the chip Q16, and a wire is separately led out and placed with a network label T2-V2-3.3V. The first end of chip Q15 (NTHL022N120M3S) is connected to the second end of resistor R35 and the first end of resistor R4, and the first end of R35 is placed with network label T1-V1-Driver; the third end of chip Q15 is connected to the second end of resistor R4, the second end of chip Q16 and the second end of inductor L7B, and a wire is separately led out and placed with network label T1-V1-3.3V. The first end of chip Q16 (NTHL022N120M3S) is connected to the second end of resistor R42 and the first end of resistor R29, and the first end of R42 is placed with network label T1-V4-Driver; the third end of chip Q16 is connected to the second end of resistor R29, VO-power supply and the third end of chip Q5, and a wire is separately led out and placed with network label T1-V4-3.3V.

[0076] The first end of chip U1 (LAH50-P) is connected to the first end of inductor L1, and the second end of inductor L1 is connected to the first end of inductor L6A; the second end of the chip U1 leads to a wire with a network label ACI; the third end of chip U1 is connected to -12V1 power supply and the first end of capacitor C80; the fourth end of chip U1 is connected to +12V1 power supply and the first end of capacitor C45, and the second end of capacitor C80 and the second end of capacitor C45 are both connected to AGND1 port; the fifth end of chip U1 leads to a wire with a network label J5_23 (connected to port 23 of power strip J5). The first end of the inductor L3A is connected to the first end of the capacitor CY3, the second end of the capacitor CY3 is connected to the EGND port, and a network label ACI is placed; the second end of the inductor L3A is connected to the first end of the capacitor CY4, the first end of the inductor L4A and the first end of the capacitor C23, the second end of the capacitor CY4 is connected to the EGND port; the second end of the inductor L4A is placed with a network label OUT-L; the first end of the inductor L3B is connected to the first end of the capacitor CY1 and the third end of the relay protection R1, the second end of the capacitor CY1 is connected to the EGND port; The second end of L3A is connected to the first end of capacitor CY2, the first end of inductor L4B and the second end of capacitor C23, and the second end of capacitor CY2 is connected to the EGND port; the second end of inductor L4B is placed with network label OUT-N; the first end of relay protector R1 leads out a wire and places network label J5_18 (connected to the 18th port of power strip J5); the second end of relay protector R1 is connected to the AGND1 port; the fourth end of relay protector R1 leads out a wire and places network label J5_17 (connected to the 17th port of power strip J5).

[0077] The first end of chip U2 (LAH50-P) is connected to the AGND1 port; the second end of chip U2 is connected to the first end of inductor L2, and the second end of inductor L2 is connected to the first end of inductor L7B; the third end of chip U2 is connected to the -12V1 power supply and the first end of capacitor C79; the fourth end of chip U2 is connected to the +12V1 power supply and the first end of capacitor C21, and the second end of capacitor C79 and the second end of capacitor C21 are both connected to the AGND1 port; the fifth end of chip U2 leads out the wire to place the network label J5_20 (connected to the 20th port of power strip J5).

[0078] Drive module design: Since the level range of the DSP output signal is 0V~3.3V, and the SiCMOSFET drive voltage range selected in this solution is -10V~+22V, the PWM signal in the DSP cannot directly drive the SiC MOSFET power switch tube. It is necessary to design a drive circuit to provide appropriate levels and pulse widths to ensure that the SiC MOSFET switch tube can be turned on and off correctly. In addition, an effective drive circuit can optimize the operation of the SiC MOSFET and minimize the transition time during the switching process, thereby reducing power consumption and improving system performance. The drive circuit usually includes an isolation circuit to ensure electrical isolation between the input and output, provide overvoltage and overcurrent protection, and prevent overload or damage to the controlled device.

[0079] The main driver chip used in the drive circuit is TI's UCC21521, which is an isolated dual-channel gate driver with an enable function. It can charge and discharge gate charges very quickly, achieve high-speed switching operations, and reduce switching losses of power devices. EN enable can control whether the drive circuit can work normally.

[0080] The circuit design of the drive module is as follows Figure 3As shown, the first end of the driver chip U3 (UCC21521) is connected to the first end of the capacitor C72 and leads out a wire to place a network label U25_162_out_front, and the second end of the capacitor C72 is connected to the AGND1 port; the second end of the driver chip U3 is connected to the first end of the capacitor C59 and leads out a wire to place a network label U25_162_out, and the second end of the capacitor C59 is connected to the AGND1 port; the third end of the driver chip U3 is connected to the +5V_bigdsp power supply and the first end of the capacitor C17; the fourth end of the driver chip U3 is connected to the AGND1 port and the second end of the capacitor C17; the fifth end of the driver chip U3 is connected to the first end of the capacitor C58 and leads out a wire to place a network label U25_6_out, and the second end of the capacitor C58 is connected to the AGND1 port; the sixth end of the driver chip U3 is connected to the first end of the resistor R24 ​​and the first end of the capacitor C20, and the second end of the resistor R24 ​​and the second end of the capacitor C20 are both connected to the AGND1 port; the seventh end of the driver chip U3 is suspended; The eighth end of the driver chip U3 is connected to the +5V_bigdsp power supply and the first end of the capacitor C69, and the second end of the capacitor C69 is connected to the AGND1 port; the ninth end of the driver chip U3 is connected to the second end of the capacitor C19 and the GND-T1-V3 port; the tenth end of the driver chip U3 is connected to the second end of the diode D7 and the first end of the diode D8, the first end of the diode D7 is connected to the T1-V3 power supply, and the second end of the diode D8 is connected to the GND-T1-V3 port; the eleventh end of the driver chip U3 is connected to the T1-V3 power supply and the first end of the capacitor C19; the twelfth and thirteenth ends of the driver chip U3 are suspended; the fourteenth end of the driver chip U3 is connected to the second end of the capacitor C13 and the GND-T1-V2 port; the fifteenth end of the driver chip U3 is connected to the second end of the diode D3 and the first end of the diode D4, the first end of the diode D3 is connected to the T1-V2 power supply, and the second end of the diode D4 is connected to the GND-T1-V2 port; the sixteenth end of the driver chip U3 is connected to the T1-V2 power supply and the first end of the capacitor C13. The first end of resistor R41 is connected to the second end of diode D3 and the first end of resistor R7; the second end of resistor R41 is connected to the first end of diode D61; the second end of resistor R7 is connected to the second end of diode D61, and a network label T1-V2-Driver is set. The first end of resistor R42 is connected to the second end of diode D7 and the first end of resistor R18; the second end of resistor R42 is connected to the first end of diode D62; the second end of resistor R18 is connected to the second end of diode D62, and a network label T1-V3-Driver is set.The first end of resistor R4 is connected to the T1-V2 power supply and the first end of capacitor C14; the second end of resistor R4 is connected to the first end of diode D22, the second end of capacitor C14 and the first end of capacitor C16, and the network label T1-V2-3.3V is set; the second end of diode D22 is connected to the second end of capacitor C16 and the GND-T1-V2 port; the second end of capacitor C14 is connected to the first end of capacitor C16. The first end of resistor R5 is connected to the T1-V3 power supply and the first end of capacitor C21; the second end of resistor R5 is connected to the first end of diode D27, the second end of capacitor C21 and the first end of capacitor C23, and the network label T1-V3-3.3V is set; the second end of diode D27 is connected to the second end of capacitor C23 and the GND-T1-V3 port; the second end of capacitor C21 is connected to the first end of capacitor C23.

[0081] UCC21521 contains two completely isolated drive channels, each channel is used to control a power switch device, and the primary power supply voltage of the driver chip is +5V. The PWM signal output by the DSP first passes through a small input RC filter to filter out non-ideal oscillations. Such a filter should use a 0-100Ω resistor and a 10-100pF capacitor. In the present invention, the resistor R is selected 16 / R 29 / R 116 The resistance is 49.9Ω, the capacitance C 58 / C 59 The capacitance is 47pF.

[0082] When the low-side transistor is turned on, the DSP output signal is input from the INA and INB pins, and after being processed inside the chip, it is transmitted from the output stage OUTA and OUTB to the SiC MOSFET. Two parallel diodes are set at the output end to form a clamping circuit. GS When the output value is greater than 21.7V or less than -19.3V, the output signal will be pulled up to the power supply or connected to the ground through the diode to protect the SiC MOSFET tube from being burned, and prevent excessive or too small signals from being damaged or affecting the normal operation of the system. When selecting a clamping diode, a SiC Schottky diode with high voltage, short response time, low forward voltage drop and conduction, and small switching loss should be selected to minimize the loss caused by reverse recovery and the corresponding ground noise rebound. Therefore, D3 / D4 / D7 / D8 in the present invention uses a 40V SiC MOSFET tube STPS1L40ZF.

[0083] The capacitor C between VDDA and VSSA 13 / C 19It is a bootstrap capacitor that can maintain a stable gate drive voltage for SiC MOSFET and realize the internal undervoltage lockout protection function. Considering the capacitance offset caused by DC bias voltage and the power stage skipping pulse caused by load transient, the present invention will leave a safety margin when selecting capacitors and place them close to the VDDA and VSSA pins. The capacitor model selected by the present invention is 50V 1μF. R7 is an external on-resistance. A stable low-impedance path can ensure the minimization of power loss and voltage drop in the on state. Therefore, the present invention selects the lowest possible external on-resistance R7 / R 18 , its resistance is 4.7Ω.

[0084] R 41 The external turn-off resistor R is used to provide a resistive load to release the charge in the body diode when the diode is turned off, ensuring that the diode can be turned off quickly and effectively and preventing oscillation and delay when the body diode is turned on. 41 / R 42 To avoid body diode conduction or excessive losses, its resistance is 3.3Ω.

[0085] UCC21521 dead time t DT Defined as the time interval from 90% of the falling edge of one channel to the rising edge of another channel. Place a 500Ω~500kΩ resistor R between DT and GND. DT In the present invention, R is selected DT The resistance is 39kΩ.

[0086] Dead time t DT It depends on the external gate drive switch resistance, DC-Link switch voltage / current and the input capacitance of the load transistor, and has nothing to do with the load conditions. According to formula (11):

[0087] t DT (ns)=10×R DT (kΩ),

[0088] The dead time t of UCC21521 in the present invention can be calculated as DT It is 390ns.

[0089] In addition, the dead time setting of UCC21521 is determined by the DT pin configuration, which cannot be fine-tuned according to the actual system conditions. Therefore, a ceramic capacitor and R DT parallel connection to obtain better noise immunity. Therefore, the ceramic capacitor C 20 The capacitance value is 33nF.

[0090] A separate clamping circuit is designed to meet the common ground problem of the secondary power supply of the driving circuit, ensuring that the electrical reference points of the driving circuit and the main circuit are unified, avoiding errors or interference caused by inconsistent potentials. For example, the secondary power supply of VDDA is T1-V2, and the output voltage of the driving circuit is T1-V2-Driver, and its corresponding ground is GND-T1-V2. On the other hand, the gate of the SiC MOSFET tube Q7 in the main circuit receives the voltage T1-V2-Driver output by the driving circuit, but the source is pulled down to a negative high voltage, and the common ground is not achieved. Therefore, a clamping circuit is designed at the source to ensure that the voltage of the source remains stable. In the present invention, the source voltage is clamped at 3.3V, thereby ensuring the stability of the operating point of the entire circuit.

[0091] The secondary side source voltage T1-V2 is 21V. The driver circuit can supply the gate of the SiC MOSFET with a normal working voltage of 17.7V. This clamping circuit can also monitor and limit the source voltage to prevent its value from exceeding the safe range and damaging the SiC MOSFET or connecting other circuit parts, thereby protecting the circuit from damage.

[0092] The full-bridge inverter circuit mainly samples the DC bus voltage, inverter output voltage, output current and inductor current. Only after completing the corresponding level conversion and electrical isolation from high-voltage strong electric signals to low-voltage weak electric signals can they be transmitted to the DSP chip for control, so that the voltage and current dual-loop control system forms a closed loop, and then adjusts the voltage / current at the output end.

[0093] Input DC voltage sampling module: The circuit of DC bus voltage sampling module is as follows Figure 4As shown, the first end of the chip U58 (AMC1301) is connected to the +5V_amc1301 power supply, the first end of the capacitor C309 and the first end of the capacitor C121, and the second end of the capacitor C309 and the second end of the capacitor C121 are both connected to the AGND-amc1301 port; the second end of the chip U58 is connected to the first end of the capacitor C310, the second end of the resistor R307, and the second end of the resistor R420, and the wire is led out to place the network label J4_32 (connected to the 32nd end of the power strip J4), the first end of the resistor R307 and the first end of the resistor R420 are both placed with the network label J4_31 (connected to the 31st end of the power strip J4) and the AGND-amc1301 port; the third end of the chip U58 is connected to the second end of the capacitor C310, the second end of the resistor R421 The first end of the chip U58 and the second end of the resistor R311, the first end of the resistor R421 and the first end of the resistor R311 are both placed with the network label J4_31 (connected to the 31st end of the socket J4) and the AGND-amc1301 port; the fourth end of the chip U58 is connected to the AGND-amc1301 port; the fifth end of the chip U58 is connected to the AGND1 port; the sixth end of the chip U58 is connected to the first end of the resistor R122, and the network label VOUTP is placed; the seventh end of the chip U58 is connected to the first end of the resistor R233, and the network label VOUTN is placed; the eighth end of the chip U58 is connected to the +3.3V_U48 power supply, the first end of the capacitor C124 and the first end of the capacitor C308, and the second end of the capacitor C124 and the second end of the capacitor C308 are both connected to the AGND1 port.

[0094] The first end of the chip U30A (AD8672A) is connected to the second end of the resistor R32, the second end of the capacitor C79 and the first end of the resistor R49; the second end of the chip U30A is connected to the second end of the resistor R233, the first end of the resistor R31, the first end of the resistor R32 and the first end of the capacitor C79, and the second end of the resistor R31 is connected to the AGND1 port; the third end of the chip U30A is connected to the second end of the resistor R122, the first end of the resistor R26, the first end of the resistor R23 and the first end of the capacitor C75, and the resistor R26 The second end of the chip U30A is connected to the 3V+ power supply, the second end of the resistor R23 and the second end of the capacitor C75 are both connected to the AGND1 port; the fourth end of the chip U30A is connected to the +12V1 power supply and the first end of the capacitor C80, and the second end of the capacitor C80 is connected to the AGND1 port; the fifth end of the chip U30A is connected to the seventh end of the chip U30A; the sixth end of the chip U30A is connected to the AGND1 port; the eighth end of the chip U30 is connected to the -12V1 power supply and the first end of the capacitor C74, and the second end of the capacitor C74 is connected to the AGND1 port.

[0095] The first end of chip U16 (THS4531D) is connected to the second end of resistor R49, the first end of resistor R68 and the first end of capacitor C368; the second end of chip U16 is connected to 1.5V+ power supply and the first end of capacitor C22; the third end of chip U16 is connected to +3.3V-U48 power supply and the first end of capacitor C73, and the second end of capacitor C73 is connected to AGND1 port; the fourth end of chip U16 is connected to the first end of resistor R51, the second end of resistor R68 and the second end of capacitor C368; the fifth end of chip U16 is connected to the first end of resistor R47, the second end of resistor R30 and the second end of capacitor C366; the chip U The sixth end of chip U16 is connected to the second end of capacitor C22 and the AGND1 port; the seventh end of chip U16 is connected to the +3.3V-U48 power supply; the eighth end of chip U16 is connected to the first end of resistor R42, the first end of resistor R30 and the first end of capacitor C366, and the second end of resistor R42 is connected to the AGND1 port; the second end of resistor R51 is connected to the first end of capacitor C23, the second end of capacitor C23 is connected to the AGND1 port, and the network label ADCINBC2 is placed; the second end of resistor R47 is connected to the first end of capacitor C21, the second end of capacitor C21 is connected to the AGND1 port, and the network label ADCINBC3 is placed.

[0096] Since the output of the front stage of the present invention is 650V high-voltage DC, in order to prevent the electrical noise or interference of the high-voltage DC circuit from affecting the medium and low voltage AC circuits, the present invention connects an isolation amplifier in the DC bus voltage sampling module to achieve electrical isolation. The DC bus voltage is first attenuated by five 270k resistor elements and then sent to the isolation amplifier AMC1301 as a high-end analog input signal. After digitization, the data is transmitted to the low end through the isolation barrier. The output differential signal is proportional to the input signal after reconstruction. A differential filter (R 307 / R 420 / R 421 / R 311 / C 311 ) to improve the signal-to-noise performance of the signal path.

[0097] For AMC1301, according to formula (12):

[0098]

[0099] The calculated input voltage is 0.00033398V.

[0100] The fixed gain A of the AMC1301 vd is 8.2, according to formula (13):

[0101]

[0102] The gain error E can be calculated G (%) is 0.0348, so the total gain A of AMC1301 v It is 7.914.

[0103] Therefore, according to formula (14):

[0104] V out =A v ·V IN DC_OUT

[0105] The voltage V after the 630V DC input voltage DC_OUT is amplified by AMC1301 is calculated. out is 1.65V.

[0106] The differential signal output by the AMC1301 is filtered out through a buffer isolation circuit to remove high-frequency noise and then transmitted to the high-precision amplifier AD8672A. In this process, the signal can be further amplified and the noise and distortion in the signal can be minimized, thereby outputting an accurate, complete and stable single-ended output signal.

[0107] Assume the output of AD7682A is X, then according to formula (15):

[0108] When VOUTN=0:

[0109]

[0110] and formula (16):

[0111] When VOUTP=0:

[0112]

[0113] Using the superposition theorem, we can get the output X of the AD8672A amplifier = 3.8V.

[0114] The accurately amplified single-ended signal is then transmitted to the fully differential amplifier THS4531ID. This chip can amplify the differential signal between the two input terminals without being affected by the common-mode signal. Because of its wide bandwidth, it can process high-frequency signals and respond quickly and timely.

[0115] According to formula (17):

[0116]

[0117] and formula (18):

[0118]

[0119] It can be calculated that the output voltages of THS4531ID are 0.55V and 2.45V respectively.

[0120] The circuit of the output AC voltage sampling module is as follows Figure 5 As shown, the first end of the chip U46A (AD8672A) is connected to the first end of the resistor R27, the second end of the resistor R401 and the second end of the capacitor C352, and a node X is set; the second end of the chip U46A is connected to the second end of the resistor R286, the first end of the resistor R401 and the first end of the capacitor C352, and the first end of the resistor R286 is placed with a network label J4_1 (connected to the first end of the power strip J4); the third end of the chip U46A is connected to the second end of the resistor R284, the first end of the resistor R402 and the first end of the capacitor C352. The first end of capacitor C351 and the first end of resistor R284 are placed with network label J4_2 (connected to the second end of socket J4), the second end of resistor R402 and the second end of capacitor C351 are both connected to the AGND1 port; the fourth end of chip U46A is connected to the -12V1 power supply and the first end of capacitor C349, and the second end of capacitor C349 is connected to the AGND1 port; the eighth end of chip U46A is connected to the +12V1 power supply and the first end of capacitor C353, and the second end of capacitor C353 is connected to the AGND1 port.

[0121] The first end of chip U14 (THS4531D) is connected to the second end of resistor R27, the first end of resistor R24, the first end of capacitor C365 and the third end of Schottky diode D47, the first end of Schottky diode D47 is connected to AGND1 port, and the second end of Schottky diode D47 is connected to +3.3V-U48 power supply; the second end of chip U14 is connected to 1.5V+ power supply and the first end of capacitor C6; the third end of chip U14 is connected to +3.3V-U48 power supply and the first end of capacitor C81, and the second end of capacitor C81 is connected to AGND1 port; the fourth end of chip U14 is connected to the first end of resistor R28, the second end of resistor R24 ​​and the second end of capacitor C365; the fifth end of chip U14 is connected to The first end of resistor R25, the second end of resistor R29 and the second end of capacitor C364; the sixth end of chip U14 is connected to the second end of capacitor C6 and the AGND1 port; the seventh end of chip U14 is connected to the +3.3V-U48 power supply; the eighth end of chip U14 is connected to the first end of resistor R22, the first end of resistor R29 and the first end of capacitor C364, and the second end of resistor R22 is connected to the AGND1 port; the second end of resistor R28 is connected to the first end of capacitor C14, the second end of capacitor C14 is connected to the AGND1 port, and the network label ADCINA2 is placed; the second end of resistor R25 is connected to the first end of capacitor C17, the second end of capacitor C17 is connected to the AGND1 port, and the network label ADCINA3 is placed.

[0122] Similar to the input DC voltage sampling module, the signal still passes through the high-precision amplifier AD8672A to expand the dynamic range of the signal, while maintaining the accuracy of the larger amplitude signal, it can more effectively capture and amplify the smaller amplitude signal. According to formula (19):

[0123]

[0124] The circuit output X after amplification by AD8672A can be calculated.

[0125] It is then transmitted to the fully differential amplifier THS4531ID for precision amplification. During the signal transmission process, the matching error between the two is smaller, providing more flexible signal processing capabilities, that is, maintaining signal accuracy and stability while improving versatility. The output voltage calculation refers to formula (17) and formula (18).

[0126] The circuit of the inductor current sampling module is as follows: Figure 6 As shown, the fifth end of the chip U46B (AD8672A) is connected to the second end of the resistor R52, the second end of the resistor R214, the second end of the capacitor C395, the first end of the resistor R50 and the first end of the capacitor C90, the first end of the resistor R52 is placed with a network label J4_24 (connected to the 24th end of the power strip J4), the first end of the resistor R214 is placed with a network label J4_21 (connected to the 21st end of the power strip J4), and the second end of the resistor R50 and the second end of the capacitor C90 are both connected to the AGND1 port; the chip U The sixth end of chip U46B is connected to the second end of resistor R58, the second end of resistor R55, the first end of capacitor C395, the first end of resistor R57 and the first end of capacitor C94. The first end of resistor R58 is placed with network label J4_20 (connected to the 20th end of power strip J4), and the first end of resistor R55 is placed with network label J4_23 (connected to the 23rd end of power strip J4). The seventh end of chip U46B is connected to the first end of resistor R53, the second end of resistor R57 and the second end of capacitor C94, and node X is set.

[0127] The first end of chip U17 (THS4531D) is connected to the second end of resistor R53, the first end of resistor R69 and the first end of capacitor C369; the second end of chip U17 is connected to 1.5V+ power supply and the first end of capacitor C76; the third end of chip U17 is connected to +3.3V-U48 power supply and the first end of capacitor C78, ​​and the second end of capacitor C78 is connected to AGND1 port; the fourth end of chip U17 is connected to the first end of resistor R54, the second end of resistor R69 and the second end of capacitor C369; the fifth end of chip U17 is connected to the first end of resistor R48, the second end of resistor R33 and the second end of capacitor C367. The sixth end of U17 is connected to the second end of capacitor C76 and the AGND1 port; the seventh end of chip U17 is connected to the +3.3V-U48 power supply; the eighth end of chip U17 is connected to the first end of resistor R46, the first end of resistor R33 and the first end of capacitor C367, and the second end of resistor R46 is connected to the AGND1 port; the second end of resistor R54 is connected to the first end of capacitor C18, the second end of capacitor C18 is connected to the AGND1 port, and the network label ADCINB2 is placed; the second end of resistor R48 is connected to the first end of capacitor C19, the second end of capacitor C19 is connected to the AGND1 port, and the network label ADCINB3 is placed.

[0128] The high and low-side currents of the main circuit flow into the inductor current sampling module, where V 20 For low-side current input, V 23 It is the high-side current input terminal, V 21 For low-side current grounding, V 24 It is the high-side current grounding terminal. According to formula (20):

[0129]

[0130] It can be calculated that after being amplified by AD8672A, the circuit output is X.

[0131] The current transformer used in the present invention is LAH-50P, whose transformation ratio is 1:2000, and three 100K resistors are added in parallel at the input ends of the high and low ends and the ground for protection. At this time, according to formula (21):

[0132]

[0133] The output X of the AD8672A chip of the present invention can be calculated.

[0134] It is then transmitted to the fully differential amplifier THS4531ID for precision amplification. The inductor current module detection output calculation of the present invention refers to formula (17) and formula (18).

[0135] On this basis, we also designed a high-bandwidth product differential amplifier with dual input and rail-to-rail output, the LT6203IMS8 chip, which can quickly respond to high-frequency signals that need to be processed and still provide high gain in the high-frequency range. At the same time, this chip contains overload protection and short-circuit protection functions, which can protect the amplifier from external overvoltage and overcurrent damage, and to a certain extent improve the stability and reliability of the system.

[0136] The circuit of the load current sampling module is as follows Figure 7 As shown, the first end of the chip U22 (AD8672A) is connected to the first end of the resistor R359, the second end of the resistor R400, the second end of the capacitor C341 and the second end of the capacitor C344, and a node X1 is set; the second end of the chip U22 is connected to the second end of the resistor R399, the first end of the capacitor C341 and the first end of the capacitor C199, and the second end of the capacitor C199 is connected to the first end of the capacitor C344; the third end of the chip U22 is connected to the AGND1 port; the fourth end of the chip U22 is connected to the capacitor C22 3, the first end of capacitor C206, the first end of capacitor C159 and the first end of relay protection FB9, the second end of capacitor C223 and the second end of capacitor C206 are connected to AGND1 port, and the second end of relay protection FB9 is connected to -12V1 power supply; the fifth end of the chip U22 is connected to the second end of resistor R101, the first end of resistor R83 and the first end of capacitor C116, the first end of resistor R101 is placed with network label J4_18 (connected to the 18th end of power strip J4), resistor R83 The second end of the chip U22 and the second end of the capacitor C116 are connected to the AGND1 port; the sixth end of the chip U22 is connected to the second end of the resistor R350, the first end of the resistor R351 and the first end of the capacitor C136, and the first end of the resistor R350 is placed with the network label J4_17 (connected to the 17th end of the power strip J4); the seventh end of the chip U22 is connected to the first end of the resistor R353, the second end of the resistor R351 and the second end of the capacitor C136, and a node X is set, and the second end of the resistor R353 is connected to the capacitor C328 The first end, the first end of capacitor C191, the first end of resistor R399 and the first end of resistor R400, the second end of capacitor C328 and the second end of capacitor C191 are all connected to the AGND1 port; the eighth end of chip U22 is connected to the first end of capacitor C122, the first end of capacitor C131, the second end of capacitor C159 and the first end of relay protection device FB14, the second end of capacitor C122 and the second end of capacitor C131 are connected to the AGND1 port, and the second end of relay protection device FB14 is connected to the +12V1 power supply.

[0137] The first end of chip U27 (THS4531D) is connected to the second end of resistor R360, the first end of resistor R361 and the first end of capacitor C106, the first end of resistor R360 is connected to AGND1 port, the second end of chip U27 is connected to the first end of capacitor C93, the third end of chip U27 is connected to the first end of capacitor C105, the first end of capacitor C96, the first end of relay protection FB8 and the seventh end of chip U27, the second end of capacitor C105 and the second end of capacitor C96 are both connected to AGND1 port, and the second end of relay protection FB8 is connected to +5V-bigdsp-analog power supply; the fourth end of chip U27 is connected to the first end of resistor R92, the second end of resistor R361 and capacitor The second end of C106; the fifth end of chip U27 is connected to the first end of resistor R84, the second end of resistor R358 and the second end of capacitor C117; the sixth end of chip U27 is connected to the second end of capacitor C93 and the AGND1 port; the eighth end of chip U27 is connected to the second end of resistor R359, the first end of resistor R358 and the first end of capacitor C117; the second end of resistor R92 is connected to the first end of capacitor C91 and the third end of the chip U23, the second end of capacitor C91 is connected to the AGND1 port, and the network label IN+ is placed; the second end of resistor R84 is connected to the first end of capacitor C113 and the fourth end of chip U23, the second end of capacitor C113 is connected to the AGND1 port, and the network label IN- is placed.

[0138] The first end of chip U23 (AD7989) is connected to the 5V+ power supply and the first end of capacitor C88, and the second end of capacitor C88 is connected to the AGND1 port; the second end of chip U23 is connected to the +2.5V power supply and the first end of capacitor C363, and the second end of capacitor C363 is connected to the AGND1 port; the fifth end of the chip U23 is connected to the AGND1 port; the sixth end of chip U23 is placed with network label CNV1; the seventh end of chip U23 is placed with network label SDO2; the eighth end of chip U23 is placed with network label SCK1; the ninth end of chip U23 is connected to the tenth end of chip U23, +3.3V-bigdsp power supply and the first end of capacitor C362, and the second end of capacitor C362 is connected to the AGND1 port.

[0139] According to formula (22):

[0140]

[0141] It can be calculated that after being amplified by AD8672A, the circuit output is X.

[0142] The amplified signal is continuously input into the inverted second-order LFP (low-pass active filter), and its own high gain and frequency response characteristics are used to realize frequency selection and filtering functions. Under the inverted configuration, the filter selected by the present invention can effectively filter out high-frequency noise or unnecessary frequency components, and only retain the required low-frequency signal. The present invention adopts a multi-path feedback method to improve the frequency characteristics near the cut-off frequency. By adjusting its feedback resistance, the gain of the filter can be controlled, and the signal can be amplified or attenuated as necessary to meet the input requirements of the subsequent circuit. In addition, in digital signal processing, the spectrum overlap problem caused by high-frequency signals during the sampling process can also be prevented.

[0143] According to formula (23):

[0144]

[0145] It can be seen that the cutoff frequency f0 of the inverting second-order LEP in the present invention is 12 kHz.

[0146] According to formula (24):

[0147]

[0148] It can be seen that the relationship between the output X1 and the output X of the inverting second-order LEP in the present invention.

[0149] The output voltage is then transmitted to THS4531ID. Since the chip is not directly connected to the bias power supply in the output current sampling module, an intermediate voltage is generated inside the chip, which is half of the power supply voltage, that is, V OCM =2.5V. Refer to formula (17) and formula (18) for the output calculation of THS4531ID.

[0150] After the output of the fully differential amplifier, it is sent to the analog-to-digital converter AD7989. When the CNV pin is high, the voltage difference between the IN+ and IN- pins is read and output at the SDO port and transmitted to the DSP. On this chip, the reference input voltage V REF If the input voltage is 5V, the voltage on the IN+ and IN- pins will swing between 0 and 5V in opposite phases. In addition, the externally applied reference input voltage, power supply, and digital power supply pins need to be decoupled using capacitors pointing to the ground.

[0151] As a supplement to the main power supply, the auxiliary power supply can provide backup or additional power support. In the present invention, the auxiliary power supply series circuit can provide fixed output voltages of ±12V, ±5V, +4.5V, +3.3V, +2.5V, and +1.204V. These are mainly used to power the DSP chip and the inverter main circuit to ensure the normal operation of the entire system.

[0152] ±12V auxiliary power supply circuit Figure 8 As shown, the seventh end of the transformer T2B is connected to the second end of the diode D43 and the first end of D45; the eighth end of the transformer T2B is connected to the second end of the capacitor C224, the second end of the capacitor C221, the second end of the capacitor C217, the second end of the capacitor C120, the second end of the relay protection device FB7, the second end of the chip U10 (MC7812ABD2T), the second end of the capacitor C150, the second end of the capacitor C307, the second end of the chip U13 (7805BG), the second end of the capacitor C111, the first end of the capacitor C350, the first end of the capacitor C290, the first end of the capacitor C225, and the capacitor C The first end of 152, the first end of chip U12 (MC79M12BDTRKG), the first end of capacitor C151, the first end of capacitor C114, the first end of chip U71 (LM2990S-5), the first end of capacitor C115 and AGND1 port; the ninth end of transformer T2B is connected to the second end of diode D42 and the first end of D44; the first end of inductor L2 is connected to the first end of diode D43 and the first end of D42; the second end of inductor L2 is connected to the first end of capacitor C224, the first end of capacitor C221, test point TP12, the first end of capacitor C217, +12V1-f ront power supply, the first end of capacitor C120, the first end of relay protection device FB6 and the first end of the chip U1; the second end of chip U10 is connected to the first end of chip U12; the third end of chip U10 is connected to the first end of capacitor C150, +12V1 power supply, the first end of capacitor C307 and the first end of chip U13; the second end of chip U13 is connected to the first end of chip U71; the third end of chip U13 is connected to the first end of capacitor C111 and the +5V-bigdsp-analog power supply; the second end of relay protection device FB6 is connected to the first end of capacitor C66 and the first end of capacitor C119 One end, the second end of capacitor C66 and the second end of capacitor C119 are connected to the first end of relay protection FB7; the first end of inductor L4 is connected to the second end of diode D45 and the second end of D44; the second end of inductor L4 is connected to the second end of capacitor C350, the second end of capacitor C290, the second end of capacitor C225, test point TP15, the second end of capacitor C152 and the second end of chip U12; the third end of chip U12 is connected to the second end of capacitor C151, -12V1 power supply, the second end of capacitor C114 and the second end of chip U71; the third end of chip U71 is connected to the second end of capacitor C115.

[0153] A fixed positive voltage regulator MC7812ABD2T is selected to obtain a fixed 12V output voltage, and a fixed negative voltage regulator MC79M12BDTRKG is selected to obtain a fixed -12V output voltage, which are named +12V1 and -12V1 respectively. According to the actual circuit, the present invention connects a 1μF ceramic capacitor at the input and output ends of the two regulators, and the ceramic capacitor has a low equivalent series resistance (ESR) and good high-frequency characteristics. The input capacitor is mainly used to filter out high-frequency noise and transient interference generated by the long distance from the power filter. The output capacitor is mainly used to stabilize the output voltage under different load conditions and reduce the influence of power supply noise and load changes on the output voltage.

[0154] The ±12V auxiliary power supply is applied to the 3 / 4 pins of the current sensor LAH50-P, the 4 / 8 pins of the operational amplifier AD8672A in the input voltage sampling module, the output voltage sampling module and the output current sampling module, and the 4 / 8 pins of the comparator LM211D as positive and negative power inputs.

[0155] ±5V auxiliary power supply circuit Fig. 9 and Fig.10 As shown, the tenth end of the transformer T2C is connected to the second end of the diode D41 and the first end of D40; the eleventh end of the transformer T2C is connected to the second end of the diode D29 and the first end of D30, the first end of the chip U26 (MC7805ABD2T) is connected to the first end of the diode D41, the first end of D29, the first end of the capacitor C92, the first end of the capacitor C218, the first end of the capacitor C297, the test point TP10 and the first end of the capacitor C89, the second end of the chip U26 is connected to the second end of the diode D40, the second end of D30, the second end of the capacitor C92, the second end of the capacitor C218, the second end of the capacitor C297, the second end of the capacitor C89, the second end of the capacitor C95 and the AGND1 port, and the third end of the chip U26 is connected to the test point TP3, the +5V-bigdsp power supply and the first end of the capacitor C95.

[0156] The thirteenth end of the transformer T2D is connected to the second end of the diode D16 and the first end of D15; the fourteenth end of the transformer T2D is connected to the second end of the diode D8 and the first end of D10, the third end of the chip U56 (L78L05ABUTR) is connected to the first end of the diode D16, the first end of D8, the first end of the capacitor C142 and the first end of the capacitor C205, the second end of the chip U56 is connected to the second end of the diode D15, the second end of D10, the second end of the capacitor C142, the second end of the capacitor C205, the second end of the capacitor C145, the test point TP9 and the AGND1-amc1301 port, and the first end of the chip U56 is connected to the test point TP5, the +5V-amc1301 power supply and the first end of the capacitor C145.

[0157] The first end of chip U50 (MAX6250) is suspended, the second end of chip U50 is connected to the first end of capacitor C126, the third end of MOS tube Q6, the first end of capacitor C110 and the third end of chip U48 (SPX1117M3), the second end of capacitor C126 is connected to AGND1 port, the third end of chip U50 is connected to the first end of capacitor C128 and AGND1 port, the fourth end of chip U50 is connected to the second end of capacitor C128 and AGND1 port, the fifth end of chip U50 is suspended, the sixth end of chip U50 is connected to the first end of capacitor C153 and 5V+ power supply, the second end of capacitor C153 is connected to AGND1 port, and the seventh and eighth ends of chip U50 are suspended. The first end of MOS tube Q6 is connected to the first end of resistor R265 and the third end of MOS tube Q7, and the second end of MOS tube Q6 is connected to the second end of resistor R265 and +12V power supply. A first end of the MOS tube Q7 is connected to a first end of the resistor R274, a first end of the capacitor C108 and the EN power supply, a second end of the resistor R274 and a second end of the capacitor C108 are connected to the AGND1 port, and a second end of the MOS tube Q7 is connected to the AGND1 port.

[0158] The first end of chip U48 (SPX1117M3) is connected to the second end of capacitor C110 and the AGND1 port; the second end of chip U48 is connected to the first end of capacitor C109 and the +3.3V-U48 power supply, and the second end of capacitor C109 is connected to the AGND1 port.

[0159] According to the difference in output power consumption, MC7805BTG, MC7805ABD2T, L78L05ABUTR and MAX6250 linear regulators are selected to generate a fixed output voltage of +5V, which are named +5V-bigdsp-analog, +5V-bigdsp, +5V-amc1301 and 5V+ respectively. These regulators provide the most suitable voltage and current for each part of the system. The different voltage naming is mainly to achieve electrical isolation, thereby reducing signal noise and power consumption, and improving the overall performance and efficiency of the circuit. The present invention selects LM2990S-5.0 negative low-dropout regulator to generate a fixed output voltage of -5V -5V-bigdsp-analog.

[0160] The input and output capacitors of the voltage regulators MC7805BTG, MC7805ABD2T, L78L05ABUTR, and LM2990S-5.0 are set to maintain stability. The voltage regulator MAX6250 generates an enable voltage signal EN after driving TPS73701 after +5V-bigdsp and +3.3V-bigdsp are generated. This drive voltage signal can turn on the MOS tube to transmit the +12V1 voltage to the voltage regulator MAX6250, and then generate a 5V+ output voltage. Add a 1μF ceramic capacitor to the NR pin and IN pin respectively to enhance broadband noise reduction and reduce power supply input noise. Add a 2.2μF ceramic capacitor to the OUT pin to help reduce load transients and output noise caused by output faults.

[0161] Among them, +5V-bigdsp-analog is used for the 3rd pin of the fully differential amplifier THS4531ID in the output current sampling module, the 8th pin of the operational amplifier LT6203IMS8, the 13th pin of the analog switch ADG1412 and the 1st pin of the digital-to-analog converter DAC8552 as the positive power input; +5V-bigdsp is used for the 3 / 8th pin of the isolated gate driver UCC21521 and the 5th pin of the buffer SN74LVC2G17 as the primary power input; +5V-amc1301 is used for the 1st pin of the isolated amplifier AMC1301 in the input voltage sampling module as the high-voltage voltage source input; 5V+ is used for the 1st pin of the analog-to-digital converter AD7989 in the output current sampling module as the reference power input. -5V-bigdsp-analog is used for the 4th pin of the operational amplifier LT6203IMS8 and the analog switch ADG1412 as the negative power input.

[0162] +3.3V auxiliary power supply circuit Fig.11 As shown, the first end of the chip U52 (TPS73701) is connected to the first end of the resistor R263, the first end of the capacitor C129, the +5V-bigdsp power supply and the fifth end of the chip U52, the second end of the resistor R263 is connected to the first end of the diode D57, the second end of the diode D57 is connected to the AGND1 port, the second end of the capacitor C129 is connected to the AGND1 port, the second end of the chip U52 is connected to the first end of the capacitor C127, the first end of the resistor R210, the +3.3V-bigdsp power supply and the first end of the capacitor C169, the third end of the chip U52 is connected to the AGND1 port, the fourth end of the chip U52 is connected to the second end of the capacitor C127, the second end of the resistor R217, the first end of the resistor R224, the second end of the resistor R210 is connected to the first end of the resistor R217, and the second end of the resistor R224 is connected to the second end of the capacitor C169 and the AGND1 port.

[0163] The low dropout regulators TPS73701 and SPX1117M3 are selected to obtain a fixed +3.3V output voltage, named +3.3V-bigdsp and +3.3V-U48 respectively. For the regulator TPS73701, the shutdown function is not required, so the EN pin is connected to V IN , the input capacitor can offset the reactive input source, improve transient response and suppress noise and ripple. A capacitor is introduced between the FB pin and the OUT pin to reduce the phase shift in the feedback loop and prevent possible oscillation and instability, especially when the load or input conditions change. The output capacitor is used to maintain the stability of the circuit. The input capacitor and output capacitor of the regulator SPX1117M are set to maintain the stability of the circuit.

[0164] Among them, +3.3V-bigdsp mainly provides the working voltage for the DSP controller TMS320F28377DPTPS, and also serves as the positive power input for the 1 / 7 pin of the digital isolator NSI8242, the 10 pin of the analog-to-digital converter AD7989 in the output current sampling module, and the 7 pin of the comparator LM211D. +3.3V-U48 is used for the 46 pin of the DSP controller as the external reference voltage of the on-chip DAC. In addition, it also serves as the positive power input for the 8 pin of the operational amplifier AD8032 in the ADC driver module, the 3 / 7 pin of the differential amplifier THS4531ID in the input voltage sampling module, the input current sampling module and the output voltage sampling module, and the 8 pin of the isolated amplifier AMC1301.

[0165] +3V auxiliary power supply circuit Fig.12 As shown, the first end of the chip U161 (LT6203IMS8) is connected to the 3V+ power supply and the second end of the chip U161; the third end of the chip U161 is connected to the first end of the capacitor C337, the first end of the resistor R159 and the first end of the resistor R158, the second end of the capacitor C337 and the second end of the resistor R159 are connected to the AGND1 port, and the second end of the resistor R158 is connected to the 5V+ power supply; the fourth end of the chip U161 is connected to the second end of the capacitor C102 and the AGND1 port; the fifth end of the chip U161 is connected to the The first end of capacitor C102 and the first end of resistor R318, and the second end of resistor R318 are connected to the 3V+ power supply; the sixth end of the chip U161 is connected to the first end of resistor R317, and the second end of resistor R317 is connected to the second end of resistor R314 and the 3V+_8552 power supply; the seventh end of the chip U161 is connected to the first end of resistor R314; the eighth end of the chip U161 is connected to the first end of capacitor C335 and the +5V-bigdsp-analog power supply, and the second end of capacitor C335 is connected to the AGND1 port.

[0166] The present invention selects the low-power operational amplifier LT6203IMS8 to obtain a fixed +3V output voltage, and names it 3V+. The present invention sets a filter circuit in front of the positive input port to filter out high-frequency noise and interference in the signal; pulls down a resistor to the ground at the negative input port to determine the gain multiple of the amplifier, and to a certain extent can also prevent input saturation at high signal levels; the pull-down capacitor to the ground in the circuit is mainly to reduce oscillation and noise interference, optimize the frequency response characteristics of the amplifier, and improve the stability of the power supply and the overall performance of the circuit.

[0167] +3V is used for the 3rd pin of the operational amplifier AD8032 in the ADC sampling drive module as the positive input terminal of the chip.

[0168] +2.5V auxiliary power supply circuit Fig.13 As shown, the first end of chip U28 (LP2985-25DBVR) is connected to the first end of relay protection FB5 and the +3.3V-bigdsp power supply, the second end of chip U28 is connected to the first end of capacitor C374 and the AGND1 port, the third end of chip U28 is connected to the second end of capacitor C374 and the second end of relay protection FB5, the fourth end of chip U28 is connected to the first end of capacitor C375, and the second end of capacitor C375 is connected to the AGND1 port; the fifth end of chip U28 is connected to the first end of capacitor C376 and the +2.5V power supply, and the second end of capacitor C376 is connected to the AGND1 port.

[0169] The present invention selects a low dropout voltage regulator LP2985-25DBVR to obtain a fixed +2.5V output voltage. Add a 1μF ceramic capacitor C between GND 374 To stabilize the on and off state of the chip and avoid the influence of transient signal interference, switching noise and voltage spikes on the working state of the chip. The addition of output capacitors can smooth the output voltage and reduce voltage fluctuations. At the same time, it can provide additional instantaneous current and improve the responsiveness of the power supply under rapid load changes. The bypass capacitor is connected to the internal bandgap reference of the chip through the BYPASS pin to achieve low noise performance.

[0170] +2.5V is used for the pin 2 of the digital-to-analog converter AD7989 in the output current sampling module as the external power reference input of the chip.

[0171] +1.204V auxiliary power supply circuit Fig.14As shown, the first end of chip U54 (TPS73701) is connected to the first end of resistor R264, the first end of diode D58, +3.3V-front power supply, the first end of capacitor C338 and +5V-bigdsp power supply, and the second end of capacitor C338 is connected to AGND1 port; the second end of chip U54 is connected to the first end of capacitor C183, +1.204V-bigdsp power supply, test point TP21 and the fourth end of chip U54, the second end of capacitor C183 is connected to AGND1 port, the third end of chip U54 is connected to AGND1 port, the fifth end of chip U54 is connected to the second end of resistor R264, the second end of diode D58, EN power supply and the first end of capacitor C198, and the second end of capacitor C198 is connected to AGND1 port.

[0172] The low-dropout regulator TPS73701 is selected to obtain a fixed +1.204V output voltage, which is mainly used to provide the core voltage for the DSP controller.

[0173] Add a diode and resistor between the IN pin and the EN pin of the regulator. When a negative voltage appears on the input power pin, the diode will conduct and guide the negative voltage to the ground, thereby protecting the EN pin from the influence of reverse voltage, avoiding damage to the chip or affecting its normal operation. The resistor can pull up or down the voltage on the EN pin to ensure that the pin has a clear logic level when the chip does not need to work, avoiding accidental startup or disabling caused by the uncertain state of the enable pin when the input power is connected or disconnected.

[0174] The wide-band, wide-voltage adjustable single-phase high-power inverter circuit based on SiC MOSFET has an output AC voltage range of 0-350V, an output voltage resolution of 0.01V, an output frequency range of 16Hz-2.4kHz, an output frequency resolution of 0.01Hz, an output AC voltage range of 0-350V, an output voltage resolution of 0.01V, an output frequency range of 16Hz-2.4kHz, an output frequency resolution of 0.01Hz, a dynamic response of 200μs, a voltage ripple less than 0.4V, and a harmonic analysis upper limit of 50Hz

[0175] In summary, the wide-band, wide-voltage adjustable single-phase high-power inverter circuit based on SiC MOSFET of the present invention realizes a high-performance sinusoidal wave output voltage under a limited switching frequency, and the system has fast response, good steady state and high reliability.

[0176] The above description is based on the ideal embodiment of the present invention. Through the above description, relevant personnel can make various changes and modifications without departing from the technical concept of the present invention. The technical scope of the present invention is not limited to the content in the specification, and its technical scope must be determined according to the scope of the claims.

Claims

1. A wide-band, wide-voltage adjustable single-phase high-power inverter circuit based on SiC MOSFET, characterized in that: It includes an input DC source, a full-bridge inverter circuit, an output filter circuit and an output AC source which are electrically connected in sequence, wherein the input DC source is also electrically connected to an input DC voltage sampling module, the input DC source is electrically connected to an inductor current sampling module, the output AC source is electrically connected to a load current sampling module and an output AC voltage sampling module, the input DC voltage sampling module, the inductor current sampling module, the load current sampling module and the output AC voltage sampling module are electrically connected to a DSP control module, and the DSP control module is electrically connected to the full-bridge inverter circuit via a drive module.

2. The wide-band, wide-voltage adjustable single-phase high-power inverter circuit based on SiC MOSFET according to claim 1, characterized in that: The full-bridge inverter circuit includes a chip Q1, a chip Q5, a chip Q15 and a chip Q16, wherein a first end of the chip Q1 is connected to a second end of a resistor R28 and a first end of a resistor R5, and a second end of the chip Q1 is connected to a VO+ power supply and a second end of the chip Q15; a third end of the chip Q1 is connected to a second end of the resistor R5, a second end of the chip Q5 and a second end of an inductor L6A, and a first end of the chip Q5 is connected to a second end of a resistor R32 and a first end of a resistor R37; a third end of the chip Q5 is connected to a second end of the resistor R37, a VO- power supply and a third end of the chip Q16, and a first end of the chip Q15 is connected to a second end of the resistor R35 and a first end of a resistor R4; a third end of the chip Q15 is connected to a second end of the resistor R4, a second end of the chip Q16 and a second end of an inductor L7B, and a first end of the chip Q16 is connected to a second end of a resistor R42 and a first end of a resistor R29. one end; the third end of the chip Q16 is connected to the second end of the resistor R29, the VO- power supply and the third end of the chip Q5, the first end of the inductor L6A is connected to the second end of the inductor L1, the first end of the inductor L1 is connected to the first end of the chip U1, and the third end of the chip U1 is connected to the -12V1 power supply and the first end of the capacitor C80; the fourth end of the chip U1 is connected to the +12V1 power supply and the first end of the capacitor C45, the second end of the capacitor C80 and the second end of the capacitor C45 are both connected to the AGND1 port, the first end of the inductor L7B is connected to the second end of the inductor L2, the first end of the inductor L2 is connected to the first end of the chip U2, and the third end of the chip U2 is connected to the -12V1 power supply and the first end of the capacitor C79; the fourth end of the chip U1 is connected to the +12V1 power supply and the first end of the capacitor C21, and the second end of the capacitor C79 and the second end of the capacitor C421 are both connected to the AGND1 port.

3. The wide-band, wide-voltage adjustable single-phase high-power inverter circuit based on SiC MOSFET according to claim 1, characterized in that: The driving module includes a driving chip U3, wherein a first end of the driving chip U3 is connected to a first end of a capacitor C72, and a second end of the capacitor C72 is connected to an AGND1 port; a second end of the driving chip U3 is connected to a first end of a capacitor C59, and a second end of the capacitor C59 is connected to an AGND1 port; a third end of the driving chip U3 is connected to a +5V_bigdsp power supply and a first end of a capacitor C17; a fourth end of the driving chip U3 is connected to an AGND1 port and a second end of the capacitor C17; a fifth end of the driving chip U3 is connected to a first end of a capacitor C58, and a capacitor C59 is connected to an AGND1 port. The second end of C58 is connected to the AGND1 port; the sixth end of the driver chip U3 is connected to the first end of the resistor R24 ​​and the first end of the capacitor C20, and the second end of the resistor R24 ​​and the second end of the capacitor C20 are both connected to the AGND1 port; the eighth end of the driver chip U3 is connected to the +5V_bigdsp power supply and the first end of the capacitor C69, and the second end of the capacitor C69 is connected to the AGND1 port; the ninth end of the driver chip U3 is connected to the second end of the capacitor C19 and the GND-T1-V3 port; the tenth end of the driver chip U3 is connected to the second end of the diode D7. The first end of the driver chip U3 is connected to the T1-V3 power supply and the first end of the diode D8, the first end of the diode D7 is connected to the T1-V3 power supply, the second end of the diode D8 is connected to the GND-T1-V3 port, the second end of the diode D7 is connected to the first end of the resistor R42 and the first end of the resistor R18, the second end of the resistor R42 is connected to the first end of the diode D62, and the second end of the resistor R18 is connected to the second end of the diode D62; the eleventh end of the driver chip U3 is connected to the T1-V3 power supply and the first end of the capacitor C19; the fourteenth end of the driver chip U3 is connected to the second end of the capacitor C13 and the GND-T1-V3 port. T1-V2 port; the fifteenth end of the driving chip U3 is connected to the second end of the diode D3 and the first end of the diode D4, the first end of the diode D3 is connected to the T1-V2 power supply, the second end of the diode D4 is connected to the GND-T1-V2 port, the second end of the diode D3 is connected to the first end of the resistor R41 and the first end of the resistor R7, the second end of the resistor R41 is connected to the first end of the diode D61, and the second end of the resistor R7 is connected to the second end of the diode D61; the sixteenth end of the driving chip U3 is connected to the T1-V2 power supply and the first end of the capacitor C13.

4. The wide-band, wide-voltage adjustable single-phase high-power inverter circuit based on SiC MOSFET according to claim 1, characterized in that: The input DC voltage sampling circuit includes a chip U58, a chip U30A, and a chip U16. The first end of the chip U58 is connected to the +5V_amc1301 power supply, the first end of the capacitor C309 and the first end of the capacitor C121, and the second end of the capacitor C309 and the second end of the capacitor C121 are both connected to the AGND-amc1301 port; the second end of the chip U58 is connected to the first end of the capacitor C310, the second end of the resistor R307 and the second end of the resistor R420, and the first end of the resistor R307 and the first end of the resistor R420 are connected to the AGND-amc1301 port; the third end of the chip U58 is connected to the second end of the capacitor C310, the second end of the resistor R4 The second end of the chip U58 is connected to the AGND-amc1301 port; the fourth end of the chip U58 is connected to the AGND-amc1301 port; the fifth end of the chip U58 is connected to the AGND1 port; the sixth end of the chip U58 is connected to the first end of the resistor R122; the seventh end of the chip U58 is connected to the first end of the resistor R233; the eighth end of the chip U58 is connected to the +3.3V_U48 power supply, the first end of the capacitor C124 and the first end of the capacitor C308, and the second end of the capacitor C124 and the second end of the capacitor C308 are connected to the AGND1 port; The first end of the chip U30A is connected to the second end of the resistor R32, the second end of the capacitor C79 and the first end of the resistor R49; the second end of the chip U30A is connected to the second end of the resistor R233, the first end of the resistor R31, the first end of the resistor R32 and the first end of the capacitor C79, and the second end of the resistor R31 is connected to the AGND1 port; the third end of the chip U30 is connected to the second end of the resistor R122, the first end of the resistor R26, the first end of the resistor R23 and the first end of the capacitor C75, and the second end of the resistor R26 is connected to the 3V+ power supply, the second end of the resistor R23 and the second end of the capacitor C75 are both connected to the AGND1 port; the fourth end of the chip U30 is connected to the +12V1 power supply and the first end of the capacitor C80, and the second end of the capacitor C80 is connected to the AGND1 port; the fifth end of the chip U30A is connected to the seventh end of the chip U30; the sixth end of the chip U30 is connected to the AGND1 port; the eighth end of the chip U30A is connected to the -12V1 power supply and the first end of the capacitor C74, and the second end of the capacitor C74 is connected to the AGND1 port; The first end of the chip U16 is connected to the second end of the resistor R49, the first end of the resistor R68 and the first end of the capacitor C368; the second end of the chip U16 is connected to the 1.5V+ power supply and the first end of the capacitor C22; the third end of the chip U16 is connected to the +3.3V-U48 power supply and the first end of the capacitor C73, and the second end of the capacitor C73 is connected to the AGND1 port; the fourth end of the chip U16 is connected to the first end of the resistor R51, the second end of the resistor R68 and the second end of the capacitor C368; the fifth end of the chip U16 is connected to the first end of the resistor R47, the second end of the resistor R30 and the second end of the capacitor C366. end; the sixth end of the chip U16 is connected to the second end of the capacitor C22 and the AGND1 port; the seventh end of the chip U16 is connected to the +3.3V-U48 power supply; the eighth end of the chip U16 is connected to the first end of the resistor R42, the first end of the resistor R30 and the first end of the capacitor C366, and the second end of the resistor R42 is connected to the AGND1 port; the second end of the resistor R51 is connected to the first end of the capacitor C23, the second end of the capacitor C23 is connected to the AGND1 port, and the network label ADCINBC2 is placed; the second end of the resistor R47 is connected to the first end of the capacitor C21, and the second end of the capacitor C21 is connected to the AGND1 port.

5. The wide-band, wide-voltage adjustable single-phase high-power inverter circuit based on SiC MOSFET according to claim 1, characterized in that: The output AC voltage sampling circuit includes a chip U46A and a chip U14, wherein a first end of the chip U46A is connected to a first end of a resistor R27, a second end of a resistor R401 and a second end of a capacitor C352, and a node X is set; a second end of the chip U46A is connected to a second end of a resistor R286, a first end of a resistor R401 and a first end of a capacitor C352; a third end of the chip U46A is connected to a second end of a resistor R284, a first end of a resistor R402 and a first end of a capacitor C351, and a second end of a resistor R402 and a second end of a capacitor C351 are both connected to an AGND1 port; a fourth end of the chip U46A is connected to a -12V1 power supply and a first end of a capacitor C349, and a second end of the capacitor C349 is connected to an AGND1 port; an eighth end of the chip U46 is connected to a +12V1 power supply and a first end of a capacitor C353, and a second end of the capacitor C353 is connected to an AGND1 port; The first end of the chip U14 is connected to the second end of the resistor R27, the first end of the resistor R24, the first end of the capacitor C365 and the third end of the Schottky diode D47, the first end of the Schottky diode D47 is connected to the AGND1 port, and the second end of the Schottky diode D47 is connected to the +3.3V-U48 power supply; the second end of the chip U14 is connected to the 1.5V+ power supply and the first end of the capacitor C6; the third end of the chip U14 is connected to the +3.3V-U48 power supply and the first end of the capacitor C81, and the second end of the capacitor C81 is connected to the AGND1 port; the fourth end of the chip U14 is connected to the first end of the resistor R28, the second end of the resistor R24 ​​and the second end of the capacitor C365; The fifth end of the chip U14 is connected to the first end of the resistor R25, the second end of the resistor R29 and the second end of the capacitor C364; the sixth end of the chip U14 is connected to the second end of the capacitor C6 and the AGND1 port; the seventh end of the chip U14 is connected to the +3.3V-U48 power supply; the eighth end of the chip U14 is connected to the first end of the resistor R22, the first end of the resistor R29 and the first end of the capacitor C364, and the second end of the resistor R22 is connected to the AGND1 port; the second end of the resistor R28 is connected to the first end of the capacitor C14, and the second end of the capacitor C14 is connected to the AGND1 port; the second end of the resistor R25 is connected to the first end of the capacitor C17, and the second end of the capacitor C17 is connected to the AGND1 port.

6. The wide-band, wide-voltage adjustable single-phase high-power inverter circuit based on SiC MOSFET according to claim 1, characterized in that: The inductor current sampling circuit includes a chip U46B and a chip U17A, the fifth end of the chip U46B is connected to the second end of the resistor R52, the second end of the resistor R214, the second end of the capacitor C395, the first end of the resistor R50 and the first end of the capacitor C90, and the second end of the resistor R50 and the second end of the capacitor C90 are both connected to the AGND1 port; the sixth end of the chip U46B is connected to the second end of the resistor R58, the second end of the resistor R55, the first end of the capacitor C395, the first end of the resistor R57 and the first end of the capacitor C94, the seventh end of the chip U46B is connected to the first end of the resistor R53, the second end of the resistor R57 and the second end of the capacitor C94, and a node X is set; The first end of the chip U17 is connected to the second end of the resistor R53, the first end of the resistor R69 and the first end of the capacitor C369; the second end of the chip U17 is connected to the 1.5V+ power supply and the first end of the capacitor C76; the third end of the chip U17 is connected to the +3.3V-U48 power supply and the first end of the capacitor C78, ​​and the second end of the capacitor C78 is connected to the AGND1 port; the fourth end of the chip U17 is connected to the first end of the resistor R54, the second end of the resistor R69 and the second end of the capacitor C369; the fifth end of the chip U17 is connected to the first end of the resistor R48, the second end of the resistor R33 and the capacitor C76. The second end of capacitor C367; the sixth end of the chip U17 is connected to the second end of capacitor C76 and the AGND1 port; the seventh end of the chip U17 is connected to the +3.3V-U48 power supply; the eighth end of the chip U17 is connected to the first end of resistor R46, the first end of resistor R33 and the first end of capacitor C367, and the second end of resistor R46 is connected to the AGND1 port; the second end of resistor R54 is connected to the first end of capacitor C18, and the second end of capacitor C18 is connected to the AGND1 port; the second end of resistor R48 is connected to the first end of capacitor C19, and the second end of capacitor C19 is connected to the AGND1 port.

7. The wide-band, wide-voltage adjustable single-phase high-power inverter circuit based on SiC MOSFET according to claim 1, characterized in that: The load current sampling circuit includes a chip U22, a chip U27 and a chip U23, wherein a first end of the chip U22 is connected to a first end of a resistor R359, a second end of a resistor R400, a second end of a capacitor C341 and a second end of a capacitor C344, and a node X1 is set; a second end of the chip U22 is connected to a second end of a resistor R399, a first end of a capacitor C341 and a first end of a capacitor C199, and a second end of a capacitor C199 is connected to a first end of a capacitor C344; a third end of the chip U22 is connected to an AGND1 port; a fourth end of the chip U22 is connected to a first end of a capacitor C223, a first end of a capacitor C206, a first end of a capacitor C159 and a first end of a relay protector FB9, a second end of a capacitor C223 and a second end of a capacitor C206 are connected to an AGND1 port, and a second end of a relay protector FB9 is connected to a -12V1 power supply; a fifth end of the chip U22 is connected to a second end of a resistor R101, a first end of a resistor R83 and a first end of a capacitor C116 The first end, the second end of the resistor R83 and the second end of the capacitor C116 are all connected to the AGND1 port; the sixth end of the chip U22 is connected to the second end of the resistor R350, the first end of the resistor R351 and the first end of the capacitor C136; the seventh end of the chip U22 is connected to the first end of the resistor R353, the second end of the resistor R351 and the second end of the capacitor C136, and a node X is set, the second end of the resistor R353 is connected to the first end of the capacitor C328, the first end of the capacitor C191, the first end of the resistor R399 and the first end of the resistor R400, the second end of the capacitor C328 and the second end of the capacitor C191 are both connected to the AGND1 port; the eighth end of the chip U22 is connected to the first end of the capacitor C122, the first end of the capacitor C131, the second end of the capacitor C159 and the first end of the relay protection device FB14, the second end of the capacitor C122 and the second end of the capacitor C131 are connected to the AGND1 port, and the second end of the relay protection device FB14 is connected to the +12V1 power supply; The first end of the chip U27 is connected to the second end of the resistor R360, the first end of the resistor R361 and the first end of the capacitor C106, and the first end of the resistor R360 is connected to the AGND1 port; the second end of the chip U27 is connected to the first end of the capacitor C93; the third end of the chip U27 is connected to the first end of the capacitor C105, the first end of the capacitor C96, the first end of the relay protection device FB8 and the seventh end of the chip U27, the second end of the capacitor C105 and the second end of the capacitor C96 are both connected to the AGND1 port, and the second end of the relay protection device FB8 is connected to the +5V-bigdsp-analog power supply; the fourth end of the chip U27 is connected to the first end of the resistor R92, the second end of the resistor R361 and the capacitor C93; The second end of capacitor C106; the fifth end of the chip U27 is connected to the first end of resistor R84, the second end of resistor R358 and the second end of capacitor C117; the sixth end of the chip U27 is connected to the second end of capacitor C93 and the AGND1 port; the eighth end of the chip U27 is connected to the second end of resistor R359, the first end of resistor R358 and the first end of capacitor C117; the second end of resistor R92 is connected to the first end of capacitor C91 and the third end of the chip U23, the second end of capacitor C91 is connected to the AGND1 port, and the network label IN+ is placed; the second end of resistor R84 is connected to the first end of capacitor C113 and the fourth end of the chip U23, and the second end of capacitor C113 is connected to the AGND1 port; The first end of the chip U23 is connected to the 5V+ power supply and the first end of the capacitor C88, and the second end of the capacitor C88 is connected to the AGND1 port; the second end of the chip U23 is connected to the +2.5V power supply and the first end of the capacitor C363, and the second end of the capacitor C363 is connected to the AGND1 port; the fifth end of the chip U23 is connected to the AGND1 port; the ninth end of the chip U23 is connected to the tenth end of the chip U23, the +3.3V-bigdsp power supply and the first end of the capacitor C362, and the second end of the capacitor C362 is connected to the AGND1 port.

8. The wide-band, wide-voltage adjustable single-phase high-power inverter circuit based on SiC MOSFET according to any one of claims 1 to 7, characterized in that: The DSP control module, the input DC voltage sampling module, the inductor current sampling module, the load current sampling module and the output AC voltage adopting module are also connected to an auxiliary power supply.

9. The wide-band, wide-voltage adjustable single-phase high-power inverter circuit based on SiC MOSFET according to claim 8, characterized in that: The auxiliary power supplies include ±12V auxiliary power supplies, ±5V auxiliary power supplies, +3.3V auxiliary power supplies, +3V auxiliary power supplies, +2.5V auxiliary power supplies and +1.204V auxiliary power supplies.

10. The wide-band, wide-voltage adjustable single-phase high-power inverter circuit based on SiC MOSFET according to claim 9, characterized in that: The wide-band, wide-voltage adjustable single-phase high-power inverter circuit based on SiC MOSFET has an output AC voltage range of 0-350V, an output voltage resolution of 0.01V, an output frequency range of 16Hz-2.4kHz, an output frequency resolution of 0.01Hz, an output AC voltage range of 0-350V, an output voltage resolution of 0.01V, an output frequency range of 16Hz-2.4kHz, an output frequency resolution of 0.01Hz, a dynamic response of 200μs, a voltage ripple less than 0.4V, and a harmonic analysis upper limit of 50Hz.

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