Method and device for data signal transmission in network equipment

Abstract

The invention provides a method and device for data signal transmission in network equipment, and the method comprises the steps: generating a data signal, the data signal comprises a delimiter and data, the delimiter comprises at least one first level pair, each first level pair comprises a low level and a high level, and each first level pair comprises at least one second level; the delimiter is used for identifying the starting position of the data, and the delimiter starts at a high level and ends at a low level; or, the delimiter starts at a low level and ends at a high level; and sending the data signal. According to the data signal transmission method provided by the embodiment of the invention, the accuracy of envelope detection output waveform timing can be improved, and the precision of the equipment for calibrating the own clock is further improved.

Description

Technical Field

[0001] The present application relates to the field of communications, and more specifically, to a method and apparatus for transmitting data signals in a network device. Background Art

[0002] The reflection scattering system is generally composed of an exciter, a receiver, and a reflector. Its communication link includes a downlink from the exciter to the reflector and an uplink from the reflector to the receiver. Reflectors can be divided into passive reflectors and semi-passive reflectors according to whether they have battery power. Passive reflectors do not have battery power themselves, and need to rectify the RF signal in the downlink, and use the DC voltage output by the rectification as a power supply for analog and digital circuits. Semi-passive reflectors have their own battery power supply and do not rely on the rectification output of the downlink signal.

[0003] In addition to the reflection and scattering system, there is also a system with a wake-up mechanism, in which the network equipment can send a downlink wake-up signal (WUS) to the terminal equipment in the power saving mode (PSM) or sleep mode to achieve the effect of terminal energy saving. For the RF signal in the downlink of the reflection and scattering system or the wake-up signal in the system with a wake-up mechanism, the modulation method generally adopts on-off keying (OOK) / amplitude shift keying (ASK). The terminal equipment can demodulate the downlink modulated signal based on the low-power envelope detector, so it has the characteristics of ultra-low power consumption.

[0004] For ultra-low power terminal devices that do not have a high frequency accuracy crystal oscillator, when demodulating the signal, it will sample the detection output waveform based on its own clock, calculate its own clock frequency according to the length of the downlink timing symbol and the corresponding sampling point, and return the uplink data after calibrating the frequency. However, when using the envelope detector for demodulation, there is a problem of baseband signal waveform distortion, resulting in frequency deviation, that is, the output waveform timing cannot meet the accuracy required by the protocol. Therefore, how to improve the accuracy of the envelope detection output waveform timing is a problem that needs to be solved urgently. Summary of the invention

[0005] The present application provides a method and apparatus for data signal transmission in a network device, in order to improve the accuracy of envelope detection output waveform timing and further improve the accuracy of the device's own clock calibration.

[0006] In a first aspect, a method for data signal transmission in a network device is provided. The method includes: generating a data signal, the data signal including a delimiter and data. The delimiter includes at least one first level pair, each first level pair includes a low level and a high level, and the delimiter is used to identify the position where the data starts. The delimiter starts with a high level and ends with a low level or the delimiter starts with a low level and ends with a high level. The method also includes sending the above-mentioned data signal.

[0007] It should be understood that the above solution can be applied to the downlink communication link in the backscatter system, and can also be applied to the downlink communication link of the system with a wake-up mechanism.

[0008] It should be understood that in the above solution, the data signal may be generated by the reader / writer, or by a network device other than the reader / writer.

[0009] In the above scheme, the generated data signal includes a delimiter for identifying the starting position of the data signal. It can also be understood that the starting position of the data signal is determined by the delimiter, which can start with a high level and end with a low level; or start with a low level and end with a high level. This can ensure that when the terminal device performs envelope detection output, its detected waveform can start with a falling edge and end with a falling edge, or start with a rising edge and end with a rising edge. This can avoid the problem of inaccurate output waveform timing caused by the asymmetry of the rising edge and the falling edge, and further improve the accuracy of the device calibrating its own clock.

[0010] In combination with the first aspect, in some implementations of the first aspect, the length of the delimiter is k / (15kHz×N), where k and N are positive integers.

[0011] It should be understood that the length of the delimiter is related to T, where T is the subcarrier spacing, for example, T can be 15 kHz, 30 kHz, etc.

[0012] In the above scheme, the length of the delimiter is related to the subcarrier spacing, which can improve the accuracy of the output waveform timing while achieving compatibility between the downlink rate and the cellular system time parameters.

[0013] In combination with the first aspect, in some implementations of the first aspect, a first level pair corresponds to a bit in the bit sequence, and different first level pairs correspond to different bits in the bit sequence.

[0014] It should be understood that the bit sequence may be a Barker code, an m-sequence, a Walsh sequence, a Gold sequence, a Golay sequence, or the like.

[0015] In the above solution, the delimiter may include a bit sequence, which has a strong autocorrelation characteristic, which is conducive to improving the accuracy of determining the position of the locator.

[0016] In combination with the first aspect, in some implementations of the first aspect, the bit sequence includes bit 1 and bit 0. The low level length and the high level length in the first level pair corresponding to bit 0 are equal, and the high level length in the first level pair corresponding to bit 1 is L times the low level length, where L is a positive integer greater than 1.

[0017] In combination with the first aspect, in some implementations of the first aspect, the bit sequence includes bit 1 and bit 0. The low level length and the high level length in the first level pair corresponding to bit 0 are equal, and the high level length and the low level length in the first level pair corresponding to bit 1 are equal. When the length of the level corresponding to bit 0 is equal to the length of the level corresponding to bit 1, the high level in bit 0 is before the low level in bit 0, and the high level in bit 1 is after the low level in bit 1, or the high level in bit 0 is after the low level in bit 0, and the high level in bit 1 is before the low level in bit 1.

[0018] It should be understood that the bit sequence waveform may be a Manchester coded waveform.

[0019] In the above scheme, the waveforms of bit 0 and bit 1 are inverted, and at the same time, the lengths of bit 0 and bit 1 are ensured to be equal, so that the content carried by the data signal is simpler, thereby improving the communication efficiency of the downlink.

[0020] In combination with the first aspect, in some implementations of the first aspect, the data signal further includes a terminator. The terminator includes at least one second level pair, and the second level pair includes a low level and a high level. The length of the terminator is different from the first length, and the length of the terminator is different from the second length. The first length is the sum of the lengths of the high level and the low level in bit 0, the second length is the sum of the lengths of the high level and the low level in bit 1, bit 0 and bit 1 are carried in the data, and the terminator is used to identify the end position of the data.

[0021] It should be understood that the terminator is used to identify the end position of the data, and it can also be understood that the end position of the data is determined by the terminator.

[0022] In the above solution, the data signal also includes an end character, the length of which is related to the length of bit 0 and bit 1, and can clearly identify the end position of the data signal, thereby improving the accuracy of time parameter estimation.

[0023] In combination with the first aspect, in certain implementations of the first aspect, the low level in the second level pair precedes the high level in the second level pair, and a length of the low level in the second level is the same as a length of the low level in bit 0.

[0024] In combination with the first aspect, in some implementations of the first aspect, the data signal further includes a calibration symbol. The length of the calibration symbol is the sum of the level waveform length of bit 0 in the data and the level waveform length of bit 1 in the data, and the level waveform length of bit 0 in the data is different from the level waveform length of bit 1 in the data. The calibration symbol is after the delimiter and before the data.

[0025] In the above scheme, the data signal also includes a calibration symbol, which can be used as a reference signal for demodulation. The calibration symbol can change with the changes of bit 0 and bit 1 in the data content part. After receiving the calibration symbol, the decoding device can accurately know the waveforms corresponding to bit 1 and bit 0, so there is no need to inform the decoding device of the changed waveform every time the waveform changes, thereby improving the flexibility of the data signal.

[0026] In combination with the first aspect, in certain implementations of the first aspect, the level waveform length of bit 0 in the data is q / (15kHz×M), and the level waveform length of bit 1 in the data is p / (15kHz×Q), where q, p, M and Q are positive integers.

[0027] In a second aspect, a method for data signal transmission in a terminal device is provided. The method includes: receiving a data signal, the data signal including a delimiter and data. The delimiter includes at least one first level pair, each first level pair includes a low level and a high level, and the delimiter is used to identify the position where the data starts. The delimiter starts with a high level and ends with a low level or the delimiter starts with a low level and ends with a high level. The method also includes demodulating the above data signal.

[0028] It should be understood that the above solution can be applied to the downlink communication link in the backscatter system, and can also be applied to the downlink communication link of the system with a wake-up mechanism.

[0029] It should be understood that in the above solution, the data signal may be received by the tag device or by a terminal device other than the tag device.

[0030] In the above scheme, the generated data signal includes a delimiter for identifying the starting position of the data signal. It can also be understood that the starting position of the data signal is determined by the delimiter, which can start with a high level and end with a low level; or start with a low level and end with a high level. This can ensure that when the terminal device performs envelope detection output, its detected waveform can start with a falling edge and end with a falling edge, or start with a rising edge and end with a rising edge. This can avoid the problem of inaccurate output waveform timing caused by the asymmetry of the rising edge and the falling edge, and further improve the accuracy of the device calibrating its own clock.

[0031] In combination with the second aspect, in some implementations of the second aspect, the length of the delimiter is k / (15kHz×N), where k and N are positive integers.

[0032] In the above scheme, the length of the delimiter is related to 15kHz, which can improve the accuracy of the output waveform timing while achieving compatibility between the downlink rate and the cellular system time parameters.

[0033] In combination with the second aspect, in some implementations of the second aspect, a first level pair corresponds to a bit in the bit sequence, and different first level pairs correspond to different bits in the bit sequence.

[0034] It should be understood that the bit sequence may be a Barker code, an m-sequence, a Walsh sequence, a Gold sequence, a Golay sequence, or the like.

[0035] In the above solution, the delimiter may include a bit sequence, which has a strong autocorrelation characteristic, which is conducive to improving the accuracy of determining the position of the locator.

[0036] In combination with the second aspect, in some implementations of the second aspect, the bit sequence includes bit 1 and bit 0. The low level length and the high level length in the first level pair corresponding to bit 0 are equal, and the high level length in the first level pair corresponding to bit 1 is L times the low level length, where L is a positive integer greater than 1.

[0037] In combination with the second aspect, in some implementations of the second aspect, the bit sequence includes bit 1 and bit 0. The low level length and the high level length in the first level pair corresponding to bit 0 are equal, and the high level length and the low level length in the first level pair corresponding to bit 1 are equal. When the length of the level corresponding to bit 0 is equal to the length of the level corresponding to bit 1, the high level in bit 0 is before the low level in bit 0, and the high level in bit 1 is after the low level in bit 1, or the high level in bit 0 is after the low level in bit 0, and the high level in bit 1 is before the low level in bit 1.

[0038] It should be understood that the bit sequence waveform may be a Manchester coded waveform.

[0039] In the above scheme, the waveforms of bit 0 and bit 1 are inverted, and at the same time, the lengths of bit 0 and bit 1 are ensured to be equal, so that the content carried by the data signal is simpler, thereby improving the communication efficiency of the downlink.

[0040] In conjunction with the second aspect, in some implementations of the second aspect, the data signal further includes a terminator. The terminator includes at least one second level pair, and the second level pair includes a low level and a high level. The length of the terminator is different from the first length, and the length of the terminator is different from the second length. Wherein, the first length is the sum of the lengths of the high level and the low level in bit 0, the second length is the sum of the lengths of the high level and the low level in bit 1, bit 0 and bit 1 are carried in the data, and the terminator is used to identify the end position of the data.

[0041] It should be understood that the terminator is used to identify the end position of the data, and it can also be understood that the end position of the data is determined by the terminator.

[0042] In the above solution, the data signal also includes an end character, the length of which is related to the length of bit 0 and bit 1, and can clearly identify the end position of the data signal, thereby improving the accuracy of time parameter estimation.

[0043] In combination with the second aspect, in certain implementations of the second aspect, the low level in the second level pair precedes the high level in the second level pair, and a length of the low level in the second level is the same as a length of the low level in bit 0.

[0044] In conjunction with the second aspect, in some implementations of the second aspect, the data signal further includes a calibration symbol. The length of the calibration symbol is the sum of the level waveform length of bit 0 in the data and the level waveform length of bit 1 in the data, and the level waveform length of bit 0 in the data is different from the level waveform length of bit 1 in the data. The calibration symbol is after the delimiter and before the data.

[0045] In the above scheme, the data signal also includes a calibration symbol, which can be used as a reference signal for demodulation. The calibration symbol can change with the changes of bit 0 and bit 1 in the data content part. After receiving the calibration symbol, the terminal device can accurately know the waveforms corresponding to bit 1 and bit 0, so there is no need to inform the terminal device of the changed waveform every time the waveform changes, thereby improving the flexibility of the data signal.

[0046] In combination with the second aspect, in certain implementations of the second aspect, the level waveform length of bit 0 in the data is q / (15kHz×M), and the level waveform length of bit 1 in the data is p / (15kHz×Q), where q, p, M and Q are positive integers.

[0047] In a third aspect, a device for data signal transmission in a network device is provided. The device includes: a processing module and a sending module. The processing module is used to generate a data signal, and the data signal includes a delimiter and data. Among them, the delimiter includes at least one first level pair, each first level pair includes a low level and a high level, and the delimiter is used to identify the position where the data starts. The delimiter starts with a high level and ends with a low level or the delimiter starts with a low level and ends with a high level. The sending module is used to send the data signal.

[0048] It should be understood that the above solution can be applied to the downlink communication link in the backscatter system, and can also be applied to the downlink communication link of the system with a wake-up mechanism.

[0049] It should be understood that in the above solution, the data signal may be generated by the reader / writer, or by a network device other than the reader / writer.

[0050] In the above scheme, the generated data signal includes a signal for identifying the starting position of the data signal, which may start with a high level and end with a low level; or start with a low level as the calibration symbol and end with a high level, which can ensure that when the envelope detection output is performed, the detected waveform may start with a falling edge and end with a falling edge, or start with a rising edge and end with a rising edge, which can avoid the problem of inaccurate output waveform timing caused by the asymmetry of the rising edge and the falling edge, and further improve the accuracy of the device in calibrating its own clock.

[0051] In combination with the third aspect, in certain implementations of the third aspect, the length of the delimiter is k / (15kHz×N), where k and N are positive integers.

[0052] In combination with the third aspect, in certain implementations of the third aspect, a first level pair corresponds to a bit in a bit sequence, and different first level pairs correspond to different bits in the bit sequence.

[0053] It should be understood that the pseudo-random sequence may be a Barker code, an m-sequence, a Walsh sequence, a Gold sequence, a Golay sequence, or the like.

[0054] In combination with the third aspect, in some implementations of the third aspect, the bit sequence includes bit 1 and bit 0. The low level length and the high level length in the first level pair corresponding to bit 0 are equal, and the high level length in the first level pair corresponding to bit 1 is L times the low level length, where L is a positive integer greater than 1.

[0055] In combination with the third aspect, in certain implementations of the third aspect, the bit sequence includes bit 1 and bit 0. The low level length and the high level length in the first level pair corresponding to bit 0 are equal, and the high level length and the low level length in the first level pair corresponding to bit 1 are equal. When the length of the level corresponding to bit 0 is equal to the length of the level corresponding to bit 1, the high level in bit 0 is before the low level in bit 0, and the high level in bit 1 is after the low level in bit 1, or the high level in bit 0 is after the low level in bit 0, and the high level in bit 1 is before the low level in bit 1.

[0056] It should be understood that the bit sequence waveform may be a Manchester coded waveform.

[0057] In combination with the third aspect, in some implementations of the third aspect, the data signal further includes a terminator. The terminator includes at least one second level pair, and the second level pair includes a low level and a high level. The length of the terminator is different from the first length, and the length of the terminator is different from the second length. The first length is the sum of the lengths of the high level and the low level in bit 0, the second length is the sum of the lengths of the high level and the low level in bit 1, bit 0 and bit 1 are carried in the data, and the terminator is used to identify the end position of the data.

[0058] It should be understood that the terminator is used to identify the end position of the data, and it can also be understood that the end position of the data is determined by the terminator.

[0059] In combination with the third aspect, in certain implementations of the third aspect, the low level in the second level pair precedes the high level in the second level pair, and a length of the low level in the second level is the same as a length of the low level in bit 0.

[0060] In conjunction with the third aspect, in some implementations of the third aspect, the data signal further includes a calibration symbol. The length of the calibration symbol is the sum of the level waveform length of bit 0 in the data and the level waveform length of bit 1 in the data, and the level waveform length of bit 0 in the data is different from the level waveform length of bit 1 in the data. The calibration symbol is after the delimiter and before the data.

[0061] In combination with the third aspect, in certain implementations of the third aspect, the level waveform length of bit 0 in the data is q / (15kHz×M), and the level waveform length of bit 1 in the data is p / (15kHz×Q), where q, p, M and Q are positive integers.

[0062] In a fourth aspect, a device for data signal transmission in a terminal device is provided, the device comprising: a receiving module and a processing module. The receiving module is used to receive a data signal, the data signal comprising a delimiter and data. The delimiter comprises at least one first level pair, each first level pair comprises a low level and a high level, and the delimiter is used to identify the position where the data starts. The delimiter starts with a high level and ends with a low level or the delimiter starts with a low level and ends with a high level. The processing module is used to demodulate the data signal.

[0063] It should be understood that the above solution can be applied to the downlink communication link in the backscatter system, and can also be applied to the downlink communication link of the system with a wake-up mechanism.

[0064] It should be understood that in the above solution, the data signal may be generated by the reader / writer, or by a network device other than the reader / writer.

[0065] In the above scheme, the generated data signal includes a signal for identifying the starting position of the data signal, which may start with a high level and end with a low level; or start with a low level and end with a high level. This ensures that when envelope detection output is performed, the detected waveform may start with a falling edge and end with a falling edge, or start with a rising edge and end with a rising edge. This avoids the problem of inaccurate output waveform timing caused by asymmetry between the rising edge and the falling edge, and further improves the accuracy of the device in calibrating its own clock.

[0066] In combination with the fourth aspect, in certain implementations of the fourth aspect, the length of the delimiter is k / (15kHz×N), where k and N are positive integers.

[0067] In combination with the fourth aspect, in certain implementations of the fourth aspect, a first level pair corresponds to a bit in a bit sequence, and different first level pairs correspond to different bits in the bit sequence.

[0068] It should be understood that the pseudo-random sequence may be a Barker code, an m-sequence, a Walsh sequence, a Gold sequence, a Golay sequence, or the like.

[0069] In combination with the fourth aspect, in some implementations of the fourth aspect, the bit sequence includes bit 1 and bit 0. The low level length and the high level length in the first level pair corresponding to bit 0 are equal, and the high level length in the first level pair corresponding to bit 1 is L times the low level length, where L is a positive integer greater than 1.

[0070] In combination with the fourth aspect, in certain implementations of the fourth aspect, the bit sequence includes bit 1 and bit 0. The low level length and the high level length in the first level pair corresponding to bit 0 are equal, and the high level length and the low level length in the first level pair corresponding to bit 1 are equal. When the length of the level corresponding to bit 0 is equal to the length of the level corresponding to bit 1, the high level in bit 0 is before the low level in bit 0, and the high level in bit 1 is after the low level in bit 1, or the high level in bit 0 is after the low level in bit 0, and the high level in bit 1 is before the low level in bit 1.

[0071] It should be understood that the bit sequence waveform may be a Manchester coded waveform.

[0072] In combination with the fourth aspect, in certain implementations of the fourth aspect, the data signal further includes a terminator. The terminator includes at least one second level pair, and the second level pair includes a low level and a high level. The length of the terminator is different from the first length, and the length of the terminator is different from the second length. The first length is the sum of the lengths of the high level and the low level in bit 0, the second length is the sum of the lengths of the high level and the low level in bit 1, bit 0 and bit 1 are carried in the data, and the terminator is used to identify the end position of the data.

[0073] It should be understood that the terminator is used to identify the end position of the data, and it can also be understood that the end position of the data is determined by the terminator.

[0074] In combination with the fourth aspect, in certain implementations of the fourth aspect, the low level in the second level pair precedes the high level in the second level pair, and the length of the low level in the second level is the same as the length of the low level in bit 0.

[0075] In conjunction with the fourth aspect, in some implementations of the fourth aspect, the data signal further includes a calibration symbol. The length of the calibration symbol is the sum of the level waveform length of bit 0 in the data and the level waveform length of bit 1 in the data, and the level waveform length of bit 0 in the data is different from the level waveform length of bit 1 in the data. The calibration symbol is after the delimiter and before the data.

[0076] In combination with the fourth aspect, in certain implementations of the fourth aspect, the level waveform length of bit 0 in the data is q / (15kHz×M), and the level waveform length of bit 1 in the data is p / (15kHz×Q), where q, p, M and Q are positive integers.

[0077] In a fifth aspect, a communication device is provided, comprising at least one processor, wherein the at least one processor is coupled to at least one memory, the at least one memory is used to store computer programs or instructions, and the at least one processor is used to call and run the computer program or instructions from the at least one memory, so that the communication device executes the method in any possible implementation manner of the first aspect.

[0078] In a sixth aspect, a communication device is provided, comprising at least one processor, the at least one processor being coupled to at least one memory, the at least one memory being used to store computer programs or instructions, and the at least one processor being used to call and run the computer program or instructions from the at least one memory, so that the communication device executes the method in any possible implementation manner in the second aspect.

[0079] In one example, the communication device may be a network device.

[0080] In another example, the communication device may be a component (eg, a chip or an integrated circuit) installed in a network device.

[0081] In a seventh aspect, the present application provides a computer-readable storage medium, wherein the computer-readable storage medium stores computer instructions, and when the computer instructions are executed on a computer, the method in the first aspect or any possible implementation thereof is executed.

[0082] In one example, the communication device may be a terminal device.

[0083] In another example, the communication device may be a component (eg, a chip or an integrated circuit) installed in the terminal device.

[0084] In an eighth aspect, the present application provides a computer-readable storage medium, wherein the computer-readable storage medium stores computer instructions. When the computer instructions are executed on a computer, the method in the second aspect or any possible implementation thereof is executed.

[0085] In a ninth aspect, the present application provides a computer program product, comprising a computer program code, which, when executed on a computer, enables the method in the first aspect or any possible implementation thereof to be executed.

[0086] In a tenth aspect, the present application provides a computer program product, comprising a computer program code, which, when executed on a computer, enables the method in the second aspect or any possible implementation thereof to be executed.

[0087] In the eleventh aspect, the present application provides a chip comprising a processor and a communication interface, wherein the communication interface is used to receive a signal and transmit the signal to the processor, and the processor processes the signal so that the method in the first aspect or any possible implementation thereof is executed.

[0088] In the twelfth aspect, the present application provides a chip comprising a processor and a communication interface, wherein the communication interface is used to receive a signal and transmit the signal to the processor, and the processor processes the signal so that the method in the second aspect or any possible implementation thereof is executed.

[0089] In a thirteenth aspect, the present application provides a communication system, comprising the communication device as described in the fifth aspect and the communication device as described in the sixth aspect. BRIEF DESCRIPTION OF THE DRAWINGS

[0090] Figure 1 An example of a system architecture to which the embodiments of the present application are applicable is shown.

[0091] Figure 2 Another system architecture example applicable to the embodiments of the present application is shown.

[0092] Figure 3 Another system architecture example applicable to the embodiments of the present application is shown.

[0093] Figure 4 is an example of a data type currently being proposed.

[0094] Figure 5 is an example of a currently proposed method for data signal transmission.

[0095] Figure 6 It is a schematic flow chart of a method for data signal transmission proposed in this application.

[0096] Figure 7 This is an example of a data signal structure proposed in this application.

[0097] Figure 8 It is a schematic flow chart of a method for transmitting a delimiter proposed in this application.

[0098] Fig. 9 It is a schematic flow chart of a method for transmitting a terminator proposed in this application.

[0099] Fig.10 This is an example of another data signal structure proposed in this application.

[0100] Fig.11 It is a schematic flow chart of another method for transmitting a terminator proposed in the present application.

[0101] Fig.12 This is an example of another data signal structure proposed in this application.

[0102] Fig.13 This is an example of another data signal structure proposed in this application.

[0103] Fig.14 This is an example of another data signal structure proposed in this application.

[0104] Fig.15 It is a schematic block diagram of a device for data signal transmission in a network device proposed in the present application.

[0105] Fig.16 It is a schematic block diagram of an apparatus for transmitting data signals in a terminal device proposed in the present application.

[0106] Fig.17 It is a schematic block diagram of a communication device proposed in this application.

[0107] Fig.18 It is a schematic block diagram of a communication device proposed in this application. DETAILED DESCRIPTION

[0108] The technical solution in this application will be described below in conjunction with the accompanying drawings.

[0109] The technical solutions of the embodiments of the present application can be applied to various communication systems, such as: long term evolution (LTE) system, LTE frequency division duplex (FDD) system, LTE time division duplex (TDD), universal mobile telecommunication system (UMTS), worldwide interoperability for microwave access (WiMAX) communication system, fifth generation (5G) system or new radio (NR), etc.

[0110] The terminal device in the embodiments of the present application may refer to user equipment (UE), access terminal, user unit, user station, mobile station, mobile station, remote station, remote terminal, mobile device, user terminal, terminal, wireless communication device, user agent or user device. The terminal device may also be a cellular phone, a cordless phone, a session initiation protocol (SIP) phone, a wireless local loop (WLL) station, a personal digital assistant (PDA), a handheld device with wireless communication function, a computing device or other processing device connected to a wireless modem, a vehicle-mounted device, a wearable device, a terminal device in a future 5G network or a terminal device in a future evolved public land mobile communication network (PLMN), etc., and the embodiments of the present application are not limited to this.

[0111] As an example but not limitation, in the embodiments of the present application, the terminal device may also be a wearable device. Wearable devices may also be referred to as wearable smart devices, which are a general term for wearable devices that are intelligently designed and developed using wearable technology for daily wear, such as glasses, gloves, watches, clothing, and shoes. A wearable device is a portable device that is worn directly on the body or integrated into the user's clothes or accessories. Wearable devices are not only hardware devices, but also powerful functions achieved through software support, data interaction, and cloud interaction. Broadly speaking, wearable smart devices include full-featured, large-sized, and fully or partially independent of smartphones, such as smart watches or smart glasses, as well as devices that only focus on a certain type of application function and need to be used in conjunction with other devices such as smartphones, such as various types of smart bracelets and smart jewelry for vital sign monitoring.

[0112] In addition, in the embodiments of the present application, the terminal device may also be a terminal device in an Internet of Things (IoT) system. IoT is an important part of the future development of information technology. Its main technical feature is to connect objects to the network through communication technology, thereby realizing an intelligent network that interconnects people and machines and things.

[0113] In the embodiments of the present application, IoT technology can achieve massive connections, deep coverage, and terminal power saving through narrowband (NB) technology, for example. For example, NB only includes one resource block (RB), that is, the bandwidth of NB is only 180KHz. To achieve massive access, it is necessary to require that the terminal is discrete in access. According to the communication method of the embodiments of the present application, it can effectively solve the congestion problem of massive IoT technology terminals when accessing the network through NB.

[0114] In an embodiment of the present application, the terminal device may be a tag device, which may be a passive tag or a semi-active tag. If it is a passive tag, the tag itself does not have a power source, and it can obtain energy from a network device. The passive tag may also be called a passive Internet of Things device, which is not limited in the present application.

[0115] The network device in the embodiments of the present application may be a device for communicating with a terminal device. The network device may be an evolved base station (evolutional NodeB, eNB or eNodeB) in an LTE system, or a wireless controller in a cloud radio access network (Cloud Radio Access Network, CRAN) scenario, or the network device may be a relay station, an access point, a vehicle-mounted device, a wearable device, a network device in a future 5G network, or a network device in a future evolved PLMN network, etc., and the embodiments of the present application are not limited thereto.

[0116] In an embodiment of the present application, the network device may be a reader / writer, that is, a handheld or fixed device that reads (and sometimes writes) tag information. It may also be understood as a device that communicates with a tag device, or a device with reading and writing functions.

[0117] Figure 1An example of the architecture of a system 100 applicable to an embodiment of the present application is shown. The system includes a reader 110 and a tag 120, wherein the reader 110 and the tag 120 can communicate with each other through a radio frequency (RF) signal. The reader 110 can transmit an RF signal, and the tag 120 located near the reader 110 can detect the RF signal sent by the reader and return a response RF signal to the reader 110, wherein the response RF signal can carry the relevant information of the tag 120 itself. The reader 110 can detect and parse the response RF signal. For a single-base passive ultra-high frequency (UHF) radio frequency identification (RFID) system, the reader 110 provides energy to the tag by sending a downlink excitation signal to the tag 120, and the tag receives the signaling sent by the reader 110 and sends an uplink signal to the reader 110 through backscattering technology. In this way, the reader / writer 110 can identify the tag 120 and perform read / write operations on the tag 120 .

[0118] The applicable system may be a backscatter communication system, which generally consists of an exciter, a receiver and a reflector, and its communication link includes a downlink from the exciter to the reflector and an uplink from the reflector to the receiver. For example, the backscatter communication system may be a bi-static backscatter system, such as Figure 2 As shown in (a) in the figure, the exciter sends a signal or data to the reflector, and then the transmitter sends a signal or data to the receiver. The system includes a downlink from the exciter to the reflector and an uplink from the reflector to the receiver. When the transceiver completes the downlink excitation and uplink reception functions at the same time, a monostatic backscattering system is formed. Figure 2 As shown in (b) in FIG. 1 , the system includes a downlink from the transceiver to the reflector and an uplink from the reflector to the transceiver.

[0119] The downlink generally adopts ASK or OOK modulation, and the reflector can demodulate the downlink modulated signal based on a low-power envelope detector. The reflector changes the load of the antenna based on the information bits to be sent, so that its information bits can be modulated onto the incident carrier to achieve wireless transmission of uplink data. Since the reflector does not require high-power devices such as RF oscillators, power amplifiers, and low-noise amplifiers, it has the characteristics of low cost and ultra-low power consumption, which is very suitable for IoT applications. Reflectors can be divided into passive reflectors and semi-active / battery-assisted passive (BAP) reflectors according to whether they are battery-powered. Passive reflectors do not have their own battery power supply, and need to rectify the RF signal in the downlink, and use the DC voltage output by the rectification as a power supply for analog and digital circuits. Semi-passive reflectors are battery-powered and do not rely on the rectification output of the downlink signal.

[0120] Optionally, in the backscatter communication system, the reflector may be a passive tag device or a semi-active tag device, which is not limited in the embodiments of the present application.

[0121] In addition to the backscatter communication system, there is also a system with a wake-up mechanism, in which the network device can send a downlink WUS to the terminal device in power saving mode (PSM) or sleep mode to achieve the effect of terminal energy saving, such as Figure 3 The modulation mode of the wake-up signal can adopt OOK / ASK, so that the terminal device can demodulate the downlink modulation signal based on a low-power envelope detector, thereby reducing the standby power consumption of the terminal wake-up receiver and extending the standby life.

[0122] Optionally, in a system with a wake-up mechanism, the terminal device may be an active tag device, which is not limited in the embodiments of the present application.

[0123] The downlink data defined by the UHF / RFID standard International Standards Organization (ISO) / International Electrotechnical Commission (IEC) 18000-6C adopts pulse interval encoding (PIE). The principle of PIE encoding is to represent data by defining different time widths between the falling edges of pulses. PIE encoding is the encoding method for the reader to transmit data to the electronic tag. PIE encoding is an encoding method in which "0" and "1" have different time intervals. It is based on a continuous fixed-interval pulse, and the repetition period of the pulse is different according to "0" and "1".

[0124] It should be understood that PIE coding will not have a long low level, and the average time of the high level is longer. When sending downlink signaling, the reader can provide more RF energy to the passive tag to increase the downlink communication distance.

[0125] According to the standard, the data frame sent from the reader to the tag consists of a preamble / frame-sync signal, bits 0 and 1. The standard defines a time interval parameter, type A reference interval (Tari), which is used to define the duration of different waveforms.

[0126] Figure 4 The pulse coding of bit 0 and bit 1 is shown. Figure 4 As shown in the figure, the duration of bit 0 is Tari, and the low level length is the pulse width (PW); the duration of bit 1 is 1.5Tari~2Tari, and the low level length is PW. Among them, the value range of Tari is 6.25μs~25μs, and the value range of PW is MAX(0.265Tari, 2μs)~0.525Tari, among which MAX(0.265Tari, 2μs) means taking the maximum value between 0.265Tari and 2μs.

[0127] The downlink frame structure generally consists of a frame header, data, and a checksum. The frame header varies with the downlink signaling, and the signaling between the tag and the reader is used as an example to illustrate. The query signaling (Query) uses the preamble as the frame header, and other commands use frame synchronization (frame-sync) as the frame header. The frame header includes a delimiter, which is a low level of 12.5μs in length. The delimiter is used to identify the starting position of the tag downlink data frame.

[0128] The delimiter of the downlink frame structure defined by the ISO / IEC 18000-6C standard is used not only to mark the start position of the frame, but also to calibrate the frequency of the tag's own return signal. The tag samples the output waveform of the detection based on its own clock, calculates its own clock frequency based on the number of sampling points, and returns the uplink data after calibrating the frequency. Therefore, the accuracy of the tag's detection of the delimiter length is extremely important. Since the tag generally uses an envelope detector to demodulate the downlink signaling, the rise and fall times of the output voltage signal are often asymmetric. For example, Figure 5 As shown in (a), when the falling time of the signal output by the tag detector is greater than the rising time, the length of the delimiter detected by the tag will be less than 12.5 μs; for example Figure 5As shown in (b), when the falling time of the tag output signal is less than the rising time, the delimiter length detected by the tag will be greater than 12.5μs. The above two situations will increase the frequency deviation of the baseband signal returned by the tag, and it may not be possible to achieve the accuracy required by the protocol.

[0129] In addition, the delimiter length of the downlink frame structure is 12.5 μs, which may sometimes be incompatible with the symbol length of orthogonal frequency division multiplexing (OFDM) of the fourth generation (4G) system or 5G cellular system, thereby hindering the integration of the cellular communication system and the single-carrier ASK system.

[0130] In view of the above problems, the present application provides a method for data signal transmission, which can improve the accuracy of the timing of the envelope detection output waveform of the device on the one hand, and can be better compatible with the time parameters of the cellular system on the other hand.

[0131] Figure 6 1 is a flow chart of a method for data signal transmission provided by an embodiment of the present application. Figure 6 As shown, the method may include steps 610 to 630. Each step is described in detail below.

[0132] S610, the network device generates a data signal, the data signal includes a delimiter and data, the delimiter starts with a high level and ends with a low level; or, the delimiter starts with a low level and ends with a high level.

[0133] S620, the network device sends a data signal to the terminal device.

[0134] S630, the terminal device demodulates the data signal.

[0135] It should be understood that the embodiments of the present application are applied to the downlink communication link in the backscatter system, and may also be applied to the downlink communication link of the system with a wake-up mechanism.

[0136] It should be understood that in the embodiments of the present application, a data signal is generated by a network device and the signal is sent, and the network device includes but is not limited to a reader / writer device.

[0137] Exemplarily, the network device sends the data signal to the terminal device, and the terminal device may be a passive reflector, a semi-passive reflector, or a battery-assisted reflector.

[0138] Exemplarily, a network device generates a data signal, the data signal includes a delimiter and data content, wherein the delimiter is used to identify the starting position of the data signal, and the delimiter is located at the very beginning of the data signal. For example, the data signal may be a data frame structure, the data frame structure may be composed of a frame header, data, and a frame trailer, and the delimiter is located at the frame header of the data frame.

[0139] The delimiter is used to identify the starting position of the data signal, which can also be understood as the starting position of the data signal is determined by the delimiter.

[0140] The delimiter includes at least one first level pair, each first level pair includes a low level and a high level. The delimiter starts with a low level and ends with a high level, or the delimiter starts with a high level and ends with a low level. It can also be understood that the delimiter includes at least one high level and at least one low level, the delimiter starts with a low level and ends with a high level, or the delimiter starts with a high level and ends with a low level. It can also be understood that the delimiter includes a first level and a second level, the first level includes a low level, the low level is located at the starting position of the first level, the second level includes a high level, the high level is located at the ending position of the second level, and the first level is located at the starting position of the delimiter, the second level is located at the ending position of the delimiter, or the second level is located at the starting position of the delimiter, and the first level is located at the ending position of the delimiter. In other words, as long as it can be expressed that the delimiter starts with a low level and ends with a high level, or starts with a high level and ends with a low level, it belongs to the scope of protection of the embodiments of the present application.

[0141] Exemplarily, when the network device is a reader / writer and the terminal device is a passive tag device, because the passive tag device itself does not have a power supply, the reader / writer is required to send a downlink excitation signal to provide energy for the passive tag device. In other words, the downlink excitation signal has a high level and a low level. The high level represents a signal input, which provides energy for the operation of the passive tag, and the low level represents no signal input, that is, no energy is provided for the passive tag. The passive tag device will have a high-level continuous wave before or after receiving the data signal. The downlink excitation signal is an ASK / OOK modulated signal. After receiving the signal, the passive tag device generally demodulates the signal by envelope detection.

[0142] The delimiter in the data signal sent by the network device to the passive tag device may start with a low level and end with a high level.

[0143] Exemplarily, the delimiter may be composed of a level pair, which includes a high level and a low level, and starts with a low level and ends with a high level. After receiving the data signal, the passive tag device uses an envelope detector to convert the radio frequency signal into a baseband signal. When it starts to detect the low level, it generates a falling edge, which can confirm that there is a data signal that needs to be transmitted. After the high level detection is completed, a falling edge is detected again, which can confirm the location of the data signal.

[0144] For another example, the delimiter may be composed of two level pairs, each of which includes a high level and a low level, and each level pair starts with a low level and ends with a high level. It should be understood that before transmitting data, the network device needs to agree with the terminal device on the number of falling edges detected to consider the delimiter to be finished. Therefore, when the delimiter is composed of two level pairs, it can be agreed that the delimiter is considered to be finished when the third falling edge is detected.

[0145] It should be understood that the delimiter is composed of two level pairs, and it can also be understood that the delimiter is composed of four levels, two low levels and two high levels, and starts with a low level and ends with a high level.

[0146] For another example, the delimiter may be composed of three level pairs. Since in a passive tag device, it needs to start with a low level and end with a high level, the first level pair and the third level pair start with a high level and end with a low level. As for the second level pair between the first level pair and the third level pair, no limitation is imposed.

[0147] It should be understood that the above is merely an exemplary description. The delimiter may include at least one level pair. When it includes multiple level pairs, the level pair at the starting position and the level pair at the ending position of the delimiter need to satisfy the condition that the delimiter starts with a low level and ends with a high level. As for the number and position of the high and low levels of other level pairs, the embodiments of the present application do not impose any limitation.

[0148] Exemplarily, when the network device is a reader / writer and the terminal device is a semi-passive tag device, the semi-passive tag device itself has a power supply, so there is no need for the reader / writer to send a downlink excitation signal to provide energy, but the delimiter in the data signal sent by the reader / writer to the semi-passive tag device can start with a high level and end with a low level.

[0149] Exemplarily, the delimiter may be composed of a level pair, which includes a high level and a low level, and starts with a high level and ends with a low level. After receiving the data signal, the passive tag device uses envelope detection for output. When it starts to detect the high level, it generates a rising edge, which can confirm that there is a data signal that needs to be transmitted. After the low level detection is completed, a rising edge is detected again, which can confirm the position of the data signal.

[0150] Similarly, the delimiter can also be composed of multiple level pairs. When there are multiple level pairs, the reader and the semi-passive tag device agree on the detection of the rising edge at which the delimiter is considered to end. The specific implementation can refer to the passive tag device, but the difference from the passive tag device is that the delimiter in the data signal received by the semi-passive tag device starts with a high level and ends with a low level.

[0151] As a possible implementation method, the length of the delimiter is k / (15kHz×N), where k and N are positive integers. In other words, it can be related to the length of orthogonal frequency division multiplexing (OFDM); or, the length of the low level and / or the length of the high level is related to OFDM. Since the length of the delimiter is k / N of the OFDM symbol length (1 / (15kHz)) with a subcarrier spacing of 15kHz, the OFDM baseband signal generation method in the existing 4G / 5G mobile communication system can be reused, and the function of generating ASK / OOK signals in the 4G / 5G mobile communication system can be realized without using a dedicated ASK / OOK baseband signal generation circuit. In addition, the ASK / OOK signal generated based on the OFDM method ensures orthogonality with the cellular OFDM signal, which can greatly reduce the interference of the ASK / OOK signal to the existing cellular OFDM signal.

[0152] Exemplarily, the length of the delimiter may be related to the length of OFDM. The length of the OFDM is 15kHz in the 4G system and may be 15kHz, 30kHz, 60kHz, 90kHz, 120kHz, etc. in the 5G system. It may be expressed as 15kHz×N, where N is a positive integer. It should be noted that the present application simply lists several existing lengths, which may also be applicable to future communication systems, and the embodiments of the present application do not place too many restrictions on this.

[0153] The length of the delimiter may be k / (15kHz×N), which may be the length of each level pair is k / (15kHz×N), or the length of each low level and / or high level is k / (15kHz×N), for example, the length of the high level and the low level are equal, and the duty cycle is 50%. It should be noted that as long as the length of the delimiter is compatible with the system time parameter, it belongs to the protection scope of the embodiments of the present application.

[0154] The more level pairs the delimiter includes, the longer the length of the delimiter is. Using a longer delimiter can improve the frame synchronization performance of the downlink signal.

[0155] As a possible implementation method, a first level pair corresponds to a bit in a bit sequence, and different first level pairs correspond to different bits in the bit sequence. The bit sequence can also be called a pseudo-random sequence, wherein the pseudo-random sequence can be a Barker code, a longest linear feedback shift register sequence (abbreviated as m-sequence), a Walsh sequence, a Gold sequence, a Golay sequence, etc.

[0156] The delimiter may include any one of the above-mentioned pseudo-random sequences. Exemplarily, the pseudo-random sequence includes bit 0 and bit 1, wherein bit 0 is a low level and bit 1 is a high level. Then, the pseudo-random sequence needs to use bit 0 as the starting bit of the sequence and bit 1 as the last bit of the sequence, or use bit 1 as the starting bit of the sequence and bit 0 as the last bit of the sequence. The embodiments of the present application do not impose any limitation on other bits in the bit sequence except the starting bit and the last bit.

[0157] For another example, the pseudo-random sequence is a Barker code, in which bit 0 and bit 1 are both composed of a high level and a low level, then the bit sequence can correspond one-to-one to each first level pair. For example, the first level pair includes three first level pairs, namely level pair #1, level pair #2 and level pair #3, level pair #1 starts with a low level and ends with a high level, level pair #2 starts with a high level and ends with a low level, and level pair #3 starts with a low level and ends with a high level. The bit sequence is 010, in which bit 0 starts with a low level and ends with a high level, and bit 1 starts with a high level and ends with a low level. Then level pair #1 corresponds to bit 0, level pair #2 corresponds to bit 1, and level pair #3 corresponds to bit 0.

[0158] When the bit sequence corresponds one-to-one to each first level pair, the length of the low level in the first level pair corresponding to bit 0 is equal to the length of the high level in the first level pair corresponding to bit 1, and the length of the high level in the first level pair corresponding to bit 1 is L times the length of the low level, where L is a positive integer greater than 1.

[0159] Exemplarily, the length of the high level in bit 0 is equal to the length of the low level in bit 0, and the length corresponding to the high level in bit 1 is L times the length corresponding to the low level in bit 1, where L is a positive integer. It can also be understood that bit 0 consists of at least one high level and at least one low level, the number of high levels is L times the number of low levels, the length of each high level is equal, the length of each low level is equal, and the length of each high level is equal to the length of each low level. For example, bit 0 includes a high level and a low level, bit 1 includes a low level and three high levels, the number of high levels is 3 times the number of low levels, but the length of each high level is equal to the length of each low level.

[0160] It should be noted that the bit sequence includes bit 1 and bit 0, the low level length and the high level length in the level pair corresponding to bit 0 are equal, the high level length and the low level length in the first level pair corresponding to bit 1 are equal, and when the length of the level corresponding to bit 0 is equal to the length of the level corresponding to bit 1, it can be a Manchester code. At this time, the waveform of bit 1 is the inverted waveform of bit 0, that is, the high level in bit 0 is before the low level in bit 0, and the high level in bit 1 is after the low level in bit 1, or, the high level in bit 0 is after the low level in bit 0, and the high level in bit 1 is before the low level in bit 1.

[0161] In an embodiment of the present application, the delimiter can be a pseudo-random sequence. After the terminal device receives the pseudo-random sequence, it can perform correlation operations with the same pseudo-random sequence stored in itself, find the exact position of the frame data through the peak point of the correlation operation result, and improve the synchronization performance under low signal-to-noise ratio conditions.

[0162] As a possible implementation method, the data signal may also include an end character, which includes at least one second level pair, the second level pair includes a low level and a high level, the length of the end character is different from the first length, and the length of the end character is different from the second length, the first length is the sum of the high level and low level lengths in bit 0, the second length is the sum of the high level and low level lengths in bit 1, bit 0 and bit 1 are both carried in the data content part, and the end character is used to identify the end position of the data signal.

[0163] Exemplarily, the length of the terminator is different from the first length and the second length. It can be understood that the length of the terminator is different from the length of bit 0 and the length of bit 1, so that the end position of the frame can be clearly known.

[0164] Exemplarily, the length of the terminator may also be related to the length of the second level pair, or the length of the second level pair may be related to the length corresponding to bit 0 and the length corresponding to bit 1. For example, the length of the second level pair may be the sum of the length corresponding to bit 0 and the length corresponding to bit 1.

[0165] Optionally, the length of the terminator may be a length agreed upon by the network device and the terminal device. As long as the length is different from the first length and the second length, it falls within the protection scope of the embodiment of the present application, and the embodiment of the present application does not impose any limitation on this.

[0166] Optionally, the low level in the second level pair is before the high level in the second level pair, and the length of the low level in the second level is equal to the length of the low level in bit 0.

[0167] For the terminal device being a passive tag device, there is a continuous wave of high level after the terminator. The passive tag device receives the terminator in the data signal sent by the reader / writer, which starts with a low level and ends with a high level. It is impossible to accurately determine whether the data signal has ended. However, when the length of the terminator is the sum of the length corresponding to bit 0 and the length corresponding to bit 1, or a certain agreed length, the length detected by the passive tag device is equal to the sum of the length corresponding to bit 0 and the length corresponding to bit 1, or the passive tag device detects a certain agreed length, then the data signal can be considered to have ended, and the high level thereafter can be considered to be a continuous wave.

[0168] Exemplarily, the terminator may further include a plurality of second level pairs, each second level pair having the same length, each second level pair having the same low level length and the same high level length, or it may be understood that each second level pair is the same.

[0169] Optionally, the terminator includes a plurality of second level pairs, each second level pair has a different length, or each second level pair is different but starts with a low level and ends with a high level, and the length of the terminator is a certain agreed length.

[0170] Optionally, the terminator includes at least one second level pair, the second level pair includes a low level and multiple high levels, and the length of the low level is equal to that of each high level. That is, in the above description, the terminator is described from the length of the high level and the length of the low level, that is, the terminator includes a high level and a low level, and the length of the high level is a times the length of the low level, where a is a positive integer. It is also possible to make the length of the low level equal to the length of the high level, and to limit the high level and the low level in terms of quantity.

[0171] Exemplarily, the terminator includes a high level and a low level, and the length of the high level is 5 times the length of the low level. It can also be expressed as follows: the terminator includes 5 high levels and 1 low level, the length of each high level is equal, and the length of the low level is equal to the length of the high level.

[0172] As a possible implementation method, the data signal also includes a calibration symbol, the length of which is the sum of the level waveform length of bit 0 in the data and the level waveform length of bit 1 in the data. The level waveform length of bit 0 in the data is different from the level waveform length of bit 1 in the data. The calibration is after the delimiter and before the data.

[0173] Exemplarily, the calibration symbol can be used as a reference for decoding the PIE symbol, and its length can be the sum of the lengths of bit 0 and bit 1. When the length of the PIE symbol is less than half of the length of the calibration symbol, it can be judged as "0", and when the length of the PIE symbol is greater than half of the length of the calibration symbol, it can be judged as "1". The above description is only an exemplary description. It can also be that the length of the PIE symbol is greater than half of the length of the calibration symbol and is judged as "0", the length of the PIE symbol is less than half of the length of the calibration symbol and is judged as "1", or the length of the PIE symbol is greater than two-thirds of the length of the calibration symbol and is judged as "0", and the embodiment of the present application does not impose any limitation on this.

[0174] It should be understood that the level waveform length of bit 0 in the data can also be understood as the level length of bit 0, and the level waveform length of bit 1 in the data can also be understood as the level length of bit 1. The embodiments of the present application do not impose too many restrictions on this.

[0175] When the data signal includes the calibration symbol, the network device does not need to send the waveform corresponding to bit 0 and bit 1 to the terminal device. The terminal device receives the data signal and detects the calibration part to determine the waveform corresponding to bit 0 and bit 1, which greatly improves the flexibility of the data signal. It can also be understood that the calibration symbol can be used as a decision basis for the terminal device to decode the downlink data, which can reduce the complexity and power consumption of the demodulation circuit of the terminal device.

[0176] As a possible implementation method, the level waveform length of 0 bit in the data can be q / (15kHz×M), and the level waveform length of 1 bit in the data can be p / (15kHz×Q), wherein q, p, M and Q are positive integers, in other words, they can be related to the length of orthogonal frequency division multiplexing (OFDM); or, the length of the low level and / or the length of the high level are related to OFDM. Since the level waveform length of bit 0 is q / M of the OFDM symbol length (1 / (15kHz)) of the 15kHz subcarrier spacing, and the level waveform length of bit 1 is p / Q of the OFDM symbol length (1 / (15kHz)) of the 15kHz subcarrier spacing. Therefore, the OFDM baseband signal generation method in the existing 4G / 5G mobile communication system can be reused, and the function of generating ASK / OOK signals in the 4G / 5G mobile communication system can be realized without using a dedicated ASK / OOK baseband signal generation circuit. In addition, the ASK / OOK signal generated based on the OFDM method ensures orthogonality with the cellular OFDM signal, which can greatly reduce the interference of the ASK / OOK signal to the existing cellular OFDM signal.

[0177] Exemplarily, the level waveform length of bit 0 may be related to the length of OFDM, and the level waveform length of bit 1 may be related to the length of OFDM. The length of OFDM is 15kHz in the 4G system and can be 15kHz, 30kHz, 60kHz, 90kHz, 120kHz, etc. in the 5G system. It can be expressed as 15kHz×P, where P is a positive integer. It should be noted that the present application simply lists several existing lengths, which may also be applicable to future communication systems, and the embodiments of the present application do not place too many restrictions on this.

[0178] It should be understood that in the present application, the level waveform of bit 0 in the data is composed of a high level and a low level, wherein the waveform length of the high level and the waveform length of the low level may be the same or different. The level waveform of bit 1 in the data is composed of a high level and a low level, wherein the waveform length of the high level and the waveform length of the low level may be the same or different. The level waveform length of bit 0 in the data and the level waveform length in data 1 may also be the same or different. When the level waveform length of bit 0 in the data and the level waveform length in data 1 may be the same, the level waveform of bit 0 in the data is the inverted waveform of the level waveform of bit 1 in the data, or the low level length of bit 0 in the data is different from the low level length of bit 1 in the data, and the high level length of bit 0 in the data is different from the high level length of bit 1 in the data, and the embodiments of the present application do not limit this too much.

[0179] In order to understand this application more clearly, the following Figures 7 to 12 For example, the network device is a reader / writer, the terminal device is a passive device, and the application system can be a backscattering system. Figure 6 The data signals involved are introduced.

[0180] Figure 7 It is a schematic diagram of a data signal provided in an embodiment of the present application.

[0181] The present application embodiment is described by taking the data as PIE encoding, the network device (encoding device) as a reader / writer, and the terminal device (decoding device) as a tag as an example. In the present application embodiment, the structure of the downlink data frame (data signal) is as follows: Figure 7 As shown, the downlink data frame structure consists of a delimiter, a calibration character, data, a check code and an end character.

[0182] The delimiter is used to identify the starting position of the downlink data frame. It consists of a section of high level and a section of low level, and starts with a low level and ends with a high level.

[0183] It should be understood that in the embodiments of the present application, the explanation is made by taking the tag as a passive tag, that is, the tag device itself has no energy, so it needs to rely on external energy to maintain its own operation. Among them, the low level indicates that the reader does not provide energy to the tag, and the high level indicates that the reader provides energy to the tag. There will be a high level before the delimiter, so the delimiter needs to start with a low level to mark the starting position of the downlink data frame. However, in order to improve the accuracy of the tag's timing of the envelope detection output waveform, it is necessary for the tag to detect two falling edges, so it needs to end with a high level.

[0184] In a possible implementation, the length of the low level is equal to the length of the high level, both of which are 1 / 90kHz (i.e., 11.11μs), that is, the duration of the low level is 1 / 90kHz (i.e., 11.11μs), and the duration of the high level is also 1 / 90kHz (i.e., 11.11μs). In other words, the total length of the delimiter is 1 / 45kHz (i.e., 22.22μs).

[0185] It should be understood that the above description is only based on the example that the low level and high level are equal in length, and they can also be different, for example, the low level duration is 1 / 90kHz (ie, 11.11μs) and the high level duration is 2 / 90kHz (ie, 22.22μs). The present application embodiment does not limit this.

[0186] It should be understood that the duration is only illustrated using 1 / 90kHz as an example, that is, 90kHz is used as an example. It can also be 15kHz in the 900M frequency band in the 4G system, or the frequency range (frequency range, FR) in the 5G system includes 15kHz, 30kHz and 60kHz in the FR1 (450MHz~6000MHz) frequency band, 60kHz and 120kHz in the FR2 (24.25GHz~52.6GHz) frequency band, or it can also be the frequency in the future communication system. The embodiment of the present application does not make too many restrictions on this. That is to say, as long as the symbol unit used to identify the starting position of the downlink data frame is met, it includes a high level and a low level, which are all within the protection scope of the embodiment of the present application.

[0187] When there is a high level and a low level, and it starts with a low level and ends with a high level, the reader transmits the baseband signal and the corresponding tag detection output waveform is as follows: Figure 8 As shown, from Figure 8 It can be seen that the length between the two falling edges detected by the tag is equal to the length of the baseband signal emitted by the reader, which is the sum of the low level and high level durations. In the embodiment of the present application, it can be 22.22 μs.

[0188] In the above scheme, the delimiter includes a high level and a low level, wherein the low level is located at the starting position of the delimiter and the high level is located at the ending position of the delimiter, thereby ensuring that the starting position and the ending position of the tag detection output signal are both falling edges, thereby avoiding the timing error problem caused by the inconsistent rising and falling times of the tag detection output waveform.

[0189] The calibration character consists of bit 0 and bit 1, such as Figure 7 As shown, the waveform of bit 0 includes a high level and a low level, which starts with a low level and ends with a high level, and the length of the low level is equal to the length of the high level. The waveform of bit 1 includes a low level and multiple high levels, which also starts with a low level and ends with a high level. The length of each high level is equal, and the length of a high level is equal to the length of a low level. Figure 7 The number of high levels shown is three times the number of low levels, which can also be understood as bit 1 is composed of a high level and a low level, and the length of the high level is three times the length of the low level.

[0190] For example, the high level length and the low level length of bit 0 are equal, for example, they can both be 1 / 90kHz (i.e. 11.11μs), the low level length of bit 1 is equal to the low level length of bit 0, which can also be 1 / 90kHz (i.e. 11.11μs), and the high level length of bit 1 is 3 times the low level length, which can be 3 / 90kHz (i.e. 33.33μs).

[0191] The calibration mark can provide a data decoding reference for the tag. For example, after the tag detects the length of bit 0 and bit 1, the average of the two lengths is used as the basis for decision for decoding. Specifically, when the length of the PIE symbol is less than half of the symbol length of the calibration mark, it is judged as "0", and when the length of the PIE symbol is greater than half of the symbol length of the calibration mark, it is judged as "1". In addition, it can also be decoded based on a certain ratio of the sum of the two, for example, 0.6 times, 0.4 times, etc., which will not be explained in detail in the embodiments of this application.

[0192] It should be understood that the length of the high level and the low level of bit 0 in the present application may also be unequal, and the number of the high level and the low level of bit 0 is not limited in the present application embodiment. Similarly, the length of the high level of bit 1 and the length of the low level are only exemplary. When measured by the number of high and low levels, the length of each low level is equal, the length of each high level is equal, the length relationship of the high level and the low level, and the relationship between the number of high levels and low levels are not limited in the present application embodiment. It should be noted that the calibration symbol is related to bit 0 and bit 1, so when bit 0 and / or bit 1 changes, the waveform corresponding to the calibration symbol also changes accordingly.

[0193] As a possible implementation manner, the calibration symbol may be "01" or "10", and this embodiment of the present application does not impose any limitation on this.

[0194] As a possible implementation manner, the delimiter may also be represented by bit 0 and / or bit 1. Figure 7 The waveform of the delimiter is consistent with that of bit 0, so the delimiter can also be represented as "0".

[0195] As a possible implementation, the length of the high and low levels in the delimiter may be consistent with or inconsistent with the length of the high and low levels in bit 0 / bit 1. When they are consistent, they can be represented by bit 0 and / or bit 1.

[0196] The check code is used to check whether the data content is wrong. It is generally a 6-bit cyclic redundancy check code (CRC) or a 16-bit CRC. The specific selection method is based on the data frame length, and the embodiment of the present application does not impose any limitation on this.

[0197] The terminator is used to mark the end position of the downlink data frame. It consists of a high level and a low level, and starts with a low level and ends with a high level.

[0198] As a possible implementation manner, the length of the terminator is the sum of the lengths of bit 0 and bit 1.

[0199] from Figure 7 It can be seen that the low level length of the terminator is equal to the low level length of bit 0, and the high level is 5 times the length of the high level of bit 0, or the high level is 5 times the length of the low level. It starts with a low level and ends with a high level. Or it can be understood that the terminator consists of a low level and multiple high levels, the number of high levels is five, and the sum of the total length of the high level and the length of the low level is equal to the sum of the lengths of bit 0 and bit 1. It should be noted that the relationship between the length of the high level and the length of the low level of the terminator is not limited in the embodiments of the present application, and the embodiments of the present application do not limit the quantitative relationship between the high level and the low level.

[0200] It should be understood that the present application is explained by taking a passive tag as an example, and there will be a continuous wave after the terminator, and the continuous wave is at a high level. After the tag detects the terminator, when the length of the detection is equal to the sum of the lengths of bit 0 and bit 1, it can be determined that the data frame ends, or when two consecutive falling edges are not detected within a time window of the sum of the lengths of bit 0 and bit 1, it can be determined that the data frame ends.

[0201] Fig. 9 The waveform of the baseband signal transmitted by the reader and the waveform of the tag detection output are shown. The length of the terminator is the sum of the lengths of bit 0 and bit 1. When the terminator is detected, if the detected length is greater than the sum of the lengths of bit 0 and bit 1, it can be determined that the data frame ends, and what is detected afterwards is a continuous wave.

[0202] It should be understood that when the low level is located at the start position of the terminator and the high level is located at the end position of the terminator, the end of the data frame can be determined by limiting the sum of the length of the low level and the constant of the high level to be equal to the sum of the lengths of bit 0 and bit 1. This is because there will be a continuous wave after the data frame, and the continuous wave is a high level. Therefore, for the tag, if there is no terminator or the length of the terminator is not limited, the tag will not be able to determine whether the data frame has ended.

[0203] As a possible implementation, the terminator may also start with a high level and end with a low level. In this case, the embodiment of the present application does not impose any limitation on the length of the terminator.

[0204] In the above scheme, the tag can obtain the accurate delimiter length by determining the time interval between the two falling edges of the delimiter, which is beneficial for the tag to accurately detect the starting position of the data frame and improve the accuracy of the tag to calibrate its own clock.

[0205] Fig.10 It is a schematic diagram of another data signal provided in an embodiment of the present application.

[0206] The present application embodiment is described by taking the data as PIE encoding, the network device (encoding device) as a reader / writer, and the terminal device (decoding device) as a tag as an example. In the present application embodiment, the structure of the downlink data frame (data signal) is as follows: Fig.10 As shown, the downlink data frame structure consists of a delimiter, a calibration character, data, a check code and an end character.

[0207] from Fig.10 It can be seen that the delimiter is composed of two low levels and two high levels, which are distributed at intervals and start with a low level and end with a high level. In other words, the delimiter is composed of two identical low levels and high levels. Among them, the length of the high level is equal to the length of the low level, both of which are 1 / 90kHz (i.e. 11.11μs), that is, the duration of the low level is 1 / 90kHz (i.e. 11.11μs), and the duration of the high level is also 1 / 90kHz (i.e. 11.11μs), and the total length of the delimiter is 22.22μs.

[0208] It should be understood that the above description is only based on the example that the low level and high level are equal in length, and they can also be different, for example, the low level duration is 1 / 90kHz (ie, 11.11μs) and the high level duration is 2 / 90kHz (ie, 22.22μs). The present application embodiment does not limit this.

[0209] It should be understood that the duration is only illustrated using 1 / 90kHz as an example, that is, 90kHz is used as an example. It can also be 15kHz in the 900M frequency band in the 4G system, or 15kHz, 30kHz and 60kHz in the FR1 (450MHz~6000MHz) frequency band in the 5G system, 60kHz and 120kHz in the FR2 (24.25GHz~52.6GHz) frequency band, or it can also be the frequency in the future communication system. The embodiment of the present application does not make too many restrictions on this. That is to say, as long as the symbol unit used to identify the starting position of the downlink data frame is met, it includes a high level and a low level, which are all within the protection scope of the embodiment of the present application.

[0210] For descriptions of the calibration character, bit 0, bit 1, and checksum, refer to Figure 7 For the sake of brevity, the embodiments of the present application will not be repeated here.

[0211] Fig.10 The terminator shown in is composed of two identical low-level-high-levels. From the perspective of length, the length of the high-level is five times the length of the low-level; from the perspective of quantity, each low-level-high-level includes one low-level and five high-levels, the length of each high-level is equal, and the length of each low-level-high-level is the sum of the lengths of bit 0 and bit 1. It should be noted that the relationship between the length of the high-level and the length of the low-level of the terminator is not limited in the embodiments of the present application, and the embodiments of the present application do not limit the quantitative relationship between the high-level and the low-level.

[0212] It should be understood that the present application is explained by taking a passive tag as an example, and there will be a continuous wave after the terminator, and the continuous wave is a high level. When the tag detects the terminator, two falling edges are detected continuously, and the length of the interval between the two falling edges is the total length of bit 0 and bit 1, and there is no third falling edge after the second falling edge, and after the second falling edge, the length detected again is equal to the sum of the lengths of bit 0 and bit 1, it can be determined that the data frame ends, or after the second falling edge, two consecutive falling edges are not detected within a time window of the sum of the lengths of bit 0 and bit 1, it can be determined that the data frame ends.

[0213] Fig.11 The waveform of the baseband signal transmitted by the reader and the waveform of the tag detection output of the terminator are shown. The terminator is composed of two identical low-level-high-level combinations. The length of each low-level-high level is the sum of the lengths of bit 0 and bit 1. There is a continuous wave after the second low-level-high level. When the tag detects after the second low-level-high level, if the detected length is greater than the sum of the lengths of bit 0 and bit 1, it can be determined that the data frame ends, and what is detected afterwards is a continuous wave.

[0214] It should be understood that the present application only uses the example of the terminator being two low-level-high-level combinations for illustration, and there may also be multiple low-level-high-level combinations, wherein the present application embodiment does not impose any limitation on the number of low levels and high levels, but the sum of the lengths of each low-level-high level combination in the terminator is the sum of the lengths of bit 0 and bit 1.

[0215] In the above scheme, by increasing the delimiter length, the accuracy of time parameter estimation can be further improved under the same tag sampling clock, and the tag clock signal frequency requirement can be further reduced, thereby reducing the tag power consumption.

[0216] Fig.12 It is a schematic diagram of another data signal provided in an embodiment of the present application.

[0217] The present application embodiment is described by taking the data as PIE encoding, the network device (encoding device) as a reader / writer, and the terminal device (decoding device) as a tag as an example. In the present application embodiment, the structure of the downlink data frame (data signal) is as follows: Fig.10 As shown, the downlink data frame structure consists of a delimiter, a calibration character, data, a check code and an end character.

[0218] like Fig.12 As shown, the delimiter is illustrated by taking the 4-bit Barker code waveform encoded by PIE as an example. The Barker code is 0010, and the total length of the delimiter is 55.55μs. The sequence bit 0 (bit 0) after PIE encoding consists of a high level and a low level, and starts with a low level and ends with a high level. The total length of bit 0 is 11.11μs, and the length of the high level is the same as the length of the low level. The sequence bit 1 (bit 1) after PIE encoding also consists of a high level and a low level, starts with a low level and ends with a high level. The length of the high level is 3 times the length of the low level, or it can also be understood that bit 1 consists of a low level and three high levels, the length of each high level is equal, and the length of each high level is equal to the length of the low level.

[0219] It should be understood that the embodiments of the present application are explained by taking a passive tag as an example, so in order to ensure that the passive tag can work with sufficient energy, it is generally required to have a high level. At the same time, in order to meet the accuracy of the tag detection output waveform, the delimiter can be required to start with a low level and end with a high level, so that the tag starts with a falling edge and ends with a falling edge when detecting the output waveform, avoiding the inconsistency between the rising edge and the falling edge resulting in inaccurate output waveform timing. When it is a non-passive tag, it can supply energy by itself. At this time, it can start with a low level and end with a high level, or it can start with a high level and end with a low level. The embodiments of the present application do not make any restrictions on this.

[0220] It should be understood that the embodiment of the present application takes the PIE-encoded 4-bit Barker code waveform as an example for explanation, and it can also be a PIE-encoded waveform of a 2-bit or multi-bit Barker code. The embodiment of the present application does not impose any limitation on this. As long as the delimiter starts with a falling edge and ends with a falling edge, or starts with a rising edge and ends with a rising edge, it falls within the protection scope of the embodiment of the present application.

[0221] It should be understood that in the embodiment of the present application, bit 0 is composed of a low level and a high level, and the lengths of the high level and the low level are equal, bit 1 is composed of a low level and three high levels, and the lengths of each high level are equal, and the length of each high level is equal to the length of the low level. Bit 1 can also be understood as consisting of a low level and a high level, and the length of the high level is 3 times the length of the low level. The lengths and numbers of the high level and the low level of bit 0 and bit 1 are only exemplary, and the embodiment of the present application does not limit this. For example, the length of the high level is L times the length of the low level, and L is a positive integer; or the low level is M times the length of the high level, and M is a positive integer.

[0222] Optionally, in the above scheme, the delimiter is a waveform after PIE encoding of a Barker code, and it can also be a waveform after PIE encoding of a pseudo-random sequence, wherein the pseudo-random sequence can be an m-sequence, a Walsh sequence, a Gold sequence, a Golay sequence, etc.

[0223] Fig.12 For the description of the calibration character, data, check code and end character in Figure 7 or Fig.10 For the sake of brevity, the embodiments of the present application will not be described one by one.

[0224] In the embodiment of the present application, a pseudo-random sequence is introduced into the delimiter, and the tag can detect the delimiter through simple correlation operations, thereby improving the anti-interference ability of the tag and thus improving the accuracy of the tag in judging the position of the delimiter.

[0225] Fig.13 is a schematic diagram of another data signal provided in an embodiment of the present application. It should be understood that Fig.13 It can be applied in battery-powered terminal devices, such as narrow band Internet of things (NB-IoT) terminal devices.

[0226] The present application embodiment is described by taking the data as PIE encoding, the network device (encoding device) as a reader / writer, and the terminal device (decoding device) as a semi-passive reflector as an example. In the present application embodiment, the structure of the downlink data frame (data signal) is as follows: Fig.13 As shown, the downlink data frame structure consists of a delimiter, a calibration character, data, and a check code.

[0227] like Fig.13As shown, the delimiter is explained by taking the 5-bit Barker code waveform encoded by PIE as an example. The Barker code is 00010, and the total length of the delimiter is 66.66μs. The sequence bit 0 (bit 0) after PIE encoding consists of a high level and a low level, and starts with a high level and ends with a low level. The total length of bit 0 is 11.11μs, and the length of the high level is the same as the length of the low level. The sequence bit 1 (bit 1) after PIE encoding also consists of a high level and a low level, starts with a high level and ends with a low level. The length of the high level is 3 times the length of the low level, or it can also be understood that bit 1 consists of three high levels and one low level, the length of each high level is equal, and the length of each high level is equal to the length of the low level, and the total length of bit 1 is 22.22μs.

[0228] It should be understood that for a system with a wake-up mechanism, the delimiter is at a low level before the delimiter, so the length of the delimiter can be obtained through the rising edge at the beginning of the delimiter and the first rising edge of the calibration symbol. If the delimiter starts with a high level and ends with a high level, the reflector cannot determine the end position of the delimiter. Therefore, for a system with a wake-up mechanism, the delimiter generally needs to start with a high level and end with a low level.

[0229] It should be understood that the embodiment of the present application takes the PIE-encoded 5-bit Barker code waveform as an example for explanation, and it can also be a PIE-encoded waveform of a 2-bit or multi-bit Barker code. The embodiment of the present application does not make any limitation to this. As long as the delimiter starts with a rising edge and ends with a rising edge, it falls within the protection scope of the embodiment of the present application.

[0230] It should be understood that in the embodiment of the present application, bit 0 is composed of a low level and a high level, and the lengths of the high level and the low level are equal, bit 1 is composed of a low level and three high levels, and the length of each high level is equal, and the length of each high level is equal to the length of the low level. Bit 1 can also be understood as consisting of a low level and a high level, and the length of the high level is 3 times the length of the low level. The length and number of the high level and the low level in bit 0 and bit 1 are only exemplary, and the embodiment of the present application does not limit this. For example, the length of the high level is L times the length of the low level, and L is a positive integer greater than 1; or the low level is M times the length of the high level, and M is a positive integer.

[0231] Optionally, in the above scheme, the delimiter is a waveform after PIE encoding of a Barker code, and it can also be a waveform after PIE encoding of a pseudo-random sequence, wherein the pseudo-random sequence can be an m-sequence, a Walsh sequence, a Gold sequence, a Golay sequence, etc.

[0232] Fig.13The calibration symbol in is composed of bit 0 and bit 1. The waveform of bit 0 includes a high level and a low level, and it starts with a high level and ends with a low level. The length of the low level is equal to the length of the high level. The waveform of bit 1 includes three high levels and one low level, and it also starts with a high level and ends with a low level. The length of each high level is equal, and the length of each high level is equal to the length of the low level. Fig.13 It is shown that the number of low levels is three times the number of high levels.

[0233] It should be understood that the calibration symbol can also be understood to be composed of a high level and a low level, the length of the high level is L times the length of the low level, and L is a positive integer greater than 1. Fig.13 The length of the high level shown in is 3 times the length of the low level.

[0234] It should be understood that the length of the high level and the low level of bit 0 in the present application may also be unequal, and the number of the high level and the low level of bit 0 is not limited in the present application embodiment. Similarly, the length of the high level of bit 1 and the length of the low level are only exemplary. When measured by the number of high and low levels, the length of each low level is equal, the length of each high level is equal, the length relationship of the high level and the low level, and the relationship between the number of high levels and the low level, the present application embodiment does not make any limitation. It should be noted that the calibration symbol is related to bit 0 and bit 1, therefore, when bit 0 and / or bit 1 changes, the waveform of the calibration symbol also changes accordingly.

[0235] As a possible implementation manner, the calibration symbol may be "01" or "10", and this embodiment of the present application does not impose any limitation on this.

[0236] The check code is used to check whether the data content is wrong. It is generally a 6-bit CRC or a 16-bit CRC. The specific selection method is based on the data frame length, and the embodiment of the present application does not impose any limitation on this.

[0237] It should be understood that for battery-powered terminal devices, such as semi-active reflectors, battery-assisted reflectors, etc., which use a PIE encoding method similar to that starting with a high level and ending with a low level, the terminal device decodes the data bit based on the time difference between two consecutive rising edges, and no end symbol is required. Within a certain period of time after the network device sends the data frame, a non-modulated continuous wave signal will be sent, and the terminal device can detect the two rising edges of the last data bit, so the last data bit can be correctly decoded without the end symbol.

[0238] Fig.14 It is a schematic diagram of another data signal provided in an embodiment of the present application.

[0239] Exemplarily, the embodiment of the present application is described by taking the data encoding method as Manchester encoding, the network device (encoding device) as a reader / writer, and the terminal device (decoding device) as a tag device as an example. It should be understood that the embodiment of the present application can be applied to a passive reflector or a semi-passive reflector, or in other words, it can be applied to a reflection scattering communication system or a system with a wake-up module.

[0240] In the embodiment of the present application, the structure of the downlink data frame (data signal) is as follows: Fig.14 As shown in FIG, the downlink data frame structure consists of a delimiter, data, and a check code. Fig.14 As shown in the figure, the delimiter is a Manchester coded waveform of a 5-bit Barker code, and its bit sequence can be expressed as 00010, where bit 0 consists of a high level and a low level, the high level length is equal to the low level length, and the total length of bit 0 is 11.11μs. Bit 1 consists of a high level and a low level, the high level and the low level length are equal, and the total length of bit 1 is 11.11μs. The total length of the delimiter is 55.55μs.

[0241] It should be noted that the use of Manchester coding can make the waveform lengths of bit 0 and bit 1 equal, but the high and low levels are opposite, that is, the high level of bit 0 is the low level of bit 1, and the low level of bit 0 is the high level of bit 1, so that when the waveform of one symbol is known, the waveform of another symbol can also be known. Manchester coding is not described in detail in the embodiments of this application.

[0242] It should be understood that in the embodiment of the present application, bit 0 is composed of a low level and a high level, and the lengths of the high level and the low level are equal, wherein the number of high levels and low levels may be different, and the lengths of the high level and the low level may be different. The embodiment of the present application does not make any limitation to this.

[0243] It should be understood that the length of bit 0 of 11.11 μs is merely an exemplary illustration, and may be k / (15 kHz×N), where M and P are both positive integers, and the present application embodiment does not impose any limitation on this.

[0244] It should be understood that the Manchester coding waveform of the 5-bit Barker code used as the delimiter is merely an exemplary illustration, and it can also be a Manchester coding waveform of a 2-bit or multi-bit Barker code. The embodiments of the present application do not impose any limitation on this. As long as the delimiter starts with a falling edge and ends with a falling edge, or starts with a rising edge and ends with a rising edge, it falls within the protection scope of the embodiments of the present application.

[0245] Optionally, the above scheme is described using the waveform after Manchester encoding as an example, and it can also be a waveform after PIE encoding of a pseudo-random sequence, wherein the pseudo-random sequence can be a Barker code, m-sequence, Walsh sequence, Gold sequence, Golay sequence, etc.

[0246] It should be understood that the waveform of the delimiter, the waveform of the end character, the waveform of bit 0 and the waveform of bit 1 need to be agreed upon between the reader and the tag through signaling, that is, there are multiple falling edges or rising edges for the delimiter, and the tag knows which falling edge or rising edge represents the beginning of the delimiter, and which falling edge or rising edge represents the end of the delimiter. The embodiments of the present application do not explain in detail how to decode the tag.

[0247] The above is a detailed description of the data signal transmission method provided by the present application. The following is an introduction to the communication device provided by the present application.

[0248] See also Fig.15 , Fig.15 1 is a schematic block diagram of an apparatus 1500 for transmitting data signals in a network device provided by the present application. Fig.15 The communication device 1500 includes a processing module 1510 and a sending module 1520.

[0249] The processing module 1510 is used to generate a data signal, which includes a delimiter and data. The delimiter includes at least one first level pair, each first level pair includes a low level and a high level, and the delimiter is used to identify the position where the data starts. The delimiter starts with a high level and ends with a low level or the delimiter starts with a low level and ends with a high level. The sending module 1520 is used to send the data signal.

[0250] Optionally, the length of the delimiter is k / (15kHz×N), where k and N are positive integers.

[0251] Optionally, a first level pair corresponds to a bit in the bit sequence, and different first level pairs correspond to different bits in the bit sequence.

[0252] Optionally, the bit sequence includes bit 1 and bit 0, the low level length and the high level length in the first level pair corresponding to bit 0 are equal, and the high level length in the first level pair corresponding to bit 1 is L times the low level length, where L is a positive integer greater than 1.

[0253] Optionally, the bit sequence includes bit 1 and bit 0. The low level length and the high level length in the first level pair corresponding to bit 0 are equal, and the high level length and the low level length in the first level pair corresponding to bit 1 are equal. When the length of the level corresponding to bit 0 is equal to the length of the level corresponding to bit 1, the high level in bit 0 is before the low level in bit 0, and the high level in bit 1 is after the low level in bit 1, or the high level in bit 0 is after the low level in bit 0, and the high level in bit 1 is before the low level in bit 1.

[0254] Optionally, the data signal further includes an end character. The end character includes at least one second level pair, and the second level pair includes a low level and a high level. The length of the end character is different from the first length, and the length of the end character is different from the second length. Wherein, the first length is the sum of the length of the high level and the low level in bit 0, the second length is the sum of the length of the high level and the low level in bit 1, bit 0 and bit 1 are carried in the data, and the end character is used to identify the end position of the data.

[0255] Optionally, the low level in the second level pair precedes the high level in the second level pair, and the length of the low level in the second level is the same as the length of the low level in bit 0.

[0256] Optionally, the data signal further includes a calibration symbol. The length of the calibration symbol is the sum of the level waveform length of bit 0 in the data and the level waveform length of bit 1 in the data, and the level waveform length of bit 0 in the data is different from the level waveform length of bit 1 in the data. The calibration symbol is after the delimiter and before the data.

[0257] Optionally, the level waveform length of bit 0 in the data is q / (15kHz×M), and the level waveform length of bit 1 in the data is p / (15kHz×Q), where q, p, M and Q are positive integers.

[0258] See also Fig.16 , Fig.16 1 is a schematic block diagram of an apparatus 1600 for transmitting data signals in a terminal device provided by the present application. Fig.16 , the communication device 1600 includes a receiving module 1610 and a processing module 1620.

[0259] The receiving module 1610 is used to receive a data signal, which includes a delimiter and data. The delimiter includes at least one first level pair, each first level pair includes a low level and a high level, and the delimiter is used to identify the position where the data starts. The delimiter starts with a high level and ends with a low level or the delimiter starts with a low level and ends with a high level. The processing module 1620 is used to demodulate the data signal.

[0260] Optionally, the length of the delimiter is k / (15kHz×N), where k and N are positive integers.

[0261] Optionally, a first level pair corresponds to a bit in the bit sequence, and different first level pairs correspond to different bits in the bit sequence.

[0262] Optionally, the bit sequence includes bit 1 and bit 0, the low level length and the high level length in the first level pair corresponding to bit 0 are equal, and the high level length in the first level pair corresponding to bit 1 is L times the low level length, where L is a positive integer greater than 1.

[0263] Optionally, the bit sequence includes bit 1 and bit 0. The low level length and the high level length in the first level pair corresponding to bit 0 are equal, and the high level length and the low level length in the first level pair corresponding to bit 1 are equal. When the length of the level corresponding to bit 0 is equal to the length of the level corresponding to bit 1, the high level in bit 0 is before the low level in bit 0, and the high level in bit 1 is after the low level in bit 1, or the high level in bit 0 is after the low level in bit 0, and the high level in bit 1 is before the low level in bit 1.

[0264] Optionally, the data signal further includes an end character. The end character includes at least one second level pair, and the second level pair includes a low level and a high level. The length of the end character is different from the first length, and the length of the end character is different from the second length. Wherein, the first length is the sum of the length of the high level and the low level in bit 0, the second length is the sum of the length of the high level and the low level in bit 1, bit 0 and bit 1 are carried in the data, and the end character is used to identify the end position of the data.

[0265] Optionally, the low level in the second level pair precedes the high level in the second level pair, and the length of the low level in the second level is the same as the length of the low level in bit 0.

[0266] Optionally, the data signal further includes a calibration symbol. The length of the calibration symbol is the sum of the level waveform length of bit 0 in the data and the level waveform length of bit 1 in the data, and the level waveform length of bit 0 in the data is different from the level waveform length of bit 1 in the data. The calibration symbol is after the delimiter and before the data.

[0267] Optionally, the level waveform length of bit 0 in the data is q / (15kHz×M), and the level waveform length of bit 1 in the data is p / (15kHz×Q), where q, p, M and Q are positive integers.

[0268] See also Fig.17 , Fig.17 1 is a schematic structural diagram of the communication device 10 provided in this application. Fig.17The communication device 10 includes: one or more processors 11, one or more memories 12, and one or more communication interfaces 13. The processor 11 is used to control the communication interface 13 to send and receive signals, the memory 12 is used to store a computer program, and the processor 11 is used to call and run the computer program from the memory 12, so that the process and / or operation performed by the network device in each method embodiment of the present application is executed.

[0269] For example, the processor 11 may have Fig.15 The functions of the processing module 1510 shown in FIG. 1 and FIG. 2 are shown in FIG. 3 , and the communication interface 15 may have Fig.15 Specifically, the processor 11 can be used to execute the processing or operation performed by the network device in each method embodiment of the present application, and the communication interface 13 is used to execute the sending and / or receiving actions in each method embodiment of the present application.

[0270] In one implementation, the communication device 10 may be a reader / writer device in the method embodiment. In this implementation, the communication interface 13 may be a transceiver. The transceiver may include a receiver and a transmitter.

[0271] Optionally, the processor 11 may be a baseband device, and the communication interface 13 may be a radio frequency device.

[0272] In another implementation, the communication device 10 may be a chip installed in a reader / writer device. In this implementation, the communication interface 13 may be an interface circuit or an input / output interface.

[0273] Optionally, the processor and memory in the above-mentioned device embodiments may be physically independent units, or the memory may be integrated with the processor, which is not limited in this document.

[0274] See also Fig.18 , Fig.18 2 is a schematic structural diagram of the communication device 20 provided in this application. Fig.18 The communication device 20 includes: one or more processors 21, one or more memories 22, and one or more communication interfaces 23. The processor 21 is used to control the communication interface 23 to send and receive signals, the memory 22 is used to store a computer program, and the processor 21 is used to call and run the computer program from the memory 22, so that the process and / or operation performed by the terminal device in each method embodiment of the present application is executed.

[0275] For example, the processor 21 may have Fig.16 The functions of the processing unit 1620 shown in FIG. 1 and the communication interface 23 may have Fig.16Specifically, the processor 21 can be used to execute the processing or operation performed by the terminal device in the various method embodiments of the present application, and the communication interface 23 is used to execute the sending and / or receiving actions performed by the terminal device in the various method embodiments of the present application, which will not be repeated.

[0276] In one implementation, the communication device 20 may be a tag device in the method embodiment. In this implementation, the communication interface 23 may be a transceiver. The transceiver may include a receiver and a transmitter.

[0277] Optionally, the processor 21 may be a baseband device, and the communication interface 23 may be a radio frequency device.

[0278] In another implementation, the communication device 20 may be a chip installed in a terminal device. In this implementation, the communication interface 23 may be an interface circuit or an input / output interface.

[0279] Optionally, the processor and memory in the above-mentioned device embodiments may be physically independent units, or the memory may be integrated with the processor, which is not limited in this document.

[0280] In addition, the present application also provides a computer-readable storage medium, in which computer instructions are stored. When the computer instructions are executed on a computer, the operations and / or processes performed by the network device in each method embodiment of the present application are executed.

[0281] The present application also provides a computer-readable storage medium, in which computer instructions are stored. When the computer instructions are executed on a computer, the operations and / or processes performed by a terminal device in each method embodiment of the present application are executed.

[0282] The present application also provides a computer program product, which includes computer program code or instructions. When the computer program code or instructions are run on a computer, the operations and / or processes performed by the network device in the various method embodiments of the present application are executed.

[0283] The present application also provides a computer program product, which includes computer program code or instructions. When the computer program code or instructions are run on a computer, the operations and / or processes performed by the terminal device in the various method embodiments of the present application are executed.

[0284] In addition, the present application also provides a chip, the chip including a processor. A memory for storing a computer program is provided independently of the chip, and the processor is used to execute the computer program stored in the memory, so that the operation and / or processing performed by the network device in any one of the method embodiments is executed.

[0285] Furthermore, the chip may further include a communication interface. The communication interface may be an input / output interface, or an interface circuit, etc. Furthermore, the chip may further include the memory.

[0286] The present application also provides a chip, the chip including a processor. A memory for storing a computer program is provided independently of the chip, and the processor is used to execute the computer program stored in the memory, so that the operation and / or processing performed by the terminal device in any one of the method embodiments is executed.

[0287] Furthermore, the chip may further include a communication interface. The communication interface may be an input / output interface, or an interface circuit, etc. Furthermore, the chip may further include the memory.

[0288] In addition, the present application also provides a communication system, including the network device and terminal device in the embodiments of the present application.

[0289] Those skilled in the art can clearly understand that, for the convenience and brevity of description, the specific working processes of the systems, devices and units described above can refer to the corresponding processes in the aforementioned method embodiments and will not be repeated here.

[0290] The processor in the embodiment of the present application can be an integrated circuit chip with the ability to process signals. In the implementation process, each step of the above method embodiment can be completed by the hardware integrated logic circuit or software instructions in the processor. The processor can be a general processor, a digital signal processor (digital signal processor, DSP), an application specific integrated circuit (application specific integrated circuit, ASIC), a field programmable gate array (field programmable gate array, FPGA) or other programmable logic devices, discrete gates or transistor logic devices, discrete hardware components. The general processor can be a microprocessor or the processor can also be any conventional processor, etc. The steps of the method disclosed in the embodiment of the present application can be directly embodied as a hardware coding processor to perform, or the hardware and software modules in the coding processor are combined to perform. The software module can be located in a random access memory, a flash memory, a read-only memory, a programmable read-only memory or an electrically erasable programmable memory, a register, and other mature storage media in the art. The storage medium is located in the memory, and the processor reads the information in the memory and completes the steps of the above method in combination with its hardware.

[0291] The memory in the embodiments of the present application may be a volatile memory or a non-volatile memory, or may include both volatile and non-volatile memories. Among them, the non-volatile memory may be a read-only memory (ROM), a programmable read-only memory (PROM), an erasable programmable read-only memory (EPROM), an electrically erasable programmable read-only memory (EEPROM), or a flash memory. The volatile memory may be a random access memory (RAM), which is used as an external cache. By way of example but not limitation, many forms of RAM are available, such as static RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), double data rate SDRAM (DDRSDRAM), enhanced SDRAM (ESDRAM), synchronous link DRAM (SLDRAM), and direct RAM bus RAM (DRRAM). It should be noted that the memory of the systems and methods described herein is intended to include, but is not limited to, these and any other suitable types of memory.

[0292] Those of ordinary skill in the art will appreciate that the units and algorithm steps of each example described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Professional and technical personnel can use different methods to implement the described functions for each specific application, but such implementation should not be considered to be beyond the scope of this application.

[0293] Those skilled in the art can clearly understand that, for the convenience and brevity of description, the specific working processes of the systems, devices and units described above can refer to the corresponding processes in the aforementioned method embodiments and will not be repeated here.

[0294] In the several embodiments provided in the present application, it should be understood that the disclosed systems, devices and methods can be implemented in other ways. For example, the device embodiments described above are only schematic. For example, the division of the units is only a logical function division. There may be other division methods in actual implementation, such as multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be through some interfaces, indirect coupling or communication connection of devices or units, which can be electrical, mechanical or other forms.

[0295] The units described as separate components may or may not be physically separated, and the components shown as units may or may not be physical units, that is, they may be located in one place or distributed on multiple network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of this embodiment.

[0296] In addition, each functional unit in each embodiment of the present application may be integrated into one processing unit, or each unit may exist physically separately, or two or more units may be integrated into one unit.

[0297] If the functions are implemented in the form of software functional units and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present application can essentially or in other words, the part that contributes or the part of the technical solution can be embodied in the form of a software product, which is stored in a storage medium and includes several instructions for a computer device (which can be a personal computer, a server, or a network device, etc.) to perform all or part of the steps of the methods described in each embodiment of the present application. The aforementioned storage medium includes: various media that can store program codes, such as a USB flash drive, a mobile hard disk, a read-only memory (ROM), a random access memory (RAM), a magnetic disk or an optical disk.

[0298] The above is only a specific implementation of the present application, but the protection scope of the present application is not limited thereto. Any person skilled in the art who is familiar with the present technical field can easily think of changes or substitutions within the technical scope disclosed in the present application, which should be included in the protection scope of the present application. Therefore, the protection scope of the present application should be based on the protection scope of the claims.

Claims

1. A method for transmitting data signals in a network device, characterized in that: include: generating a data signal, the data signal comprising a delimiter and data, wherein the delimiter comprises at least one first level pair, each first level pair comprises a low level and a high level, and the delimiter is used to identify the position where the data starts, The length of the delimiter is k / (15kHz×N), where k and N are positive integers, and the delimiter starts with a high level and ends with a low level; or, the delimiter starts with a low level and ends with a high level; The data signal is transmitted.

2. The method according to claim 1, characterized in that: A first level pair corresponds to a bit in the bit sequence, and different first level pairs correspond to different bits in the bit sequence.

3. The method according to claim 2, characterized in that The bit sequence includes bit 1 and bit 0, the low level length and the high level length in the first level pair corresponding to bit 0 are equal, and the high level length in the first level pair corresponding to bit 1 is L times the low level length, where L is a positive integer greater than 1.

4. The method according to claim 2, characterized in that: The bit sequence includes bit 1 and bit 0, the low level length and the high level length in the first level pair corresponding to bit 0 are equal, the high level length and the low level length in the first level pair corresponding to bit 1 are equal, and when the length of the level corresponding to bit 0 is equal to the length of the level corresponding to bit 1, the high level in bit 0 is before the low level in bit 0, and the high level in bit 1 is after the low level in bit 1; or, The high level in bit 0 is after the low level in bit 0, and the high level in bit 1 is before the low level in bit 1.

5. The method according to any one of claims 1 to 4, characterized in that The length of one low level is an integer multiple of (1 / 15 kHz×N), and the length of one high level is an integer multiple of (1 / 15 kHz×N).

6. The method according to claim 5, characterized in that The length of the one low level is the same as the length of the one high level, or, The length of the one low level is different from the length of the one high level.

7. The method according to any one of claims 1 to 6, characterized in that The data signal also includes a calibration symbol, the length of which is the sum of the level waveform length of bit 0 in the data and the level waveform length of bit 1 in the data. The level waveform length of bit 0 in the data is different from the level waveform length of bit 1 in the data. The calibration symbol is after the delimiter and before the data.

8. The method according to any one of claims 1 to 7, characterized in that The level waveform length of bit 0 in the data is q / (15kHz×M), and the level waveform length of bit 1 in the data is p / (15kHz×Q), where q, p, M and Q are positive integers.

9. A method for transmitting data signals in a terminal device, characterized in that: include: receiving a data signal, the data signal comprising a delimiter and data, wherein the delimiter comprises at least one first level pair, each first level pair comprises a low level and a high level, and the delimiter is used to identify a position where the data starts, The length of the delimiter is k / (15kHz×N), where k and N are positive integers, and the delimiter starts with a high level and ends with a low level; or, the delimiter starts with a low level and ends with a high level; The data signal is demodulated.

10. The method according to claim 9, characterized in that A first level pair corresponds to a bit in the bit sequence, and different first level pairs correspond to different bits in the bit sequence.

11. The method according to claim 10, characterized in that The bit sequence includes bit 1 and bit 0, the low level length and the high level length in the first level pair corresponding to bit 0 are equal, and the high level length in the first level pair corresponding to bit 1 is L times the low level length, where L is a positive integer greater than 1.

12. The method according to claim 10, characterized in that The bit sequence includes bit 1 and bit 0, the low level length and the high level length in the first level pair corresponding to bit 0 are equal, the high level length and the low level length in the first level pair corresponding to bit 1 are equal, and when the length of the level corresponding to bit 0 is equal to the length of the level corresponding to bit 1, the high level in bit 0 is before the low level in bit 0, and the high level in bit 1 is after the low level in bit 1; or, The high level in bit 0 is after the low level in bit 0, and the high level in bit 1 is before the low level in bit 1.

13. The method according to any one of claims 9 to 12, characterized in that The length of one low level is an integer multiple of (1 / 15 kHz×N), and the length of one high level is an integer multiple of (1 / 15 kHz×N).

14. The method according to claim 13, characterized in that The length of the one low level is the same as the length of the one high level, or, The length of the one low level is different from the length of the one high level.

15. The method according to any one of claims 9 to 14, characterized in that The data signal also includes a calibration symbol, the length of which is the sum of the level waveform length of bit 0 in the data and the level waveform length of bit 1 in the data. The level waveform length of bit 0 in the data is different from the level waveform length of bit 1 in the data. The calibration symbol is after the delimiter and before the data.

16. The method according to any one of claims 9 to 15, characterized in that The level waveform length of bit 0 in the data is q / (15kHz×M), and the level waveform length of bit 1 in the data is p / (15kHz×Q), where q, p, M and Q are positive integers.

17. A device for transmitting data signals in a network device, characterized in that: include: a processing module, configured to generate a data signal, wherein the data signal includes a delimiter and data, wherein the delimiter includes at least one first level pair, each first level pair includes a low level and a high level, and the delimiter is used to identify the position where the data starts, The length of the delimiter is k / (15kHz×N), where k and N are positive integers, and the delimiter starts with a high level and ends with a low level; or, the delimiter starts with a low level and ends with a high level; The sending module is used to send the data signal.

18. The device according to claim 17, characterized in that A first level pair corresponds to a bit in the bit sequence, and different first level pairs correspond to different bits in the bit sequence.

19. The device according to claim 18, characterized in that The bit sequence includes bit 1 and bit 0, the low level length and the high level length in the first level pair corresponding to bit 0 are equal, and the high level length in the first level pair corresponding to bit 1 is L times the low level length, where L is a positive integer greater than 1.

20. The apparatus according to claim 18, wherein the bit sequence comprises bit 1 and bit 0, the low level length and the high level length in the first level pair corresponding to bit 0 are equal, the high level length and the low level length in the first level pair corresponding to bit 1 are equal, and when the length of the level corresponding to bit 0 is equal to the length of the level corresponding to bit 1, the high level in bit 0 is before the low level in bit 0, and the high level in bit 1 is after the low level in bit 1; or, The high level in bit 0 is after the low level in bit 0, and the high level in bit 1 is before the low level in bit 1.

21. The device according to any one of claims 17 to 20, characterized in that The length of one low level is an integer multiple of (1 / 15 kHz×N), and the length of one high level is an integer multiple of (1 / 15 kHz×N).

22. The device according to claim 21, characterized in that The length of the one low level is the same as the length of the one high level, or, The length of the one low level is different from the length of the one high level.

23. The device according to any one of claims 17 to 22, characterized in that The data signal also includes a calibration symbol, the length of which is the sum of the level waveform length of bit 0 in the data and the level waveform length of bit 1 in the data. The level waveform length of bit 0 in the data is different from the level waveform length of bit 1 in the data. The calibration symbol is after the delimiter and before the data.

24. The device according to any one of claims 17 to 23, characterized in that The level waveform length of bit 0 in the data is q / (15kHz×M), and the level waveform length of bit 1 in the data is p / (15kHz×Q), where q, p, M and Q are positive integers.

25. A device for transmitting data signals in a terminal device, characterized in that: include: A receiving module, configured to receive a data signal, wherein the data signal includes a delimiter and data, wherein the delimiter includes at least one first level pair, each first level pair includes a low level and a high level, and the delimiter is used to identify a starting position of the data, The length of the delimiter is k / (15kHz×N), where k and N are positive integers, and the delimiter starts with a high level and ends with a low level; or, the delimiter starts with a low level and ends with a high level; A processing module is used to demodulate the data signal.

26. The device according to claim 25, characterized in that A first level pair corresponds to a bit in the bit sequence, and different first level pairs correspond to different bits in the bit sequence.

27. The device according to claim 26, characterized in that The bit sequence includes bit 1 and bit 0, the low level length and the high level length in the first level pair corresponding to bit 0 are equal, and the high level length in the first level pair corresponding to bit 1 is L times the low level length, where L is a positive integer greater than 1.

28. The apparatus according to claim 26, wherein the bit sequence comprises bit 1 and bit 0, the low level length and the high level length in the first level pair corresponding to bit 0 are equal, the high level length and the low level length in the first level pair corresponding to bit 1 are equal, and when the length of the level corresponding to bit 0 is equal to the length of the level corresponding to bit 1, the high level in bit 0 is before the low level in bit 0, and the high level in bit 1 is after the low level in bit 1; or, The high level in bit 0 is after the low level in bit 0, and the high level in bit 1 is before the low level in bit 1.

29. The device according to any one of claims 25 to 28, characterized in that The length of one low level is an integer multiple of (1 / 15 kHz×N), and the length of one high level is an integer multiple of (1 / 15 kHz×N).

30. The device according to claim 29, characterized in that The length of the one low level is the same as the length of the one high level, or, The length of the one low level is different from the length of the one high level.

31. The device according to any one of claims 25 to 30, characterized in that The data signal also includes a calibration symbol, the length of which is the sum of the level waveform length of bit 0 in the data and the level waveform length of bit 1 in the data. The level waveform length of bit 0 in the data is different from the level waveform length of bit 1 in the data. The calibration symbol is after the delimiter and before the data.

32. The device according to any one of claims 25 to 31, characterized in that The level waveform length of bit 0 in the data is q / (15kHz×M), and the level waveform length of bit 1 in the data is p / (15kHz×Q), where q, p, M and Q are positive integers.

33. A communication device, characterized in that: The communication device comprises at least one processor coupled to at least one memory, and the at least one processor is used to execute a computer program or instruction stored in the at least one memory, so that the communication device performs the method according to any one of claims 1 to 8.

34. A communication device, characterized in that: The communication device comprises at least one processor coupled to at least one memory, and the at least one processor is used to execute a computer program or instruction stored in the at least one memory, so that the communication device performs the method according to any one of claims 9 to 17.

35. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores a computer program, and when the computer program is executed on a computer, the computer is caused to execute the method according to any one of claims 1 to 8.

36. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores a computer program, and when the computer program is executed on a computer, the computer is caused to execute the method according to any one of claims 9 to 17.

37. A computer program product, characterized in that The computer program product includes a computer program code, and when the computer program code is run on a computer, the method according to any one of claims 1 to 8 is executed.

38. A computer program product, characterized in that The computer program product comprises a computer program code, and when the computer program code is run on a computer, the method according to any one of claims 9 to 17 is executed.

39. A chip system, characterized in that: It comprises: a processor, used to call and run a computer program from a memory, so that a communication device equipped with the chip system executes the method according to any one of claims 1 to 8.

40. A chip system, characterized in that: It comprises: a processor, used to call and run a computer program from a memory, so that a communication device equipped with the chip system executes the method according to any one of claims 9 to 17.

41. A communication system, characterized in that: The communication system comprises a network device and a terminal device, wherein the network device is used to execute the method according to any one of claims 1 to 8, and the terminal device is used to execute the method according to any one of claims 9 to 17.

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