Avalanche photodiode and detector

Abstract

The avalanche photodiode comprises a substrate, a first semiconductor region, a second semiconductor region, a third semiconductor region, a fourth semiconductor region, a fifth semiconductor region, a sixth semiconductor region and a seventh semiconductor region, and the third semiconductor region and the second semiconductor region form a first breakdown junction; the fifth semiconductor region is a high-concentration buried layer of the second doping type, and the fifth semiconductor region and the fourth semiconductor region form a second breakdown junction; the sixth semiconductor region is arranged on the first surface, the sixth semiconductor region and the first semiconductor region are arranged at an interval, the seventh semiconductor region is annularly arranged on the peripheral side of the sixth semiconductor region, the seventh semiconductor region and the sixth semiconductor region are arranged at an interval, and the seventh semiconductor region is electrically conducted with the fifth semiconductor region; an isolation region is arranged between the first semiconductor region and the sixth semiconductor region and / or between the sixth semiconductor region and the seventh semiconductor region. The avalanche photodiode provided by the technical scheme of the invention can reduce edge breakdown and improve detection efficiency.

Description

Technical Field

[0001] The present invention relates to the technical field of photoelectric detectors, and in particular to an avalanche photodiode and a detector. Background Art

[0002] Avalanche photodiode (SPAD) is a semiconductor photodetector with single-photon detection sensitivity. It uses the avalanche effect that occurs when the PN junction operates above the reverse breakdown voltage. It can multiply the carriers generated by the absorbed light and generate a large current that is detected by the external circuit, thereby realizing the photoelectric detection process.

[0003] In the existing photodiode structure, avalanche breakdown generally occurs in the middle region. In order to reduce the breakdown in the edge region, a guard ring is usually set at the edge of the main junction. The guard ring occupies a large space, which seriously affects the size reduction of the diode device; or compresses the area of ​​the avalanche breakdown region, thereby affecting the detection efficiency. Summary of the invention

[0004] The main purpose of the present invention is to provide an avalanche photodiode, aiming to reduce the size of the avalanche photodiode and improve its detection efficiency.

[0005] To achieve the above object, the avalanche photodiode proposed in the present invention comprises:

[0006] A substrate having a first doping type, the substrate being formed with a first surface;

[0007] A first semiconductor region having a second doping type, wherein the first semiconductor region is disposed on the first surface and extends in a direction away from the first surface;

[0008] A second semiconductor region having the second doping type, a doping concentration of the second semiconductor region being lower than a doping concentration of the first semiconductor region, and the second semiconductor region being arranged around the periphery of the first semiconductor region and extending in a direction away from the first surface;

[0009] a third semiconductor region having the first doping type, the third semiconductor region being disposed on a side of the second semiconductor region away from the first surface and extending in a direction away from the first surface, the third semiconductor region and the second semiconductor region forming a first breakdown junction;

[0010] a fourth semiconductor region having the first doping type, the fourth semiconductor region being disposed around the second semiconductor region and extending to a side away from the first surface; and

[0011] a fifth semiconductor region, which is a high-concentration buried layer of the second doping type, and is disposed on a side of the substrate away from the first surface, and forms a second breakdown junction with the fourth semiconductor region;

[0012] a sixth semiconductor region, the sixth semiconductor region being disposed on the first surface and spaced apart from the first semiconductor region, the doping concentration of the sixth semiconductor region being greater than the doping concentration of the third semiconductor region;

[0013] a seventh semiconductor region, having the same doping type and doping concentration as the first semiconductor region, the seventh semiconductor region being arranged around the sixth semiconductor region and spaced apart from the sixth semiconductor region, and the seventh semiconductor region being electrically connected to the fifth semiconductor region;

[0014] An isolation region is provided between the first semiconductor region and the sixth semiconductor region and / or between the sixth semiconductor region and the seventh semiconductor region.

[0015] In a possible embodiment of the present application, the isolation region includes a first isolation region and a second isolation region, the first isolation region is arranged between the first semiconductor region and the sixth semiconductor region, the second isolation region is arranged between the sixth semiconductor region and the seventh semiconductor region, and the second isolation region extends from one end of the first surface to the fifth semiconductor region.

[0016] In a possible embodiment of the present application, one end of the first isolation region is disposed on the first surface, and the other end extends to a side of the second semiconductor region away from the first surface.

[0017] In a possible embodiment of the present application, the other end of the first isolation region is spaced apart from the third semiconductor region in a direction perpendicular to the first surface.

[0018] In a possible embodiment of the present application, in a direction parallel to the first surface, the fourth semiconductor region at least partially overlaps with the sixth semiconductor region and is spaced apart from the second isolation region.

[0019] In a possible embodiment of the present application, it also includes an eighth semiconductor region having the second doping type, the doping concentration of the eighth semiconductor region is less than the doping concentration of the seventh semiconductor region, the two ends of the eighth semiconductor region respectively abut the fifth semiconductor region and the seventh semiconductor region, and are arranged around the second isolation region.

[0020] In a possible embodiment of the present application, it also includes a ninth semiconductor region, wherein the ninth semiconductor region has a first doping type and a doping concentration is less than a doping concentration of the sixth semiconductor region, the ninth semiconductor region is arranged on the first surface and extends in a direction away from the first surface, and the sixth semiconductor region is arranged in the ninth semiconductor region.

[0021] In a possible embodiment of the present application, an extension depth of the ninth semiconductor region is greater than an extension depth of the second semiconductor region, and the ninth semiconductor region is located between the first isolation region and the second isolation region.

[0022] In a possible embodiment of the present application, the first doping type is P type, and the second doping type is N type;

[0023] And / or, the dosage range of the fourth semiconductor region is 4e 12 ~2e 13 / cm 2 The energy range of the fourth semiconductor region is 2000-3000keV.

[0024] The present invention further discloses a detector, which comprises a plurality of avalanche photodiodes as described above, and the plurality of avalanche photodiodes are arranged in an array.

[0025] The avalanche photodiode of the technical solution of the present invention includes a substrate, a first semiconductor region, a second semiconductor region, a third semiconductor region, a fourth semiconductor region, a fifth semiconductor region, a sixth semiconductor region and a seventh semiconductor region. The second semiconductor region and the third semiconductor region cooperate to form a first breakdown junction, and the fourth semiconductor region and the fifth semiconductor region cooperate to form a second breakdown junction. By connecting the cathode to the first semiconductor region, the anode to the sixth semiconductor region, and grounding the seventh semiconductor region, when the avalanche voltage is above the occurrence, the photocarriers can reach the avalanche region through the sixth semiconductor region, the fourth semiconductor region, and the third semiconductor region, and can also reach the avalanche region of the second breakdown junction through the seventh semiconductor region, and double breakdown occurs, and the area occupied by the effective avalanche region is reduced, thereby improving the detection efficiency. And an isolation region is provided between the first semiconductor region and the sixth semiconductor region and / or between the sixth semiconductor region and the seventh semiconductor region, replacing the existing guard ring structure, and the edge breakdown suppression effect is better, so that the lateral size can be reduced, which is conducive to the miniaturization of the device. BRIEF DESCRIPTION OF THE DRAWINGS

[0026] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on the structures shown in these drawings without paying creative work.

[0027] Figure 1 A cross-sectional view of an embodiment of an avalanche photodiode of the present invention;

[0028] Figure 2 It is a schematic diagram of simulated doping of the avalanche photodiode of the present invention;

[0029] Figure 3 This is a pixel breakdown diagram of the avalanche photodiode simulation of the present invention.

[0030] Description of Figure Numbers:

[0031] Label name Label name 11 Substrate 15 The sixth semiconductor region 111 First surface 16 Semiconductor Region 7 12 The first semiconductor region 17 Quarantine 131 The second semiconductor region 171 First quarantine area 132 The third semiconductor region 172 Second quarantine area 141 Fourth semiconductor region 18 Eighth semiconductor region 142 Fifth semiconductor region 19 Semiconductor District 9

[0032] The realization of the purpose, functional features and advantages of the present invention will be further explained in conjunction with embodiments and with reference to the accompanying drawings. DETAILED DESCRIPTION

[0033] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0034] It should be noted that all directional indications in the embodiments of the present invention (such as up, down, left, right, front, back, etc.) are only used to explain the relative position relationship, movement status, etc. between the components under a certain specific posture (as shown in the accompanying drawings). If the specific posture changes, the directional indication will also change accordingly.

[0035] In the present invention, unless otherwise clearly specified and limited, the terms "connection", "fixation", etc. should be understood in a broad sense. For example, "fixation" can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection or an indirect connection through an intermediate medium, it can be the internal connection of two elements or the interaction relationship between two elements, unless otherwise clearly defined. For ordinary technicians in this field, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.

[0036] In addition, in the present invention, descriptions such as "first", "second", etc. are only used for descriptive purposes and cannot be understood as indicating or implying their relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features defined as "first" and "second" may explicitly or implicitly include at least one of the features. In addition, the technical solutions between the various embodiments can be combined with each other, but they must be based on the ability of ordinary technicians in the field to implement them. When the combination of technical solutions is contradictory or cannot be implemented, it should be deemed that such a combination of technical solutions does not exist and is not within the scope of protection required by the present invention.

[0037] Single-photon avalanche photodiodes operate above the breakdown voltage of the PN junction and can be used in highly sensitive photon capture environments. As existing avalanche photodiodes generally have a center breakdown, in order to avoid edge breakdown, a guard ring is added for protection. As the product is miniaturized and the device size is reduced, the fill factor of the center avalanche region decreases, resulting in a decrease in the detection efficiency (PDE) of the device. The present invention proposes an avalanche photodiode that aims to reduce premature edge breakdown while reducing the lateral size and increasing the proportion of the avalanche region, thereby improving the detection efficiency.

[0038] Please refer to Figure 1 and Figure 2 In one embodiment of the present invention, the avalanche photodiode comprises:

[0039] A substrate 11 having a first doping type, wherein the substrate 11 is formed with a first surface 111;

[0040] A first semiconductor region 12 having a second doping type, wherein the first semiconductor region 12 is disposed on the first surface 111 and extends in a direction away from the first surface 111;

[0041] a second semiconductor region 131 having the second doping type, wherein the doping concentration of the second semiconductor region 131 is less than the doping concentration of the first semiconductor region 12, and the second semiconductor region 131 is disposed around the periphery of the first semiconductor region 12 and extends in a direction away from the first surface 111;

[0042] A third semiconductor region 132 having the first doping type, the third semiconductor region 132 being disposed on a side of the second semiconductor region 131 away from the first surface 111 and extending in a direction away from the first surface 111, and the third semiconductor region 132 and the second semiconductor region 131 forming a first breakdown junction;

[0043] a fourth semiconductor region 141 having the first doping type, wherein the fourth semiconductor region 141 is disposed around the second semiconductor region 131 and extends to a side away from the first surface 111; and

[0044] The fifth semiconductor region 142 is a high-concentration buried layer of the second doping type, and the fifth semiconductor region 142 is disposed on a side of the substrate 11 away from the first surface 111 and forms a second breakdown junction with the fourth semiconductor region 141;

[0045] a sixth semiconductor region 15, wherein the sixth semiconductor region 15 is disposed on the first surface 111 and is spaced apart from the first semiconductor region 12, and a doping concentration of the sixth semiconductor region 15 is greater than a doping concentration of the third semiconductor region 132;

[0046] a seventh semiconductor region 16, having the same doping type and doping concentration as the first semiconductor region 12, the seventh semiconductor region 16 being arranged around the sixth semiconductor region 15 and spaced apart from the sixth semiconductor region 15, and the seventh semiconductor region 16 being electrically connected to the fifth semiconductor region 142;

[0047] An isolation region 17 is disposed between the first semiconductor region 12 and the sixth semiconductor region 15 and / or between the sixth semiconductor region 15 and the seventh semiconductor region 16 .

[0048] In this embodiment, the material of the substrate 11 can be a silicon wafer. In other examples, it can also be a germanium substrate, a germanium silicon substrate, an indium gallium arsenide substrate, a gallium arsenide substrate, a silicon carbide substrate, etc., which are not limited here. The substrate 11 is formed with a first surface 111, and light can be incident from the first surface 111 and detected.

[0049] The depth direction of the avalanche photodiode is defined as a direction perpendicular to the first surface 111, and the direction parallel to the first surface 111 is a lateral direction. The substrate 11 has a first doping type, that is, an impurity element is doped into the substrate 11, for example, the conductive type of the doped element is N-type or P-type. The doping concentration at each position of the substrate 11 can be the same, or a gradient design can be performed, which is not limited here. The first semiconductor region 12 has a second doping type, which is different from the doping type of the substrate 11.

[0050] Here, the doping type of the substrate 11 is P-type as an example. That is, P-type epitaxial silicon is formed on the surface of a P-type silicon wafer by chemical vapor deposition or molecular beam epitaxy. Then, a certain depth position on the basis of the substrate 11 can be lightly doped with group III elements, such as non-metallic boron (B) elements or metal gallium (Ga), to form a third semiconductor region 132, which is a P-type well (P-Well, referred to as PW). The doping method can be ion implantation or thermal diffusion, etc., which is not limited here. Above the third semiconductor region 132, by doping group V elements, such as non-metallic phosphorus (P) or metal arsenic (As), a second semiconductor region 131 (NW) is formed, and a group V element with a higher concentration is doped on the basis of NW, thereby forming a heavily doped first semiconductor region 12 (N+), and the first semiconductor region 12 is formed with a cathode ohmic contact.

[0051] The first semiconductor region 12 extends from the first surface 111 in a direction away from the first surface 111, which means that the first semiconductor region 12 has a certain thickness in a direction perpendicular to the first surface 111, and one surface thereof is coplanar with the first surface 111. Of course, the first semiconductor region 12 is also extended in a direction parallel to the first surface 111, that is, it has a surface area parallel to the first surface 111. The second semiconductor region 131 is arranged around the first semiconductor region 12 and extends in a direction perpendicular to the first surface 111, that is, it has a certain thickness in the depth direction, and at the same time extends in a direction parallel to the first surface 111, and has a certain surface area. The third semiconductor region 132 is arranged on the side of the second semiconductor region 131 away from the first surface 111, and can be in contact with the second semiconductor region 131 or have a certain gap. The third semiconductor region 132 and the second semiconductor region 131 have an overlapping portion in the lateral direction, thereby forming a first breakdown junction in cooperation, and avalanche breakdown can be formed at the junction of the two.

[0052] The fourth semiconductor region 141 extends from the first surface 111 to a side away from the first surface 111, that is, it overlaps with the first semiconductor region 12, the second semiconductor region 131, and the third semiconductor region 132 in the vertical direction. The fourth semiconductor region 141 (PWHT) is formed by lightly doping with group III elements, such as non-metallic boron (B) atoms or metal gallium (Ga) on the basis of the substrate 11. The doping concentration of the fourth semiconductor region 141 can be less than the doping concentration of the third semiconductor region 132; it can also be greater than the doping concentration of the third semiconductor region 132; or it can be partially greater than the doping concentration of the third semiconductor region 132 and partially less than the doping concentration of the third semiconductor region 132. The fourth semiconductor region can be distinguished from the third semiconductor region 132 according to different implantation conditions.

[0053] The fifth semiconductor region 142 is an N-type high-concentration buried layer, which is a layer of high-concentration donor impurities, namely an N+ region, diffused on the basis of a silicon wafer. For example, antimony elements are doped on the silicon substrate, and then an N-type silicon single crystal layer is epitaxially grown thereon. The fifth semiconductor region 142 is located on the side away from the first surface 111, and has a certain gap with the fourth semiconductor region 141 in the vertical direction. The two have an overlapping part in the horizontal direction, thereby cooperating to form a second breakdown junction, and breakdown can occur at the junction of the two. The setting of the fifth semiconductor region 142 can reduce the resistance of the device on the basis of the double breakdown junction. In one example, the doping concentration of the portion of the fourth semiconductor region 141 close to the first surface 111 is small, and the doping concentration of the portion away from the first surface 111 is large, so that it cooperates with the fifth semiconductor region 142 to more easily induce breakdown.

[0054] A sixth semiconductor region 15 is provided on the lateral side of the first semiconductor region 12. The sixth semiconductor region 15 (P+) can be formed on the substrate 11 by heavily doping group III elements, such as non-metallic boron (B) atoms or metal gallium (Ga). The structure can form an anode ohmic contact by sputtering metal to apply a low potential to the substrate 11. The anode and the cathode are both located on the first surface 111, thereby forming a single-side lead-out, which is convenient for connection with an external circuit and can lead out the obtained large current for processing. The sixth semiconductor region 15 is spaced from the first semiconductor region 12 in the lateral direction to reduce the electric field effect on the first breakdown junction and reduce edge breakdown.

[0055] A seventh semiconductor region 16 is also provided on the peripheral side of the sixth semiconductor region 15. The seventh semiconductor region 16 has the same doping type and doping concentration as the first semiconductor region 12, and can be grounded to be used as a grounding electrode. The seventh semiconductor region 16 is in electrical contact with the fifth semiconductor region 142, so that in the grounded state, the second breakdown junction can undergo avalanche breakdown, and the obtained large current can also be detected through the first semiconductor region 12.

[0056] The isolation region 17 can be formed by trench etching and filling the trench with polysilicon or metal tungsten, etc. Optionally, the isolation region can be a deep trench or a shallow trench. An isolation region is set between the first semiconductor region 12 and the sixth semiconductor region 15, so that the edge of the first semiconductor region 12 can be reduced to break down prematurely. Alternatively, an isolation region is set between the sixth semiconductor region 15 and the seventh semiconductor region 16, which can effectively avoid the edge of the seventh semiconductor region 16 from breaking down prematurely. Alternatively, an isolation region is set between the first semiconductor region 12 and the sixth semiconductor region 15, and between the sixth semiconductor region 15 and the seventh semiconductor region 16, which can further reduce the edge of the first breakdown junction and the second breakdown junction from breaking down prematurely, thereby improving the detection efficiency. And because the setting of the isolation region can improve the suppression effect, the lateral size of the avalanche photodiode can be reduced.

[0057] The avalanche photodiode of the technical solution of the present invention includes a substrate 11, a first semiconductor region 12, a second semiconductor region 131, a third semiconductor region 132, a fourth semiconductor region 141, a fifth semiconductor region 142, a sixth semiconductor region 15 and a seventh semiconductor region 16. The second semiconductor region 131 and the third semiconductor region 132 cooperate to form a first breakdown junction, and the fourth semiconductor region 141 and the fifth semiconductor region 142 cooperate to form a second breakdown junction. By connecting the cathode to the first semiconductor region 12, the anode to the sixth semiconductor region 15, and the seventh semiconductor region 16 to the ground, when the avalanche voltage is exceeded, the photocarriers can reach the avalanche region through the sixth semiconductor region 15, the fourth semiconductor region 141, and the third semiconductor region 132, and can also reach the avalanche region of the second breakdown junction through the seventh semiconductor region 16, and double breakdown occurs, and the area occupied by the effective avalanche region is reduced, thereby improving the detection efficiency. An isolation region is provided between the first semiconductor region 12 and the sixth semiconductor region 15 and / or between the sixth semiconductor region 15 and the seventh semiconductor region 16 to replace the existing guard ring structure, which has a better effect of suppressing edge breakdown, thereby reducing the lateral size and facilitating the miniaturization of the device.

[0058] In a possible embodiment of the present application, the isolation region includes a first isolation region 171 and a second isolation region 172, the first isolation region 171 is arranged between the first semiconductor region 12 and the sixth semiconductor region 15, the second isolation region 172 is arranged between the sixth semiconductor region 15 and the seventh semiconductor region 16, and the second isolation region 172 extends from one end of the first surface 111 to the fifth semiconductor region 142.

[0059] In the present embodiment, isolation regions are set at the edge positions of the two breakdown junctions, that is, a first isolation region 171 is set between the first semiconductor region 12 and the sixth semiconductor region 15, and a second isolation region 172 is set between the sixth semiconductor region 15 and the seventh semiconductor region 16. Since the first breakdown junction is close to the first surface 111 and the second breakdown junction is located on the side away from the first surface 111, the first isolation region 171 and the second isolation region 172 are both set on the first surface 111 and extend in a direction away from the first surface 111. The extension depth of the second isolation region 172 is greater than the extension depth of the first isolation region 171, thereby improving the suppression effect and further facilitating miniaturization design.

[0060] At the same time, the end of the second isolation region 172 away from the first surface 111 is abutted against the fifth semiconductor region 142, that is, its type is a deep trench, so as to completely isolate the edge position and prevent premature breakdown of the edge. In one example, the end of the second isolation region 172 away from the first surface 111 can be deep into the fifth semiconductor region 142, thereby further improving the suppression effect.

[0061] In a possible embodiment of the present application, one end of the first isolation region 171 is disposed on the first surface 111 , and the other end extends to a side of the second semiconductor region 131 away from the first surface 111 .

[0062] In this embodiment, the first isolation region 171 is used to prevent edge breakdown of the NW, so its extension depth is set to be larger than that in general. Optionally, the other end thereof is extended to the side of the second semiconductor region 131 away from the first surface 111, which can completely isolate the edge of the NW and further prevent premature edge breakdown.

[0063] In a possible embodiment of the present application, the other end of the first isolation region 171 is spaced apart from the third semiconductor region 132 in a direction perpendicular to the first surface 111 .

[0064] Here, the other end of the first isolation region 171 should not extend too long, so its depth is set to be smaller than the depth of the third semiconductor region 132, thereby reducing the impact on the movement of carriers and improving the breakdown efficiency.

[0065] In one example, the extension depth of the first isolation region 171 may be 1 micrometer to 4 micrometers, for example, 2 micrometers, 3 micrometers, etc., which effectively improves the suppression effect.

[0066] In a possible embodiment of the present application, in a direction parallel to the first surface 111 , the fourth semiconductor region 141 at least partially overlaps with the sixth semiconductor region 15 , and is spaced apart from the second isolation region 172 .

[0067] In this embodiment, in order to facilitate the introduction of carriers into the position of the first breakdown junction to cause avalanche, the fourth semiconductor region 141 needs to contact the sixth semiconductor region 15 in the lateral direction, so it at least partially overlaps with the sixth semiconductor region 15 in the lateral direction. However, the size of the fourth semiconductor region 141 in the lateral direction should not be too large, so it is spaced from the second isolation region 172, and when the sixth semiconductor region 15 is in contact with the second isolation region 172, it partially overlaps with the sixth semiconductor region 15 in the lateral direction, thereby improving the detection efficiency and avoiding the occurrence of premature edge breakdown.

[0068] In a possible embodiment of the present application, it also includes an eighth semiconductor region 18 having the second doping type, the doping concentration of the eighth semiconductor region 18 is less than the doping concentration of the seventh semiconductor region 16, and the two ends of the eighth semiconductor region 18 respectively abut the fifth semiconductor region 142 and the seventh semiconductor region 16, and are arranged on the peripheral side of the second isolation region 172.

[0069] In this embodiment, the eighth semiconductor region 18 serves to connect the ground electrode and the fifth semiconductor region 142, so that the breakdown of the second breakdown junction can be more easily induced. The doping type of the eighth semiconductor region 18 is the same as that of the seventh semiconductor region 16, and the concentration is less than that of the seventh semiconductor region 16. Through different injection conditions, a structure different from NW is formed, such as SNDRF. Of course, the doping concentration and injection conditions can be designed according to actual conditions, and are not limited here, as long as electrical conduction can be achieved.

[0070] In one example, the cross-sectional shape of the eighth semiconductor region 18 is complementary to the cross-sectional shape of the second isolation region 172, for example, one of the two is an inverted trapezoid and the other is a regular trapezoid, thereby improving the structural stability of the avalanche photodiode. The lateral size of the fifth semiconductor region 142 can be adapted to the size of the outermost circle of the eighth semiconductor region 18, thereby further improving the structural stability while maintaining miniaturization.

[0071] Please continue to refer to Figure 1 In a possible embodiment of the present application, it also includes a ninth semiconductor region 19, wherein the ninth semiconductor region 19 has a first doping type and a doping concentration is less than a doping concentration of the sixth semiconductor region 15, and the ninth semiconductor region 19 is arranged on the first surface 111 and extends in a direction away from the first surface 111, and the sixth semiconductor region 15 is arranged in the ninth semiconductor region 19.

[0072] In this embodiment, the first doping type is lightly doped on the basis of the substrate 11 to form a ninth semiconductor region 19, whose doping concentration is lower than the doping concentration of the sixth semiconductor region 15, and can also be lower than or equal to the doping concentration of the third semiconductor region 132. For example, when the substrate 11 is a P-type substrate 11, the sixth semiconductor region 15 is P+, the third semiconductor region 132 is a P-type well (PW1 for short), and the ninth semiconductor region 19 is MVP. The ninth semiconductor region 19 is extended in a direction perpendicular to the first surface 111, and the sixth semiconductor region 15 is arranged in the ninth semiconductor region 19, so that the ninth semiconductor region 19 can serve as a transition structure between the sixth semiconductor region 15 and the substrate 11, and can conveniently guide the anode potential of the device to the P-type substrate 11.

[0073] In a possible embodiment of the present application, the extension depth of the ninth semiconductor region 19 is greater than the extension depth of the second semiconductor region 131 , and the ninth semiconductor region 19 is located between the first isolation region 171 and the second isolation region 172 .

[0074] In the present embodiment, the fifth semiconductor region 142 is of a medium P-well type, is laterally spaced apart from the second semiconductor region 131, and is laterally adjacent to the first isolation region 171 and the second isolation region 172, and has an extension depth greater than that of the second semiconductor region 131. This can isolate carriers introduced due to surface defects in the isolation region from entering the avalanche region, effectively reduce the influence of non-photogenerated carriers on avalanche breakdown, and thereby effectively reduce the dark count rate (DCR).

[0075] In a possible embodiment of the present application, the first doping type is P type, and the second doping type is N type;

[0076] And / or, the dose range of the fourth semiconductor region 141 is 4e12-2e13 / cm2. The energy range of the fourth semiconductor region 141 is 2000-3000keV.

[0077] Here, the first doping type is set to P type, then the substrate 11 is a P type epitaxial wafer, the third semiconductor region 132 is a P type well, the second semiconductor region 131 is an N type well, the first semiconductor region 12 is N+, the sixth semiconductor region 15 is P+, the fourth semiconductor region 141 is also a P type well, and the fifth semiconductor region 142 is an N type high concentration buried layer, so that when the device is above the avalanche breakdown voltage, the photogenerated carriers drift to the breakdown junction region under the action of the electric field, and since the impact ionization rate and mobility of electrons are higher than those of holes, a higher photon detection efficiency can be obtained. Of course, in other embodiments, the first doping type is N type and the second doping type is P type.

[0078] The dose range of the fourth semiconductor region 141 can be 1e 12 ~1e 14 / cm 2 For example, 2e 12 / cm 2 、3e 12 / cm 2 、4e 12 / cm 2 、5e 12 / cm 2 、6e 12 / cm 2 , 7e 12 / cm 2 、8e 12 / cm 2 、9e 12 / cm 2 , 1e 13 / cm 2 , 2e 13 / cm 2 、3e 13 / cm 2、4e 13 / cm 2 、5e 13 / cm 2 、6e 13 / cm 2 , 7e 13 / cm 2 、8e 13 / cm 2 、9e 13 / cm 2 The energy range of the fourth semiconductor region 141 is 2000-3000kev, for example, 2200kev, 2400kev, 2600kev, 2800kev, etc., so that the voltage of the second breakdown junction is appropriate, which can easily induce breakdown and improve detection efficiency.

[0079] In addition, optionally, the sixth semiconductor region 15, the seventh semiconductor region 16, the eighth semiconductor region 18, the ninth semiconductor region 19 and the isolation region are all symmetrically arranged with the longitudinal midline of the first semiconductor region 12 as the symmetry axis, so that the entire device can be arranged symmetrically, the uniformity of the electric field distribution of the breakdown junction is improved, and the avalanche breakdown probability distribution is made more uniform, which can further improve the detection efficiency.

[0080] Please refer to Figure 3 This figure is a simulated breakdown diagram of an embodiment of the avalanche photodiode of the present application. From the gray part in the middle of the figure, it can be seen that the device can undergo full-scale breakdown in the lateral direction, effectively improving the detection efficiency. According to statistics, the PDE of a 10um device under irradiation with a wavelength of 905nm reaches 11%, which is much higher than the 3% of a single junction.

[0081] The present invention also discloses a detector, the detector comprising a plurality of avalanche photodiodes as described above, the plurality of avalanche photodiodes being arranged in an array. Since the avalanche photodiode of the detector comprises the structure of the avalanche photodiode of any of the above embodiments, the beneficial effects brought about by any of the above embodiments are not described in detail here.

[0082] The above description is only a preferred embodiment of the present invention, and does not limit the patent scope of the present invention. All equivalent structural changes made by using the contents of the present invention specification and drawings under the concept of the present invention, or directly / indirectly applied in other related technical fields are included in the patent protection scope of the present invention.

Claims

1. An avalanche photodiode, characterized in that: include: A substrate having a first doping type, the substrate being formed with a first surface; A first semiconductor region having a second doping type, wherein the first semiconductor region is disposed on the first surface and extends in a direction away from the first surface; A second semiconductor region having the second doping type, a doping concentration of the second semiconductor region being lower than a doping concentration of the first semiconductor region, and the second semiconductor region being arranged around the periphery of the first semiconductor region and extending in a direction away from the first surface; a third semiconductor region having the first doping type, the third semiconductor region being disposed on a side of the second semiconductor region away from the first surface and extending in a direction away from the first surface, the third semiconductor region and the second semiconductor region forming a first breakdown junction; a fourth semiconductor region having the first doping type, the fourth semiconductor region being arranged around the second semiconductor region and extending to a side away from the first surface; as well as a fifth semiconductor region, which is a high-concentration buried layer of the second doping type, and is disposed on a side of the substrate away from the first surface, and forms a second breakdown junction with the fourth semiconductor region; a sixth semiconductor region, the sixth semiconductor region being disposed on the first surface and spaced apart from the first semiconductor region, the doping concentration of the sixth semiconductor region being greater than the doping concentration of the third semiconductor region; a seventh semiconductor region, having the same doping type and doping concentration as the first semiconductor region, the seventh semiconductor region being arranged around the sixth semiconductor region and spaced apart from the sixth semiconductor region, and the seventh semiconductor region being electrically connected to the fifth semiconductor region; An isolation region is provided between the first semiconductor region and the sixth semiconductor region and / or between the sixth semiconductor region and the seventh semiconductor region.

2. The avalanche photodiode according to claim 1, characterized in that The isolation region includes a first isolation region and a second isolation region, the first isolation region is arranged between the first semiconductor region and the sixth semiconductor region, the second isolation region is arranged between the sixth semiconductor region and the seventh semiconductor region, and one end of the second isolation region away from the first surface extends to the fifth semiconductor region.

3. The avalanche photodiode according to claim 2, characterized in that One end of the first isolation region is disposed on the first surface, and the other end extends to a side of the second semiconductor region away from the first surface.

4. The avalanche photodiode according to claim 3, characterized in that The other end of the first isolation region is spaced apart from the third semiconductor region in a direction perpendicular to the first surface.

5. The avalanche photodiode according to any one of claims 2 to 4, characterized in that: In a direction parallel to the first surface, the fourth semiconductor region at least partially overlaps with the sixth semiconductor region and is spaced apart from the second isolation region.

6. The avalanche photodiode according to claim 5, characterized in that It also includes an eighth semiconductor region having the second doping type, the doping concentration of the eighth semiconductor region is less than the doping concentration of the seventh semiconductor region, the two ends of the eighth semiconductor region respectively abut the fifth semiconductor region and the seventh semiconductor region, and are arranged around the second isolation region.

7. The avalanche photodiode according to any one of claims 2 to 4, characterized in that: It also includes a ninth semiconductor region, which has a first doping type and a doping concentration less than that of the sixth semiconductor region. The ninth semiconductor region is arranged on the first surface and extends in a direction away from the first surface. The sixth semiconductor region is arranged in the ninth semiconductor region.

8. The avalanche photodiode according to claim 7, characterized in that The ninth semiconductor region extends to a depth greater than that of the second semiconductor region and is located between the first isolation region and the second isolation region.

9. The avalanche photodiode according to any one of claims 1 to 4, characterized in that: The first doping type is P type, and the second doping type is N type.

10. A detector, characterized in that: The invention comprises a plurality of avalanche photodiodes according to any one of claims 1 to 9, wherein the plurality of avalanche photodiodes are arranged in an array.

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