Solar cell and preparation method thereof, and grid line preparation method
By preparing the internal and external transparent conductive oxide layers in HJT solar cells and embedding the thin gate lines and main gate lines, the problem of insufficient gate lines binding force is solved, the stability and efficiency of the battery are improved, and the risk of gate breaking is reduced.
Patent Information
- Application Number
- CN202411437563.7
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-10-15
- Publication Date
- 2025-01-17
AI Technical Summary
The gate lines of HJT solar cells are insufficient in bonding with other parts, which can easily lead to gate breakage and gate lines falling off, affecting battery performance and durability.
Prepare an internal transparent conductive oxide layer on the gate line to be made, and embed a thin gate line and a main gate line on it. After covering the external transparent conductive oxide layer, remove the upper excess layer. Through screen printing or laser transfer, the upper method is used to print or laser transfer Prepare gate lines to enhance the bonding of gate lines with transparent conductive oxide layers.
The bonding force of the gate line is improved, the gate line falls off is reduced or avoided, the adverse impact of gate breaking on solar cells is reduced, and the stability and efficiency of the battery are enhanced.
Smart Images
Figure CN119325302A_ABST
Abstract
Description
Technical Field
[0001] The present invention mainly relates to the technical field of solar cells, and in particular to a solar cell and a preparation method thereof, and a grid line preparation method. Background Art
[0002] A solar cell (also known as a photovoltaic cell or photocell) is a device that uses the photoelectric effect to convert solar energy into electrical energy. It is made of semiconductor materials. When sunlight shines on the surface of a photovoltaic cell, photons hit the semiconductor material, exciting the electrons in the semiconductor, causing them to jump from the valence band to the conduction band, forming free electrons and holes. Under the action of the electric field, the free electrons move along the inside of the semiconductor, forming an electric current. When connected to an external circuit, a current is generated in the circuit, achieving electrical energy output.
[0003] Solar cells generally include PERC cells, TOPCon cells, HJT cells (heterojunction cells) and IBC cells. Among them, HJT cells are an important research direction for solar cells. The grid electrode of HJT cells is usually prepared by screen printing. Based on this grid preparation method, the bonding force between the grid and other parts of the solar cell is insufficient, which can easily lead to grid breakage or even direct peeling of the grid from the solar cell, which is not conducive to subsequent packaging and durability testing, and also has an adverse effect on the performance of the solar cell. Summary of the invention
[0004] The technical problem to be solved by the present invention is to provide a solar cell and a preparation method thereof, and a grid line preparation method, so as to reduce or avoid grid line falling off and reduce the adverse effect of grid breakage on the solar cell.
[0005] To solve the above technical problems, in a first aspect, the present invention provides a method for preparing a gate line, comprising: preparing an internal transparent conductive oxide layer on a gate line workpiece, wherein the gate line workpiece is a semi-finished solar cell product without gate lines prepared thereon; preparing gate lines on the internal transparent conductive oxide layer, wherein the gate lines include fine gate lines and main gate lines, and the lower portion of the gate lines is embedded in the internal transparent conductive oxide layer; preparing an external transparent conductive oxide layer, wherein the external transparent conductive oxide layer covers the internal transparent conductive oxide layer and the region where the gate lines are located; and removing the transparent conductive oxide covering the upper portion of the gate lines.
[0006] Optionally, preparing gate lines on the internal transparent conductive oxide layer includes: preparing first fine gate lines, second fine gate lines and the main gate lines in sequence, wherein the first fine gate lines are parallel to each other, the second fine gate lines are parallel to each other, and the first fine gate lines and the second fine gate lines intersect; the connection point between the main gate line and the fine gate line is located at the intersection of the first fine gate line and the second fine gate line.
[0007] Optionally, the first thin gate lines and the second thin gate lines are not parallel to or perpendicular to the edge of the gate line component to be manufactured, and the main gate lines are parallel to or perpendicular to the edge of the gate line component to be manufactured.
[0008] Optionally, an angle between the first fine grid line and / or the second fine grid line and an edge of the grid line workpiece is 30°, 45°, 60°, 75° or 105°.
[0009] Optionally, preparing the gate line on the inner transparent conductive oxide layer includes: preparing the gate line on the inner transparent conductive oxide layer by screen printing or laser transfer.
[0010] Optionally, removing the transparent conductive oxide covering the upper part of the gate line includes: removing the transparent conductive oxide covering the upper part of the gate line by laser etching.
[0011] In a second aspect, the present invention provides a method for preparing a solar cell, comprising: providing a substrate; depositing an intrinsic passivation layer and a doping layer in sequence on the surface of the substrate; preparing a gate line on the doping layer using the gate line preparation method described in the first aspect; and subjecting the cell sheet after the gate line is prepared to high-temperature curing, wherein the curing temperature is less than 230°C.
[0012] In a third aspect, the present invention provides a solar cell, comprising: a substrate, on which an intrinsic passivation layer, a doping layer, an internal transparent conductive oxide layer and an external transparent conductive oxide layer are sequentially provided; grid lines, the grid lines comprising fine grid lines and main grid lines, the lower part of the grid lines being embedded in the internal transparent conductive oxide layer, and the upper part or upper surface of the grid lines exposing the external transparent conductive oxide layer.
[0013] Optionally, the fine gate lines include first fine gate lines and second fine gate lines, wherein the first fine gate lines are parallel to each other, the second fine gate lines are parallel to each other, and the first fine gate lines and the second fine gate lines intersect; the connection point between the main gate line and the fine gate line is located at the intersection of the first fine gate line and the second fine gate line.
[0014] Optionally, the first thin grid lines and the second thin grid lines are not parallel to or perpendicular to the edge of the solar cell, and the main grid lines are parallel to or perpendicular to the edge of the solar cell.
[0015] Optionally, an angle between the first fine grid line and / or the second fine grid line and the edge of the solar cell is 30°, 45°, 60°, 75° or 105°.
[0016] Optionally, the inner transparent conductive oxide layer has a thickness of 20 nm to 50 nm.
[0017] Optionally, the material of the fine grid lines is silver paste, and the material of the main grid lines is silver-coated copper paste.
[0018] Compared with the prior art, the present invention has the following advantages: the lower part of the prepared gate line is embedded in the internal transparent conductive oxide layer, and the upper part or upper surface of the gate line exposes the external transparent conductive oxide layer. The gate line is combined with the transparent conductive oxide layer to increase the bonding force of the gate line, making the gate line more stable in the solar cell, reducing or avoiding the falling off of the gate line, and reducing the adverse effects of broken gates on the solar cell. BRIEF DESCRIPTION OF THE DRAWINGS
[0019] The accompanying drawings are included to provide a further understanding of the present application. They are included and constitute a part of the present application. The accompanying drawings illustrate embodiments of the present application and together with the present specification serve to explain the principles of the present application. In the accompanying drawings:
[0020] Figure 1 It is a schematic diagram of the process of a method for preparing a gate line according to an embodiment of the present invention;
[0021] Figure 2 is a schematic diagram of a structure after preparing a first fine gate line in one embodiment of the present invention;
[0022] Figure 3 is a schematic diagram of a structure after preparing a second fine gate line in one embodiment of the present invention;
[0023] Figure 4 is a schematic diagram of the structure after the main grid line is prepared in one embodiment of the present invention;
[0024] Figure 5 It is a schematic diagram of a process of preparing a solar cell according to an embodiment of the present invention;
[0025] Figure 6 It is a schematic structural diagram of a solar cell according to an embodiment of the present invention.
[0026] In the figure:
[0027] 110 - base;
[0028] 210 - intrinsic passivation layer, 211 - first intrinsic passivation layer, 212 - second intrinsic passivation layer;
[0029] 310 - doping layer, 311 - first doping layer, 312 - second doping layer;
[0030] 410 - inner transparent conductive oxide layer, 411 - first inner transparent conductive oxide layer, 412 - second inner transparent conductive oxide layer;
[0031] 510 - outer transparent conductive oxide layer, 511 - first outer transparent conductive oxide layer, 512 - second outer transparent conductive oxide layer;
[0032] 610-grid line. DETAILED DESCRIPTION
[0033] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the following is a brief introduction to the drawings required for the description of the embodiments. Obviously, the drawings described below are only some examples or embodiments of the present application. For ordinary technicians in this field, the present application can also be applied to other similar scenarios based on these drawings without creative work. Unless it is obvious from the language environment or otherwise explained, the same reference numerals in the figures represent the same structure or operation.
[0034] In addition, it should be noted that the use of words such as "first" and "second" to define components is only for the convenience of distinguishing the corresponding components. If not otherwise stated, the above words have no special meaning and cannot be understood as limiting the scope of protection of this application. In addition, although the terms used in this application are selected from well-known and commonly used terms, some terms mentioned in the specification of this application may be selected by the applicant at his or her discretion, and their detailed meanings are explained in the relevant parts of the description of this article. In addition, it is required to understand this application not only by the actual terms used, but also by the meaning implied by each term.
[0035] Flowcharts are used in the present application to illustrate the operations performed by the system according to the embodiments of the present application. It should be understood that the preceding or following operations are not necessarily performed accurately in order. On the contrary, various steps may be processed in reverse order or simultaneously. At the same time, other operations may be added to these processes, or one or more operations may be removed from these processes.
[0036] Figure 1 is a schematic diagram of a process for preparing a gate line according to an embodiment of the present invention, with reference to Figure 1 As shown, the gate line preparation method 100 includes: S110, preparing an internal transparent conductive oxide layer on a gate line workpiece, wherein the gate line workpiece is a semi-finished solar cell product without gate line preparation; S120, preparing gate lines on the internal transparent conductive oxide layer, the gate lines include fine gate lines and main gate lines, and the lower part of the gate lines is embedded in the internal transparent conductive oxide layer; S130, preparing an external transparent conductive oxide layer, the external transparent conductive oxide layer covers the internal transparent conductive oxide layer and the area where the gate lines are located; S140, removing the transparent conductive oxide covering the upper part of the gate lines.
[0037] The solar cell preparation process usually involves preparing various functional layers on the substrate in sequence, such as preparing a passivation layer, a doping layer, a dielectric layer, an anti-reflection layer, and a tunneling layer, etc., and then preparing a grid electrode on the functional layer to complete the preparation of the solar cell. It can be seen that the preparation of the grid line is generally a subsequent process in the preparation of the solar cell process. Due to its structural limitations, the grid lines prepared by conventional methods have insufficient bonding strength between the grid lines and between the grid lines and the rest of the battery, and the grid lines are prone to falling off or breaking, which is bound to affect the performance of the solar cell.
[0038] In this embodiment, a thin transparent conductive oxide layer (TCO layer), i.e., an inner transparent conductive oxide layer, is first deposited, and then a gate line is prepared, and then another transparent conductive oxide layer, i.e., an outer transparent conductive oxide layer, is deposited to cover the gate line, so that the transparent conductive oxide is more closely connected to the gate line. The lower part of the prepared gate line is embedded in the inner transparent conductive oxide layer, and the upper part or upper surface of the gate line is exposed to the outer transparent conductive oxide layer. The gate line is combined with the two transparent conductive oxide layers to increase the bonding force of the gate line, making the gate line more stable in the solar cell, reducing or preventing the gate line from falling off, and reducing the adverse effects of broken gates on the solar cell.
[0039] In one example, refer to Figure 2 to Figure 4 As shown, preparing the gate lines on the internal transparent conductive oxide layer can be preparing the first fine gate lines, the second fine gate lines and the main gate lines in sequence, wherein the first fine gate lines are parallel to each other, the second fine gate lines are parallel to each other, and the first fine gate lines and the second fine gate lines intersect, and the angle between the first fine gate lines and the second fine gate lines is not restricted, and the angle is determined by the angle between the first fine gate lines and the second fine gate lines and the edge; the connection point between the main gate line and the fine gate line is located at the intersection of the first fine gate line and the second fine gate line.
[0040] Furthermore, the first thin gate lines and the second thin gate lines are not parallel or perpendicular to the edge of the gate line workpiece to be manufactured, and the main gate lines are parallel or perpendicular to the edge of the gate line workpiece to be manufactured.
[0041] A common way of setting the fine grid lines is to set the fine grid lines parallel to each other. Although this method has a relatively simple structure, the bonding force between the grid lines, especially between the fine grid lines, is relatively poor. To this end, the present embodiment divides the fine grid lines into two groups. The fine grid lines in each group will not intersect, but the fine grid lines in different groups do intersect; in addition, the connection point between the main grid line and the fine grid line is located at the intersection of the first fine grid line and the second fine grid line. In this way, through the overlap between the fine grid lines and the overlap between the fine grid lines and the main grid lines, each intersection point between the main grid line and the fine grid lines has four fine grid lines in different directions that can be connected to the main grid line, which is conducive to enhancing the bonding between the grid lines and can enhance the fixing effect on the main grid line. Not only that, this structure can also significantly reduce the series resistance Rs of the battery device, further improving the efficiency of solar cells.
[0042] You can refer to Figure 4 As shown in the figure, the four edges of the grid line workpiece are represented by a, b, c, and d respectively, the first fine grid line is L1, the second fine grid line is L2, and the main grid line is L3. In the existing fine grid line structure, the fine grid lines are parallel to the edges of the grid line workpiece, for example, L1 is parallel to a, that is, L1 is perpendicular to b, and all the fine grid lines are in the same direction, that is, all the fine grid lines are parallel or perpendicular to the edges of the grid line workpiece. In this embodiment, L1 and L2 are not parallel or perpendicular to the edges of the grid line workpiece, that is, the fine grid lines L1 and L2 of different groups intersect, and the connection point of the main grid line L3 and the fine grid lines is located at the intersection of L1 and L2, so that each intersection point of the main grid line and the fine grid line has four fine grid lines in different directions that can be connected to the main grid line, which is conducive to enhancing the combination between the grid lines.
[0043] In one example, an angle between the first thin grid line and / or the second thin grid line and the edge of the grid line workpiece is 30°, 45°, 60°, 75° or 105°.
[0044] Still available for reference Figure 4 As shown, α is the angle between the first thin grid line L1 and the edge b of the grid line workpiece to be manufactured, and the angle α can be 30°, 45°, 60°, 75° or 105°.
[0045] In one example, the gate lines are formed on the inner transparent conductive oxide layer by screen printing or laser transfer.
[0046] The screen printing process is relatively simple, with less equipment investment, and can complete the preparation of grid lines for a large number of solar cells in a short period of time. Moreover, by optimizing the slurry formula and printing parameters, grid lines with excellent conductive properties can be prepared to improve the efficiency of photovoltaic cells. The pattern and size of the grid lines can also be flexibly adjusted according to different solar cell design requirements.
[0047] Laser transfer can achieve high-precision grid line pattern transfer, and the grid line width and spacing can be precisely controlled, which helps to improve the photoelectric conversion efficiency of photovoltaic cells. Compared with contact processes such as screen printing, laser transfer is a non-contact process, which can avoid physical damage and contamination to the surface of solar cells. Laser transfer can also accurately control the amount of grid line material, reduce material waste, and reduce production costs.
[0048] In this embodiment, a thin grid line that is not parallel to or perpendicular to the edge of the grid line workpiece is prepared on the grid line workpiece by screen printing or laser transfer, and the thin grid line and the edge of the grid line workpiece are at a certain angle, such as 30° (150°), 45° (135°), 60° (120°), 75° (105°), etc., instead of the conventional arrangement of 0° (180°) and 90°, and the angle in brackets indicates the angle with other edges. The main grid line still uses an angle of 90° or 0° (180°) with the edge at the intersection of the thin grid line, which is beneficial to the fixation of the thin grid line to the main grid line, enhances the bonding force of the grid line, and improves the efficiency of the solar cell.
[0049] In one example, removing the transparent conductive oxide covering the upper part of the gate line may be removing the transparent conductive oxide covering the upper part of the gate line by laser etching.
[0050] This embodiment can not only use laser to prepare the gate line, but also use laser to remove the transparent conductive oxide. For example, in the process of preparing solar cells, excess transparent conductive oxide will be deposited on the upper part or upper surface of the gate line. Through laser etching, these excess transparent conductive oxides are accurately removed to expose the gate line. In this embodiment, laser etching is used to not only remove the transparent conductive oxide on the surface of the gate line, but also the heating function of the laser can be used to locally heat the interface where the gate line contacts the transparent conductive oxide layer, thereby improving the contact, reducing the series resistance Rs of the battery device, and improving the efficiency of the solar cell.
[0051] In the method for preparing the gate line of this embodiment, the lower part of the prepared gate line is embedded in the internal transparent conductive oxide layer, and the upper part or upper surface of the gate line is exposed to the external transparent conductive oxide layer. The gate line is combined with the transparent conductive oxide layer to increase the bonding force of the gate line, making the gate line more stable in the solar cell, reducing or avoiding the falling off of the gate line, and reducing the adverse effects of broken gates on the solar cell.
[0052] Figure 5 is a schematic diagram of a process for preparing a solar cell according to an embodiment of the present invention, with reference to Figure 5 As shown, the battery preparation method 500 mainly includes: S510, providing a substrate; S520, depositing an intrinsic passivation layer and a doping layer on the surface of the substrate in sequence; S530, preparing a gate line on the doping layer using the gate line preparation method described in the above embodiment; S540, high-temperature curing the battery cell after the gate line is prepared, and the curing temperature is less than 230°C.
[0053] In the present embodiment, when preparing the gate line, a thin transparent conductive oxide layer (TCO layer), i.e., an inner transparent conductive oxide layer, is first deposited, and then the gate line is prepared, and then another transparent conductive oxide layer, i.e., an outer transparent conductive oxide layer, is deposited to cover the gate line, so that the transparent conductive oxide is more closely connected to the gate line. The lower part of the prepared gate line is embedded in the inner transparent conductive oxide layer, and the upper part or upper surface of the gate line is exposed to the outer transparent conductive oxide layer. The gate line is combined with the two transparent conductive oxide layers, so that the bonding force of the gate line is increased, making the gate line more stable in the solar cell, reducing or preventing the gate line from falling off, and reducing the adverse effects of broken gates on the solar cell.
[0054] Exemplarily, a substrate is provided, and first, a double-sided intrinsic passivation layer is deposited by PECVD or HWCVD, including an N-side intrinsic passivation layer and a P-side intrinsic passivation layer, and then an N-side doping layer is deposited. After completion, the P-side doping layer is deposited on the surface, and then a transparent conductive oxide layer is deposited on the surface of the N-side doping layer and the p-side doping layer by RPD or PVD, that is, an N-side transparent conductive oxide layer and a P-side transparent conductive oxide layer. The solar cell with a double-sided transparent conductive oxide layer thin film is firstly completed by screen printing or laser transfer through a corresponding screen to form a first fine grid line (reference Figure 2 As shown in Figure 2, if the angle is 45°, after the first fine grid line is prepared, the screen is replaced by screen printing or laser transfer to complete the preparation of the second fine grid line that presents another angle with the edge of the grid line to be manufactured (reference Figure 3 Then prepare the main grid line, and use silver-coated copper paste to prepare the main grid line by screen printing or laser transfer (refer to Figure 4 All the gate lines on the front and back sides have been prepared. Prepare the second transparent conductive oxide layer. At this time, it is necessary to continue to use PVD or RPD to deposit a layer of transparent conductive oxide layer on the entire gate line and on the aforementioned thin transparent conductive oxide layer. After this step is completed, since the surface of the gate line is covered with a thin film of transparent conductive oxide layer, the transparent conductive oxide on the surface of the gate line can be etched away by adjusting the processing power and speed of the laser. Since the laser will inevitably produce a thermal effect during the etching process, but the area is limited to the position of the gate line, this is conducive to heating the gate line and improving the contact between the gate line and the transparent conductive oxide layer. At this time, a part of the prepared gate line is completely connected to the transparent conductive oxide layer. Finally, the battery cell is cured at high temperature (not higher than 230°C).
[0055] Through the above-mentioned grid line preparation method, the overlap between the fine grid lines (the first fine grid line and the second fine grid line), the overlap between the fine grid lines and the main grid line, each intersection point between the main grid line and the fine grid line has four fine grid lines in different directions that can be connected to the main grid line, which is conducive to strengthening the combination between the grid lines and can enhance the fixing effect of the main grid line. In addition, this structure can also greatly reduce the series resistance Rs of the battery device and further improve the efficiency of the solar cell.
[0056] Another embodiment of the present invention provides a solar cell, referring to Figure 6 As shown, it mainly includes: a substrate 110, on which an intrinsic passivation layer 210, a doping layer 310, an internal transparent conductive oxide layer 410 and an external transparent conductive oxide layer 510 are sequentially provided; it also includes a gate line 610, the gate line 610 includes a fine gate line and a main gate line, the lower part of the gate line 610 is embedded in the internal transparent conductive oxide layer 410, and the upper part or upper surface of the gate line 610 exposes the external transparent conductive oxide layer 510.
[0057] In one example, reference Figure 4 As shown, the fine gate lines include a first fine gate line and a second fine gate line, wherein the first fine gate lines are parallel to each other, the second fine gate lines are parallel to each other, and the first fine gate lines and the second fine gate lines intersect, and the angle between the first fine gate line and the second fine gate line is not restricted, and the angle is determined by the angle between the first fine gate line and the second fine gate line and the edge; the connection point between the main gate line and the fine gate line is located at the intersection of the first fine gate line and the second fine gate line.
[0058] In one example, the first thin grid lines and the second thin grid lines are not parallel to or perpendicular to the edge of the solar cell, and the main grid lines are parallel to or perpendicular to the edge of the solar cell.
[0059] In one example, the angle between the first thin grid line and / or the second thin grid line and the edge of the solar cell is 30°, 45°, 60°, 75° or 105°.
[0060] In one example, the thickness of the inner transparent conductive oxide layer 410 is 20 nm to 50 nm.
[0061] In one example, the material of the fine grid line is silver paste, and the material of the main grid line is silver-coated copper paste. The fine grid uses low-temperature silver paste with stronger conductivity, which is conducive to collecting photogenerated carriers and reducing losses. The main grid line uses silver-coated copper paste, which is conducive to reducing costs.
[0062] For other details of the structure of each layer in the solar cell of this embodiment, reference may be made to the aforementioned embodiments and will not be elaborated here.
[0063] In the solar cell of this embodiment, the lower part of the grid line 610 is embedded in the internal transparent conductive oxide layer 410, and the upper part or upper surface of the grid line 610 is exposed to the external transparent conductive oxide layer 510. The grid line 610 is combined with the transparent conductive oxide layer to increase the bonding force of the grid line 610, making the grid line 610 more stable in the solar cell, reducing or preventing the grid line 610 from falling off, and reducing the adverse effects of broken grid on the solar cell.
[0064] The basic concepts have been described above. Obviously, for those skilled in the art, the above invention disclosure is only used as an example and does not constitute a limitation of the present application. Although not explicitly stated herein, those skilled in the art may make various modifications, improvements and amendments to the present application. Such modifications, improvements and amendments are suggested in the present application, so such modifications, improvements and amendments still belong to the spirit and scope of the exemplary embodiments of the present application.
[0065] Similarly, it should be noted that in order to simplify the description of the disclosure of this application and thus help understand one or more embodiments of the invention, in the above description of the embodiments of this application, multiple features are sometimes combined into one embodiment, figure or description thereof. However, this disclosure method does not mean that the features required by the object of this application are more than the features mentioned in the claims. In fact, the features of the embodiments are less than all the features of the single embodiment disclosed above.
[0066] Although the present application has been described with reference to the current specific embodiments, ordinary technicians in this technical field should recognize that the above embodiments are only used to illustrate the present application, and various equivalent changes or substitutions may be made without departing from the spirit of the present application. Therefore, as long as the changes and modifications to the above embodiments are within the essential spirit of the present application, they will fall within the scope of the claims of the present application.
Claims
1. A method for preparing a gate line, characterized in that: include: Preparing an internal transparent conductive oxide layer on a grid line workpiece, wherein the grid line workpiece is a semi-finished solar cell product without grid lines prepared thereon; Preparing grid lines on the inner transparent conductive oxide layer, wherein the grid lines include fine grid lines and main grid lines, and the lower part of the grid lines is embedded in the inner transparent conductive oxide layer; preparing an outer transparent conductive oxide layer, wherein the outer transparent conductive oxide layer covers the inner transparent conductive oxide layer and the area where the gate line is located; The transparent conductive oxide covering the upper portion of the gate line is removed.
2. The method for preparing a gate line according to claim 1, wherein: Preparing a gate line on the inner transparent conductive oxide layer comprises: Prepare the first fine gate line, the second fine gate line and the main gate line in sequence, wherein the first fine gate lines are parallel to each other, the second fine gate lines are parallel to each other, and the first fine gate lines and the second fine gate lines intersect; the connection point between the main gate line and the fine gate line is located at the intersection of the first fine gate line and the second fine gate line.
3. The method for preparing a gate line according to claim 2, wherein: The first thin gate lines and the second thin gate lines are not parallel to or perpendicular to the edge of the gate line workpiece, and the main gate lines are parallel to or perpendicular to the edge of the gate line workpiece.
4. The method for preparing a gate line according to claim 3, characterized in that: An angle between the first fine grid line and / or the second fine grid line and the edge of the grid line workpiece is 30°, 45°, 60°, 75° or 105°.
5. The gate line preparation method according to claim 1, characterized in that: The step of preparing the gate line on the inner transparent conductive oxide layer comprises: preparing the gate line on the inner transparent conductive oxide layer by screen printing or laser transfer.
6. The method for preparing a gate line according to claim 1, characterized in that: Removing the transparent conductive oxide covering the upper part of the gate line includes: removing the transparent conductive oxide covering the upper part of the gate line by laser etching.
7. A method for preparing a solar cell, characterized in that: include: providing a substrate; Depositing an intrinsic passivation layer and a doping layer in sequence on the surface of the substrate; Prepare a gate line on the doped layer using the gate line preparation method according to any one of claims 1 to 6; The cell sheet after preparing the gate line is subjected to high temperature curing, and the curing temperature is less than 230°C.
8. A solar cell, characterized in that: include: a substrate having an intrinsic passivation layer, a doping layer, an inner transparent conductive oxide layer and an outer transparent conductive oxide layer in sequence thereon; The gate lines include fine gate lines and main gate lines, the lower part of the gate lines is embedded in the inner transparent conductive oxide layer, and the upper part or upper surface of the gate lines exposes the outer transparent conductive oxide layer.
9. The solar cell according to claim 8, characterized in that The fine gate lines include first fine gate lines and second fine gate lines, wherein the first fine gate lines are parallel to each other, the second fine gate lines are parallel to each other, and the first fine gate lines and the second fine gate lines intersect each other; the connection point between the main gate line and the fine gate line is located at the intersection of the first fine gate line and the second fine gate line.
10. The solar cell according to claim 9, characterized in that The first thin grid lines and the second thin grid lines are not parallel to or perpendicular to the edge of the solar cell, and the main grid lines are parallel to or perpendicular to the edge of the solar cell.
11. The solar cell according to claim 10, wherein: An angle between the first fine grid line and / or the second fine grid line and the edge of the solar cell is 30°, 45°, 60°, 75° or 105°.
12. The solar cell according to claim 8, wherein: The thickness of the inner transparent conductive oxide layer is 20 nm to 50 nm.
13. The solar cell according to claim 8, wherein: The material of the fine grid lines is silver paste, and the material of the main grid lines is silver-coated copper paste.