A method for optimizing the uniformity of critical dimensions of a photolithography machine

Abstract

The present invention provides a method for optimizing the critical dimension uniformity of a photolithography machine, comprising the following steps: confirming the minimum design specification of a photolithography process, and generating a line width measurement pattern according to the minimum design specification; providing a photomask, wherein the photomask comprises a chip region, and a plurality of line width measurement patterns arranged at intervals are distributed in the chip region; transferring all the line width measurement patterns in the photomask to a wafer through a photolithography process to form an exposure unit, and measuring the line width data of all the line width measurement patterns in each of the exposure units, and correcting the critical dimension uniformity in each of the exposure units according to the line width data, so as to improve the critical dimension uniformity in each of the exposure units in the wafer, and at the same time saving the cutting road area space, which is conducive to reducing the space occupied by the cutting road.

Description

Technical Field

[0001] The invention relates to the technical field of semiconductor manufacturing, and in particular to a method for optimizing the critical dimension uniformity of a photolithography machine. Background Art

[0002] Critical dimension uniformity (CDU) is a measure of line width variation that clearly defines the quality of the reticle. The CDU of each exposure unit (shot) within a wafer reflects the line width (CD) uniformity from die to die and the CD uniformity between geometries within a die.

[0003] like Figure 1 As shown, currently, when improving the critical dimension uniformity in each exposure unit 1 in a wafer, some manufacturers' lithography machines (such as Nikon's lithography machines) need to evenly distribute line width measurement patterns 3 of the same shape on the cutting road 2 to feedback the line width at different positions, and as the number of line width measurement patterns 3 increases, the critical dimension uniformity in the exposure unit 1 is improved more obviously. However, due to the limited space of the cutting road 2, a large number of line width measurement patterns 3 cannot be placed to collect line width data, resulting in the critical dimension uniformity monitoring and improvement in each exposure unit 1 in the wafer being limited. Summary of the invention

[0004] The object of the present invention is to provide a method for optimizing the critical dimension uniformity of a photolithography machine, which can improve the critical dimension uniformity in each exposure unit in a wafer.

[0005] In order to solve the above problems, the present invention provides a method for optimizing the uniformity of critical dimensions of a lithography machine, comprising the following steps:

[0006] Confirming the minimum design specification of the photolithography process, and generating a line width measurement pattern according to the minimum design specification;

[0007] Providing a photomask, the photomask comprising a chip region, wherein a plurality of line width measurement patterns arranged at intervals are distributed in the chip region;

[0008] All the line width measurement patterns in the mask are transferred to the wafer through a photolithography process to form exposure units, and the line width data of all the line width measurement patterns in each of the exposure units are measured, and the critical dimension uniformity in each of the exposure units is corrected according to the line width data.

[0009] Optionally, the method for generating a line width measurement graphic is as follows:

[0010] Confirm the minimum design specifications of the photolithography process according to the design specifications of the photolithography process;

[0011] The line width measurement pattern is automatically generated according to the minimum design specification.

[0012] Furthermore, the line width measurement pattern includes a plurality of test sub-patterns arranged in sequence and at equal intervals along the line width direction, and the minimum design specification of the photolithography process includes the minimum design specification of the line width and the minimum design specification of the spacing between the center lines of adjacent test sub-patterns.

[0013] Furthermore, the line width of each test sub-pattern is the same and fixed to the minimum design specification value of the line width; the spacing between the line width center line of each test sub-pattern and the line width center line of the adjacent test sub-pattern is the same and fixed to the minimum design specification value of the spacing.

[0014] Further, each of the test sub-graphs is in the shape of a rectangle, and all the test sub-graphs have the same length; or,

[0015] Each of the test sub-graphics is in the shape of a rectangle, and all the test sub-graphics include a first test sub-graphic of a first length and a second test sub-graphic of a second length, the number of the first test sub-graphics is one, the number of the second test sub-graphics is an even number, and in the line width direction, half of the second test sub-graphics are arranged on one side of the first test sub-graphic, and the other half of the second test sub-graphics are symmetrically arranged on the other side of the first test sub-graphic, wherein the first length is greater than the second length.

[0016] Optionally, it further includes a peripheral pattern, and the line width measurement patterns are arranged at intervals inside the peripheral pattern.

[0017] Furthermore, the photomask has a cutting line pattern, a device pattern and a dummy pattern, the cutting line pattern and a part of the dummy pattern are located in the cutting line area, and the device pattern and the remaining part of the dummy pattern are located in the chip area.

[0018] Furthermore, the photomask has a cutting line pattern, a device pattern and a dummy pattern, the cutting line pattern is located in the cutting line area, and the device pattern and all the dummy patterns are located in the chip area.

[0019] Furthermore, in each of the chip regions, all of the line width measurement patterns are dispersedly arranged around the device pattern.

[0020] Furthermore, the method of obtaining line width data and correcting the uniformity of the critical dimension in each exposure unit according to the line width data is specifically as follows:

[0021] Transferring all the line width measurement patterns, device patterns and cutting road patterns in the mask to the wafer through a photolithography process to form an exposure unit;

[0022] After the photolithography process, the line width data of all the line width measurement patterns in each of the exposure units are measured, wherein the line width data of each of the line width measurement patterns is an average value of the line width data of at least two of the test sub-patterns, and the line width data is fed back to the processing system;

[0023] The processing system corrects the critical dimension uniformity in each of the exposure units according to the line width data.

[0024] Compared with the prior art, the present invention has the following unexpected technical effects:

[0025] The present invention provides a method for optimizing the uniformity of the critical dimension of a photolithography machine, comprising the following steps: confirming the minimum design specification of a photolithography process, and generating a line width measurement pattern according to the minimum design specification; providing a photomask, wherein the photomask comprises a chip region, and a plurality of line width measurement patterns arranged at intervals are distributed in the chip region; transferring all the line width measurement patterns in the photomask to a wafer through a photolithography process to form an exposure unit, and measuring the line width data of all the line width measurement patterns in each of the exposure units, and correcting the uniformity of the critical dimension in each of the exposure units according to the line width data, thereby achieving the unexpected technical effect of improving the uniformity of the critical dimension in each exposure unit in the wafer, while saving the space in the cutting road region, which is beneficial to reducing the space occupied by the cutting road. BRIEF DESCRIPTION OF THE DRAWINGS

[0026] Figure 1 A schematic diagram of the structure of an exposure unit.

[0027] Figure 2 A schematic flow chart of a method for optimizing critical dimension uniformity of a lithography machine provided in one embodiment of the present invention.

[0028] Figure 3 A schematic structural diagram of a line width measurement pattern on a photomask provided by an embodiment of the present invention.

[0029] Description of reference numerals:

[0030] 1-exposure unit; 2-cutting road; 3, 10-line width measurement pattern; 11-first test sub-pattern; 12-second test sub-pattern; 20-peripheral pattern; 21-peripheral sub-pattern. DETAILED DESCRIPTION

[0031] A method for optimizing the uniformity of critical dimensions of a photolithography machine of the present invention will be described in further detail below. The present invention will be described in more detail below with reference to the accompanying drawings, in which preferred embodiments of the present invention are shown. It should be understood that those skilled in the art can modify the present invention described herein and still achieve the beneficial effects of the present invention. Therefore, the following description should be understood as being widely known to those skilled in the art and not as a limitation of the present invention.

[0032] For the sake of clarity, not all features of the actual embodiments are described. In the following description, well-known functions and structures are not described in detail because they would clutter the invention with unnecessary detail. It should be recognized that in the development of any actual embodiment, a large number of implementation details must be made to achieve the developer's specific goals, such as changing from one embodiment to another according to the limitations of the relevant system or the relevant business. In addition, it should be recognized that such development work may be complex and time-consuming, but it is just a routine task for those skilled in the art.

[0033] In order to make the purpose and features of the present invention more obvious and easy to understand, the specific implementation methods of the present invention are further described below in conjunction with the accompanying drawings. It should be noted that the accompanying drawings are all in a very simplified form and use inaccurate ratios, which are only used to conveniently and clearly assist in explaining the purpose of the embodiments of the present invention.

[0034] Figure 2 A schematic diagram of a process for optimizing the uniformity of critical dimensions of a lithography machine provided in this embodiment. Figure 2 As shown, this embodiment provides a method for optimizing the uniformity of critical dimensions of a lithography machine, comprising the following steps:

[0035] Step S1: confirming the minimum design specification of the photolithography process, and generating a line width measurement pattern according to the minimum design specification;

[0036] Step S2: providing a photomask, wherein the photomask includes a chip region, and a plurality of line width measurement patterns arranged at intervals are distributed in the chip region;

[0037] Step S3: transferring all the line width measurement patterns in the mask to the wafer through a photolithography process to form exposure units, measuring the line width data of all the line width measurement patterns in each of the exposure units, and correcting the critical dimension uniformity in each of the exposure units according to the line width data.

[0038] The following will be combined Figure 3 A method for optimizing the uniformity of critical dimensions of a lithography machine provided in this embodiment is described in detail.

[0039] First, step S1 is performed to confirm the minimum design specification of the photolithography process, and generate the line width measurement pattern 10 according to the minimum design specification. In detail, the minimum design specification of the photolithography process is first confirmed according to the design rule of the photolithography process, such as the minimum design specification of the line width (CD) and the minimum design specification of the spacing (pitch) between the center lines of adjacent test sub-patterns; and then the line width measurement pattern 10 is automatically generated according to the minimum design specification.

[0040] The minimum design specifications of the photolithography process may be different for photolithography machines of different manufacturers (eg, Nikon photolithography machines). Therefore, line width measurement patterns 10 of different sizes may be designed specifically according to different photolithography machines.

[0041] like Figure 3 As shown, the line width measurement pattern 10 includes a plurality of test sub-patterns arranged in sequence and at equal intervals along the line width direction, each of the test sub-patterns is in the shape of a rectangle, and each of the test sub-patterns is in the line width direction in the direction of the rectangle width, and the line width of each of the test sub-patterns is the same and fixed to the minimum design specification value of the line width; the spacing (pitch) between the line width center line of each of the test sub-patterns and the line width center line of the adjacent test sub-patterns is the same and fixed to the minimum design specification value of the pitch, which is convenient for CD SEM measurement. The length of each of the test sub-patterns can be the same; it can also be partially the same and the remaining part different; it can also be that the lengths of all the test sub-patterns are different, and the specific design can be based on actual needs.

[0042] In one embodiment, all the test sub-patterns have the same length and line width. Figure 3 As shown, in another embodiment, all the test sub-patterns include test sub-patterns of two lengths, namely, a first test sub-pattern 11 of a first length, and a second test sub-pattern 12 of a second length, wherein the first length is greater than the second length, the number of the first test sub-pattern 11 is one, the number of the second test sub-patterns 12 is an even number, and half of the second test sub-patterns 12 are located on one side of the first test sub-pattern 11, and the other half of the second test sub-patterns 12 are located on the other side of the first test sub-pattern 11, so that the line width measurement pattern 10 is a symmetrical pattern centered on the first test sub-pattern 11.

[0043] Optionally, a peripheral pattern 20 is arranged outside the line width measurement pattern 10, and the peripheral pattern 20 is a rectangular ring as a whole. The line width measurement pattern 10 is arranged at intervals inside the peripheral pattern 20 so that the line width measurement pattern 10 can be distinguished from other patterns.

[0044] The peripheral pattern 20 is formed by arranging a plurality of peripheral sub-patterns 21 smaller than the minimum design specification along the four sides of a rectangle. In this embodiment, the plurality of peripheral sub-patterns 21 are arranged along the line width direction to form two parallel and aligned rows, and the spacing between the two rows is greater than the length of all the test sub-patterns, and the two ends of the two rows of peripheral sub-patterns 21 are connected to two columns of spaced peripheral sub-patterns 21 to form a closed rectangular ring. Since the size of the peripheral sub-pattern 21 is smaller than the minimum design specification, the peripheral pattern 20 will not be transferred to the wafer during the photolithography process. The peripheral sub-pattern 21 is a rectangle.

[0045] Then, step S2 is performed to provide a photomask, wherein the photomask includes a chip region, wherein a plurality of line width measurement patterns 10 are distributed at intervals, and wherein the photomask also includes a scribe line region, wherein the scribe line region is surrounded outside the chip region.

[0046] In this step, the mask has a cutting road pattern, a device pattern and a virtual pattern. In one embodiment, the cutting road pattern and part of the virtual pattern are located in the cutting road area, and the device pattern and the remaining part of the virtual pattern are located in the chip area, which saves the cutting road area space and is beneficial to reducing the space occupied by the cutting road. At the same time, since part of the line width measurement pattern 10 is set in the chip area, this part of the line width measurement pattern 1 is closer to the actual working area of ​​the device when it is subsequently transferred to the wafer. Therefore, the subsequent measured line width data is more accurate than the line width data of the cutting road area, and is beneficial to the subsequent precise monitoring of the line width in the exposure unit and the CDU correction of the lithography machine.

[0047] In another embodiment, the cutting road graphic is located in the cutting road area, the device graphic and all the virtual graphics are located in the chip area, so that the line width measurement graphic 10 is not set in the cutting road area, thereby saving the cutting road area space, which is more conducive to reducing the space occupied by the cutting road. At the same time, since the line width measurement graphic 10 is set in the chip area, the line width measurement graphic 10 subsequently transferred to the wafer is closer to the actual working area of ​​the device. Therefore, the subsequently measured line width data is more accurate than the line width data of the cutting road area, and it is also beneficial to the precise monitoring of the line width in the subsequent exposure unit and the CDU correction of the lithography machine.

[0048] The virtual pattern is used to fill at least a portion of the blank area of ​​the chip area outside the device pattern.

[0049] The virtual pattern includes the line width measurement pattern 10, and the line width measurement pattern 10 can be dispersed in multiple blank areas, that is, in each chip area, all the line width measurement patterns 10 are dispersed around the device pattern, so that at least one line width measurement pattern 10 will be set in each chip area, and because the line width measurement pattern 10 is a virtual pattern, the number of test sub-patterns in each line width measurement pattern 10 (that is, the size of the line width measurement pattern 10) can be designed according to the space and requirements of the blank area at the actual location, that is, when the space of the blank area at the location of the test sub-pattern is large, the test sub-pattern can be set more, and the length of the test sub-pattern can also be correspondingly longer; when the space of the blank area at the location of the test sub-pattern is small, the test sub-pattern can be set less, and the length of the test sub-pattern can also be correspondingly shorter.

[0050] Then, step S3 is performed to transfer all the line width measurement patterns 10 in the mask to the wafer through a photolithography process to form exposure units, and measure the line width data of all the line width measurement patterns 10 in each of the exposure units, and correct the critical dimension uniformity in each of the exposure units according to the line width data.

[0051] In detail, first, all the line width measurement patterns 10, device patterns and cutting road patterns in the mask are transferred to the wafer through a photolithography process to form an exposure unit. At this time, since the size of the peripheral pattern 20 is smaller than the minimum design specification, the peripheral pattern 20 is not transferred to the wafer.

[0052] Next, after the photolithography process, the line width data of each line width measurement pattern 10 located in the chip area in each exposure unit is measured, and the line width data of each line width measurement pattern 10 can be the average of the line width data of at least two test sub-patterns, and the line width data is fed back to the processing system. Each line width measurement pattern 10 realizes line width monitoring at its position in the chip area, and all the line width measurement patterns 10 realize line width monitoring at different positions in the chip area.

[0053] Next, the processing system generates a CDU program for correcting the lithography machine in each exposure unit according to the line width data. When the wafer is a FEM wafer, the processing system can determine whether the optimal focus of the exposure unit at different positions is offset according to the measured line width data, and perform focus correction on the optimal focus at different positions of the exposure unit, thereby achieving the purpose of CDU correction in the exposure unit.

[0054] In summary, the present invention provides a method for optimizing the uniformity of critical dimensions of a lithography machine, comprising the following steps: confirming the minimum design specification of the lithography process, and generating a line width measurement pattern according to the minimum design specification; providing a photomask, the photomask comprising a chip area, and a plurality of line width measurement patterns arranged at intervals are distributed in the chip area; transferring all the line width measurement patterns in the photomask to a wafer through a lithography process to form an exposure unit, and measuring the line width data of all the line width measurement patterns in each of the exposure units, and correcting the uniformity of critical dimensions in each of the exposure units according to the line width data, thereby achieving the unexpected technical effect of improving the uniformity of critical dimensions in each exposure unit in the wafer, while saving the space in the cutting road area, which is beneficial to reducing the space occupied by the cutting road.

[0055] In addition, it should be noted that, unless otherwise specified or indicated, the terms "first" and "second" in the specification are only used to distinguish the various components, elements, steps, etc. in the specification, and are not used to indicate the logical relationship or sequential relationship between the various components, elements, steps, etc.

[0056] It is to be understood that, although the present invention has been disclosed as a preferred embodiment, the above embodiment is not intended to limit the present invention. For any person skilled in the art, without departing from the scope of the technical solution of the present invention, the technical content disclosed above can be used to make many possible changes and modifications to the technical solution of the present invention, or modified into equivalent embodiments of equivalent changes. Therefore, any simple modification, equivalent change and modification made to the above embodiments according to the technical essence of the present invention without departing from the content of the technical solution of the present invention still falls within the scope of protection of the technical solution of the present invention.

Claims

1. A method for optimizing the uniformity of critical dimensions of a lithography machine, characterized in that: The following steps are involved: Confirming the minimum design specification of the photolithography process, and generating a line width measurement pattern according to the minimum design specification; A photomask is provided, wherein the photomask comprises a chip region and a scribe line region, wherein the scribe line region is arranged outside the chip region, wherein a plurality of line width measurement patterns arranged at intervals are distributed in the chip region, wherein the photomask comprises a device pattern and a dummy pattern, wherein the dummy pattern is used to fill at least a portion of a blank area of ​​the chip region outside the device pattern, wherein the dummy pattern comprises the line width measurement pattern, and the line width measurement pattern is dispersedly arranged in a plurality of blank areas, so that in each of the chip regions, all the line width measurement patterns are dispersedly arranged around the device pattern; All the line width measurement patterns in the mask are transferred to the wafer through a photolithography process to form exposure units, and the line width data of all the line width measurement patterns in each of the exposure units are measured, and the critical dimension uniformity in each of the exposure units is corrected according to the line width data.

2. The method for optimizing the uniformity of critical dimensions of a lithography machine according to claim 1, characterized in that: The specific method for generating line width measurement graphics is as follows: Confirm the minimum design specifications of the photolithography process according to the design specifications of the photolithography process; The line width measurement pattern is automatically generated according to the minimum design specification.

3. The method for optimizing the uniformity of critical dimensions of a lithography machine according to claim 2, characterized in that: The line width measurement pattern includes a plurality of test sub-patterns arranged in sequence and at equal intervals along the line width direction, and the minimum design specification of the photolithography process includes the minimum design specification of the line width and the minimum design specification of the spacing between the center lines of adjacent test sub-patterns.

4. The method for optimizing the uniformity of critical dimensions of a lithography machine according to claim 3, characterized in that: The line width of each test sub-pattern is the same and fixed to the minimum design specification value of the line width; the spacing between the line width center line of each test sub-pattern and the line width center line of the adjacent test sub-pattern is the same and fixed to the minimum design specification value of the spacing.

5. The method for optimizing the uniformity of critical dimensions of a lithography machine according to claim 3, characterized in that: The shape of each of the test sub-graphs is a rectangle, and the lengths of all the test sub-graphs are the same; or, Each of the test sub-graphics is in the shape of a rectangle, and all the test sub-graphics include a first test sub-graphic of a first length and a second test sub-graphic of a second length, the number of the first test sub-graphics is one, the number of the second test sub-graphics is an even number, and in the line width direction, half of the second test sub-graphics are arranged on one side of the first test sub-graphic, and the other half of the second test sub-graphics are symmetrically arranged on the other side of the first test sub-graphic, wherein the first length is greater than the second length.

6. The method for optimizing the uniformity of critical dimensions of a lithography machine according to claim 1, characterized in that: It also includes a peripheral pattern, and the line width measurement patterns are arranged at intervals inside the peripheral pattern.

7. The method for optimizing the uniformity of critical dimensions of a lithography machine according to claim 3, characterized in that: The photomask also includes a cutting road area, which is surrounded by the chip area; the photomask also has a cutting road pattern, the cutting road pattern and part of the virtual pattern are located in the cutting road area, and the device pattern and the remaining part of the virtual pattern are located in the chip area.

8. The method for optimizing the uniformity of critical dimensions of a lithography machine according to claim 3, characterized in that: The photomask further comprises a cutting road area, which is surrounded by the chip area; the photomask further comprises a cutting road pattern, which is located in the cutting road area, and the device pattern and all the dummy patterns are located in the chip area.

9. The method for optimizing the uniformity of critical dimensions of a lithography machine according to claim 7 or 8, characterized in that: The method of obtaining line width data and correcting the uniformity of critical dimensions in each exposure unit according to the line width data is specifically as follows: Transferring all the line width measurement patterns, device patterns and cutting road patterns in the mask to the wafer through a photolithography process to form an exposure unit; After the photolithography process, the line width data of all the line width measurement patterns in each of the exposure units are measured, wherein the line width data of each of the line width measurement patterns is an average value of the line width data of at least two of the test sub-patterns, and the line width data is fed back to the processing system; The processing system corrects the critical dimension uniformity in each of the exposure units according to the line width data.

Images