Method for detecting metal pollution of silicon wafer

Abstract

The invention provides a silicon wafer metal pollution detection method, and particularly relates to the technical field of semiconductors, and the method comprises the steps: carrying out the heating treatment of a silicon wafer, enabling the surface layer of the heated silicon wafer to comprise a first structural defect formed by the heating silicification of a pollution source metal located on the surface layer, the pollution source metal positioned on the surface layer comprises front metal of the silicon wafer, and at least one of body metal and back metal which are heated and diffused to the surface layer of the silicon wafer; performing etching treatment on the heated silicon wafer, wherein the etching speed difference of the etching treatment on the first structural defect and the second structural defect of the silicon wafer meets a preset difference condition; a first structural defect is detected based on a structural defect difference between the heated silicon wafer and the etched silicon wafer. According to the technical scheme, effective detection and positioning of surface metal, body metal and back metal can be achieved at the same time, silicon wafer detection pollution is avoided, and the method is suitable for bare wafers and patterned silicon wafers.

Description

Technical Field

[0001] The present application relates to the field of semiconductor technology, and in particular to a method for detecting metal contamination of a silicon wafer. Background Art

[0002] Metal contamination in integrated circuits can significantly affect the yield and reliability of devices. For example, sodium and potassium can introduce mobile charges into the oxide layer. Alkaline earth metals such as calcium and strontium can reduce GOI (Gate Oxide Integrity), thereby affecting the performance of devices such as CMOS (Complementary Metal Oxide Semiconductor). Transition metals such as Ni can dissolve in the silicon lattice and form metal silicides, which can lead to PN junction leakage.

[0003] At present, metal contamination detection for silicon wafers is mainly divided into two aspects, surface metal detection and bulk metal detection. Among them, ICP-MS (Inductively coupled plasma mass spectrometry) and TXRF (Total Reflection X-ray Fluorescence) are usually used for surface metal detection, and VPD-ICPMS (Vapor Phase Decomposition Inductively Coupled Plasma Mass Spectrometry) and SPV (Surface Pbotovoltage Method) are usually used for bulk metal detection. However, ICP-MS and TXRF methods are only suitable for front metal monitoring and cannot be applied to back metal detection. In particular, ICP-MS also has the risk of machine contamination. VPD-ICPMS can only detect bulk metal near the surface, and the instrument is more sensitive. When the metal contamination level is high, it is easy to cause machine contamination. SPV can only detect bare wafers and cannot be applied to patterned wafers. At the same time, it can only detect bulk metal content and cannot directly measure metal contamination on the front or back of the silicon wafer. Summary of the invention

[0004] The present application provides a method for detecting metal contamination of a silicon wafer, which specifically includes the following contents.

[0005] In one aspect, the present application provides a method for detecting metal contamination of a silicon wafer, the method comprising:

[0006] The silicon wafer is subjected to a heating treatment so that the surface layer of the heated silicon wafer includes a first structural defect formed by heating and silicide of a pollution source metal located on the surface layer, wherein the pollution source metal located on the surface layer includes a front metal of the silicon wafer, and at least one of a bulk metal and a back metal diffused to the surface layer of the silicon wafer by heating;

[0007] Performing an etching process on the heated silicon wafer, wherein a difference in etching rate between the first structural defect and the second structural defect of the silicon wafer satisfies a preset difference condition;

[0008] The first structural defect is detected based on the difference in structural defects between the heated silicon wafer and the etched silicon wafer.

[0009] In a possible implementation manner, the etching rate of the etching process for the first structural defect is lower than the etching rate of the second structural defect; and the detecting the first structural defect based on the difference in structural defects between the heated silicon wafer and the etched silicon wafer includes:

[0010] Acquire a first recognition result obtained by performing structural defect recognition on the heated silicon wafer, wherein the first recognition result is used to indicate at least one structural defect on a surface layer of the heated silicon wafer;

[0011] Acquire a second identification result obtained by performing defect identification on the etched silicon wafer, wherein the second identification result is used to indicate at least one residual defect on the surface layer of the etched silicon wafer;

[0012] Based on a comparison result between the at least one structural defect indicated by the first recognition result and the at least one residual defect indicated by the second recognition result, the first structural defect is detected from the at least one structural defect.

[0013] In a possible implementation manner, the obtaining of a first recognition result obtained by performing structural defect recognition on the heated silicon wafer includes:

[0014] Performing defect recognition on the heated silicon wafer to obtain an initial recognition result, wherein the initial recognition result is used to indicate position information of surface defects of the heated silicon wafer;

[0015] Imaging the surface defect based on the position information of the surface defect to obtain a first defect image;

[0016] The crystal orientation of the surface defect is identified based on the first defect image, the identified surface defect with the crystal orientation is determined as the structural defect, and the first identification result is generated.

[0017] In a possible implementation manner, the detecting the first structural defect from the at least one structural defect based on a comparison result between the at least one structural defect indicated by the first recognition result and the at least one residual defect indicated by the second recognition result comprises:

[0018] For any structural defect among the at least one structural defect, if the comparison result indicates that there is a residual defect matching the structural defect in the at least one residual defect, the structural defect is determined to be the first structural defect.

[0019] In a possible implementation manner, the method further includes: for any structural defect among the at least one structural defect, if the comparison result indicates that there is no residual defect in the at least one residual defect that matches the structural defect, determining that the structural defect is the second structural defect.

[0020] In a possible implementation manner, the existence of a residual defect matching the structural defect includes: the existence of a residual defect matching the position of the structural defect in the at least one residual defect.

[0021] In a possible implementation manner, the existence of a residual defect matching the structural defect includes: among the at least one residual defect, there is a residual defect matching the position of the structural defect and the residual degree of which satisfies a preset residual condition.

[0022] In a possible implementation manner, the existence of a residual defect matching the structural defect includes: the existence of a residual defect matching the structural defect in position and having a crystal orientation in the at least one residual defect.

[0023] In a possible implementation manner, after detecting the first structural defect based on the difference in structural defects between the heated silicon wafer and the etched silicon wafer, the method further includes:

[0024] The contamination source metal distribution information of the silicon wafer is generated based on the detected position information of the first structural defect.

[0025] In a possible implementation manner, the heating treatment includes a first heat treatment and a second heat treatment;

[0026] The first heat treatment is used to diffuse the bulk metal and the back metal in the silicon wafer to the surface layer of the silicon wafer, and the second heat treatment is used to silicide the contamination source metal located on the surface layer to form the first structural defect.

[0027] In a possible implementation manner, the first heat treatment process includes:

[0028] The silicon wafer is heated in an oxygen-free environment to a preset diffusion temperature, wherein the preset diffusion temperature is achieved by single-step temperature increase or gradient temperature increase.

[0029] In a possible implementation manner, the preset diffusion temperature is 900°C-1050°C.

[0030] In a possible implementation, the first heat treatment to reach the preset diffusion temperature by gradient heating includes: heating to a first preset temperature and keeping it warm for a first preset time, heating to the preset diffusion temperature and keeping it warm for a second preset time; the first preset temperature is 700-750°C, the first preset time is 20-40min, and the second preset time is 5-15min.

[0031] In a possible implementation manner, the second heat treatment process includes: performing at least one thermal annealing treatment on the silicon wafer after the first heat treatment to obtain the heated silicon wafer.

[0032] In a possible implementation manner, the at least one thermal annealing treatment includes a first thermal annealing treatment and a second thermal annealing treatment;

[0033] The first thermal annealing treatment is used to silicide the pollution source metal to form a metal silicide and densify it, and the second thermal annealing treatment is used to ripen the crystal structure of the metal silicide that has undergone the first thermal annealing treatment.

[0034] In a possible implementation manner, the at least one thermal annealing treatment includes a first thermal annealing treatment and a second thermal annealing treatment, and the annealing temperature of the first thermal annealing treatment is 200°C-400°C.

[0035] In a possible implementation manner, the heating time of the first thermal annealing treatment is 1-2 hours.

[0036] In a possible implementation manner, the annealing temperature of the second thermal annealing treatment is 500°C-700°C.

[0037] In a possible implementation manner, the heating time of the second thermal annealing treatment is 3-4 hours.

[0038] In a possible implementation manner, the etching process adopts a dry etching process.

[0039] In a possible implementation manner, the etching process adopts physical etching.

[0040] In a possible implementation manner, the etchant used in the physical etching includes SF 6 and O 2 .

[0041] In a possible implementation manner, the etching depth of the etching process is 1 μm-5 μm.

[0042] In a possible implementation manner, the pollution source metal includes a transition metal.

[0043] In a possible implementation, the pollution source metal includes nickel.

[0044] In a possible implementation manner, the second structural defect includes a crystal native defect of the silicon wafer.

[0045] In a possible implementation manner, the silicon wafer is an unpatterned silicon wafer or a patterned silicon wafer.

[0046] The method for detecting metal contamination of silicon wafers provided in this application has at least the following technical effects:

[0047] The technical solution of the present application firstly diffuses the back metal and the bulk metal to the surface of the silicon wafer by a heating diffusion method, and silicides the pollution source metal to form a first structural defect during the heating process, so as to simultaneously realize the detection of the surface metal, the bulk metal and the back metal, and then etches the heated silicon wafer. The etching process satisfies a preset difference condition for the etching rate difference between the first structural defect and the second structural defect in the silicon wafer, so as to realize the differentiated etching of the first structural defect and the second structural defect, and present different defect state changes, so as to identify the first structural defect through the structural defect difference between the heated silicon wafer and the etched silicon wafer, so as to realize the effective detection and positioning of the pollution source metal in the silicon wafer, avoid silicon wafer detection contamination, and is applicable to both bare wafers and patterned silicon wafers.

[0048] It can be understood that additional aspects and advantages of the present application will be given in part in the following description, and in part will become obvious from the following description, or will be learned through the practice of the present application. BRIEF DESCRIPTION OF THE DRAWINGS

[0049] In order to more clearly illustrate the technical solutions and advantages in the embodiments of the present application or the prior art, the drawings required for use in the embodiments or the prior art descriptions are briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0050] Figure 1 It is a flow chart of a method for detecting metal contamination of a silicon wafer provided in an embodiment of the present application;

[0051] Figure 2 is a defect distribution diagram of a heated silicon wafer provided in an embodiment of the present application;

[0052] Figure 3 is a set of SEM images of structural defects provided in the embodiments of the present application;

[0053] Figure 4 is a set of SEM images of non-structural defects provided in the embodiments of the present application;

[0054] Figure 5 This application Figure 2 Enlarged view of the framed area before and after etching;

[0055] Figure 6 is a SEM image of the first structural defect provided in the embodiment of the present application before and after etching;

[0056] Figure 7 This application Figure 2 Corresponding defect distribution map of the silicon wafer after etching. DETAILED DESCRIPTION

[0057] The following will be combined with the drawings in the embodiments of the present application to clearly and completely describe the technical solutions in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without making creative work are within the scope of protection of this application.

[0058] It should be noted that in the description of the present application, for the following defined terms, unless a different definition is given in the claims or elsewhere in this specification, these definitions should be applied. All numerical values, whether or not explicitly indicated, are defined herein as being modified by the term "about". The term "about" generally refers to a numerical range that a person of ordinary skill in the art would consider to be equivalent to the stated value to produce substantially the same properties, functions, results, etc. A numerical range indicated by a low value and a high value is defined to include all numerical values ​​included in the numerical range and all subranges included in the numerical range.

[0059] It should be noted that the terms "first", "second", etc. in the specification and claims of the present application and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence. It should be understood that the data used in this way can be interchanged where appropriate, so that the embodiments of the present application described herein can be implemented in an order other than those illustrated or described herein. In addition, the terms "including" and "having" and any variations thereof are intended to cover non-exclusive inclusions.

[0060] It should be understood that the “plane” used in this application refers to the XY plane of a wafer, semiconductor device, chip, etc., corresponding to the XY plane of a display device, and the “thickness direction” refers to the Z direction relative to the XY plane.

[0061] The VPD-ICPMS method used in existing solutions usually places the silicon wafer in a VPD chamber and exposes it to HF vapor to dissolve the native oxide or thermally oxidized SiO 2 Surface; extract solution (2% HF & H 2 O 2 ) is placed on the wafer, and the extraction droplets are swept on the wafer through a specific device. As the extraction liquid moves, the dissolved silicon oxide and contaminant metals are collected; then the extraction droplets are transferred from the wafer surface to ICP-MS for elemental analysis. This scheme can detect bulk metals near the surface, but because it is done in a scanning manner, the average metal content of the entire surface is ultimately obtained, and the distribution information of the metal within the surface cannot be obtained. It can only be used as a positive metal analysis method, and the analysis depth is only 2-3μm near the surface. In addition, since the recovered droplets cannot roll on a patterned silicon wafer, the VPD-ICPMS method cannot be applied to patterned silicon wafers. In addition, this method is a trace analysis method, and if the metal contamination level is high, it is easy to contaminate the machine. The existing SPV is a method for obtaining the minority carrier diffusion length by measuring the surface voltage generated by light on the surface of the semiconductor material, and then characterizing Fe contamination and Cu contamination based on the change in minority carrier diffusion length before and after illumination. However, this method can only characterize two elements, Fe and Cu, but not other metal elements (such as Ni, etc.). It can only be used for bare wafer detection, but cannot measure silicon wafers with patterns. It is only suitable for bulk metal content detection, and cannot directly measure metal contamination on the surface (front or back) of the silicon wafer.

[0062] In order to solve at least one of the problems existing in the above-mentioned prior art, the present application provides a method for detecting metal contamination of silicon wafers. The method is described below in conjunction with the accompanying drawings. The technical solution of the present application can be applied to various nodes in the silicon wafer processing process or the semiconductor processing process based on silicon wafers, such as bare die metal detection or patterned silicon wafer metal detection. Please refer to Figure 1 , Figure 1 This is a flow chart of a method for detecting metal contamination of a silicon wafer provided in an embodiment of the present application. This specification provides method operation steps such as the embodiment or flow chart, but may include more or fewer operation steps based on conventional or non-creative labor. The order of steps listed in the embodiment is only one way of executing the steps among many, and does not represent the only execution order. When the method is actually executed, it can be executed in the order of the method shown in the embodiment or the accompanying drawings or in parallel. Specifically, Figure 1 As shown, the method may include the following steps S201-S205:

[0063] S201: Heat the silicon wafer so that the surface layer of the heated silicon wafer includes a first structural defect formed by heating and silicidation of the pollution source metal located on the surface layer.

[0064] In a specific embodiment, the silicon wafer may be an unpatterned silicon wafer or a patterned silicon wafer. The unpatterned silicon wafer may include a bare wafer, and the patterned silicon wafer may be a silicon wafer that has been patterned during the processing of a semiconductor device.

[0065] It can be understood that the main source of metal contamination is the components that are in direct contact with the silicon wafer (such as wafer), such as Foup (Front Opening Unified Pod, key container), the robot arm of the machine, the boat of the furnace tube, etc. Based on the metal position classification, the types of pollution source metals of the silicon wafer can include front metal, body metal and back metal. In this step, the heating treatment is used to diffuse the body metal and back metal in the silicon wafer to the surface of the silicon wafer, and to heat and silicide the metal on the surface of the silicon wafer to form metal silicide. The metal silicide formed on the surface of the silicon wafer will cause structural defects of the nearby silicon single crystal, such as single crystal defects such as stacking faults and dislocations. Accordingly, the pollution source metal located on the surface includes the front metal of the silicon wafer, and at least one of the body metal and back metal diffused to the surface of the silicon wafer by heating. The first structural defect on the surface of the silicon wafer is formed by heating and silicide of at least one of the above-mentioned front metal, body metal and back metal.

[0066] In a possible implementation, the pollution source metal includes a transition metal. Further, the pollution source metal may include but is not limited to nickel. It is understandable that the pollution source metal may also include other metals that can be heated and diffused to the surface of the silicon wafer and form silicide structural defects, and is not limited to the above description.

[0067] S203: Etching the heated silicon wafer.

[0068] In a specific embodiment, the etching rate difference between the first structural defect and the second structural defect of the silicon wafer during the etching process satisfies a preset difference condition. The second structural defect is a structural defect that exists in the silicon wafer and is not formed by metal silicide, including a structural defect that exists in the silicon wafer before the heating process of S201 is performed. The second structural defect may include a crystal native defect of the silicon wafer, such as a silicon single crystal defect.

[0069] In this step, there is a difference in the etching rate between the first structural defect and the second structural defect in the etching treatment and the difference satisfies the preset difference condition. Satisfying the preset difference condition means that the difference between the defect state change of the first structural defect and the defect state change of the second structural defect formed on the surface of the silicon wafer before and after the etching treatment can be detected and identified by the machine end, and the first structural defect can be screened out based on the difference in the defect state change. It can be understood that by selecting the etching treatment method, the etching rate of the first structural defect can be lower or higher than the etching rate of the second structural defect. In a preferred embodiment, the etching rate of the first structural defect in the etching treatment is lower than the etching rate of the second structural defect, and accordingly, the first change amount of the first structural defect is less than the second change amount of the second structural defect; more preferably, the first structural defect is inert to the etching treatment, and the second structural defect is reactive to the etching treatment. Accordingly, after the etching treatment, the first structural defect is almost completely retained, and the second structural defect is significantly reduced or removed.

[0070] In some embodiments, the etching process uses a dry etching process to achieve clean etching of the silicon wafer surface, which is beneficial to defect scanning and detection of the silicon wafer after etching. Among them, the etchant or process parameters used in the dry etching process have different etching rates for the first structural defect and the second structural defect, which can specifically include physical etching, chemical etching, physical and chemical etching, etc. Preferably, the dry etching process used can selectively etch silicon and is inert to metal silicide (etching rate is close to 0).

[0071] In a specific embodiment, the etching process uses physical etching. In an example, the etchant used in the physical etching includes SF 6 and O 2 , using SF 6 and O 2 The mixed gas is used for plasma etching to achieve selective etching of silicon materials, remove the second structural defects on the silicon wafer, and retain metal silicides such as nickel silicon compounds, thereby realizing the detection of metal pollution sources.

[0072] In some embodiments, the etching depth of the etching process is 1 μm-5 μm. It can be understood that the etching depth can be any value within the above range, which is not enumerated here, and can be set based on actual applications. By setting the above etching depth range, it is ensured that the silicon wafer before and after etching presents identifiable structural defect differences, and avoids problems such as metal silicide shedding caused by over-etching. Preferably, by controlling the etching depth, the second structural defects such as crystal native defects are selectively etched away while at least partially retaining the first structural defects.

[0073] S205: Detecting a first structural defect based on a difference in structural defects between the heated silicon wafer and the etched silicon wafer.

[0074] In this step, the difference in structural defects is used to characterize the changes in various structural defects on the surface of the silicon wafer before and after etching. Combined with the above, the difference in etching rate between the first structural defect and the second structural defect causes a difference in the change of the defect state, and then the structural defect whose change amount matches the etching rate of the first structural defect is determined as the first structural defect, and the structural defect whose change amount matches the etching rate of the second structural defect is determined as the second structural defect.

[0075] In summary, the technical solution of the present application first uses a heated diffusion method to diffuse the back metal and the bulk metal to the surface of the silicon wafer, and during the heating process, the pollution source metal is silicided to form a first structural defect, so as to simultaneously realize the detection of the surface metal, the bulk metal and the back metal, and then the heated silicon wafer is etched. The etching rate difference between the first structural defect and the second structural defect in the silicon wafer meets the preset difference condition, so as to realize the differentiated etching of the first structural defect and the second structural defect, and present different defect state changes, so that the first structural defect can be identified through the structural defect difference between the heated silicon wafer and the etched silicon wafer, so as to realize the effective detection and positioning of the pollution source metal in the silicon wafer, avoid silicon wafer detection contamination, and is applicable to both bare wafers and patterned silicon wafers.

[0076] Based on some or all of the embodiments of the present application, in the embodiments of the present application, the heating treatment in S201 includes a first heat treatment and a second heat treatment; the first heat treatment is used to diffuse the bulk metal and the back metal in the silicon wafer to the surface layer of the silicon wafer, and the second heat treatment is used to silicide the pollution source metal located on the surface layer to form a first structural defect. In this way, the first heat treatment and the second heat treatment are combined to achieve high-temperature diffusion of the bulk metal and the back metal of the silicon wafer, so that they are aggregated on the surface of the silicon wafer, and further form metal silicide to present a structural defect with a specific crystal orientation, so that the pollution source metal is visually manifested and easy to be visually identified.

[0077] The first heat treatment uses high temperature heating in an oxygen-free environment and then cools. If there is body metal or back metal contamination in the silicon wafer, after the first heat treatment, the body metal and back metal diffuse to the surface of the silicon wafer so that it can be detected by the machine end later. The machine end here can be a detection machine, such as an inspection machine. Furthermore, the first heat treatment can also make the contamination source metal and silicon initially form a metal silicide core, so as to form a stable metal silicide after the second heat treatment. Taking metal nickel as an example, metal nickel and silicon form a crystal core or NiSi after the first heat treatment. 2 Platelet, in one example, NiSi 2The thickness of the lamellae can be as thin as 2 layers, the crystal orientation is (111) and a stacking fault is introduced into the silicon single crystal. The stacking fault is caused by the precipitate phase / matrix interface structure formed by Si-Si bonds.

[0078] In a specific embodiment, the first heat treatment process includes: heating the silicon wafer in an oxygen-free environment to a preset diffusion temperature. The oxygen-free environment can be obtained by replacing the inert gas in the heating chamber, such as evacuating the heating chamber and introducing Ar or N 2 . Specifically, the preset diffusion temperature is reached by single-step heating or gradient heating, wherein single-step heating refers to directly rising from room temperature to the preset diffusion temperature by controlling the heating rate, and gradient heating refers to rising to the preset diffusion temperature in stages through at least two steps of heating treatment to provide silicon wafer stabilization time, reduce the heating time, and avoid silicon wafer warping and breakage caused by excessive thermal stress due to too fast heating. Specifically, the preset diffusion temperature required for the first heat treatment can be set based on the type of pollution source metal to be detected, which is a temperature that can make the pollution source metal diffuse to the surface of the silicon wafer, or a temperature that can make the pollution source metal diffuse to the surface of the silicon wafer and form a metal silicide core.

[0079] In some embodiments, the preset diffusion temperature is 900°C-1050°C. Exemplarily, the upper limit temperature of the preset diffusion temperature can be 1050°C, 1040°C, 1030°C, 1020°C, 1010°C, 1000°C, etc., and the lower limit temperature of the preset diffusion temperature can be 900°C, 910°C, 920°C, 930°C, 940°C, 950°C, etc. It can be understood that the preset diffusion temperature can also be any value within the above range, not limited to the above exemplified point values. By heating to the above temperature, the body metal and the back metal are fully diffused to the surface of the silicon wafer.

[0080] In a specific embodiment, the preset diffusion temperature is reached by two-step heating. Accordingly, the first heat treatment to reach the preset diffusion temperature by gradient heating includes: heating to the first preset temperature and keeping warm for the first preset time, heating to the preset diffusion temperature and keeping warm for the second preset time, and the first preset temperature is lower than the preset diffusion temperature. Exemplarily, the first preset temperature is 700-750°C, the first preset time is 20-40min, and the second preset time is 5-15min, so as to improve the heating yield of the silicon wafer and achieve sufficient diffusion of the metal. Preferably, the first preset time is 30min; the second preset time is 10min. The heating rate from the first preset temperature to the preset diffusion temperature is 6-8°C / min, preferably 7.5°C / min.

[0081] The second heat treatment is used to make the core formed by the first heat treatment undergo a crystal structure maturation process to grow into a larger metal silicide crystal. The heat treatment temperature used can be set based on the type of pollution source metal to be detected. In some embodiments, the second heat treatment process includes: performing at least one thermal annealing treatment on the silicon wafer after the first heat treatment to obtain a heated silicon wafer, and through one or more thermal annealings, the metal diffused and accumulated on the surface is silicided and grown into a structure with a certain diameter and thickness, forming a first structural defect that can be visually identified.

[0082] In a specific embodiment, at least one thermal annealing treatment includes a first thermal annealing treatment and a second thermal annealing treatment; the first thermal annealing treatment is used to silicide the pollution source metal to form a metal silicide and densify it, and the second thermal annealing treatment is used to ripen the crystal structure of the metal silicide treated by the first thermal annealing treatment to obtain a metal silicide structure forming a first structural defect. The two-step annealing treatment realizes the densification of the metal silicide and increases the diameter and thickness, so that the pollution source metal is visualized and meets the visual recognition requirements of the machine end.

[0083] The second annealing temperature is higher than the first annealing temperature. It can be understood that the temperature and duration of the first annealing treatment and the second annealing treatment are set based on the type of the pollution source metal, the annealing temperature of the first annealing treatment is the temperature at which the metal silicide produces structural densification, and the temperature of the second annealing treatment is the temperature at which the metal silicide undergoes crystal structure ripening, such as the temperature at which Ostwald ripening occurs.

[0084] Optionally, the annealing temperature of the first thermal annealing treatment is 200°C-400°C; illustratively, the upper limit of the annealing temperature of the first thermal annealing treatment can be 400°C, 390°C, 380°C, 370°C, 360°C, 350°C, etc., and the lower limit of the annealing temperature of the first thermal annealing treatment can be 200°C, 210°C, 220°C, 230°C, 240°C, 250°C, etc. It can be understood that the annealing temperature of the first thermal annealing treatment can also be any value within the above range, not limited to the above-mentioned exemplified point values.

[0085] Optionally, the annealing temperature of the second thermal annealing treatment is 500°C-700°C; illustratively, the upper limit of the annealing temperature of the second thermal annealing treatment can be 700°C, 690°C, 680°C, 670°C, etc., and the lower limit of the annealing temperature of the second thermal annealing treatment can be 500°C, 510°C, 520°C, 530°C, etc. It can be understood that the annealing temperature of the second thermal annealing treatment can also be any value within the above range, not limited to the above-mentioned exemplified point values.

[0086] Optionally, the heating time of the first thermal annealing treatment is 1-2 hours.

[0087] Optionally, the heating time of the second thermal annealing treatment is 3-4 hours.

[0088] It should be noted that the temperature and duration of the above-mentioned first thermal annealing and second thermal annealing are at least applicable to metals such as nickel. Taking metallic nickel as an example, the first annealing treatment is carried out at 200°C-400°C to make the crystal nuclei and thin flakes of the nickel silicon compound form a denser structure. Then, the second annealing treatment is carried out at 500°C-700°C to make the nickel silicon compound undergo Ostwald ripening to increase the structural size and thickness for subsequent defect scanning machine detection.

[0089] Based on some or all of the embodiments of the present application, in the embodiments of the present application, the structural defect difference detection in S205 needs to identify the structural defects on the heated silicon wafer and the residual defects on the etched silicon wafer respectively, and then determine the structural defect difference by comparing the above structural defects and residual defects to characterize the defect changes before and after etching, and then identify the first structural defect according to the changes of each structural defect indicated in the structural defect difference before and after etching to locate the contamination source metal. In some embodiments, the etching rate of the first structural defect in the etching process is lower than the etching rate of the second structural defect, that is, the residual degree of the first structural defect after etching is higher than the residual degree of the second structural defect; accordingly, S205 may include S301-S303:

[0090] S301: Obtaining a first recognition result obtained by performing structural defect recognition on a heated silicon wafer.

[0091] The first recognition result is used to indicate at least one structural defect on the surface of the heated silicon wafer. Structural defect recognition is achieved by defect recognition on the surface of the silicon wafer and positioning imaging recognition of the defect position. Accordingly, S301 may include S3011-S3013:

[0092] S3011: performing defect recognition on the heated silicon wafer to obtain an initial recognition result;

[0093] S3012: imaging the surface defect based on the position information of the surface defect to obtain a first defect image;

[0094] S3013: Perform crystal orientation identification on the surface defect based on the first defect image, determine the identified surface defect with crystal orientation as a structural defect, and generate a first identification result.

[0095] Among them, the initial recognition result is used to indicate the location information of the surface defects of the heated silicon wafer, and can characterize the distribution of each surface defect on the heated silicon wafer. The surface defects include structural defects and non-structural defects. Non-structural defects may include but are not limited to particles, mechanical damage defects and other defects without crystal orientation. After obtaining the initial recognition result, each identified surface defect is clearly imaged to obtain a first defect image that can display at least one surface defect; identify whether the surface defect in the first defect image has a crystal orientation. If so, it is determined to be a structural defect. If there is no specific crystal orientation, it is determined to be a non-structural defect. The generated first recognition result can include at least the location information of the structural defect, and can also include the crystal orientation information of the structural defect. In this way, the structural defects are preliminarily screened from the surface defects of the silicon wafer in combination with defect recognition and further defect imaging, avoiding the interference of non-structural defects when identifying residual defects after etching, and improving the accuracy of identifying and locating the pollution source metal.

[0096] It can be understood that the structural defects have specific crystal orientations and shapes, such as a structural defect with a crystal orientation of 100 is a square, and a structural defect with a crystal orientation of 111 is a triangle or a hexagon. In some cases, the above-mentioned method for crystal orientation recognition can be to perform shape recognition on the surface defects in the first defect image, and determine the surface defects with a specific shape corresponding to the crystal orientation as structural defects.

[0097] In a specific embodiment, the defect recognition in S3011 is implemented by an inspection machine. The inspection machine can be provided with a silicon wafer defect detector, and an optical scattering method is used to scan the defects of the heated silicon wafer to obtain an initial recognition result that can indicate the defect position of the silicon wafer surface. Figure 2 The defect distribution map obtained by defect scanning, the scattered marking points in the figure represent surface defects.

[0098] Next, a scanning electron microscope (SEM) is used to magnify the surface defects according to their locations, and the defect crystal orientation is analyzed for the first defect image obtained. Figure 3 and Figure 4 , Figure 3 A set of SEM images of structural defects identified are shown. Figure 4A set of SEM images of identified non-structural defects are shown. In some cases, SEM combined with electron backscatter diffraction (EBSD) technology can be used to automatically identify the crystal orientation of surface defects. In other cases, the shape detection of surface defects can be performed on the first defect image based on machine vision, and the obtained defect shape information is matched with the shape information corresponding to the crystal orientation. If a consistent shape is matched, it is determined to be a structural defect, otherwise it is determined to be a non-structural defect; wherein, shape detection can be implemented by edge detection algorithm, frequency domain conversion method, image segmentation algorithm, etc., and other methods that can identify the shape of graphics in the image can also be used, not limited to the above examples. In other cases, the first defect image can also be classified and identified for surface defects based on an intelligent recognition model, and the obtained classification recognition result is used to indicate whether the surface defect is a structural defect; the intelligent recognition model is obtained by constraining the initial recognition model with multiple sample images as the input of the initial recognition model and the image label as the expected output, and the initial recognition model is trained for image crystal orientation recognition. The sample image includes a defect image area, and the image label is used to characterize whether the defect in the sample image is a structural defect or a non-structural defect.

[0099] Next, a first recognition result is generated at least according to the position information of each structural defect. Optionally, the structural defect may be marked in the defect distribution map corresponding to the initial recognition result.

[0100] S302: Obtain a second identification result obtained by performing defect identification on the etched silicon wafer.

[0101] The second identification result is used to indicate at least one residual defect in the surface layer of the silicon wafer after etching.

[0102] S303: Detecting a first structural defect from the at least one structural defect based on a comparison result between the at least one structural defect indicated by the first recognition result and the at least one residual defect indicated by the second recognition result.

[0103] In combination with the above, there is a difference in the etching rate of the first structural defect and the second structural defect during the etching process. Therefore, before and after the etching process, the etching degree of the first structural defect and the second structural defect is different, and the corresponding defect state changes are also different. The first structural defect and other structural defects can be identified by comparing the structural defects and residual defects with the same position. In this way, the structural defects and residual defects before and after etching are detected by defect recognition, and then the defects caused by metal silicide are determined based on the defect difference before and after etching, and the distribution and degree of contamination of the pollution source metal are accurately located.

[0104] In a specific implementation, for any structural defect in at least one structural defect, if the comparison result indicates that there is a residual defect matching the structural defect in at least one residual defect, the structural defect is determined to be a first structural defect; if the comparison result indicates that there is no residual defect matching the structural defect in at least one residual defect, the structural defect is determined to be a second structural defect. The first recognition result includes at least the position information of each structural defect, and the second recognition result includes at least the position information of the residual defect. The structural defect and the residual defect at the same position are searched and matched in combination with the position information.

[0105] In some embodiments, the first structural defect remains after etching, and the second structural defect is removed after etching. For example, the first structural defect is inert to the etching, and the etching rate is close to 0, while the second structural defect is reactive to the etching, and all of its etching is achieved by controlling the etching parameters, or, both the first structural defect and the second structural defect can be etched, but the etching rate of the former is significantly lower than that of the latter, and the first structural defect remains and the second structural defect is removed by controlling the etching parameters. After etching, if any structural defect is determined to have a corresponding residual defect based on the first recognition result and the second recognition result, it is determined to be a first structural defect, otherwise, if it does not exist, it is determined to be a second structural defect. Accordingly, the existence of a residual defect matching the structural defect includes: at least one residual defect has a residual defect matching the position of the structural defect, and the position matching here refers to the consistent position, specifically, the position error is within a preset error range.

[0106] In this embodiment, the second recognition result can be obtained by defect scanning, such as by performing defect scanning on the etched silicon wafer by an inspection machine. Based on the position of each structural defect in the first recognition result, the residual defect at the position is searched in the second recognition result. If a matching residual defect is found, it is determined that there is a matching residual defect. If not found, it is determined that there is no matching residual defect. Figure 5 , the left figure shows Figure 2 The enlarged view of the framed area in the middle and the right view show the defect distribution of the area on the silicon wafer after etching. Obviously, after etching, except for the first structural defect shown in the right view, other surface defects are etched away.

[0107] In some other embodiments, both the first structural defect and the second structural defect remain after etching, and the residual degree of the former is higher than that of the latter. Accordingly, the residual defect that matches the structural defect includes: at least one residual defect has a residual defect that matches the position of the structural defect and the residual degree satisfies a preset residual condition. The residual degree can characterize the volume ratio of the residual defect to the structural defect corresponding to it. Satisfying the preset residual condition means that the residual degree is higher than the preset residual degree, and the preset residual degree is the lower limit of the volume ratio between the residual defect and the structural defect that matches the etching rate of the first structural defect.

[0108] In this embodiment, the second recognition result can be obtained through defect recognition on the surface of the silicon wafer and positioning imaging of the defect position. Similar to the first recognition, the initial recognition result corresponding to the silicon wafer after etching can be obtained through defect recognition, and then each residual defect is imaged to obtain a second defect image. The volume of the residual defect is calculated based on the defect area in the second defect image, and compared with the volume of the structural defect calculated based on the first defect image to obtain the residual degree, thereby determining whether it meets the preset residual conditions.

[0109] In other embodiments, a first structural defect is identified in combination with the crystal orientation of the residual defect, the first structural defect is inert to the etching treatment, and the second structural defect is active to the etching treatment. Accordingly, the residual defects that match the structural defects include: at least one residual defect has a residual defect that matches the position of the structural defect and has a crystal orientation.

[0110] In this embodiment, the second recognition result is similar to the first recognition, including the position information and crystal orientation information of the residual defect, and comparing the structural defects and residual defects with the same position. If the residual defect exists and the residual defect has a crystal orientation, it indicates a first structural defect, otherwise, it indicates a second structural defect. Figure 6 , the left figure shows a SEM image of a structural defect on a heated silicon wafer, and the right figure shows a residual defect on the etched silicon wafer that matches the structural defect. Obviously, the crystal orientation of the defect before and after etching is 100 degrees, indicating that it is a first structural defect. Preferably, if there is a residual defect and the residual defect has a specific crystal orientation, it indicates a first structural defect, otherwise, it is a second structural defect. The characteristic crystal orientation refers to the crystal orientation of the lattice structure of the structural defect before etching, or refers to the crystal orientation of the defect that can be introduced by the metal silicide formed by the detected pollution source metal.

[0111] Based on some or all of the above embodiments, in the embodiments of the present application, after S205, the method further includes S207: generating the pollution source metal distribution information of the silicon wafer based on the position information of the detected first structural defect. By marking the defect distribution of the metal silicide on the silicon wafer by the position of the first structural defect as the pollution source metal distribution information, the scope and degree of metal pollution can be characterized, and it is conducive to the visualization of metal pollution detection. For example, refer to Figure 7 , Figure 7 for Figure 2 The defect distribution diagram of the corresponding first structural defect can characterize the distribution of the pollution source metal.

[0112] It should be noted that the above-mentioned sequence of the embodiments of the present application is for description only and does not represent the advantages and disadvantages of the embodiments. The above-mentioned specific embodiments of the present application are described. Other embodiments are within the scope of the appended claims. In some cases, the actions or steps recorded in the claims can be performed in an order different from that in the embodiments and still achieve the desired results. In addition, the processes depicted in the drawings do not necessarily require the specific order or continuous order shown to achieve the desired results. In some embodiments, multitasking and parallel processing are also possible or may be advantageous.

[0113] The various embodiments in the present application are described in a progressive manner, and the same or similar parts between the various embodiments can be referenced to each other, and each embodiment focuses on the differences from other embodiments.

[0114] The above are only preferred embodiments of the present application and are not intended to limit the present application. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the present application should be included in the protection scope of the present application.

Claims

1. A method for detecting metal contamination of a silicon wafer, characterized in that: The method comprises: The silicon wafer is subjected to a heating treatment so that the surface layer of the heated silicon wafer includes a first structural defect formed by heating and silicide of a pollution source metal located on the surface layer, wherein the pollution source metal located on the surface layer includes a front metal of the silicon wafer, and at least one of a bulk metal and a back metal diffused to the surface layer of the silicon wafer by heating; Performing an etching process on the heated silicon wafer, wherein a difference in etching rate between the first structural defect and the second structural defect of the silicon wafer satisfies a preset difference condition; The first structural defect is detected based on the difference in structural defects between the heated silicon wafer and the etched silicon wafer.

2. The method according to claim 1, characterized in that: The etching rate of the etching process for the first structural defect is lower than the etching rate for the second structural defect; the detecting the first structural defect based on the difference in structural defects between the heated silicon wafer and the etched silicon wafer comprises: Acquire a first recognition result obtained by performing structural defect recognition on the heated silicon wafer, wherein the first recognition result is used to indicate at least one structural defect on a surface layer of the heated silicon wafer; Acquire a second identification result obtained by performing defect identification on the etched silicon wafer, wherein the second identification result is used to indicate at least one residual defect on the surface layer of the etched silicon wafer; Based on a comparison result between the at least one structural defect indicated by the first recognition result and the at least one residual defect indicated by the second recognition result, the first structural defect is detected from the at least one structural defect.

3. The method according to claim 2, characterized in that The obtaining of a first recognition result obtained by performing structural defect recognition on the heated silicon wafer includes: Performing defect recognition on the heated silicon wafer to obtain an initial recognition result, wherein the initial recognition result is used to indicate position information of surface defects of the heated silicon wafer; Imaging the surface defect based on the position information of the surface defect to obtain a first defect image; The crystal orientation of the surface defect is identified based on the first defect image, the identified surface defect with the crystal orientation is determined as the structural defect, and the first identification result is generated.

4. The method according to claim 2, characterized in that: The detecting the first structural defect from the at least one structural defect based on the comparison result between the at least one structural defect indicated by the first recognition result and the at least one residual defect indicated by the second recognition result comprises: For any structural defect among the at least one structural defect, if the comparison result indicates that there is a residual defect matching the structural defect in the at least one residual defect, the structural defect is determined to be the first structural defect.

5. The method according to claim 4, characterized in that The method further comprises: For any structural defect among the at least one structural defect, if the comparison result indicates that there is no residual defect matching the structural defect among the at least one residual defect, the structural defect is determined to be the second structural defect.

6. The method according to claim 4, characterized in that The residual defects matching the structural defects include: Among the at least one residual defect, there is a residual defect matching the position of the structural defect; Or, there is a residual defect in the at least one residual defect that matches the position of the structural defect and the residual degree satisfies a preset residual condition; Alternatively, the at least one residual defect includes a residual defect that matches the position of the structural defect and has a crystal orientation.

7. The method according to claim 1, characterized in that After detecting the first structural defect based on the difference in structural defects between the heated silicon wafer and the etched silicon wafer, the method further includes: The contamination source metal distribution information of the silicon wafer is generated based on the detected position information of the first structural defect.

8. The method according to claim 1, characterized in that The heating treatment includes a first heat treatment and a second heat treatment; The first heat treatment is used to diffuse the bulk metal and the back metal in the silicon wafer to the surface layer of the silicon wafer, and the second heat treatment is used to silicide the contamination source metal located on the surface layer to form the first structural defect.

9. The method according to claim 8, characterized in that The first heat treatment process includes: The silicon wafer is heated in an oxygen-free environment to a preset diffusion temperature, wherein the preset diffusion temperature is achieved by single-step temperature increase or gradient temperature increase.

10. The method according to claim 9, characterized in that The first heat treatment satisfies at least one of the following characteristics: The preset diffusion temperature is 900°C-1050°C; The first heat treatment to reach the preset diffusion temperature by gradient heating includes: heating to the first preset temperature and keeping it warm for a first preset time, heating to the preset diffusion temperature and keeping it warm for a second preset time; the first preset temperature is 700-750℃, the first preset time is 20-40min, and the second preset time is 5-15min.

11. The method according to claim 8, characterized in that The second heat treatment process includes: The silicon wafer after the first heat treatment is subjected to at least one thermal annealing treatment to obtain the heated silicon wafer.

12. The method according to claim 11, characterized in that The at least one thermal annealing treatment includes a first thermal annealing treatment and a second thermal annealing treatment; The first thermal annealing treatment is used to silicide the pollution source metal to form a metal silicide and densify it, and the second thermal annealing treatment is used to ripen the crystal structure of the metal silicide that has undergone the first thermal annealing treatment.

13. The method according to claim 11, characterized in that The at least one thermal annealing treatment includes a first thermal annealing treatment and a second thermal annealing treatment, and the at least one thermal annealing treatment satisfies at least one of the following characteristics: The annealing temperature of the first thermal annealing treatment is 200°C-400°C; The heating time of the first thermal annealing treatment is 1-2h; The annealing temperature of the second thermal annealing treatment is 500°C-700°C; The heating time of the second thermal annealing treatment is 3-4 hours.

14. The method according to any one of claims 1 to 13, characterized in that The etching process satisfies at least one of the following characteristics: The etching process adopts a dry etching process; The etchant used in the physical etching includes SF6 and O2; The etching depth of the etching process is 1 μm-5 μm.

15. The method according to any one of claims 1 to 13, characterized in that The method satisfies at least one of the following characteristics: The pollution source metals include transition metals; The pollution source metal includes nickel; The second structural defect includes a crystal native defect of the silicon wafer; The silicon wafer is an unpatterned silicon wafer or a patterned silicon wafer.

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