71 results about "Metallic contamination" patented technology

The present invention provides a light-emitting device in which the effects of heavy metal contamination are suppressed. A light-emitting device according to an embodiment of the present disclosure comprises: a first substrate having a first surface and one or more semiconductor elements; a second substrate having a second surface joined to the first surface and one or more light-emitting elements each containing a heavy metal; and one or more shielding bodies that impede the permeation of heavy metals. The one or more shielding bodies are provided in a region between the first surface of the first substrate and the one or more semiconductor elements, and / or in a region between the second surface of the second substrate and the one or more light-emitting elements.

The utility model discloses a silicon material boxing and feeding mechanism, and relates to the technical field of boxing and feeding mechanisms, the silicon material boxing and feeding mechanism comprises a belt conveyor, the outer side of the belt conveyor is fixedly connected with a mounting plate, the inner side of the mounting plate is fixedly connected with a cache feeding hopper, a supporting plate is arranged below the belt conveyor, the inner side of the supporting plate is fixedly connected with a tray, and the supporting plate is fixedly connected with the supporting plate. The silicon material boxing and feeding mechanism comprises a tray, two clamping supports are rotationally connected to the two sides of the tray, two limiting blocks are fixedly connected to the top of the tray, and a hopper opening and closing execution piece is fixedly connected to the outer side of a mounting plate. According to the utility model, the opening and closing system is simple in structure and convenient to operate, can effectively prevent leakage of the silicon material due to clamping of the silicon material, and is more stable and reliable in operation due to effective protection and isolation of the hinge part, so that the collection effect of the silicon material is improved, the material box is not rubbed and collided with other mechanisms in the weighing process, and the weighing precision of the silicon material is greatly improved.

Provided is technology capable of performing DC sputtering using a gallium target while reducing metal contamination. This DC sputtering device comprises: a substrate holding part that holds a substrate; a target container that holds a gallium target including gallium so as to face a main surface of the substrate in a first direction; a DC power supply that applies DC power to the gallium target; and a conductor that has one end connected to a negative electrode side of the DC power supply and the other end in contact with the gallium target in the target container, the conductor being formed of a gallium corrosion resistant metal. In addition, the DC sputtering device includes: a sputtering gas supply unit having a gas supply port for supplying a sputtering gas between the target container and the substrate holding part; and a magnet unit which is positioned on the opposite side of the target container from the substrate holding part, and forms, on the surface of the gallium target on one side in the first direction, an annular high-density plasma region in which the density of the plasma-converted sputtering gas is higher than the periphery.

The invention relates to the technical field of polishing solutions, in particular to a low-roughness polishing solution for fine polishing of silicon wafers and a preparation method of the low-roughness polishing solution. 20 to 40 parts of modified cerium oxide; 19.5 to 48 parts of a functional additive; 1.5 to 4.5 parts of a dispersion stabilizing system; 0.1 to 0.5 part of a surfactant; and 660 to 800 parts of ultrapure water. Monodisperse nano silicon dioxide colloid is synthesized through supercritical carbon dioxide, and surface damage caused by uneven grinding materials is eliminated from the source in combination with a crystal face regulation and control technology for activating cerium oxide through plasma; the activity of the oxidizing agent is locked by adopting an ultrasonic nano-encapsulation process, so that the service life of the polishing solution is greatly prolonged; and meanwhile, the synergistic effect of the abrasive materials is enhanced through oscillation curing and gradient doping processes, the sub-angstrom-level roughness is achieved, meanwhile, metal pollution is controlled at the ppt level, and a reliable surface treatment process is provided for manufacturing of chips with the diameters smaller than 3 nanometers.

This application provides a protective layer composition and its application, as well as an electronic device and its manufacturing method. The protective layer composition includes a resin and an organic solvent. The resin comprises a structured polyaryl ester and a second polymer, with the polyaryl ester and the second polymer comprising 80%-99% and 1%-20% of the resin by mass, respectively. The second polymer comprises polycarbonate with repeating units and / or a polymer with repeating units. This protective layer composition can reduce metal contamination of the non-patterned areas of the substrate caused by metal-based patterned materials or their associated layer materials during the formation of patterned thin films. Furthermore, the contaminant can be easily removed subsequently, improving the fabrication yield and performance reliability of the electronic device.

The invention discloses a method for monitoring metal pollution in an ion implantation process by using PFG and a PFG metal pollution monitoring system of an ion implanter. The method comprises the following steps: providing a P-type semiconductor wafer, and carrying out ion implantation and annealing treatment on the P-type semiconductor wafer; adopting a plasma gun as an electron source to neutralize positive charges on the surface of the P-type semiconductor wafer in ion implantation treatment; and measuring the diffusion length of a carrier of the P-type semiconductor wafer, calculating the service life of the carrier according to the diffusion length, and outputting a PFG metal pollution degree result. The SPV method is adopted, and the service life of the carriers is calculated by measuring the diffusion length of the carriers in the silicon crystal, so that the PFG metal pollution degree is monitored, the PFG metal pollution condition of the ion implanter can be monitored efficiently and accurately, process parameters are adjusted in time, and the manufacturing quality of semiconductor devices is ensured.

The invention provides a chip packaging structure, a manufacturing method thereof and electronic equipment, relates to the technical field of semiconductors, and can solve the problem of metal pollution in the process of exposing a through silicon via (TSV) on the back surface of a wafer. The chip packaging structure provided by the invention comprises a silicon substrate, a passivation layer, a through silicon via (TSV) and an active device. Wherein the back surface of the silicon substrate is provided with a silicon damage layer, the passivation layer is arranged on the surface of the silicon damage layer, the TSV penetrates through the silicon substrate and the passivation layer, and the active device is arranged on the front surface of the silicon substrate. Wherein the silicon damage layer located on the back face of the silicon substrate comprises at least one of polycrystalline silicon or amorphous silicon, and the thickness of the silicon damage layer is 10 nm to 30 nm. The silicon damage layer can absorb and block metal ions on the back surface of the wafer, so that the diffusion of the metal ions is prevented.

The invention relates to the technical field of preparation of polishing solutions, in particular to an ultra-pure polishing solution for fine polishing of silicon wafers and a preparation method of the ultra-pure polishing solution. 1.2 to 1.5 parts of zirconium oxide coated aluminum oxide; 0.002 to 0.004 part of a magnesium borate nanowire; sodium periodate; 0.4 to 0.6 part by weight of the cleaning agent and 96.0 to 97.2 parts by weight of ultrapure water. A nano hydrogenated diamond, cubic boron nitride and zirconium oxide coated aluminum oxide ternary abrasive system is adopted, a path for eliminating metal pollution from the source is combined with an all-organic metal-free additive, and meanwhile cooperative control over abrasive monodispersity and purity is achieved through the electrochemical purification and acoustic magnetic resonance dispersion technology; and finally, in the fine polishing process of the silicon wafer, the surface roughness is smaller, the metal pollution is lower, the polishing rate is greatly increased compared with that of a traditional process, the storage stability reaches 180 days without sedimentation, and the polishing agent is suitable for various application scenes of fine polishing of the silicon wafer.

The invention discloses a method for preparing a monocrystalline silicon ingot by recovering seed crystals. The method comprises the following steps: laying a growth surface with the crystal orientation of 1t at the bottom of a crucible; 110gt, 110gt; forming a seed crystal layer from the monocrystalline silicon seed crystal; adding a molten silicon material above the seed crystal layer, and enabling the molten silicon material to grow along the crystal orientation structure of the seed crystal, thereby obtaining lt; 110gt, 110gt; growing a cast monocrystalline silicon ingot in a crystal orientation, cutting the cast monocrystalline silicon ingot into a plurality of silicon blocks along the growth direction, removing areas with short minority carrier lifetime at the bottom and the top, and at the position far away from a seed crystal splicing seam defect expansion area, along the direction parallel to the growth direction, the side crystal orientation is lt; 100 gt; or lt; 110gt, 110gt; cutting in the direction to obtain recycled seed crystals, splicing and laying the recycled seed crystals again, and arranging a molten silicon material to incompletely melt the recycled seed crystals to prepare a new cast monocrystalline silicon ingot. By optimizing the seed crystal recovery process, the defect density and the metal pollution in the casting of the monocrystalline silicon ingot are reduced, the electrical property and the production yield of the product are improved, and the method has good economical efficiency and wide application prospects.

This invention discloses a chemical mechanical polishing slurry for silicon wafers based on the synergistic effect of ternary polymers, comprising the following components by weight percentage: silica sol 5-15 wt%; polyethylene glycol 0-10 wt%; cellulose derivative 0-0.5 wt%; sorbitol 0-0.5 wt%; oxidant 0.5-1.5 wt%; pH adjuster 0.3-0.8 wt%; and deionized water as the balance. Through the precise proportioning and synergistic effect of the ternary system, this polishing slurry achieves multi-coupling optimization, including abrasive stabilization, shear thickening, and chemical complexation. While ensuring high material removal rates, it significantly reduces surface defects and metal contamination, meeting the surface polishing requirements of advanced silicon wafer processes. Furthermore, the formulation of this polishing slurry is environmentally friendly, consisting of water-soluble polymers or biodegradable materials, greatly reducing environmental burden and simplifying post-processing steps, making it easy for industrialization and promotion.

The present invention relates to a method for controlling metal impurities on the surface of silicon wafers. The method comprises the following steps: providing a silicon wafer; performing a wetting treatment by spraying ultrapure water on the silicon wafer to fully wet the surface of the silicon wafer; drying the silicon wafer with a fully wetted surface; repeating the steps of the wetting treatment and the drying treatment; performing an acid solution treatment by treating the surface of the silicon wafer with an acid solution to obtain a treatment solution; performing an analysis treatment by using ICPMS to analyze the metal ion content in the treatment solution; and a judgment step of comparing the detected metal ion content with a metal pollution lower limit value to judge whether the ultrapure water can continue to clean the silicon wafer. Thus, through this method, the pollution amount of metal ions in the ultrapure water to the silicon wafer can be detected, the relative influence of the increase or decrease of the metal content on the surface of the silicon wafer by the metal ions in the ultrapure water can be determined, and this method also has the advantages of simple operation and high accuracy rate.

The application discloses a method for measuring the metal content on the surface of a wafer, comprising: obtaining a wafer to be detected, wherein the surface of the wafer comprises N sub-zones, N is a natural number and N>=2; performing a heating treatment on the wafer, so that the metal ions inside the wafer diffuse to the surface of the wafer; and performing a VPD solution scanning measurement step on each of the N sub-zones respectively, so as to obtain the surface metal content of each of the N sub-zones. According to the method for measuring the metal content on the surface of a wafer provided by the application, the wafer is first heated, so that the metal ions inside the wafer diffuse to the surface of the wafer, and then the surface metal content of each of the multiple sub-zones on the surface of the wafer is measured, so that the metal contamination and the position of the metal contamination can be more accurately identified, and the yield and reliability of the semiconductor device are ensured.

Provided is a novel method for evaluating metal contamination in a single-piece heat treatment furnace. A metal contamination evaluation method for a single-chip heat treatment furnace includes: a step in which a plurality of semiconductor wafers are placed on a placement member provided in the heat treatment furnace and heat-treated in the single-chip heat treatment furnace to be evaluated; a step for acquiring in-plane characteristic value distribution information for each of the plurality of semiconductor wafers after the heat treatment, the plurality of semiconductor wafers being placed on the placement member, the angles [theta] formed by the reference directions of the semiconductor wafers with respect to the reference angular direction when the semiconductor wafers are placed being different from each other; and a step for performing a correction process on one or more of the plurality of pieces of in-plane characteristic value distribution information acquired, and performing a correction process on the basis of whether or not a characteristic value abnormality position is observed in the same region in the plurality of pieces of in-plane characteristic value distribution information including the in-plane characteristic value distribution information after the correction process. And evaluating the metal contamination of the heat treatment furnace.

The invention provides a process chamber judgment method and device, and belongs to the technical field of semiconductor manufacturing. The process chamber judgment method comprises the following steps: providing a substrate silicon wafer, and measuring metal pollution values of M areas of the substrate silicon wafer to obtain a first measurement result; fixing the position of the V-shaped groove of the substrate silicon wafer, and preparing an epitaxial layer on the substrate silicon wafer through a plurality of process chambers to obtain an epitaxial silicon wafer; measuring the metal pollution values of the M areas of the epitaxial silicon wafer to obtain a second measurement result; measuring the metal pollution values of the M areas of the sample epitaxial silicon wafer to obtain a third measurement result; and determining the process chamber with metal pollution according to the first measurement result, the second measurement result and the third measurement result. According to the method, the source of metal pollution of the epitaxial silicon wafer can be determined, processing can be carried out in time, the abnormal occurrence rate of the epitaxial silicon wafer is reduced, and the quality of the epitaxial silicon wafer and the equipment productivity are improved.

The invention belongs to the technical field of crystal growth, and particularly discloses a thermal field device for growing ultraviolet low-absorption sapphire crystals and application of the thermal field device, and the device comprises a crucible, a heater, a melt area, a heat exchange support, an internal reflecting screen and an external thermal field. The internal reflecting screen is made of a multi-layer high-purity tungsten or molybdenum material, and the external thermal field is a graphite matrix of which the surface is coated with a vitrified layer or a silicon carbide coating. By optimizing the number of layers, the thickness and the spacing of the reflecting screens and combining a coating process, carbon volatilization and metal pollution are effectively inhibited, and the ultraviolet transmittance of the crystal in the wave band of 200-400 nm is remarkably improved. The device is suitable for growing sapphire crystals by a heat exchange method, has the characteristics of high thermal field stability, low energy consumption, excellent crystal quality and the like, has the ultraviolet linear transmittance of not less than 80%, and is suitable for high-end optical fields such as high-power lasers and gravitational wave detectors.

The invention relates to a substrate processing apparatus and a substrate processing method. Provided is a technique capable of treating a substrate while reducing the likelihood that the substrate is contaminated by a metal. The substrate processing apparatus includes a charging unit (20) and a processing unit (30). The charging unit (20) includes a charger (21) that positively charges the first main surface (Wa) of the substrate (W). The processing unit (30) has a processing chamber (31), and performs processing including at least one of heating and processing gas supply to a substrate (W) in the processing chamber (31) and accompanying generation of metal ions in the processing chamber (31).

[Problem] To suppress the occurrence of metal contamination on, and adhesion of particles to, a zirconium film formed on a substrate. [Solution] Provided is a film formation post-processing method for performing a process on a chamber having a processing space in which is performed a film formation process for supplying a zirconium-chloride-containing processing gas in a state in which a substrate is accommodated and forming a film configured from zirconium on the substrate, at least a part of the chamber exposed to the processing space being configured from an aluminum-containing material, wherein the method has a processing gas discharge step for stopping the supply of the processing gas after the film formation process and discharging the processing gas from the processing space, and a hydrogen-nitride-based gas supply step for supplying a hydrogen-nitride-based gas into the processing space after the processing gas discharge step.

The application discloses a method for removing heavy metal in oligotrophic environment by using semiconductor mineral reinforced microorganisms, which utilizes light energy to replace organic matter to drive sulfate-reducing bacteria metabolism to remove heavy metal ions. The sphalerite produced by microbial metabolism or natural sphalerite or chemically synthesized sphalerite is excited to produce photoelectrons under light conditions, and the sulfate-reducing bacteria with extracellular electron transfer capacity utilize the photoelectrons to carry out sulfate reduction metabolism to produce hydrogen sulfide, which reacts with heavy metal ions (such as lead ions) in wastewater to form heavy metal sulfide precipitates such as lead sulfide, so as to remove the heavy metal ions from the water phase. The method cooperatively utilizes light energy and chemical energy to efficiently treat heavy metal pollution, and simultaneously avoids problems such as secondary pollution, active sludge production and greenhouse gas emission in the treatment process, has low treatment cost, is environment-friendly, and has a wide application prospect.

A method for manufacturing a silicon wafer that can suppress BMD precipitation while avoiding the risk of metal contamination is provided. A method for manufacturing a silicon wafer according to the present invention comprises a first RTO, in which a flattened silicon wafer (W) produced from a single-crystal silicon ingot grown by the CZ method is heated to a first maximum temperature of 1300°C or higher and 1380°C or lower under an oxidizing atmosphere with an oxygen partial pressure of 25% to 100% and maintained at the first maximum temperature for 5 seconds or more; an oxide film stripping process in which the silicon wafer (W) obtained by the first RTO is cleaned with hydrofluoric acid; and a second RTO, in which the silicon wafer (W) obtained by the oxide film stripping process is heated to a second maximum temperature of 1050°C or higher and less than 1300°C under an oxidizing atmosphere with an oxygen partial pressure of 25% to 100% and maintained at the second maximum temperature for 5 seconds or more.

The utility model provides a feeding device and crystal bar drawing equipment. The feeding device comprises a charging barrel, a feeding device and a discharging device, a containing cavity is formed in the charging barrel, and the containing cavity is used for containing silicon materials; the cover plate is detachably connected to the top of the charging barrel, a guide conical surface is arranged on the edge of the cover plate, and a concave cavity is formed in the top of the cover plate. According to the feeding device, clamping stagnation caused by interference between the feeding device and the auxiliary chamber can be avoided, the feeding device can conveniently enter the auxiliary chamber from the main furnace body, the workload of manual participation is reduced, and the feeding efficiency is improved. In addition, the concave cavity is further formed in the top of the cover plate, so that metal impurities can be collected; and the magnetic part is arranged in the concave cavity and can be used for adsorbing metal impurities, so that metal pollution caused by the fact that the metal impurities fall into the silicon liquid below is avoided, and the drawing quality of the silicon single crystal rod can be improved.

Provided is a method for heat treating a silicon wafer using a horizontal heat treatment furnace, which can suppress metal contamination of a silicon wafer disposed in the vicinity of a heat retaining block provided for temperature uniformization of a wafer setting area. The method for heat treating a silicon wafer using a horizontal heat treatment furnace (100) of the present invention is configured to dispose a wafer boat (16) in a cylindrical furnace core tube (12), wherein (A) a wafer group (WF) is disposed on the wafer boat (16), (B) heat retaining blocks (a first heat retaining block (18A) and a second heat retaining block (18B)) are disposed on both sides of the wafer group (WF) in a direction of a central axis (X) of the furnace core tube on the wafer boat (16) so as to be apart from the wafer group (WF), and (C) pseudo wafers (20A, 20B, 20C, 20D) of high cleanliness are disposed on both sides of the first heat retaining block (18A) and the second heat retaining block (18B) in the direction of the central axis (X) of the furnace core tube on the wafer boat (16).

The present invention discloses a method for evaluating the quality of silicon wafers based on image features, which relates to the technical field of image processing, and solves the technical problems that it is difficult to extract features from surface images and quantify the features; secondly, it is difficult to select features based on feature parameters to generate feature vectors; then, it is difficult to analyze and identify silicon wafer defects based on feature vectors and difficult to detect silicon wafer deformation; then, it is difficult to analyze the dopant distribution in the ROI region and difficult to analyze the metal contamination of the silicon wafer; finally, it is difficult to comprehensively analyze the quality evaluation index of the silicon wafer based on various data. The present invention can identify the defects on the surface of the silicon wafer through image processing and feature extraction technologies, measure the deformation amount of the silicon wafer through deformation detection technologies; obtain the silicon wafer performance change rate by analyzing the dopant distribution in the ROI region, and obtain the metal contamination rate through metal contamination detection technologies; comprehensively evaluate the quality of the silicon wafer based on various data.

The application relates to a metal contamination online monitoring method, system, electronic equipment, storage medium and computer program product. The method comprises the following steps: acquiring spectrum data in a process cavity in a semiconductor process; calculating an SPE statistic of the spectrum data according to a principal component analysis model; when it is judged that the SPE statistic exceeds a preset control limit, the spectrum data is regarded as a contamination spectrum, and a metal contamination analysis step is entered, which comprises the following steps: acquiring the closest reference spectrum based on the process time stage of the contamination spectrum, and calculating a difference spectrum of the contamination spectrum and the reference spectrum; calculating a contamination index of the metal to be measured based on the original spectrum data and the difference spectrum; matching the contamination index of the metal to be measured with a preset metal characteristic spectrum database; when a matching result meets a preset condition, it is determined that metal contamination exists in the process cavity, and an alarm signal is output. The application can realize early warning and rapid response of metal contamination, thereby improving the process control level and product yield of semiconductor manufacturing.

The invention relates to a silicon wafer metal pollution detection method, which comprises the following steps that a silicon wafer to be detected is provided, the silicon wafer to be detected is provided with a first surface and a second surface which are oppositely arranged, and the first surface is provided with a pollution center; constructing a formula I which is used for reflecting the relationship between any position of the first surface of the to-be-detected silicon wafer and the content of metal elements in the pollution center of the to-be-detected silicon wafer; and determining the position of the pollution center of the to-be-detected silicon wafer and the metal element content of the current pollution center of the to-be-detected silicon wafer, and obtaining the metal element content of any position of the first surface of the current to-be-detected silicon wafer in combination with a formula 1. According to the silicon wafer metal pollution detection method, the metal element content of any position on the surface of the current silicon wafer to be detected can be timely and effectively obtained only by determining the metal element content of the pollution center of the silicon wafer to be detected, and each position does not need to be detected, so that the detection frequency is reduced, the detection time is shortened, and the detection efficiency is improved.

The utility model relates to a wafer identification device, which comprises a slip sheet identification structure and a one-way plectrum structure, and is characterized in that the slip sheet identification structure is located on the outer wall of a box door of a wafer box and comprises a first identification form and a second identification form; the one-way plectrum structure is positioned in a process machine table loaded with the crystal box; in the opening process or the closing process of the box door, the sliding piece identification structure moves along with the box door, and the one-way shifting piece structure abuts against the sliding piece identification structure so that the sliding piece identification structure can be switched between the first identification form and the second identification form. According to the method and the device, whether the wafers in the wafer box are subjected to the corresponding technological process or not is visually reflected, special management and control of a certain batch of wafers can be identified in an auxiliary manner, and the condition of passing goods violating rules can be found, so that metal pollution and other risks caused by misjudgment or misoperation are reduced or avoided.

Provided are a substrate processing method, a semiconductor device manufacturing method, and a processing device capable of reducing metal contamination on a substrate. The present invention relates to a method for processing a substrate by means of at least one gas (first gas) selected from the group consisting of IF7, IF5, BrF5, BrF3, MoF6, GeF4, ClF, and ClF3, and at least one gas (second gas) selected from the group consisting of F2 and HF.

The invention discloses a method for removing metal pollution on the surface of a SiC substrate through a liquid phase method. The method for removing the metal pollution on the surface of the SiC substrate through the liquid phase method comprises the following steps that the SiC substrate is cleaned; carrying out low-temperature gas-phase cleaning treatment on the SiC substrate subjected to the cleaning treatment; and performing high-temperature gas phase cleaning treatment on the SiC substrate after the low-temperature gas phase cleaning treatment. Metal impurities on the surface of the SiC substrate are converted into metal chlorides with low boiling points through a high-temperature gas phase annealing method in a halogen compound atmosphere, and then the metal chlorides are discharged in a gas form at high temperature, so that the problem that the content of the metal impurities on the surface of the SiC substrate exceeds the standard is solved.

The invention provides a chip and a manufacturing method thereof, a chip packaging structure and electronic equipment, relates to the technical field of semiconductors, and can block metal pollution introduced to the back surface of a substrate. The chip comprises a substrate structure, an active device and a silicon through hole. The substrate structure comprises a first substrate, a second substrate and a dielectric layer. The dielectric layer is located between the first substrate and the second substrate, and the dielectric layer can block metal diffusion. The active device is arranged on one side of the first substrate away from the dielectric layer, and one side of the second substrate close to the dielectric layer is provided with a gettering layer; and the silicon through hole penetrates through the first substrate, the dielectric layer and the gettering layer and extends into the second substrate. Through the dielectric layer, metal introduced to the back surface of the second substrate can be prevented from diffusing to the active device region, so that the probability of electrical abnormality or failure of the active device is reduced.

The present application relates to a kind of methods for verifying test precision of machine with reverse pollution, the machine precision detection technical field, including the following operating steps: first step: using VPD machine to generate HF steam to carry out weather corrosion to the surface of silicon wafer.Second step: then VPD machine scanning head scans and collects silicon wafer surface metal contamination, then VPD machine is operated to the silicon wafer drying operation.Third step: the silicon wafer that has passed surface cleaning is placed on ceramic heating plate.Fourth step: uniform drop is in the surface of silicon wafer with standard solution.Fifth step: solution low-temperature drying.Sixth step: using ICP-MS to test the reverse pollution solution collected by VPD.The mixed etching solution configured using VPD machine removes the metal impurities and oxide film indicated by sample, guarantees the cleanliness of experimental silicon wafer, removes the influence of exogenous metal pollution, and the recovery and test of etching solution are also completed automatically by machine, guarantee the precision and accuracy of test data.

The application discloses a wafer surface activation bonding device and a bonding method, and relates to the technical field of wafer processing. The device comprises a clamp, a movable support rod and a bombardment particle emission device. The clamp comprises oppositely arranged first and second sample holders, and the first and second sample holders are each provided with a hard nonmetal back plate. Two wafers to be bonded are fixed on the hard nonmetal back plate, and the surface area of the two wafers to be bonded that is in contact with each other is a bonding area, which is surrounded by the surface of the hard nonmetal back plate. The movable support rod is arranged at least on the outer side of any one of the first and second sample holders, so that relative extrusion between the first and second sample holders is realized, and the bonding area of the surfaces of the two wafers to be bonded is fully contacted under the action of pressure. The bombardment particle beam spot emitted by the bombardment particle emission device uniformly covers the bonding area of the two wafers to be bonded. The application can effectively avoid the introduction of metal contamination at the bonding interface, and has the advantages of simple process, good compatibility and the like.