48results about How to "Improve device reliability" patented technology

In a stacked chip configuration, and manufacturing methods thereof, the gap between a lower and an upper chip is filled completely using a relatively simple process that eliminates voids between the lower and upper chips and the cracking and delamination problems associated with such voids. The present invention is applicable to both chip-level bonding and wafer-level bonding approaches. A photosensitive polymer layer is applied to a first chip, or wafer, prior to stacking the chips or stacking the wafers. The photosensitive polymer layer is partially cured, so that the photosensitive polymer layer is made to be structurally stable, while retaining its adhesive properties. The second chip, or wafer, is stacked, aligned, and bonded to the first chip, or wafer, and the photosensitive polymer layer is then cured to fully bond the first and second chips, or wafers. In this manner, adhesion between chips/wafers is greatly improved, while providing complete gap fill. In addition, mechanical reliability is improved, alleviating the problems associated with cracking and delamination, and leading to an improvement in device yield and device reliability.

A manufacturing method for a semiconductor device is provided, wherein a silicon germanium (Si_1-xGe_x; SiGe) layer and a strained silicon layer are sequentially formed on a semiconductor substrate. A gate oxide layer and a gate structure are further formed on the strained silicon layer. The gate structure and the strained silicon layer are heavily doped with n-type dopants to form a compressed gate and source/drain regions, respectively. A cap layer is further formed over the semiconductor substrate, followed by conducting an annealing process. The cap layer is subsequently removed.

The present invention provides a wafer (3) comprising a through-wafer via (7) through the wafer (3) formed by a through-wafer via hole (9) and at least a first conductive coating (25). A substantially vertical sidewall (11) of the through-wafer via hole (9) except for a constriction (23) provides a reliable through-wafer via (7) occupying a small area on the wafer. The wafer (3) is preferably made of a semiconductor material, such as silicon, or a glass ceramic. A method for manufacturing such a wafer (3) is described.

The invention discloses a unified power flow controller adopting a modular structure and a starting method for the unified power flow controller. According to the method, inter-phase current generated through the line voltage of an alternating current system between bridge arms of a converter is used for charging a parallel converter module of the unified power flow controller, and a series converter module is charged through a direct current side by a parallel side. The unified power flow controller adopting the modular structure is rapidly and normally started by controlling the switching of each bridge arm sub-module for the pre-charging of all sub-module capacitors. A starting process is dependent on an alternating current power grid, an auxiliary direct current power supply is not required, and starting energy is provided for the controller through a one-sided alternating current power grid of the parallel side. The controller and the method are also applied to the starting of a modular multilevel converter-based direct current power transmission system during power supply to a passive network.

Provided is a cleaning agent for electronic materials, which enables very efficient advanced cleaning such that yield in the production of the electronic materials is improved and cleaning in a short period of time becomes possible, the cleaning agent having excellent cleaning power for fine-grained particles and organic matter and being able to reduce metallic contamination on the substrate. The cleaning agent for electronic materials comprises sulfamic acid (A), an anionic surfactant having at least one sulfonic acid group or a salt thereof in the molecule (B), a chelating agent (C), and water, wherein the pH at 25 C is preferably not more than 3.0 and the (B) is preferably a polymeric anionic surfactant (B1) having a weight average molecular weight of 1,000 to 2,000,000.

A process for forming a microelectromechanical system (MEMS) device by a deep reactive ion etching (DRIE) process during which a substrate overlying a cavity is etched to form trenches that breach the cavity to delineate suspended structures. A first general feature of the process is to define suspended structures with a DRIE process, such that the dimensions desired for the suspended structures are obtained. A second general feature is the proper location of specialized features, such as stiction bumps, vulnerable to erosion caused by the DRIE process. Yet another general feature is to control the environment surrounding suspended structures delineated by DRIE in order to obtain their desired dimensions. A significant problem identified and solved by the invention is the propensity for the DRIE process to etch certain suspended features at different rates. In addition to etching wider trenches more rapidly than narrower trenches, the DRIE process erodes suspended structures more rapidly at greater distances from anchor sites of the substrate being etched. At the masking level, the greater propensity for backside and lateral erosion of certain structures away from substrate anchor sites is exploited so that, at the completion of the etch process, suspended structures have acquired their respective desired widths.

An interconnect structure is described, disposed on a substrate with a conductive part thereon and including a dielectric layer, a composite plug and a conductive line. The dielectric layer is disposed on the substrate covering the conductive part. The composite plug is disposed in the dielectric layer electrically connecting with the conductive part, and includes a first plug and a second plug on the first plug, wherein the material or the critical dimension of the second plug is different from that of the first plug. The conductive line is disposed on the dielectric layer electrically connecting with the composite plug.

A semiconductor device includes a semiconductor substrate having a plurality of isolation regions, a plurality of trenches, where each of the plurality of trenches is formed in a corresponding isolation region, of the plurality of isolation regions, and where the plurality of trenches are arranged, in parallel, along a first direction, a plurality of gate lines formed on the semiconductor substrate in a second direction crossing the plurality of trenches, an insulating layer formed between each of the plurality of gate lines, a first air gap formed in at least one of the plurality of trenches, the first air gap extending in the first direction, and a second air gap formed in at least one of the insulating layers, the second air gap extending in the second direction.

The present invention provides a packaging structure for integration of an image sensor chip and a logic chip and a packaging method for integration of an image sensor chip and a logic chip. The packaging structure comprises: a rewiring layer; a transparent cover plate packaged at the first surface of the rewiring layer; a metal lead structure protruded on the second surface of the rewiring layer; an image sensor chip and a logic chip are arranged on the second surface of the rewiring layer, wherein the image sensor chip, the logic chip and the metal lead structure are electrically connected to each other through the rewiring layer; and packaging materials formed on the second surface of the rewiring layer. The image sensor chip and the logic chip are integrated in a same packaging chamber, the packaging size is small, and the reliability of a device is high; and moreover, and a metal column made in advance is employed to realize electrical leading out of the rewiring layer so as to greatly save the technology cost with no need for technologies such through-silicon via, etc.

A semiconductor device includes a capacitance, the numerical value of which is relevant for a device function. The capacitance is formed from a parallel connection of at least a first and a second capacitor element, wherein the first and second capacitor elements are formed in respective manufacturing steps that exhibit uncorrelated process fluctuations.

A nonvolatile semiconductor memory device includes transistor-based memory cells. Each memory cell has a first and a second source/drain region, a channel region separating the first and the second source/drain region, a storage layer and a control gate. The control gates of the memory cells are connected to word lines. The first and second source/drain regions are connected to bit lines respectively. Each memory cell may be programmed by injecting first charge carriers of a first polarity and may be erased by injecting second charge carriers having the opposite polarity into the storage layer respectively. By applying a high stress voltage between bit line and word line, weak insulator structures may break through such that they become detectable as short-circuits by a low voltage leakage test. By applying the stress voltage contemporaneously on both sides of the memory cells, an early overerase/overprogram, resulting from hot carrier injection, is avoided.

The invention relates to a disk permanent magnet composite brushless motor. The motor comprises a stator (1), a winding (2), a static magnet adjusting ring (3), a magnet gear outer rotor (4), a rotor yoke iron core (5) and a permanent magnet (6), wherein the magnet gear outer rotor (4) is integrated with an enclosure; the permanent magnet (6) is uniformly embedded on the rotor yoke iron core (5) along a circumferential direction; the stator (1) has a disk slotting structure; the winding (2) is embedded in a stator slot; and the static magnet adjusting ring (3) has a disk structure and is arranged between the magnet gear outer rotor (4) and the stator (1). In the motor, an inner rotor is saved on the basis of the conventional magnet gear structure, so processing technology is simplified, permanent magnet materials are saved and larger vibration and noise which are produced by the inner rotor are also eliminated simultaneously.

The invention provides a light-emitting device, where the active region thereof may be escaped from being damaged by the plasma process. The device is first formed with a semiconductor layer on the semiconductor substrate, next provided with an etching mask. Using the mask, the semiconductor layer on the substrate is dry-etched to form a periodic structure with grooves and mesas. The active regions are buried within the grooves by the OMVPE method.

An interconnect structure is described, disposed on a substrate with a conductive part thereon and including a dielectric layer, a composite plug and a conductive line. The dielectric layer is disposed on the substrate covering the conductive part. The composite plug is disposed in the dielectric layer electrically connecting with the conductive part, and includes a first plug and a second plug on the first plug, wherein the material or the critical dimension of the second plug is different from that of the first plug. The conductive line is disposed on the dielectric layer electrically connecting with the composite plug.

A new method and package is provided for the mounting of semiconductor devices that have been provided with small-pitch Input/Output interconnect bumps. Fine pitch solder bumps, consisting of pillar metal and a solder bump, are applied directly to the I/O pads of the semiconductor device, the device is then flip-chip bonded to a substrate. Dummy bumps may be provided for cases where the I/O pads of the device are arranged such that additional mechanical support for the device is required.

The invention concerns a device for measuring the pH of an effluent, said device comprising means for measuring an item of information representative of the pH of said effluent intended to be brought into contact with said effluent.

According to the invention, such a device further comprises means for modifying the pH value of said effluent close to said means for measuring.

The present invention relates to a semiconductor device having a P-channel semiconductor region and a manufacturing method therefor. The method comprises: forming a gate dielectric layer on a substrate; forming a gate material layer on the gate dielectric layer; blanket pre-doping the gate material layer to introduce an N-type dopant thereto; and pre-doping with fluorine a region of the gate material layer designed to be said P-channel semiconductor device, such that the fluorine dopes an interface between the substrate and the region of the gate dielectric layer designated to be said P-channel semiconductor device. The semiconductor device further comprises an N-type semiconductor region in said gate material layer.

A method of forming a semiconductor structure is provided. The method includes providing a semiconductor substrate with a substrate region. The method also includes forming a pad oxide layer overlying the substrate region. The method additionally includes forming a stop layer overlying the pad oxide layer. Furthermore, the method includes patterning the stop layer and the pad oxide layer to expose a portion of the substrate region. In addition, the method includes forming a trench within an exposed portion of the substrate region, the trench having sidewalls and a bottom and a height. Also, the method includes depositing alternating layers of oxide and silicon nitride to at least fill the trench, the oxide being deposited by an HDP-CVD process. The method additionally includes performing a planarization process to remove a portion of the silicon nitride and oxide layers. In addition, the method includes removing the pad oxide and stop layers.

The invention provides a drive device of a series DC machine for a pitch control system, which comprises a power loop part and a control loop part, wherein the power loop part comprises a rectifying unit, an energy consuming unit, a power switching circuit, an excitation reversing device, an alternating current input phase sequence detection unit, a busbar voltage and output current detection unit and the like, wherein the control loop part comprises an analogue signal sampling unit, a digital signal input acquiring unit, a speed signal acquiring unit, a digital signal outputting unit, an upper computer information interacting unit and the like. The circuit design is suitable for low-speed torque frequent starting of the series DC machine for the pitch control system and has characteristics of rapid response, current-limiting protection and flexible reversion. The drive device has perfect function and high reliability.

This invention generally relates to an optoelectronic device and a method of fabricating such a device, and more particularly to an optoelectronic device comprising an anode layer, a semiconductive layer provided over the anode layer, and a cathode layer provided over the semiconductive layer, the anode layer comprising a plurality of electrically conductive tracks connected together and spaced apart from one another with gaps therebetween, the device further comprising a first and one or more further hole injection layers provided between the anode layer and the semiconductive layer and extending across said gaps, wherein the first hole injection layer has a conductivity greater than the conductivity of the one or more further hole injection layers.

The invention discloses an automatic demolding machine for medical gloves, and relates to the technical field of automatic demolding machines for the gloves. Demolding is realized without participation of a blow-off mechanism. The automatic demolding machine specifically comprises a mold conveying rail used for conveying glove molds and a demolding rail with demolding mechanisms, the glove molds are installed on the mold conveying rail through a conveying fixing seat, the demolding rail is arranged below the mold conveying rail, the demolding mechanisms are evenly distributed on the demoldingrail, and the demolding mechanisms comprise demolding clamps, demolding bases and lifting motors; and a pushing mechanism for pushing the demolding mechanisms to longitudinally move relative to the glove molds is further arranged on one side of the demolding rail. By arranging a lifting stud, the lifting motors, a rotating rod and other structures, a mounting frame can be driven to perform liftingmotion, rolling wheels correspondingly slide on the outer wall of the rotating rod, the motion trails of the rolling wheels are limited through the acting force between the rotating rod and the rolling wheels, and the demolding clamps can achieve demolding without the participation of the blow-off mechanism.

A method for filling a trench includes forming a first layer in a trench in order to partially fill the trench, removing at least a potion of the first layer from the trench; and forming a second layer on the first layer, wherein the forming a second layer is performed at a temperature of at least 700 degrees C. and at a gas flow ratio of at least 1.6, the gas flow ratio being equal to a first gas flow rate for a first gas to a second gas flow rate for a second gas. In a specific embodiment, the method includes removing a contaminant from the first layer by reacting with the contaminant present in the first layer at the temperature and with the gas flow ratio. In a specific embodiment, the removing at least a portion of the first layer includes etching the portion of the first layer.

The invention discloses an internal combustion locomotive main generator excitation control device comprising a power supply module, a first signal acquisition module used for acquiring voltage and current signals, a second signal acquisition module used for acquiring a frequency signal, an excitation current acquisition control module used for acquiring an excitation current signal of an internal combustion locomotive main generator and automatically adjusting the excitation current signal value of the internal combustion locomotive main generator, a switching input and output module used for detecting the current running mode of the internal combustion locomotive main generator and acquiring a corresponding switching signal, and a main control unit used for getting the current excitation control sampling data of the internal combustion locomotive main generator based on the voltage and current signals, the frequency signal and the excitation current signal and making the excitation current acquisition control module automatically adjust the excitation current signal value to achieve predetermined target excitation control data based on the current running mode and the excitation control sampling data of the internal combustion locomotive main generator. The device is of high system reliability, the signal at the output end is stable, and the fault protection function is perfect.

The invention discloses a Buck type three-level alternating current-alternating current converter-based reactive power and harmonic compensation device. A main circuit of the device consists of Buck type three-level alternating current-alternating current converters with low-power transformers and conventional reactive power compensation capacitors, and reactive power and harmonic current of a three-phase three-wire system power grid side can be comprehensively compensated. The device comprises three single-phase reactive power and harmonic compensation main power circuits, wherein the Buck type three-level alternating current-alternating current converter with the low-power transformer in each phase comprises an alternating current input unit, an input filter, a Buck type three-level alternating current-alternating current conversion unit with the low-power transformer, an output filter and a reactive power compensation capacitor. According to the device, an even-order harmonic modulation technology and a successive harmonic compensation control solution are adopted to compensate a specific-order harmonic component. The device is small, low in cost and high in reliability and hasthe advantages of easiness for modular manufacturing, simple control strategy and more pertinent compensation.

The invention discloses a chain SVG device with an active filter function, which comprises a control unit, three active power modules, a plurality of passive power modules and a grid-connected transformer. Three phases of the chain SVG device adopt a Y type or a delta type to be connected onto the power grid via an isolation transformer. The active filter function of the chain SVG device is realized in a way in which a harmonic current controller in an integrated compensation controller generates modulation waves containing corresponding harmonic elements, and voltage containing the corresponding harmonic elements is outputted via the active power modules. The reactive power compensation function is realized in a way in which a reactive power current controller in the integrated compensation controller generates modulation waves only containing fundamental wave elements, and all power modules are serially connected to output the fundamental wave voltage. One device has the reactive power compensation function and the active filter function at the same time, and the problems that the prior electric energy treatment device is high in cost, the device is complicated, and reliability is high can be solved.

The invention discloses a thin-film LED (Light-Emitting Diode) device and a manufacturing method thereof. The device comprises a sheet circuit substrate, a gold wire-free inverted structure LED chip and a layer of light-passing protective film. The LED chip of the device has an inverted structure, and the electrode of the chip is fixed on the sheet substrate in a eutectic soldering way, so that electrical interconnection free from gold wire bonding is realized; and the layer of light-passing protective film is covered on the surfaces of the chip and the substrate. The electrode of the LED device disclosed by the invention is positioned at the bottom of the device, so that a surface mounting technology can be implemented easily. The device disclosed by the invention is 0.25-0.6 millimeter in thickness, has the advantages of small thickness, small size, large luminous angle, high luminous efficiency, high reliability, simple manufacturing process, high production efficiency, low cost and the like, is suitable for encapsulating high-power and ordinary-power LEDs, and can be widely applied in the fields of illumination, display and the like.

The invention provides a metal growth method based on single atomic layer deposition. The method comprises the steps as follows: single atomic layer deposition equipment is provided; dehumidification and oxygen removal treatment is performed on a single atomic layer deposition reaction chamber in the single atomic layer deposition equipment; first precursor reactants are introduced into the reaction chamber and react on the surface of a substrate; the redundant first precursor reactants and reaction by-products are discharged from the reaction chamber; second precursor reactants are introduced into the reaction chamber and react with the first precursor reactants on the substrate; and the redundant second precursor reactants and reaction by-products are discharged from the reaction chamber. With the metal growth method based on single atomic layer deposition, the water oxygen content in the single atomic layer deposition (ALD) equipment can be reduced, and the method is applicable to control on the oxygen content of metal gate materials in integrated circuits and can also be applied in any film forming fields.

The invention relates to a self-synchronizing trigger high capacity discharging gap applied to a high voltage system; an impedance device 6 synchronously tracks voltage at two ends of a main discharging gap 5, the main discharging gap is instantaneously broken down by plasmas, free electrons and ultraviolet light generated through the pre-discharging of a triggering gap 7 serially connected with the impedance device under the set voltage, and thus the purpose of rapid connection of a circuit or over voltage protection is achieved. The self-synchronizing trigger high capacity discharging gap has the positive effects that: 1, the voltage at two ends of a triggering electrode is taken from the autonomous discharging gap, extra triggering control systems are not required, the cost and complexity of the device are greatly reduced, and the device reliability is enhanced; 2, the triggering gap is positioned at an arc blind area of the main discharging gap, the triggering operation voltage is not changed due to arc ablation of the main discharging gap, so that the device can be used for many times, and the basic stabilization of operation characteristic can be maintained; 3, the distances of the main discharging gap and the triggering gap are convenient to adjust, and requirements for different protection characteristics can be satisfied.