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438 results about "Photosensitive polymer" patented technology

Stacked chip package using warp preventing insulative material and manufacturing method thereof

In a stacked chip configuration, and manufacturing methods thereof, the gap between a lower chip and an upper chip is filled completely using a relatively simple process that eliminates voids between the lower and upper chips and the cracking and delamination problems associated with voids. The present invention is applicable to both chip-level bonding and wafer-level bonding approaches. A photosensitive polymer layer is applied to a first chip, or wafer, prior to stacking the chips or stacking the wafers. The photosensitive polymer layer is partially cured, so that the photosensitive polymer layer is made to be structurally stable, while retaining its adhesive properties. The second chip, or wafer, is stacked, aligned, and bonded to the first chip, or wafer, and the photosensitive polymer layer is then cured to fully bond the first and second chips, or wafers. In this manner, adhesion between chips / wafers is greatly improved, while providing complete fill of the gap. In addition, mechanical reliability is improved and CTE mismatch is reduced, alleviating the problems associated with warping, cracking and delamination, and leading to an improvement in device yield and device reliability.
Owner:SAMSUNG ELECTRONICS CO LTD

Polymer encapsulated dicing lane (PEDL) technology for Cu/low/ultra-low k devices

A process for packaging semiconductor devices for flip chip and wire bond applications, wherein specific materials of the semiconductor devices are protected during device processing sequences and dicing procedures, has been developed. After definition of copper interconnect structures surrounded by a low k insulator layer, a protective, first photosensitive polymer layer comprised with a low dielectric constant is applied. After definition of openings in the first photosensitive polymer layer exposing portions of the top surface of the copper interconnect structures, a dicing lane opening is defined in materials located between copper interconnect structures. Conductive redistribution shapes are formed on the copper interconnect structures exposed in the openings in the first photosensitive polymer layer, followed by application of a protective, second photosensitive polymer layer. An opening is defined in the second photosensitive polymer layer exposing a portion of the top surface of a redistribution shape followed by placement of a solder ball in this opening. A reflow anneal procedure results in the solder ball wetting and overlying only the portion of the redistribution shape exposed in the opening in the second photosensitive polymer layer. Separation of the solder ball, flip chip regions from the non-solder ball, wire bond regions is accomplished via a dicing procedure performed in the dicing lane.
Owner:AGENCY FOR SCI TECH & RES
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