26results about How to "Reduce etch rate" patented technology

The invention relates to the technical field of semiconductors and electronic chemicals, and particularly discloses an etching solution for selectively etching silicon nitride and titanium nitride and a preparation method of the etching solution, the etching solution comprises the following components in percentage by mass: 10-45% of phosphoric acid, 1-5% of hydrofluoric acid, 0.5-2.5% of a pH buffer agent, 0.01-1.8% of a solubilizer, 0.1-7% of an etching inhibitor and the balance of water. Wherein the pH buffering agent can effectively stabilize the pH of the etching solution, and the solubilizer can improve the solubility of a solvent in the etching solution, reduce the tension of a solid-liquid phase interface in the solution and promote the transfer rate of interphase substances; the etching inhibitor and metal can form a layer of film on the surface of titanium nitride in a coordination bond mode, and it is guaranteed that silicon nitride and titanium nitride have the high selection ratio. The etching solution provided by the invention can inhibit the etching rate of titanium nitride under the condition of higher etching rate of silicon nitride, and can ensure that the requirement of high selection ratio of silicon nitride and titanium nitride is met.

The invention discloses an aluminum etching solution and a preparation method and application thereof, the aluminum etching solution is composed of the following raw materials in percentage by mass: 55-75% of phosphoric acid, 1.5-8.5% of nitric acid, 2-10% of glacial acetic acid, 1-6% of an additive and the balance of deionized water, and the additive is composed of a surfactant accounting for 0.005-1% of the total mass of the aluminum etching solution and a buffering agent accounting for 1-5% of the total mass of the aluminum etching solution; all the raw materials can be used for etching aluminum-silicon-copper after being uniformly mixed, and the method has the advantages that the lateral erosion amount is small, the etching depth-to-width ratio can reach 2.23 or above, meanwhile, the etching taper angle is large, the etching rate is controlled between 5800-6200 / min, and the requirement of the market for the etching rate can be met.

The invention provides a tungsten and titanium nitride / titanium selective etching solution which comprises the following components in percentage by mass: 5%-30% of an oxidizing agent, 0.5%-10% of an alkaline etching agent, 0.1%-1% of a tungsten corrosion inhibitor, 0.01%-0.05% of a surfactant and the balance of deionized water. According to the etching solution disclosed by the invention, the etching on W can be reduced while the high etching rate of TiN / Ti is maintained.

The invention relates to the technical field of quartz crucible production, in particular to a quartz crucible cleaning method which comprises the following steps: S1, washing: washing a quartz crucible by using ultrapure water according to a first preset water pressure; s2, alkali cleaning: soaking the quartz crucible in an alkaline cleaning solution at a first preset temperature; s3, pickling: at a second preset temperature, carrying out chemical reaction on an acidic cleaning solution and the quartz crucible; s4, high-pressure water washing: washing the quartz crucible by using ultrapure water according to a second preset water pressure; s5, drying: drying the quartz crucible according to a third preset temperature; wherein the second preset temperature is 20-45 DEG C, and the acidic cleaning solution is formed by mixing HF with the concentration of 10%-30% and H2SO4 or HNO3 with the concentration of 1%-10%, so that the etching speed is adjusted by adjusting the temperature and the HF concentration in the pickling step, impurities on the inner surface of the quartz crucible are removed within reasonable time, and the smoothness of the inner surface of the quartz crucible meets the standard.

The invention discloses engraving equipment for a flexible printed circuit board, and belongs to the technical field of flexible printed circuit board machining.The engraving equipment comprises a rack placed above the ground, a collecting tank is fixedly installed at the upper end of the rack, and a conveying frame is fixedly installed above the collecting tank; a support is fixedly installed at the upper end of the conveying frame, movable pipes are evenly and rotationally installed on the support, and spray heads are evenly installed on the movable pipes. A driving assembly for driving the movable pipe to rotate in a reciprocating manner is mounted on the rear side of the bracket; a pressure adjusting assembly used for adjusting the liquid spraying pressure of the spray head is arranged between the support and the pressure adjusting bin. According to the engraving equipment for the flexible printed circuit board, multi-direction swing adjustment of the spray head can be achieved, it is ensured that etching liquid on the board body can flow uniformly and be updated, the board body can be slightly shaken, the phenomenon that the etching rate is reduced due to formation of a water film is avoided, and the etching effect is effectively improved.

The invention provides a hafnium oxide etching solution. The etching solution comprises the following components in percentage by weight: 78-94% of dihydric alcohol, 5-20% of alcohol ether, 0.5-1.5% of hydrofluoric acid and 0.05-0.15% of an inhibitor. According to the hafnium oxide etching solution, the etching selection ratio of hafnium oxide (HfO2) to indium gallium zinc oxide (IGZO) is 1: 1, and good etching uniformity is achieved.

The invention discloses a semiconductor structure and a forming method thereof, and the method comprises the steps: a gate structure is arranged on a substrate, a source-drain region is arranged in the substrate at at least one side of the gate structure, and an interlayer dielectric layer is formed on the gate structure and the substrate; a first groove and a second groove are formed in the interlayer dielectric layer, the position of the first groove corresponds to that of the gate structure, and the position of the second groove corresponds to that of the source-drain region; forming a lateral barrier layer on the side wall of the first groove and the side wall of the second groove; dielectric structures are formed in the first groove and the second groove of which the side walls are provided with the lateral barrier layers; a first through hole and a second through hole which penetrate through the dielectric structure and the interlayer dielectric layer in sequence are formed, the first through hole is formed in the gate structure, and the second through hole is formed in the source-drain region. The lateral barrier layer delays the etching rate of the first through hole and the second through hole in the direction parallel to the surface of the substrate, and the phenomenon that the critical sizes of the first through hole and the second through hole are too large due to over-etching at the top positions of the first through hole and the second through hole is effectively reduced.

The present application provides a mask blank capable of suppressing reduction in etching rate of the entire hard mask film while improving pattern resolution, CD in-plane uniformity, and CD linearity. The mask blank has a structure in which a pattern-forming film and a hard mask film are sequentially stacked on a light-transmissive substrate, wherein the pattern-forming film is formed of a material containing chromium, the hard mask film includes a stacked structure of a lower layer and an upper layer, the lower layer is formed of a material containing silicon and oxygen, the upper layer is formed of a material containing tantalum and oxygen, the content of the oxygen is 30 atomic % or more, and the ratio of the thickness of the upper layer to the thickness of the entire hard mask film is 0.7 or less.

The invention relates to the technical field of etching solutions, in particular to a low-angle aluminum etching solution composition which comprises the following components in percentage by mass: phosphoric acid, nitric acid, acetic acid, 6-nitrourea pyrimidine, 3-amino-1, 2, 4-triazole and the balance of deionized water. According to the method, nitric acid is used for oxidation, phosphoric acid is used for etching, acetic acid is used for adjusting the pH value of etching liquid, 6-nitrourea pyrimidine and 3-amino-1, 2, 4-triazole are jointly matched to reduce aluminum etching, the etching speed of Al is reduced while the etching speed of a Mo layer is slightly high through combination with Al, the angle is controlled by controlling the etching speed of Mo and Al, and the etching speed of Mo and Al is greatly improved while the Al is effectively etched. The Al angle is reduced as much as possible, and the method has important significance in improving the fineness and the product yield of a panel manufacturing process.

The application relates to the technical field of semiconductor and electronic chemicals, and particularly discloses an etching solution for selectively etching silicon nitride and titanium nitride and a preparation method thereof. The etching solution contains the following components in percentage by mass: 10-45% of phosphoric acid, 1-5% of hydrofluoric acid, 0.5-2.5% of a pH buffer, 0.01-1.8% of a solubilizer and 0.1-7% of an etching inhibitor, and the rest is water. The pH buffer can effectively stabilize the pH of the etching solution, the solubilizer can improve the solubility of the solvent in the etching solution, reduce the tension of the solid-liquid phase interface in the solution and promote the transmission rate of the interphase substances, and the etching inhibitor can form a film on the surface of the titanium nitride in the form of a coordination bond, so that the silicon nitride and the titanium nitride have a high selectivity ratio. The etching solution can inhibit the etching rate of the titanium nitride under the condition of a high etching rate of the silicon nitride, and can ensure the high selectivity ratio of the silicon nitride and the titanium nitride.

Methods of forming patterned structures and manipulating film characteristics suitable for multiple patterning processes are disclosed. An exemplary method includes forming a layer overlying a substrate, followed by processing the layer, where the layer is formed by providing a precursor to a reaction chamber for a precursor pulse period, providing a reactant to the reaction chamber for a reactant pulse period, applying a first plasma power having a first frequency within a first plasma power period, and optionally applying a second plasma power having a second frequency within a second plasma power period. A second plasma power having a second frequency is applied within a second plasma power period, wherein the first frequency is different from the second frequency. The example method may further include the step of processing the deposited material.

The utility model provides a semiconductor process machine table and semiconductor process equipment, a temperature control structure is arranged in a bearing table, and the upper surface of the bearing table is a flush surface; a first temperature control pipeline in the temperature control structure is located in a first area, and a second temperature control pipeline is located in a second area surrounding the first area. The first temperature control pipeline and the second temperature control pipeline are the same in pipe diameter and different in distance from the upper surface of the bearing table. According to the utility model, the temperature control structure is partitioned to respectively control the temperatures of the center and the edge of the bearing table, so that the reaction rate of the wafer on the bearing table is uniform; meanwhile, by setting the positions of the partitions, the temperature adjustment better conforms to the reaction rate distribution, and the reaction uniformity is improved; in addition, the temperature of the bearing table is adjusted by setting the heights of the first area and the second area to be different, and the improvement method is simple and convenient to apply; finally, the temperature of the machine table is adjusted by setting different fluid flow rates of the temperature control pipeline, the form of the temperature control structure does not need to be changed, and the method is simple and convenient and facilitates popularization.

The invention provides a manufacturing method of a semiconductor structure. The manufacturing method comprises the following steps. A target layer is formed on the substrate. And forming a hard mask layer on the target layer. And removing a part of the hard mask layer to form a groove in the hard mask layer. Forming a plurality of first patterns on the top surface of the hard mask layer and simultaneously forming a plurality of second patterns in the groove, wherein the pattern density of the plurality of first patterns is smaller than the pattern density of the plurality of second patterns; and patterning the hard mask layer and the target layer by using the plurality of first patterns and the plurality of second patterns as masks to form a plurality of first target patterns corresponding to the plurality of first patterns and a plurality of second target patterns corresponding to the plurality of second patterns in the target layer. The plurality of first patterns, the plurality of second patterns, and the hard mask layer are removed.

This invention provides a method for metal interconnection of flexible circuits, comprising the following steps: coating a first dielectric layer; depositing a first metal layer and photolithographically etching a first metal pattern; coating a second dielectric layer and photolithographically etching interlayer vias; depositing a second metal layer and photolithographically etching a second metal pattern, wherein the second metal pattern overlaps with the first metal pattern; coating a third dielectric layer and photolithographically etching contact windows; and fabricating metal contacts. The beneficial effects of this invention are that the overlapping of the upper and lower metal layer patterns improves the reliability of vertical interconnection between metal layers, reduces lateral etching, improves etching accuracy, effectively avoids open circuits in flexible circuits, enhances the interconnection quality of flexible circuits, improves the fracture resistance of fine lines in flexible circuits, facilitates high-density wiring in flexible circuits, constructs thick electrical contact points, reduces contact resistance, improves signal transmission quality, and enhances the mechanical strength and wear resistance of the contacts.

The application discloses a fluorine-containing silicon nitride etching solution, which comprises phosphoric acid, a fluorine-containing compound, an aluminum oxide etching inhibitor, a tungsten etching inhibitor, a silicon oxide etching inhibitor and deionized water. The etching solution can realize selective etching of silicon nitride to silicon oxide, aluminum oxide and tungsten in hot phosphoric acid, while inhibiting etching of the silicon oxide, and the etching rate of the silicon nitride is more stable at high temperature than that of a phosphoric acid / hydrofluoric acid system due to the complexing and slow-release effect of the fluorine-containing compound.

This invention relates to the field of etching solution technology, particularly to the field of IPC C23F, and more specifically, to a two-component copper-molybdenum-titanium etching solution and its preparation method. It comprises a main agent and an auxiliary agent. By weight, the main agent consists of: 8-15 parts oxidant, 4-13 parts first organic acid, 1-3 parts first inorganic acid, 1-3 parts first organic base, 1-4 parts first surfactant, 0.05-0.5 parts first fluorinated compound, 0.01-1 parts first corrosion inhibitor, and 60-80 parts water. The auxiliary agent consists of: 10-60 parts second organic acid, 2-10 parts second inorganic acid, 1-5 parts second organic base, 0.05-0.5 parts second fluorinated compound, 1-5 parts second surfactant, 0.5-2 parts second corrosion inhibitor, and 50-80 parts water. This invention solves problems such as large etching rate fluctuations, chamfering, vertical angles, precipitation, and crystallization during the etching process.

The application provides a display panel and an electronic device. The electronic device comprises the display panel. The display panel comprises a substrate and a composite metal film layer. The composite metal film layer comprises a blocking layer and a main body layer which are stacked. By reducing the potential difference between the main body layer and the blocking layer in the composite metal film layer, the gap between the main body layer and the blocking layer is reduced, the hollowing of the blocking layer in the composite metal film layer is improved, the problems of line defects or black screen of the display panel are avoided, and the yield of the display panel is improved.

The invention discloses a fluorine-containing silicon nitride etching solution. The etching solution comprises phosphoric acid, a fluorine-containing compound, an aluminum oxide etching inhibitor, a tungsten etching inhibitor, a silicon oxide etching inhibitor and deionized water. The etching solution can realize selective etching of silicon nitride, silicon oxide, aluminum oxide and tungsten in hot phosphoric acid and inhibit etching of silicon oxide at the same time, and the etching rate of silicon nitride is more stable than that of a phosphoric acid / hydrofluoric acid system at a high temperature due to the complexing slow-release effect of the fluorine-containing compound.

The present invention specifically relates to a TiN and Ti metal film etching solution and a preparation method thereof. The etching solution mainly comprises an oxidant, a stabilizer, an ammonium salt, an oxygen promoter, a surfactant and acetic acid. The etching solution uses an oxidant to oxidize TiN and Ti to form oxides for etching; the ammonium salt can be used as a corrosion inhibitor to complex with metal ions; an inorganic acid or an organic acid is used as a secondary oxidant to increase the oxidizing property of the oxidant and provide sufficient hydrogen ions, so that the concentration of the oxidant is maintained at a high level, the etching rate is maintained stable, and the use / storage life of the etching solution is extended; the surfactant can reduce the surface tension of the solution and promote the etching uniformity and integrity of TiN and Ti. The etching solution used according to the method of the present invention can ensure that the etching rates of the TiN metal film and the Ti metal film are basically the same (the difference between the etching rates of the two is ≤17 Å / min).

The invention relates to a method for etching a copper layer and a substrate processing apparatus. The present invention suppresses a decrease in shape controllability when a copper layer is formed into a desired shape, and also suppresses a decrease in etching rate of the copper layer. When etching a thin copper layer (41) formed on the surface of a substrate (G) disposed inside a processing chamber (11) of a substrate processing apparatus (10), in a primary reaction, copper chloride (II) (44) is generated from the copper layer (41) by using chlorine radicals generated from a first processing gas containing a chlorine-containing gas and not containing hydrogen gas, and in a secondary reaction, copper chloride (II) (44) is generated from the copper layer (41) by using chlorine radicals generated from a second processing gas containing chlorine gas and not containing hydrogen gas. The trimer of copper chloride (I) is generated from copper chloride (II) (44) by means of hydrogen radicals generated from a second treatment gas that contains hydrogen gas and does not contain a chlorine-containing gas and another chlorine-containing gas, and the primary reaction and the secondary reaction are alternately repeated for a predetermined number of times.

The invention discloses a semiconductor structure and a manufacturing method thereof. The manufacturing method comprises the following steps: forming dummy gates on an NMOS (N-channel Metal Oxide Semiconductor) device region and a PMOS (P-channel Metal Oxide Semiconductor) device region included in a substrate; a functional layer is formed on the side wall of the pseudo gate and the substrate, and the area, outside the pseudo gate and the functional layer on the side wall of the pseudo gate, of the PMOS device area is a reserved area; forming a photoresist layer which covers the NMOS device region and is provided with an opening in the PMOS device region after the functional layer is formed; etching the functional layer by using the photoresist layer as a mask until the surface of the reserved area is exposed, and then removing the photoresist layer; forming a preparation groove in the reserved area; wherein the functional layer is formed by cyclically executing the first step and the second step, the first step comprises forming a sub-functional layer covering the pseudo gate and the substrate, and the second step comprises introducing etching gas downwards from the upper part of the substrate to etch the sub-functional layer until the part, at the top of the pseudo gate, of the sub-functional layer is etched. According to the invention, the pseudo gates of the NMOS device and the PMOS device are equal in height with low cost.

The present disclosure provides a reaction chamber and a capacitively coupled plasma device, wherein the reaction chamber comprises a bottom wall, an inner liner, a support assembly and a magnetic assembly. The inner liner is arranged in the chamber body, including a bottom liner located above the bottom wall of the chamber body; the support assembly is arranged in a process area surrounded by the bottom liner, and is used to support a wafer; the magnetic assembly is arranged outside the process area, and is used to form a magnetic field, so as to reduce the difference in etching rate between the edge area and the central area of ​​the wafer.

This application relates to a Schottky diode and a semiconductor integrated device. The Schottky diode includes: a substrate with first doped regions and first lead-out regions arranged at intervals within it; a first contact layer disposed on the substrate, the orthographic projection of the first contact layer on the substrate covering the first doped regions; a first dielectric layer disposed on the first contact layer; a cathode structure electrically connected to the first lead-out regions; a plurality of connection structures passing through the first dielectric layer and connected to the first contact layer; the plurality of connection structures are arranged at intervals; an anode connected to the side of the plurality of connection structures away from the substrate; wherein the orthographic projection of each connection structure on the substrate is a first orthographic projection, the dimension of the first orthographic projection along a first direction is a first dimension, and the dimension of the first orthographic projection along a second direction is a second dimension; the ratio of the first dimension to the second dimension is greater than or equal to 25; the first direction and the second direction intersect. This application helps to improve the leakage current phenomenon of Schottky diodes.

The invention provides a semiconductor BOE etching solution as well as a preparation method and application thereof. The semiconductor BOE etching solution comprises the following components in parts by weight: 4-9 parts of an additive; 5-10 parts of hydrofluoric acid; 18 to 25 parts of ammonium fluoride; 60 to 90 parts of ultrapure water; the additive comprises a compound with a structure as shown in a formula I and / or acylamino sulfonate. A preparation method of the compound with the structure as shown in the formula I comprises the following steps: dropwise adding sulfuric acid into 4-(2, 2-diphenylvinyl)-N, N-di-p-tolyl aniline, stirring for a period of time, dropwise adding nitric acid under the condition of stirring, and extracting and drying after the reaction is completed to obtain a nitrated product; mixing and reacting the nitration product, perfluorooctyl sulfonic acid amine and AlCl3, standing and layering, and collecting supernatant liquid; and recrystallizing to obtain the compound with the structure shown in the formula I. The semiconductor BOE etching solution has a small contact angle with a silicon wafer, the etching rate is stable and slow, and the etched silicon wafer is clean, uniform and free of impurities.

A semiconductor structure and a method for forming the same include: providing a substrate having a fin; forming a pseudo gate structure across the fin on the substrate, and the pseudo gate structure having a second protective layer on the sidewall surface; performing a modification treatment on the second protective layer so that the second protective layer forms a second modified layer; and performing a cleaning process. By selecting a suitable modification treatment, the etching rate of the second modified layer during the cleaning process is within a preset range, that is, the etching rate of the second modified layer by the cleaning process is relatively low, so that the thickness of the sidewall of the pseudo gate structure is reduced to a relatively small extent, so that the angle of the corner area where the fin and the pseudo gate structure meet is relatively small, thereby improving the electrical performance of the formed semiconductor structure.

The present application discloses a chemical solution, a preparation method and an application thereof for etching of SMT printing templates, and relates to the technical field of etching liquids. The preparation method of the chemical solution is as follows: ferric chloride is added to a hydrochloric acid solution to obtain a solution A; sodium chloride is added to a cupric chloride solution to obtain a solution B; fluorosilane FT-922, distilled water and anhydrous ethanol are mixed and ultrasonically dispersed, and then magnetic stirring is taken out to fully hydrolyze it; nonylphenol polyoxyethylene ether NP-10 and sodium silicate are added and stirred evenly to obtain a composite etching protective agent; solution A, solution B, and a composite etching protective agent are mixed in a volume ratio of 4-6:1:0.01-0.05, stirred evenly, and a chemical solution for etching of SMT printing templates is obtained. After the chemical solution provided in the present application etches the SMT printing template, the surface of the material is matte and the structure is uniform, and the surface of the template after etching also has excellent hydrophobic and antifouling properties.