9results about How to "Reduce etch rate" patented technology

The present application provides a mask blank capable of suppressing reduction in etching rate of the entire hard mask film while improving pattern resolution, CD in-plane uniformity, and CD linearity. The mask blank has a structure in which a pattern-forming film and a hard mask film are sequentially stacked on a light-transmissive substrate, wherein the pattern-forming film is formed of a material containing chromium, the hard mask film includes a stacked structure of a lower layer and an upper layer, the lower layer is formed of a material containing silicon and oxygen, the upper layer is formed of a material containing tantalum and oxygen, the content of the oxygen is 30 atomic % or more, and the ratio of the thickness of the upper layer to the thickness of the entire hard mask film is 0.7 or less.

The invention relates to the technical field of etching solutions, in particular to a low-angle aluminum etching solution composition which comprises the following components in percentage by mass: phosphoric acid, nitric acid, acetic acid, 6-nitrourea pyrimidine, 3-amino-1, 2, 4-triazole and the balance of deionized water. According to the method, nitric acid is used for oxidation, phosphoric acid is used for etching, acetic acid is used for adjusting the pH value of etching liquid, 6-nitrourea pyrimidine and 3-amino-1, 2, 4-triazole are jointly matched to reduce aluminum etching, the etching speed of Al is reduced while the etching speed of a Mo layer is slightly high through combination with Al, the angle is controlled by controlling the etching speed of Mo and Al, and the etching speed of Mo and Al is greatly improved while the Al is effectively etched. The Al angle is reduced as much as possible, and the method has important significance in improving the fineness and the product yield of a panel manufacturing process.

The application relates to the technical field of semiconductor and electronic chemicals, and particularly discloses an etching solution for selectively etching silicon nitride and titanium nitride and a preparation method thereof. The etching solution contains the following components in percentage by mass: 10-45% of phosphoric acid, 1-5% of hydrofluoric acid, 0.5-2.5% of a pH buffer, 0.01-1.8% of a solubilizer and 0.1-7% of an etching inhibitor, and the rest is water. The pH buffer can effectively stabilize the pH of the etching solution, the solubilizer can improve the solubility of the solvent in the etching solution, reduce the tension of the solid-liquid phase interface in the solution and promote the transmission rate of the interphase substances, and the etching inhibitor can form a film on the surface of the titanium nitride in the form of a coordination bond, so that the silicon nitride and the titanium nitride have a high selectivity ratio. The etching solution can inhibit the etching rate of the titanium nitride under the condition of a high etching rate of the silicon nitride, and can ensure the high selectivity ratio of the silicon nitride and the titanium nitride.

The invention provides a manufacturing method of a semiconductor structure. The manufacturing method comprises the following steps. A target layer is formed on the substrate. And forming a hard mask layer on the target layer. And removing a part of the hard mask layer to form a groove in the hard mask layer. Forming a plurality of first patterns on the top surface of the hard mask layer and simultaneously forming a plurality of second patterns in the groove, wherein the pattern density of the plurality of first patterns is smaller than the pattern density of the plurality of second patterns; and patterning the hard mask layer and the target layer by using the plurality of first patterns and the plurality of second patterns as masks to form a plurality of first target patterns corresponding to the plurality of first patterns and a plurality of second target patterns corresponding to the plurality of second patterns in the target layer. The plurality of first patterns, the plurality of second patterns, and the hard mask layer are removed.

This invention provides a method for metal interconnection of flexible circuits, comprising the following steps: coating a first dielectric layer; depositing a first metal layer and photolithographically etching a first metal pattern; coating a second dielectric layer and photolithographically etching interlayer vias; depositing a second metal layer and photolithographically etching a second metal pattern, wherein the second metal pattern overlaps with the first metal pattern; coating a third dielectric layer and photolithographically etching contact windows; and fabricating metal contacts. The beneficial effects of this invention are that the overlapping of the upper and lower metal layer patterns improves the reliability of vertical interconnection between metal layers, reduces lateral etching, improves etching accuracy, effectively avoids open circuits in flexible circuits, enhances the interconnection quality of flexible circuits, improves the fracture resistance of fine lines in flexible circuits, facilitates high-density wiring in flexible circuits, constructs thick electrical contact points, reduces contact resistance, improves signal transmission quality, and enhances the mechanical strength and wear resistance of the contacts.

The application discloses a fluorine-containing silicon nitride etching solution, which comprises phosphoric acid, a fluorine-containing compound, an aluminum oxide etching inhibitor, a tungsten etching inhibitor, a silicon oxide etching inhibitor and deionized water. The etching solution can realize selective etching of silicon nitride to silicon oxide, aluminum oxide and tungsten in hot phosphoric acid, while inhibiting etching of the silicon oxide, and the etching rate of the silicon nitride is more stable at high temperature than that of a phosphoric acid / hydrofluoric acid system due to the complexing and slow-release effect of the fluorine-containing compound.

This invention relates to the field of etching solution technology, particularly to the field of IPC C23F, and more specifically, to a two-component copper-molybdenum-titanium etching solution and its preparation method. It comprises a main agent and an auxiliary agent. By weight, the main agent consists of: 8-15 parts oxidant, 4-13 parts first organic acid, 1-3 parts first inorganic acid, 1-3 parts first organic base, 1-4 parts first surfactant, 0.05-0.5 parts first fluorinated compound, 0.01-1 parts first corrosion inhibitor, and 60-80 parts water. The auxiliary agent consists of: 10-60 parts second organic acid, 2-10 parts second inorganic acid, 1-5 parts second organic base, 0.05-0.5 parts second fluorinated compound, 1-5 parts second surfactant, 0.5-2 parts second corrosion inhibitor, and 50-80 parts water. This invention solves problems such as large etching rate fluctuations, chamfering, vertical angles, precipitation, and crystallization during the etching process.

The application provides a display panel and an electronic device. The electronic device comprises the display panel. The display panel comprises a substrate and a composite metal film layer. The composite metal film layer comprises a blocking layer and a main body layer which are stacked. By reducing the potential difference between the main body layer and the blocking layer in the composite metal film layer, the gap between the main body layer and the blocking layer is reduced, the hollowing of the blocking layer in the composite metal film layer is improved, the problems of line defects or black screen of the display panel are avoided, and the yield of the display panel is improved.

This application relates to a Schottky diode and a semiconductor integrated device. The Schottky diode includes: a substrate with first doped regions and first lead-out regions arranged at intervals within it; a first contact layer disposed on the substrate, the orthographic projection of the first contact layer on the substrate covering the first doped regions; a first dielectric layer disposed on the first contact layer; a cathode structure electrically connected to the first lead-out regions; a plurality of connection structures passing through the first dielectric layer and connected to the first contact layer; the plurality of connection structures are arranged at intervals; an anode connected to the side of the plurality of connection structures away from the substrate; wherein the orthographic projection of each connection structure on the substrate is a first orthographic projection, the dimension of the first orthographic projection along a first direction is a first dimension, and the dimension of the first orthographic projection along a second direction is a second dimension; the ratio of the first dimension to the second dimension is greater than or equal to 25; the first direction and the second direction intersect. This application helps to improve the leakage current phenomenon of Schottky diodes.