Semiconductor circuit and manufacturing method thereof
By connecting the metal substrate and the lead framework in the semiconductor circuit, and using the plastic sealing connection part with plastic sealing, the insulation layer layer and substrate spilling problem are used to achieve an efficient and reliable semiconductor circuit manufacturing process.
Patent Information
- Application Number
- CN202411447403.0
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-10-16
- Publication Date
- 2025-01-21
AI Technical Summary
During the manufacturing process, existing semiconductor circuits have problems such as layering of insulating layers, large substrate tolerances, and overflow of substrates and lead frames, resulting in high production costs and low efficiency.
A semiconductor circuit design is adopted, in which the metal substrate and the lead frame are connected through elastic warps, and the warps are compressed and solidified by the cured product to achieve electrical connection. At the same time, a plastic sealant is used to seal the connection part between the lead frame and the metal substrate, and the part is exposed on the outside to solve the problem of glue overflow.
Realize the non -stress packaging, solve the problem of stratification layer and substrate spilling, improve the reliability and production efficiency of the semiconductor circuit, and achieve the semi -packaged structure and the full -seal structure without changing the mold vehicle without changing the mold vehicle. Seamless switch.
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Figure CN119340277A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the field of semiconductor technology, and in particular to a semiconductor circuit and a manufacturing method thereof. Background Art
[0002] The industry standard for the thickness tolerance of aluminum substrates is ±10%. Such a large tolerance makes it impossible for the aluminum substrate and the mold to achieve precise matching, resulting in overflow in semi-encapsulated semiconductor circuits.
[0003] At present, there are mainly the following solutions for preventing overflow of semi-encapsulated semiconductor circuits at home and abroad: 1. Ejector: The mold cavity plus the ejector presses the aluminum substrate through ejection, so that the aluminum substrate is tightly attached to the surface of the cavity; 2. Mechanical polishing: The surface of the aluminum substrate with overflow is mechanically polished by related polishing equipment; 3. Laser engraving: The surface of the aluminum substrate with overflow is engraved by laser equipment. These three methods will cause cracks in the insulating layer, damage the anodized layer on the surface of the metal substrate, and have low efficiency and unclean removal of overflow glue. Although the above solutions can achieve the effect of removing overflow glue, they all require the increase of equipment and personnel, which significantly increases production costs, and the stratification problem that will occur is also a major problem in the industry.
[0004] At the same time, according to the current level of the application scenario, the intelligent power modules of the same level will be designed as a semi-encapsulated structure with a back-leaking substrate and a fully-encapsulated structure with a back-leaking substrate. The semi-encapsulated structure is used to improve the heat dissipation for large currents, but it is prone to overflow. The existing technical solution for semi-encapsulated and fully-encapsulated structures is achieved by changing the sinking depth of the pins. In this case, if the two structures are to be replaced, two sets of lead frame molds, two sets of carriers (if a large number of carriers are required for turnover in mass production, the carrier cost is very high), and two sets of packaging molds are required. Based on the above, the cost of using the existing technical solution to replace the two structures is very high and the efficiency is very low.
[0005] Therefore, there is a need for a semiconductor circuit and a manufacturing method thereof that can solve the problem of insulation layer delamination, reduce substrate tolerance, and solve the problem of glue overflow between the substrate and the lead frame. Summary of the invention
[0006] The present invention aims to solve the deficiencies in the prior art and provide a semiconductor device and a manufacturing method thereof, which can solve the problems of insulating layer delamination, reduce substrate tolerance and glue overflow of substrate and lead frame.
[0007] In order to solve the above technical problems, in a first aspect, an embodiment of the present invention provides a semiconductor circuit, including:
[0008] The semiconductor circuit includes a metal substrate; a plurality of circuit components arranged at specific positions of the metal substrate; a binding metal wire for realizing electrical connection between the plurality of circuit components; a lead frame connected to the metal substrate and extending outward as an input and output; a plastic encapsulation material coated on the metal substrate, the plastic encapsulation material at least seals the connection portion between the lead frame and the metal substrate, and at least a portion of the lead frame extending outward is not sealed and exposed; a movable pin embedded in the plastic encapsulation material and pressed onto the metal substrate;
[0009] The metal substrate and the lead frame are connected via elastic warps, and the warps are used to achieve electrical connection between the metal substrate and the lead frame.
[0010] Preferably, the lift tab is compressed and solidified by a solidifying material, and the solidifying material is heated and melted to restore the elasticity of the lift tab.
[0011] Preferably, the solidified material includes one of tin, red glue and silver glue.
[0012] Preferably, the metal substrate includes a metal base material, an insulating layer, a copper foil layer and a protective layer, the insulating layer is attached to one side of the metal base material, the copper foil layer is attached to a side of the insulating layer away from the metal base material, and the protective layer is attached to a side of the copper foil layer away from the insulating layer.
[0013] Preferably, the copper foil layer is made into a circuit wiring layer by etching.
[0014] Preferably, the lead frame is made of copper alloy.
[0015] Preferably, the circuit components include chip capacitors, chip resistors and components, and the chip capacitors, chip resistors and components are respectively mounted on the metal substrate.
[0016] Preferably, the lead frame and the metal substrate are electrically connected by pin solder welding.
[0017] Preferably, the semiconductor circuit is packaged by a packaging mold, the packaging mold comprises an upper mold and a lower mold, and the semiconductor circuit is packaged by bonding the upper mold and the lower mold.
[0018] In a second aspect, the present invention further provides a method for manufacturing a semiconductor circuit, for manufacturing a semiconductor circuit including any one of the above embodiments, wherein the semiconductor manufacturing method comprises the following steps:
[0019] S1. Place the metal substrate on a special carrier by automated equipment or manually;
[0020] S2, mounting the semiconductor inverter circuit chip on the component mounting position reserved on the copper foil layer of the metal substrate by applying solder paste or applying silver glue through an automatic die bonding device;
[0021] S3, mounting the high-voltage power device on the silver-plated copper heat sink through a soft solder die-bonding machine to form a semi-finished component;
[0022] S4, using automatic SMT equipment to reduce resistance and capacity, and mount the semi-finished components on the component installation position;
[0023] S5, placing the lead frame to the corresponding welding position of the metal substrate by a robot or manually, passing the metal substrate including the special carrier through a reflow furnace, and welding all the circuit components to the corresponding mounting positions;
[0024] S6, inspecting the welding quality of the circuit components by visual inspection AOI equipment, and removing the flux and aluminum chips remaining on the metal substrate by spraying and ultrasound;
[0025] S7, electrically connecting the circuit components and the circuit wiring layer through the binding metal wires;
[0026] S8, plastic-sealing the metal substrate circuit in a specific mold by a packaging device, and then marking it by laser marking;
[0027] S9, performing post-curing stress relief treatment in a high temperature oven;
[0028] S10, the connecting ribs and dummy pins of the pins are cut and shaped into the required shapes through the rib cutting and forming equipment, and finally the electrical parameter test is performed to form the final qualified product.
[0029] Compared with the prior art, the semiconductor circuit of the present invention includes a metal substrate; a plurality of circuit components arranged at specific positions of the metal substrate; a binding metal wire for realizing electrical connection between the plurality of circuit components; a lead frame for connecting to the metal substrate and extending outward as input and output; a plastic encapsulation material coated on the metal substrate, the plastic encapsulation material at least seals the connection part between the lead frame and the metal substrate, and at least a part of the lead frame extending outward is not sealed and exposed; a movable pin embedded in the plastic encapsulation material and pressed on the metal substrate; the metal substrate and the lead frame are connected by an elastic warp, and the warp is used to realize the electrical connection between the metal substrate and the lead frame. Stress-free packaging is realized to solve the problem of insulation layer delamination in the semiconductor circuit industry and improve the reliability of the semiconductor circuit; at the same time, this process solves the problem of lead frame and substrate glue overflow while solving the stress problem. Seamless switching between semi-encapsulation structure and full-encapsulation structure can be realized without changing the mold carrier, which not only reduces the cost and improves the efficiency, but also greatly improves the flexibility of the product. BRIEF DESCRIPTION OF THE DRAWINGS
[0030] The present invention will be described in detail below in conjunction with the accompanying drawings. The above and other aspects of the present invention will become clearer and easier to understand through the detailed description made in conjunction with the following drawings. In the accompanying drawings:
[0031] Figure 1 It is a schematic diagram of the semiconductor circuit structure provided by the present invention;
[0032] Figure 2 It is a schematic diagram of the metal substrate structure of the semiconductor circuit provided by the present invention;
[0033] Figure 3 It is a schematic diagram of the chip warping structure of the semiconductor circuit provided by the present invention;
[0034] Figure 4 It is a flowchart of the semiconductor circuit manufacturing method provided by the present invention. DETAILED DESCRIPTION
[0035] The specific implementation modes / embodiments recorded herein are specific implementation modes of the present invention, which are used to illustrate the concept of the present invention, are explanatory and exemplary, and should not be interpreted as limiting the implementation modes of the present invention and the scope of the present invention. In addition to the embodiments recorded herein, those skilled in the art can also adopt other obvious technical solutions based on the contents disclosed in the claims and the specification of this application, and these technical solutions include any obvious replacement and modification of the embodiments recorded herein, which are within the protection scope of the present invention.
[0036] The specific implementation of the present invention will be described in detail below with reference to the accompanying drawings.
[0037] (Example 1)
[0038] Please refer to Figure 1-Figure 3 As shown, the present invention provides a semiconductor circuit, comprising:
[0039] Aluminum substrate 6; multiple circuit components (not shown) arranged at specific positions of the aluminum substrate 6; binding metal wires 9 for realizing electrical connection between the multiple circuit components; a lead frame 4 connected to the aluminum substrate 6 and extending outward as input and output; a plastic encapsulation material 3 coated on the aluminum substrate 6, the plastic encapsulation material 3 at least seals the connection portion between the lead frame 4 and the aluminum substrate 6, and at least a portion of the lead frame 4 extending outward is not sealed and exposed; a movable pin 2 embedded in the plastic encapsulation material 3 and pressed on the aluminum substrate 6;
[0040] The aluminum substrate 6 is connected to the lead frame 4 via an elastic lift tab 06 , and the lift tab 06 is used to achieve electrical connection between the aluminum substrate 6 and the lead frame 4 .
[0041] In the embodiment of the present invention, the lift tab 06 is compressed and solidified by the solidified material 07. After the solidified material 07 is heated and melted, the lift tab 06 recovers its elasticity. It should be noted that materials that can achieve both heating softening and restoring to room temperature curing are applicable. The solidified material 07 compresses the lift tab 06 into a cube or a column for easy welding with the pin. The material of the lift tab 06 has a certain elasticity and is conductive, and has good weldability, and can be metal materials such as copper and aluminum.
[0042] In the embodiment of the present invention, the solidified material 07 includes one of tin, red glue and silver glue.
[0043] Among them, the plastic encapsulation material 3 is a powdered molding compound made of epoxy resin as a base resin, high-performance phenolic resin as a curing agent, silicon micropowder and the like as a filler, and a variety of additives. It is extruded into the mold cavity by heat transfer molding and the semiconductor chip is embedded therein, and cross-linked and cured to form a device with a certain appearance structure; the binding metal wire 9 is any one of gold, aluminum and copper materials.
[0044] In the embodiment of the present invention, the aluminum substrate 6 includes an aluminum substrate 01, an insulating layer 02, a copper foil layer 03, and a protective layer 04. The insulating layer 02 is attached to one side of the aluminum substrate 01, the copper foil layer 03 is pressed on the side of the insulating layer 02 away from the aluminum substrate 01, and the protective layer 04 is attached to the side of the copper foil layer 03 away from the insulating layer 02. Specifically, the aluminum substrate 01 serves as a carrier of the entire internal circuit of the semiconductor circuit and plays a heat dissipation role for the entire semiconductor circuit; the insulating layer 02 is used to prevent the circuit wiring layer and the aluminum substrate 01 from being energized, resulting in short circuits and leakage risks in the internal circuit; the protective layer 04 is used to prevent tinning where it should not be tinned, increase the withstand voltage between the circuits, and prevent short circuits caused by oxidation or contamination of the circuits, and protect the circuits.
[0045] In the embodiment of the present invention, the copper foil layer 03 is etched to form a circuit to form a circuit wiring layer.
[0046] In the embodiment of the present invention, the lead frame 4 is made of copper alloy. Specifically, the material is C194 (-1 / 2H) (chemical composition: Cu (≧97.0) Fe: 2.4P: 0.03Zn: 0.12) or KFC (-1 / 2H) (chemical composition: Cu (≧99.6) Fe: 0.1 (0.05-0.15) P: 0.03 (0.025-0.04)), and a 0.5 mm copper sheet is stamped by machining to form a desired shape, and then the surface is first nickel-plated with a thickness of 0.1-0.5 um, and then tin-plated with a thickness of 2-5 um.
[0047] In the embodiment of the present invention, the circuit components include a chip capacitor 8 that performs filtering, coupling, and bootstrapping functions; a chip resistor 7 that limits the switching speed; and components 10 that constitute an internal circuit chip.
[0048] In the embodiment of the present invention, the semiconductor circuit is packaged by a packaging mold, and the packaging mold includes an upper mold 1 and a lower mold 5. The semiconductor circuit is packaged by bonding the upper mold 1 and the lower mold 5 together.
[0049] In the embodiment of the present invention, the lead frame 4 and the aluminum substrate 6 are electrically connected by soldering. Specifically, the solder is made of alloy powder and solder resist mixed in a certain proportion, and the lead frame 4 and the aluminum substrate 6 are electrically connected by soldering through high temperature reflow.
[0050] In the embodiment of the present invention, the present invention first welds and fixes the fixing column formed by the solidified material 07 and the lift tab 06 on the substrate, brushes solder paste on the exposed part of the lift tab 07 that fixes the upper surface close to the lead frame 4, and then reflows to weld the pin on the lift tab 06. At the same time, the solidified material 07 on the lift tab 06 melts at high temperature, and the lift tab 06 restores its original shape. Since the lift tab 06 is elastic, the pins of the lead frame 4 have space to move up and down. In this way, whether it is the overflow of glue and delamination caused by the welding tolerance of the semi-encapsulated structure or the sinking problem of the pins of the fully encapsulated structure, it can be solved through this activity space, and the pins and the mold are always closely fitted.
[0051] (Example 2)
[0052] like Figure 4 As shown, Figure 4 The present invention also provides a method for manufacturing a semiconductor circuit, which is used to manufacture the semiconductor circuit of the first embodiment. The method comprises the following steps:
[0053] S1, placing the metal substrate 6 on a special carrier by automated equipment or manually;
[0054] Specifically, the special carrier can be any material with a high temperature resistance of more than 200° C., including aluminum, synthetic stone, ceramics, and polyphenylene sulfide.
[0055] S2, mounting the semiconductor inverter circuit chip on the component mounting position reserved on the copper foil layer 03 of the metal substrate 6 by applying solder paste or applying silver glue through an automatic die bonding device;
[0056] S3, mounting the high-voltage power device on the silver-plated copper heat sink through a soft solder die-bonding machine to form a semi-finished component;
[0057] S4, using automatic SMT equipment to reduce resistance and capacity, and mount the semi-finished components on the component installation position;
[0058] S5, placing the lead frame to the corresponding welding position of the metal substrate 6 by a robot or manually, passing the metal substrate 6 including the special carrier through a reflow furnace, and welding all the circuit components to the corresponding mounting positions;
[0059] S6, inspecting the welding quality of the circuit components by visual inspection AOI equipment, and removing the flux and aluminum chips remaining on the metal substrate 6 by spraying and ultrasound;
[0060] S7, electrically connecting the circuit components and the circuit wiring layer through the binding metal wire 9;
[0061] S8, plastic-sealing the metal substrate 6 circuit in a specific mold by a packaging device, and then marking it by laser marking;
[0062] S9, performing post-curing stress relief treatment in a high temperature oven;
[0063] S10, the connecting ribs and dummy pins of the pins are cut and shaped into the required shapes through the rib cutting and forming equipment, and finally the electrical parameter test is performed to form the final qualified product.
[0064] Compared with the prior art, the semiconductor circuit of the present invention includes a metal substrate; a plurality of circuit components arranged at specific positions of the metal substrate; a binding metal wire for realizing electrical connection between the plurality of circuit components; a lead frame for connecting to the metal substrate and extending outward as input and output; a plastic encapsulation material coated on the metal substrate, the plastic encapsulation material at least seals the connection part between the lead frame and the metal substrate, and at least a part of the lead frame extending outward is not sealed and exposed; a movable pin embedded in the plastic encapsulation material and pressed on the metal substrate; the metal substrate and the lead frame are connected by an elastic warp, and the warp is used to realize the electrical connection between the metal substrate and the lead frame. Stress-free packaging is realized to solve the problem of insulation layer delamination in the semiconductor circuit industry and improve the reliability of the semiconductor circuit; at the same time, this process solves the problem of lead frame and substrate glue overflow while solving the stress problem. Seamless switching between semi-encapsulation structure and full-encapsulation structure can be realized without changing the mold carrier, which not only reduces the cost and improves the efficiency, but also greatly improves the flexibility of the product.
[0065] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. For those skilled in the art, the present invention may have various modifications and variations. Any modification, equivalent substitution, improvement, etc. made within the spirit and principle of the present invention shall be included in the scope of the claims of the present invention.
Claims
1. A semiconductor circuit, characterized in that: The semiconductor circuit includes a metal substrate; a plurality of circuit components arranged at specific positions of the metal substrate; a binding metal wire for realizing electrical connection between the plurality of circuit components; and a lead frame for connecting to the metal substrate and extending outward as an input and output; A plastic encapsulation material coated on the metal substrate, wherein the plastic encapsulation material at least seals the connection portion between the lead frame and the metal substrate, and at least a portion of the lead frame extending outward is not sealed and is exposed; a movable pin embedded in the plastic encapsulation material and pressed onto the metal substrate; The metal substrate and the lead frame are connected via elastic warps, and the warps are used to achieve electrical connection between the metal substrate and the lead frame.
2. The semiconductor circuit according to claim 1, wherein: The lift tab is compressed and solidified by a solidified material, and the solidified material is heated and melted to restore the elasticity of the lift tab.
3. The semiconductor circuit according to claim 2, wherein: The solidified material includes one of tin, red glue and silver glue.
4. The semiconductor circuit according to claim 1, wherein: The metal substrate includes a metal base material, an insulating layer, a copper foil layer and a protective layer. The insulating layer is attached to one side of the metal base material, the copper foil layer is attached to a side of the insulating layer away from the metal base material, and the protective layer is attached to a side of the copper foil layer away from the insulating layer.
5. The semiconductor circuit according to claim 4, wherein: The copper foil layer is made into a circuit wiring layer by etching.
6. The semiconductor circuit according to claim 1, wherein: The lead frame is made of copper alloy.
7. The semiconductor circuit according to claim 1, wherein: The circuit components include chip capacitors, chip resistors and components, and the chip capacitors, chip resistors and components are respectively mounted on the metal substrate.
8. The semiconductor circuit according to claim 1, wherein: The lead frame and the metal substrate are electrically connected by soldering with pins.
9. The semiconductor circuit according to claim 1, wherein: The semiconductor circuit is packaged by a packaging mold, and the packaging mold includes an upper mold and a lower mold. The semiconductor circuit is packaged by bonding the upper mold and the lower mold.
10. A method for manufacturing a semiconductor circuit using any one of claims 1 to 9, characterized in that: The manufacturing method comprises the following steps: S1. Place the metal substrate on a special carrier by automated equipment or manually; S2, mounting the semiconductor inverter circuit chip on the component mounting position reserved on the copper foil layer of the metal substrate by applying solder paste or applying silver glue through an automatic die bonding device; S3, mounting the high-voltage power device on the silver-plated copper heat sink through a soft solder die-bonding machine to form a semi-finished component; S4, using automatic SMT equipment to reduce resistance and capacity, and mount the semi-finished components on the component installation position; S5, placing the lead frame to the corresponding welding position of the metal substrate by a robot or manually, passing the metal substrate including the special carrier through a reflow furnace, and welding all the circuit components to the corresponding mounting positions; S6, inspecting the welding quality of the circuit components by visual inspection AOI equipment, and removing the flux and aluminum chips remaining on the metal substrate by spraying and ultrasound; S7, electrically connecting the circuit components and the circuit wiring layer through the binding metal wires; S8, plastic-sealing the metal substrate circuit in a specific mold by a packaging device, and then marking it by laser marking; S9, performing post-curing stress relief treatment in a high temperature oven; S10, the connecting ribs and dummy pins of the pins are cut and shaped into the required shapes through the rib cutting and forming equipment, and finally the electrical parameter test is performed to form the final qualified product.