Clock signal generator for generating reference signal and clock signal, system having such clock signal generator, and method for synchronizing plurality of participants in system

By designing a clock signal generator for generating reference signals and clock signals, the problem of difficult-to-control load interference in the microwave signal generator system is solved, and synchronization and stability improvement among system participants are achieved.

CN119343871APending Publication Date: 2025-01-21TRUMPF PATENTABTEILUNG
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Patent Information

Application Number
CN202380043525.0
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Priority Date
2022-05-30
Filing Date
2023-05-25
Publication Date
2025-01-21

AI Technical Summary

Technical Problem

In systems with multiple microwave signal generators and microwave solid-state power amplifier modules, difficult-to-control and difficult to reproduce interference often occurs in the load.

Method used

Design a clock signal generator to generate reference signals and clock signals. Through the reference signal generator and frequency splitter component, the clock signal below the reference frequency is generated for multiple participants in the synchronization system.

Benefits of technology

Through the use of a clock signal generator, interference in the load can be better controlled and reproduced, synchronization in frequency, time and phase between system participants can be achieved, and the stability and reliability of the system can be improved.

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Abstract

In a clock signal generator (10) for generating a reference signal (144) and a clock signal (142) for a plurality of microwave signal generators, in particular microwave solid-state power amplifier modules, the clock signal generator has a. A reference signal generator (12) for generating a reference signal (144), preferably 30 MHz, with a reference frequency, for example in the range of 1 to 50 MHz, b. A frequency divider assembly (20) for dividing the reference signal (144), preferably 30 MHz, from the reference signal generator (12) to the frequency divider assembly (20), the frequency divider assembly is connected to the reference signal generator in such a way that the frequency divider assembly can be fed with a reference signal (144) and the frequency divider assembly is configured to generate a clock signal (142) having a clock signal frequency lower than a reference frequency from the reference signal (144), c. At least one signal output (16, 30), a reference signal (144) and / or a clock signal (142) is output at the at least one signal output. A system (100) having such a clock signal generator (10) and a method for synchronizing a plurality of system participants (106, 108, 110, 112) in such a system (100) are also disclosed. As such, interference in the load is better controllable and reproducible.
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Description

[0001] The invention relates to a clock signal generator for generating a reference signal and a clock signal, a system having a clock signal generator according to the invention, and a method for synchronizing a plurality of participants in a system.

[0002] Problems often arise with systems having a plurality of microwave signal generators, in particular microwave solid-state power amplifier modules, where these generators and / or modules are commonly connected to a load in which interferences often occur that are difficult to control and reproduce.

[0003] Here, a microwave solid-state power amplifier module refers to an electronic amplifier suitable for amplifying a microwave signal with a lower power into a microwave signal with a higher success rate. Here, the electronic amplifier has a solid state as an amplifying element, especially a semiconductor solid state, such as a transistor. The transistor can be, for example, a HEMT, a MOSFET or an LDMOS transistor or a transistor based on GaN or SiC. In microwave technology, this term is used to distinguish from conventional non-solid-state based amplifier types, such as electron tube amplifiers and / or magnetron amplifiers, which are obviously imprecisely controlled in terms of power and frequency and have high losses. Such a microwave solid-state power amplifier is described as a "solid-state microwave power amplifier" or a "solid-state microwave power generator" in, for example, US 9,595,930 B2 or US 11,222,770 B2.

[0004] The object of the present invention is to provide a possibility for making interference in the load more controllable and reproducible.

[0005] According to the present invention, the object is achieved by a clock signal generator, which is used to generate reference signals and clock signals for multiple microwave signal generators, especially microwave solid-state power amplifier modules, wherein the clock signal generator has:

[0006] a. a reference signal generator for generating a reference signal having a reference frequency in the range of 1 MHz to 50 MHz, preferably 30 MHz,

[0007] b. a frequency divider component connected to the reference signal generator in such a way that the frequency divider component can be fed with the reference signal and is configured to generate a clock signal having a clock signal frequency lower than the reference frequency from the reference signal,

[0008] c. At least one signal output terminal, at which a reference signal and / or a clock signal is output.

[0009] From the reference signal with the reference frequency, a phase-coupled clock signal with a significantly lower clock signal frequency can be derived. The clock signal can be used to synchronize system participants located downstream of the clock signal generator. Using the reference signal generated by the signal generator, the system participants can, for example, generate microwave signals of the same frequency. It is thus possible to generate signals in the system participants that are fixedly and reproducibly synchronized in frequency, time and phase. In the system participants, an offset can be specified for each parameter.

[0010] Here, the microwave signal (also referred to as MW signal for short) refers to a signal with a frequency of 300 MHz to 20 GHz.

[0011] A microwave signal generator refers to a signal generator designed to generate such a MW signal.

[0012] Here, a pulsed microwave signal refers to a microwave signal that is pulsed. The pulse can be very short here. Here, "very short" refers to a pulse in the range of 10ns to 500ns. The pulse can especially be in the range of 10ns to 40ns, preferably in the range of 15ns to 30ns. Therefore, the pulse is shorter in time than most time constants for the recombination of ions and electrons. Particularly short pulses are especially important for the generation of "non-equilibrium plasma" or "non-thermal plasma" or "cold plasma" and all processes in which such plasmas are applied. These plasma forms are characterized in that electrons can follow the field, while ionized atomic nuclei cannot follow rapid field changes. The plasma remains "cold". Here, it is necessary that the pulse is shorter in time than the time constant for the recombination of ions and electrons. This time constant depends on many influencing variables, such as pressure, temperature or the element type of the ionized atoms themselves.

[0013] In addition, a single pulse may have a rise time and / or fall time of ≤10 ns. Thus, the pulse has a sufficiently strong intensity required to generate plasma.

[0014] The pulses can in particular be multi-level, ie pulsed between at least two power values, at least one of the at least two power values ​​being not equal to zero, wherein in particular both values ​​are not equal to zero. This will be described further below.

[0015] Here, a clock signal is an electrical signal with a preset clock pulse. The clock pulse can have a frequency in the range of 1 kHz to 500 kHz, in particular in the range of 1 kHz to 50 kHz, particularly preferably in the range of 10 kHz. The clock signal can have different shapes, for example, it can be sinusoidal or rectangular. It can be pulse width modulated.

[0016] Here, a signal generator refers to a structural element designed to output a preset, especially adjustable electrical signal. The electrical signal can have different shapes, for example, it can be sinusoidal or rectangular. It can be pulse width modulated.

[0017] In this case, a frequency divider component is understood to be a component which is designed to process an incoming signal and to output at its output a signal having a lower frequency, in particular a frequency which is reduced by a predeterminable factor.

[0018] It is particularly advantageous if the reference signal and the clock signal are output at the same signal output, so that the two signals can be transmitted on a common line and distributed to all system participants.

[0019] A first filter, in particular a bandpass filter, can be arranged between the reference signal generator and the signal output. By means of the bandpass filter, interferences reaching the signal generator caused by external signals or other signals of the clock signal generator can be reduced. In this context, a filter is an (usually passive) electrical circuit that changes the amplitude and phase position of an electrical signal as a function of the frequency. Unwanted signal components can thereby be attenuated or suppressed. In this context, a bandpass filter is a filter that attenuates electrical signals above and below a frequency range referred to as a frequency band.

[0020] A second filter, in particular a low-pass filter, can be provided between the frequency divider component and the signal output. The second filter can prevent external interference signals or other signals of the clock signal generator from reaching the frequency divider component. Here, a low-pass filter refers to a filter that attenuates electrical signals with a frequency higher than a preset frequency.

[0021] A particularly simple design of the reference signal generator results if the reference signal generator is designed as an oscillator or has such an oscillator.

[0022] The frequency divider assembly may have a plurality of cascaded frequency dividers. Thus, a clock signal having a frequency significantly lower than the reference signal may be generated. The clock signal frequency may be more than 10 times, preferably more than 100 times, and in particular more than 1000 times lower than the reference frequency.

[0023] In particular, the clock signal frequency can be divided until the clock signal cycle time is significantly greater than the maximum possible jitter or time offset in digital communication in a system with multiple participants. The time offset in real-time communication systems can also be below the nanosecond level. In other communication systems, the time offset can also be several seconds.

[0024] Advantageously, the frequency divider assembly can have an adjustable frequency divider, so that the clock signal frequency can be adjusted and does not have to be fixedly preset.

[0025] A carrier signal generator may be provided, which is configured to generate a carrier signal having a carrier frequency which is higher than a reference frequency, wherein a modulator is provided which is fed with a clock signal and a signal having the carrier frequency and is configured to modulate the signal having the carrier frequency with the clock signal.

[0026] The term "modulation" describes a process in which the useful signal to be transmitted changes the so-called carrier wave, or in other words: modulates it. This allows high-frequency transmission of low-frequency useful signals. Within the range of the carrier frequency, the transmitted signal occupies a bandwidth that depends on the useful signal. The message is restored again on the receiving side by a demodulator.

[0027] The modulated signal can be output at a signal output. The modulated signal contains frequency and time information. The modulated signal can be demodulated in the system participant, so that the clock signal is available again. Since the clock signal is generated from the reference signal, there is a fixed phase relationship between the reference signal and the clock signal. Therefore, system participants, in particular those system participants designed as solid-state power generators that receive the clock signal and the reference signal, can generate microwave signals that have a reproducibly fixed phase relationship with each other.

[0028] A filter, in particular a high-pass filter, can be provided between the modulator and the signal output terminal. In this way, interference of external signals or other signals of the clock signal generator on the modulator can be reduced. Here, a high-pass filter refers to a filter that attenuates electrical signals with a frequency lower than a preset frequency.

[0029] Another aspect of the invention relates to a system having a clock signal generator according to the invention, wherein the clock signal generator is connected to a splitter, which in turn is connected to a plurality of system participants and feeds the output signal of the clock signal generator to these system participants. Here, a splitter refers to a (usually passive) electronic circuit component configured to distribute a signal to a plurality of output terminals. In particular, both a reference signal and a clock signal can be fed to the system participants. The system participants can be, for example, microwave solid-state generators of the same or different power levels and / or the same or different frequency ranges. However, other system participants, such as measuring devices or cameras, are also conceivable. All system participants can be synchronized via a clock signal.

[0030] At least one system participant may have a microwave signal generator to which the reference signal is fed. For example, the microwave signal generator may generate a signal with a higher frequency based on the reference signal. For example, a microwave signal with a frequency of 2,400 MHz to 2,500 MHz may be generated from a 30 MHz reference signal.

[0031] At least one system participant can have a synchronization circuit to which a clock signal is fed. The synchronization circuit can in turn control a microwave signal generator to which a reference signal is fed. This arrangement can be provided in a plurality of system participants so that microwave signals synchronized in time, phase and frequency can be generated by a plurality of system participants. A synchronization circuit is hereby understood to be an electronic circuit component configured to synchronize a plurality of signals. For this purpose, a variety of circuits are known which usually have a triggerable clock signal generator.

[0032] The microwave signal generator may have a phase-locked loop (also called Phase-Locked-Loop, PLL), wherein the synchronization circuit is connected to the phase-locked loop.

[0033] The microwave signal generator may have an oscillator and thus generate a MW signal even without synchronization.

[0034] The output signal of the synchronization circuit can be fed to multiple components of the system participants. For example, the synchronization circuit can be connected to the following module: the microwave signal generated by the microwave signal generator is also fed to this module. Pulse microwave signals can be generated by this module. In particular, multi-level pulse microwave signals can be generated.

[0035] In particular, the pulses or power changes of all generators in the system are thereby synchronized in time.

[0036] It can also be fed to the module generating the MW signal and thus enable a time-synchronized frequency variation of all generators participating in the system.

[0037] The invention also relates to a method for synchronizing a plurality of participants in a system, in which method

[0038] a. Generate a reference signal,

[0039] b. Generate a clock signal related to the reference signal,

[0040] c. Feed at least a clock signal to multiple system participants.

[0041] Thus, multiple system participants can be synchronized by the clock signal. In addition, a reference signal can be fed to multiple system participants. When these system participants are microwave solid-state power generators, the reference frequency can be used to generate the microwave frequency. When instructions or information for executing functions arrive at the system participants with a time offset, the clock signal can synchronize the functions with strict timing requirements. The synchronous execution of instructions can be ensured by the clock signal. Therefore, the microwave signal is time-synchronized. For example, the phase-locked loops in all microwave solid-state power generators can be controlled in a time-synchronized manner.

[0042] In particular, due to the fixed phase relationship between the reference signal and the clock signal, a plurality of microwave solid-state power generators can thus generate microwave signals having a reproducibly fixed phase relationship.

[0043] It can be checked whether any system participants have been restarted or added. If this is the case, a synchronization can be performed.

[0044] The clock signal can be generated from the reference signal by means of frequency division, so that the clock signal and the reference signal are phase-synchronized.

[0045] As described above, in at least two system participants, a signal having a frequency higher than the frequency of the reference signal can be generated based on the reference signal and the clock signal. In particular, a synchronized signal can be generated in this way.

[0046] The individual system participants can constructively add their power. As a result, the system design is simpler, since standard modules can be used. Power generation can take place where it is needed, and energy transmission losses and energy lines as well as power distributors can be saved. Distributed systems with multiple smaller distributed modules are possible.

[0047] By means of a fixed, reproducible phase relationship, almost any interference pattern can be achieved. Very fast pulse width modulation is possible.

[0048] By synchronizing multiple system participants, the system participants can be placed at greater spatial distances. In this case, the high frequency is generated from a common low-frequency reference frequency. As a result, there is no need to distribute the high-frequency signal. Therefore, there is no need to use low-loss and therefore expensive cable connections and components for signal distribution. Low-frequency signals have lower cable losses and are easier to handle. Attenuation losses do not affect the output power. Length differences in the wiring have little influence. It is possible to synchronize solid-state power generators at different frequencies. These solid-state power generators can be synchronized with other devices. Radiation and irradiation into the cables are less important.

[0049] The number of solid-state power generators used is easily scalable. Through phase synchronization, time-consuming coordination of the individual devices is not necessary or only required once during installation. This results in time savings in the target application as well as more accurate, reproducible control and thus power savings.

[0050] Further features and advantages of the invention are apparent from the following detailed description of embodiments of the invention with the aid of the accompanying drawings, which show essential details of the invention, and from the claims. The features shown therein are presented to make the features according to the invention clear. In variants of the invention, the individual features can be implemented individually or in any combination of a plurality of features.

[0051] Exemplary embodiments of the invention are illustrated in the schematic drawings and are explained in more detail in the following description.

[0052] In the attached picture:

[0053] Figure 1 A schematic diagram showing a first embodiment of a clock signal generator;

[0054] Figure 2 A schematic diagram showing a second embodiment of a clock signal generator;

[0055] Figure 3 showing a system with multiple system participants; and

[0056] Figure 4 Diagram showing system participants.

[0057] Figure 1 A clock signal generator 10 is shown, which has a signal generator 12. The signal generator 12 can be designed to generate a reference signal 144. The signal generator 12 can have an oscillator or be designed as such an oscillator. The reference signal 144 is transmitted to the signal output 16 via a filter 14, which is especially designed as a bandpass filter. Upstream of the filter 14, an isolation amplifier 21 can optionally also be provided.

[0058] However, the reference signal 144 can also be fed to the divider assembly 20 via the splitter 18. In the embodiment shown, the divider assembly 20 has two dividers 22, 24 with a fixed division ratio. Furthermore, an adjustable divider 26 with an adjustable division ratio is provided in the cascade of the dividers.

[0059] Optionally, instead of the signal generator 12, the reference signal 144 can also be fed to the divider component 20 and / or the signal output 16 by an external source via the interface 17. The desired signal, i.e. the reference signal from the signal generator 12 or the reference signal from the interface 17, can be selected by means of an especially controllable selection unit 19. The selection unit 19 can be designed as a switching element, in particular as an electronically controllable semiconductor switch.

[0060] By means of the frequency divider component 20, a clock signal 142 is generated. In a first embodiment, the clock signal 142 is transmitted to the signal output 30 via a filter 28, which is in particular designed as a low-pass filter. However, it is preferred that the clock signal 142 is also transmitted to the signal output 16 via the filter 28 and output there, so that the reference signal and the clock signal can be transmitted on the same signal line. Upstream of the filter 28, an isolation amplifier 31 can optionally also be provided.

[0061] Furthermore, a modulator 32 can be provided, to which a clock signal 142 and a carrier signal generated by a carrier signal generator 34 are fed. In this case, it can be provided that the reference signal generator 12 generates a reference signal with a certain reference frequency. The clock signal 142 has a clock signal frequency that is lower than the reference frequency. The carrier signal generator 34 can generate a signal whose carrier frequency is higher than the reference frequency of the reference signal 144. By means of the modulator 32, the signal of the signal generator 34 can be modulated with the clock signal. The modulated signal can also be transmitted to the signal output 16 and / or also the signal output 30 via a filter 36, which is designed in particular as a high-pass filter.

[0062] Upstream of the filter 36 , an isolating amplifier 33 may optionally also be provided.

[0063] Optionally, an isolation amplifier 35 may be provided between the carrier signal generator 34 and the modulator 32 .

[0064] The isolation amplifiers 21, 31, 33, 35 are used to relieve the load of the upstream signal generators. To this end, they provide a higher input impedance for these signal generators and only load these signal generators to a small extent. However, components (such as filters) located downstream of the isolation amplifiers 21, 31, 33, 35 can be provided with a signal source that can provide sufficient power. Therefore, the downstream components themselves can be designed to have significantly lower impedance and, for example, can better achieve filtering characteristics.

[0065] Figure 2 A system 100 is shown, which has a clock signal generator 10. A clock signal and a reference signal are output via the clock signal generator 10 on a line 102. The clock signal and the reference signal arrive at a splitter 104, to which a plurality of system participants 106, 108, 110, 112 are connected. Via the splitter 104, a clock signal 142 and a reference signal 144 are fed to the system participants 106, 108, 110, 112. The clock signal 142 is fed as a modulated signal if necessary.

[0066] System participants 106, 108, 110, 112 may be connected to a common load 114. For example, system participants 106, 108 may be designed as microwave solid-state power generators that output microwave signals with a frequency of 2.45 GHz. For example, system participant 110 may be designed as a microwave solid-state power generator that provides microwave signals with a frequency of 10 GHz. System participant 112 may be designed as a camera.

[0067] Since the participants 106, 108, 110, 112 (particularly participants 106, 108, 110) are fed with clock signal 142 and reference signal 144, microwave signals stably coupled in frequency, phase and time can be present at the outputs of these participants. Interference in load 114 can thus be reproduced and controlled.

[0068] Figure 3 An alternative illustration of system 100 is shown, with system participant 106 shown in detail.

[0069] The reference signal and the clock signal are first fed to a frequency divider network 120. The frequency divider network 120 supplies the reference signal to a microwave signal generator 122, which generates a signal with a higher frequency based on the reference signal.

[0070] Furthermore, the frequency division network 120 supplies the clock signal to a synchronization circuit 124. If the clock signal is transmitted as a modulated signal, an optional demodulator 126 can be provided in which the signal is demodulated and the clock signal is recovered.

[0071] The synchronization circuit 124 is also connected to the microwave signal generator 122 and ensures that the microwave signal is generated at a predetermined time point determined by the clock signal. The synchronization circuit 124 can also be connected to a module 128, by which the microwave signal of the microwave signal generator 122 can be pulsed or its amplitude modulated. If necessary, multi-level pulse microwave signals can be generated. The pulse microwave signal can be fed to the solid-state amplifier 130. For example, in the application DE 102022113502.0 entitled "Module and method for generating a pulsed microwave output signal", an embodiment of such a module for generating a pulsed microwave output signal is described, in particular with reference numerals 10 or 10.1. Reference is made to the content of this patent application, and its disclosure is supplementary to the present application.

[0072] The microwave signal generator 122 and the module 128 may be controlled by a controller, in particular a digital controller 132 .

[0073] The microwave signal generator 122 may have an oscillator and a phase-locked loop 123 , wherein in particular the signal of the synchronization circuit 124 may be fed to the phase-locked loop 123 .

[0074] Figure 4 At 140, a situation is shown in which the communication and control instructions at different system participants are not synchronized with each other, but arrive with jitter or time offset. The microwave signals started by the microwave signal generators 122 of the system participants 106, 108, 110 by such time-shifted instructions are usually not synchronized. Reference numeral 142 represents a clock signal generated by the clock signal generator 10. By executing the instructions that arrive in a time-shifted manner at the time point of the edge of the arrival of the clock signal, the instructions of all participants are executed synchronously. For this purpose, the time interval between the two edges of the clock signal needs to be significantly greater than the maximum jitter that is usually possible during communication. In this way, a faster clock beat can be selected for a communication link or communication standard or communication line with less jitter. A lower clock signal frequency can also be set for a poor communication channel. Thus, all generators can generate MW pulses simultaneously, which can then be constructively superimposed in the load. Reference numeral 144 represents a reference signal generated by the clock signal generator 10. Since the clock signal 142 is generated based on the reference signal 144, these signals are phase-synchronized.

[0075] The phase-locked loops 123 of the microwave signal generators 122 of the different system participants 106, 108, 110 are synchronized by the clock signal 142. This ensures that the signals generated in the microwave signal generators 122 are started at the same point in time and are therefore coupled in frequency, phase and time. In particular, the PLLs are not only started simultaneously. Instead, the PLLs are all and each time started at the same reference signal phase, because the clock beat and the reference are completely phase-locked, because they are derived from each other. Therefore, the MW signals can also be started in a reproducible and reliable manner at the same phase. Then, the microwave signal 146 is generated, for example, by the system participant 106, and the microwave signal 148 is generated, for example, by the system participant 108. The microwave signals of all microwave solid-state power generators are frequency-coupled, because they all use the same reference frequency. These microwave signals are phase-identical, because all microwave signals are started simultaneously at the edge of the clock signal 142. The phase relationship is always the same, because the clock signal 142 is derived from the reference signal 144 and is therefore phase-fixed. Thus, a reproducible constructive superposition of microwave signals from a plurality of solid-state power generators can be achieved in the load.

Claims

1. A clock signal generator (10) for generating a reference signal (144) and a clock signal (142) for a plurality of microwave signal generators, in particular microwave solid-state power amplifier modules, wherein the clock signal generator comprises: a. a reference signal generator (12) for generating a reference signal (144) having a reference frequency in the range of 1 MHz to 50 MHz, preferably 30 MHz, b. a frequency divider component (20) connected to the reference signal generator in such a way that the frequency divider component (20) can be fed with the reference signal (144) and is configured to generate a clock signal (142) having a clock signal frequency lower than the reference frequency from the reference signal (144), c. At least one signal output terminal (16, 30), at which the reference signal (144) and / or the clock signal (142) are output.

2. The clock signal generator according to claim 1, characterized in that The reference signal (144) and the clock signal (142) are output at the same signal output terminal (16).

3. The clock signal generator according to claim 1, characterized in that A first filter (14), in particular a bandpass filter, is arranged between the reference signal generator (12) and the signal output (16).

4. The clock signal generator according to claim 1, characterized in that A second filter (28), in particular a low-pass filter, is arranged between the frequency divider component (20) and the signal output (16, 30).

5. The clock signal generator according to claim 1, characterized in that The reference signal generator (12) is designed as an oscillator or comprises such an oscillator.

6. The clock signal generator according to claim 1, characterized in that The frequency divider assembly (20) has an adjustable frequency divider (26).

7. The clock signal generator according to claim 1, characterized in that A carrier signal generator (34) is provided, which is configured to generate a carrier signal having a carrier frequency, which is higher than the reference frequency, wherein a modulator (32) is provided, which is fed with the clock signal (142) and the signal having the carrier frequency and is configured to modulate the signal of the carrier frequency with the clock signal (142).

8. The clock signal generator according to claim 1, characterized in that A filter (36), in particular a high-pass filter, is arranged between the modulator (32) and the signal output (16).

9. A system (100) comprising a clock signal generator (10) according to one of the preceding claims, characterized in that The clock signal generator (10) is connected to a splitter (104), which in turn is connected to a plurality of system participants (106, 108, 110, 112) and feeds the output signal of the clock signal generator (10) to the system participants (106, 108, 110, 112).

10. The system according to claim 9, characterized in that At least one system participant (106) has a synchronization circuit (124) to which the clock signal (142) is fed.

11. The system according to claim 9 or 10, characterized in that: At least one system participant (106) has a microwave signal generator (122), to which the reference signal (144) is fed.

12. The system according to claim 11, characterized in that The microwave signal generator (122) has an oscillator and a phase-locked loop (123), wherein the synchronization circuit (124) is connected to the phase-locked loop (123).

13. System according to any one of the preceding claims 10 to 12, characterized in that The output signal of the synchronization circuit (124) is fed to a plurality of components of the system participant (106).

14. A method for synchronizing a plurality of system participants (106, 108, 110, 112) in a system (100), wherein a. generating a reference signal (144), b. generating a clock signal (142) related to the reference signal (144), c. Feeding at least the clock signal (142) to a plurality of system participants (106, 108, 110, 112).

15. The method according to claim 14, characterized in that The reference signal (144) is fed to a plurality of system participants (106, 108, 110, 112).

16. The method according to any one of the preceding claims 14 or 15, characterized in that The clock signal (142) is generated from the reference signal (144) by means of frequency division.

17. The method according to any one of the preceding claims 14 to 16, characterized in that In at least two system participants (106, 108, 110), a signal having a frequency higher than a frequency of the reference signal (144) is generated based on the reference signal (144) and the clock signal (142).

Citation Information

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