Silicon wafer testing methods, systems, equipment, and silicon wafer processing methods

Abstract

This disclosure provides a silicon wafer testing method, system, equipment, and silicon wafer processing method. The silicon wafer testing method includes: measuring each silicon wafer individually based on first preset measurement parameters to obtain the wafer's specifications, including at least one of particulate contamination degree, edge integrity, surface flatness, nano-morphology, and wafer thickness; determining whether the specifications meet a first target threshold corresponding to a first target level; if the determination result is that the specifications do not meet the first target threshold, performing a simulation test on the silicon wafer based on the specifications to predict whether the predicted specifications meet a second target threshold corresponding to a second target level under second preset measurement parameters; if the prediction result is that the predicted specifications do not meet the second target threshold, reworking or scrapping the silicon wafer. The silicon wafer testing method, system, equipment, and silicon wafer processing method disclosed herein improve equipment capacity and effective utilization rate.

Description

Technical Field

[0001] This invention relates to the field of semiconductor technology, and in particular to a silicon wafer testing method, system, equipment, and silicon wafer processing method. Background Technology

[0002] In the semiconductor industry, silicon wafers are classified according to their product grade. For example, silicon wafers can be classified from high grade to low grade as Prime wafers, Test wafers, Monitor wafers, and Dummy wafers. The higher the grade of the silicon wafer, the better its flatness, thickness, and nanoscale morphology.

[0003] Typically, silicon wafers undergo a testing process to assess parameters such as flatness, thickness, and nanoscale morphology, sorting them to those that meet specified grades. Wafers that do not meet specifications are either reworked (Re-Double Side Polish, Re-DSP) or rejected. Rework is time-consuming and labor-intensive, and the success rate of recovery is low.

[0004] For such silicon wafers, a downgrading process is typically adopted. For example, high-quality silicon wafers are downgraded to test silicon wafers, test silicon wafers are downgraded to monitoring silicon wafers, and monitoring silicon wafers are downgraded to blank silicon wafers. However, because the testing requirements and methods differ for different silicon wafers, some downgraded silicon wafers need to be retested after downgrading, affecting equipment capacity and effective utilization rate. Summary of the Invention

[0005] This disclosure provides a silicon wafer testing method, system, equipment, and silicon wafer processing method, which can improve equipment capacity and effective utilization rate.

[0006] The technical solutions provided in this disclosure are as follows:

[0007] In a first aspect, embodiments of this disclosure provide a silicon wafer testing method, including:

[0008] Based on the first preset measurement parameters, the silicon wafers are measured one by one to obtain the specifications of the silicon wafers. The specifications include at least one of the following: particulate contamination degree, edge integrity, surface flatness, nano-morphology and silicon wafer thickness.

[0009] Determine whether the specification parameters have reached the first target threshold corresponding to the first target level;

[0010] If the determination result is that the specification parameters do not reach the first target threshold, the silicon wafer is simulated and tested based on the specification parameters to predict whether the predicted specification parameters of the silicon wafer under the second preset measurement parameters reach the second target threshold corresponding to the second target level, wherein the second target level is lower than the first target level.

[0011] If the prediction result indicates that the predicted specification parameters do not reach the second target threshold, the silicon wafer will be reworked or scrapped.

[0012] For example, the step of simulating the test on the silicon wafer based on the specification parameters to predict whether the predicted specification parameters of the silicon wafer under the second preset measurement parameters reach the second target threshold corresponding to the second target level specifically includes:

[0013] The correspondence between preset measurement parameters and target thresholds for different target levels is stored in advance;

[0014] Based on the correspondence, and using the specification parameters, the first preset measurement parameters, and the second preset measurement parameters corresponding to the test after the silicon wafer is downgraded to the second target level, the simulated specification parameters of the silicon wafer after being downgraded to the second target level are obtained.

[0015] The simulated specification parameters are compared with the second target threshold to obtain the prediction result.

[0016] For example, the method further includes:

[0017] If the prediction result indicates that the predicted specification parameters reach the second target threshold, the silicon wafer is pre-downgraded, and the silicon wafer is subjected to a corresponding downgraded simulation test.

[0018] For example, the pre-degradation process of the silicon wafer and the corresponding post-degradation simulation test of the silicon wafer specifically include:

[0019] Stores the specifications of all silicon wafers;

[0020] Based on the silicon wafer's identification code, the corresponding specification parameters of the silicon wafer are retrieved from the specification data of all silicon wafers.

[0021] The retrieved specifications are used as the data to be tested.

[0022] The data to be tested is simulated using a silicon wafer analysis system to determine its grade.

[0023] If the result of the grade determination of the test data is that the grade of the silicon wafer reaches the second target grade, the silicon wafer is determined to belong to the second target grade;

[0024] If the result of the grade determination of the test data is that the grade of the silicon wafer does not reach the second target grade, the silicon wafer will be reworked or scrapped.

[0025] Secondly, embodiments of this disclosure also provide a silicon wafer testing system, comprising:

[0026] A silicon wafer measuring device is used to measure silicon wafers based on preset measurement parameters for different target grades of silicon wafers in order to obtain the specifications of the silicon wafers.

[0027] Silicon wafer simulation analysis device, used for:

[0028] Based on the specification parameters, determine whether the specification parameters have reached the first target threshold corresponding to the first target level;

[0029] If the determination result is that the specification parameters do not reach the first target threshold, the silicon wafer is simulated and tested based on the specification parameters to predict whether the predicted specification parameters of the silicon wafer under the second preset measurement parameters reach the second target threshold corresponding to the second target level, wherein the second target level is lower than the first target level.

[0030] If the prediction result indicates that the predicted specification parameter does not reach the second target threshold, a first analysis result is generated that indicates the silicon wafer should be reworked or scrapped.

[0031] For example, the silicon wafer simulation analysis device is specifically used for:

[0032] The correspondence between preset measurement parameters and target thresholds for different target levels is stored in advance;

[0033] Based on the correspondence, and using the specification parameters, the first preset measurement parameters, and the second preset measurement parameters corresponding to the test after the silicon wafer is downgraded to the second target level, the simulated specification parameters of the silicon wafer after being downgraded to the second target level are obtained.

[0034] The simulated specification parameters are compared with the second target threshold to obtain the prediction result.

[0035] For example, the silicon wafer simulation analysis device is further used for:

[0036] If the prediction result indicates that the predicted specification parameters reach the second target threshold, the silicon wafer is pre-downgraded, and the silicon wafer is subjected to a corresponding downgraded simulation test.

[0037] For example, the silicon wafer simulation analysis device is further used for:

[0038] Stores the specifications of all silicon wafers;

[0039] Based on the silicon wafer's identification code, the corresponding specification parameters of the silicon wafer are retrieved from the specification data of all silicon wafers.

[0040] The retrieved specifications are used as the data to be tested.

[0041] The data to be tested is simulated using a silicon wafer analysis system to determine its grade.

[0042] If the result of the grade determination of the test data is that the grade of the silicon wafer reaches the second target grade, the silicon wafer is determined to belong to the second target grade;

[0043] If the result of the grade determination of the test data is that the grade of the silicon wafer does not reach the second target grade, the silicon wafer will be reworked or scrapped.

[0044] Thirdly, embodiments of this disclosure also provide a computing device, the computing device comprising: a processor and a memory; the processor being configured to execute instructions stored in the memory to implement the silicon wafer testing method as described above.

[0045] Fourthly, embodiments of this disclosure also provide a silicon wafer processing method, the method comprising:

[0046] Multiple silicon wafers are obtained by processing silicon wafers using a predetermined method.

[0047] For each of the plurality of silicon wafers, a grade test and determination are performed using the silicon wafer testing method described above.

[0048] The beneficial effects of the embodiments disclosed herein are as follows:

[0049] In the above scheme, during the silicon wafer processing, when sorting silicon wafers by grade, if the specifications of a silicon wafer do not meet the requirements of the first target grade, it is not directly reworked, scrapped, or downgraded. Instead, based on the measured specifications, a simulation test is first conducted to predict whether the silicon wafer can be downgraded to the second target grade. If the prediction result shows that it still does not meet the requirements for downgrading, then the silicon wafer is reworked or scrapped. This avoids the problems of low equipment capacity and low utilization rate caused by direct rework, scrapping, or downgrading. Attached Figure Description

[0050] Figure 1 This is a flowchart illustrating the silicon wafer testing method provided in the embodiments of this disclosure. Detailed Implementation

[0051] To make the objectives, technical solutions, and advantages of the embodiments of this disclosure clearer, the technical solutions of the embodiments of this disclosure will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of this disclosure. All other embodiments obtained by those skilled in the art based on the described embodiments of this disclosure without creative effort are within the scope of protection of this disclosure.

[0052] Unless otherwise defined, the technical or scientific terms used in this disclosure shall have the ordinary meaning understood by one of ordinary skill in the art to which this disclosure pertains. The terms “first,” “second,” and similar terms used in this disclosure do not indicate any order, quantity, or importance, but are merely used to distinguish different components. Similarly, the terms “an,” “a,” or “the,” and similar terms do not indicate a quantity limitation, but rather indicate the presence of at least one. The terms “including,” “comprising,” or “containing,” and similar terms mean that the element or object preceding the word encompasses the elements or objects listed following the word and their equivalents, without excluding other elements or objects. The terms “connected,” “linked,” or similar terms are not limited to physical or mechanical connections, but can include electrical connections, whether direct or indirect. The terms “upper,” “lower,” “left,” and “right,” etc., are used only to indicate relative positional relationships, and these relative positional relationships may change accordingly when the absolute position of the described objects changes.

[0053] like Figure 1 As shown in the embodiments of this disclosure, a silicon wafer testing method is provided, which can be used for grade sorting and processing of silicon wafers. The silicon wafer testing method includes the following steps:

[0054] Step S01: Based on the first preset measurement parameters, measure each silicon wafer to obtain the specification parameters of the silicon wafer. The specification parameters include at least one of the following: particle contamination degree, edge integrity, surface flatness, nano-morphology and silicon wafer thickness.

[0055] Step S02: Determine whether the specification parameters have reached the first target threshold corresponding to the first target level;

[0056] Step S03: If the determination result is that the specification parameters have not reached the first target threshold, the silicon wafer is simulated and tested based on the specification parameters to predict whether the predicted specification parameters of the silicon wafer under the second preset measurement parameters have reached the second target threshold corresponding to the second target level, wherein the second target level is lower than the first target level.

[0057] Step S04: If the prediction result is that the predicted specification parameters do not reach the second target threshold, the silicon wafer will be reworked or scrapped.

[0058] In the above scheme, during the silicon wafer processing, when sorting silicon wafers by grade, if the specifications of a silicon wafer do not meet the requirements of the first target grade, it is not directly reworked, scrapped, or downgraded. Instead, based on the measured specifications, a simulation test is first conducted to predict whether the silicon wafer can be downgraded to the second target grade. If the prediction result shows that it still does not meet the requirements for downgrading, then the silicon wafer is reworked or scrapped. This avoids the problems of low equipment capacity and low utilization rate caused by direct rework, scrapping, or downgrading.

[0059] In the semiconductor industry, silicon wafers are classified according to their product grade. For example, silicon wafers can be classified from high grade to low grade as Prime wafers, Test wafers, Monitor wafers, and Dummy wafers. The higher the grade of the silicon wafer, the higher the requirements for specifications such as particulate contamination, edge integrity, surface flatness, nano-morphology, and wafer thickness.

[0060] The first target grade can be a prime wafer, a test wafer, a monitor wafer, etc., and the second target grade can be a test wafer, a monitor wafer, a dummy wafer, etc., which are lower than the first target grade.

[0061] In addition, it should be noted that the measurement of the specifications of silicon wafers may include, but is not limited to, at least one of the following parameters: particulate contamination, edge integrity, surface flatness, nano-morphology, and silicon wafer thickness.

[0062] For example, in some embodiments, the specifications may include particulate contamination level, edge integrity, surface smoothness, nanostructure, and silicon wafer thickness. Specifically, the specifications may include, but are not limited to, the following parameters: GBIR, SFQR, E-SFQR, and ZDD.

[0063] The terminology is explained as follows:

[0064] GBIR (Global Backsurface-referenced Ideal plane / Range): The difference between the maximum and minimum thickness relative to the back surface as an illusory reference plane, used to evaluate the flatness of the entire wafer surface.

[0065] SFQR (Site Frontsurface Referenced Leasts Quares / Range): The sum of peak and valley values ​​relative to an imaginary plane obtained by least-squares fitting to each local area of ​​the silicon wafer's upper surface. It is a surface-referenced area flatness index, evaluated separately for each area.

[0066] E-SFQR (Edge Site Frontsurface Referenced Least Squares / Range): The sum of peak and valley values ​​when using a pseudo-plane obtained by least squares fitting only at the edge as a local pseudo-reference surface. It is a flatness index for the outer perimeter.

[0067] ZDD (Z-Height Double Differentiation): The second derivative of the surface displacement of a semiconductor wafer relative to its radius. A positive ZDD value indicates that the surface is displaced in the direction of upward movement, while a negative ZDD value indicates that the surface is displaced in the direction of downward movement.

[0068] For example, the measurement of the specifications of a silicon wafer can be achieved using a wafer sight device. The wafer sight device can output the measurement results as a WNT (Wafersight NT wafer) file, which includes all the specifications of the silicon wafer.

[0069] The preset measurement parameters (Recipe) will differ for different levels of measurement. For example, in the measurement process of silicon wafers, the preset measurement parameters are the first preset measurement parameters for the first target level measurement; the preset measurement parameters are the second preset measurement parameters for the second target level measurement; and so on.

[0070] The above specification parameters are detected under the conditions of a first preset measurement parameter. If the specification parameter reaches a first target threshold, it is classified into a first target level; otherwise, a prediction is made based on the above specification parameters to predict whether the corresponding specification parameters under the conditions of a second preset measurement parameter can reach a second target threshold. The first target threshold is the specification parameter that satisfies the first target level; the second target threshold is the specification parameter that satisfies the second target level. The first target threshold and the second target threshold can be obtained based on experience, and their specific values ​​are not specified here. For example, taking the first target level as a high-quality silicon wafer as an example, the first target threshold can be used as a reference value for high-quality silicon wafers.

[0071] For example, step S03 above specifically includes:

[0072] Step S031: Pre-store the correspondence between preset measurement parameters and target thresholds for different target levels;

[0073] Step S032: Based on the correspondence, the specification parameters, the first preset measurement parameters, and the second preset measurement parameters corresponding to the test after the silicon wafer is downgraded to the second target level, obtain the simulated specification parameters of the silicon wafer after it is downgraded to the second target level.

[0074] Step S033: Compare the simulated specification parameters with the second target threshold to obtain the prediction result.

[0075] In the above scheme, after determining that the silicon wafer does not meet the first target level (wafer NG), a prediction is made by combining the specification parameters obtained under the first preset measurement parameter conditions and the first preset measurement parameters required after downgrading to the second target level. In other words, the specific prediction method is to combine the testing methods before and after downgrading (i.e., preset test parameters) for prediction.

[0076] The above solution does not directly measure the silicon wafer under the second preset measurement parameters to obtain the specification parameters and then determine whether it meets the second target level. Instead, it predicts the simulated specification parameters obtained under the second preset measurement parameter conditions after downgrading based on the specification parameters obtained under the first preset measurement parameter conditions. The principle is as follows:

[0077] As mentioned above, the testing requirements (i.e., preset test parameters) differ for different grades of silicon wafers; the higher the grade, the more stringent the testing requirements. However, there are certain correlations and patterns among the specification requirements of different grades. Generally speaking, the lower the grade, the smaller the specification parameters of the silicon wafer. For example, according to the silicon wafer processing principle, the edge quality of a silicon wafer is generally worse than that of the center. Therefore, the more edges of the silicon wafer are removed during measurement, the better the measured specification parameters will be.

[0078] Taking Wafersight's GBIR test as an example, the testing requirements for the silicon wafer before downgrading are EE3 (3mm edge removal) and EE2 (2mm edge removal). Based on wafer manufacturing experience, GBIR typically increases by 15nm to 50nm from EE3 to EE2. From EE2 to EE1, GBIR typically increases by 80nm to 200nm. Therefore, based on the preset test parameters before and after downgrading, the predicted specification parameters can be obtained by adding the corresponding difference to the specification parameters measured before downgrading. These predicted specification parameters can then be used to determine whether the specifications of the downgraded silicon wafer meet the downgrade requirements.

[0079] For example, the method further includes:

[0080] Step S05: If the prediction result is that the predicted specification parameter reaches the second target threshold, the silicon wafer is pre-downgraded and then subjected to a corresponding downgraded simulation test.

[0081] Using the above scheme, based on the preset test parameters before and after downgrading, if it is predicted that the silicon wafer can be downgraded to the second target level, the downgrading processing and testing procedures can be skipped. Instead, the silicon wafer can be subjected to the corresponding downgrading simulation test.

[0082] For example, step S05 above specifically includes:

[0083] Step S051: Store the specifications of all silicon wafers;

[0084] Step S052: Based on the silicon wafer identification code, retrieve the corresponding specification parameters of the silicon wafer from the specification data of all silicon wafers;

[0085] Step S053: Use the retrieved specification parameters as the data to be tested;

[0086] Step S054: The data to be tested is simulated using a silicon wafer analysis system to determine the level.

[0087] Step S055: If the result of the grade determination of the test data is that the grade of the silicon wafer reaches the second target grade, the silicon wafer is determined to belong to the second target grade;

[0088] Step S056: If the result of the grade determination of the test data is that the grade of the silicon wafer does not reach the second target grade, the silicon wafer shall be reworked or scrapped.

[0089] In the above scheme, a wafer measurement device (WaferSight) is used to measure silicon wafers. The wafer measurement device outputs the measurement results as a WNT (Wafersight NT wafer) file, which includes all the specification parameters of the silicon wafer. The silicon wafer testing equipment can analyze the specification parameter signals of the silicon wafer through a silicon wafer analysis device. Therefore, based on the WNT file and the preset measurement parameters, simulated tests can be performed, and then reported to the silicon wafer analysis device for classification and analysis, thereby improving the productivity of the silicon wafer measurement device.

[0090] It should be noted that the silicon wafer analysis device can be implemented using OASYS software. The data obtained from analyzing various parameters of the silicon wafer using OASYS software meets industry standards regarding the differences between the data and actual test data, and can be used as OQC (Outgoing Quality Control) data. OASYS software may include a retrieval module, a transit module, and a MES module.

[0091] Therefore, in the above scheme, for silicon wafers whose prediction results meet the degradation requirements, the WNT file of the silicon wafer measurement can be retrieved through the OASYS software retrieval module based on the silicon wafer ID (because there may be cases where the equipment is retested due to special reasons, so the latest WNT file is retrieved here). The OASYS software relay module transfers the retrieved WNT file to the test area to use these WNT files as test data. The OASYS software extracts the test data from the test area for testing and reports the data to the MES module. The MES module performs classification and analysis on the test data.

[0092] If the grading result is that the specifications meet the second target level, the subsequent processing procedures and testing procedures will continue according to the downgraded procedures until the product is sorted, packaged, and shipped. If the grading result is that the specifications do not meet the second target level, the product will be reworked or scrapped for these specifications.

[0093] Specifically, if the GBIR parameter does not meet the requirements (NG), rework (DSP) processing is performed; if the Bow parameter does not meet the requirements (NG), scrap processing is performed.

[0094] In summary, the silicon wafer testing method provided in this disclosure, when measuring a silicon wafer under the first preset measurement parameters, if it does not meet the first target grade requirements, can predict whether the downgraded silicon wafer meets the requirements based on the specification parameters obtained under the first preset measurement parameters, combined with the data before downgrading and the second preset measurement parameters after downgrading. Instead of directly reworking, scrapping, or downgrading the non-compliant silicon wafer, this method can reduce the problem of low equipment uptime caused by low rework recovery rate and repeated testing, and improve the effective uptime of the equipment.

[0095] Furthermore, in a further embodiment, the above-mentioned prediction process and the downgraded simulation test can be performed by software simulation testing, without occupying equipment capacity, and can output real data.

[0096] Secondly, embodiments of this disclosure also provide a silicon wafer testing system, comprising:

[0097] A silicon wafer measuring device is used to measure silicon wafers based on preset measurement parameters for different target grades of silicon wafers in order to obtain the specifications of the silicon wafers.

[0098] Silicon wafer simulation analysis device, used for:

[0099] Based on the specification parameters, determine whether the specification parameters have reached the first target threshold corresponding to the first target level;

[0100] If the determination result is that the specification parameter does not reach the first target threshold, the silicon wafer is subjected to a simulation test to predict whether the specification parameter reaches the second target threshold corresponding to the second target level, wherein the second target level is lower than the first target level;

[0101] If the prediction result indicates that the predicted specification parameter does not reach the second target threshold, a first analysis result is generated that indicates the silicon wafer should be reworked or scrapped.

[0102] Obviously, the silicon wafer testing system provided in this disclosure also has the beneficial effects of the silicon wafer testing method provided in this disclosure, and will not be described in detail here.

[0103] For example, the silicon wafer simulation analysis device is specifically used for:

[0104] The correspondence between preset measurement parameters and target thresholds for different target levels is stored in advance;

[0105] Based on the correspondence, and using the specification parameters, the first preset measurement parameters, and the second preset measurement parameters corresponding to the test after the silicon wafer is downgraded to the second target level, the simulated specification parameters of the silicon wafer after being downgraded to the second target level are obtained.

[0106] The simulated specification parameters are compared with the second target threshold to obtain the prediction result.

[0107] For example, the silicon wafer simulation analysis device is further used for:

[0108] If the prediction result indicates that the predicted specification parameters reach the second target threshold, the silicon wafer is pre-downgraded, and the silicon wafer is subjected to a corresponding downgraded simulation test.

[0109] For example, the silicon wafer simulation analysis device is further used for:

[0110] Stores the specifications of all silicon wafers;

[0111] Based on the silicon wafer's identification code, the corresponding specification parameters of the silicon wafer are retrieved from the specification data of all silicon wafers.

[0112] The retrieved specifications are used as the data to be tested.

[0113] The data to be tested is simulated using a silicon wafer analysis system to determine its grade.

[0114] If the result of the grade determination of the test data is that the grade of the silicon wafer reaches the second target grade, the silicon wafer is determined to belong to the second target grade;

[0115] If the result of the grade determination of the test data is that the grade of the silicon wafer does not reach the second target grade, the silicon wafer will be reworked or scrapped.

[0116] Furthermore, this disclosure also provides a computing device, which includes a processor and a memory; the processor is used to execute instructions stored in the memory to implement the silicon wafer testing method described above.

[0117] The computing device described in this application may include one or more of the following components: a processor and a memory.

[0118] Optionally, the processor uses various interfaces and lines to connect different parts of the computing device, and performs various functions of the computing device and processes data by running or executing instructions, programs, code sets or instruction sets stored in memory, and calling data stored in memory.

[0119] Alternatively, the processor may be implemented in at least one of the following hardware forms: Digital Signal Processing (DSP), Field-Programmable Gate Array (FPGA), and Programmable Logic Array (PLA).

[0120] The processor can integrate one or more of the following: a Central Processing Unit (CPU), a Graphics Processing Unit (GPU), a Neural-network Processing Unit (NPU), and a baseband chip. The CPU primarily handles the operating system, user interface, and applications; the GPU is responsible for rendering and drawing the content displayed on the touchscreen; the NPU implements artificial intelligence (AI) functions; and the baseband chip handles wireless communication. It is understood that the baseband chip can also be implemented as a separate chip without being integrated into the processor 910.

[0121] The memory may include random access memory (RAM) or read-only memory (ROM). Optionally, the memory may include a non-transitory computer-readable storage medium. The memory may be used to store instructions, programs, code, code sets, or instruction sets. The memory may include a program storage area and a data storage area, wherein the program storage area may store instructions for implementing an operating system, instructions for at least one function (such as touch functionality, sound playback functionality, image playback functionality, etc.), instructions for implementing the various method embodiments described below, etc.; the data storage area may store data created according to the use of the computing device, etc.

[0122] In addition, those skilled in the art will understand that the structure of the computing device shown in the above figures does not constitute a limitation on the computing device. The computing device may include more or fewer components than shown, or combine certain components, or have different component arrangements. For example, the computing device may also include a display screen, camera assembly, microphone, speaker, radio frequency circuit, input unit, sensors (such as accelerometer, angular velocity sensor, light sensor, etc.), audio circuit, WiFi module, power supply, Bluetooth module, etc., which will not be described in detail here.

[0123] Furthermore, this disclosure also provides a computer storage medium storing at least one instruction, which is executed by a processor to implement the silicon wafer testing method described above.

[0124] This application also provides a computer program product including computer instructions stored in a computer-readable storage medium; a processor of a computing device reads the computer instructions from the computer-readable storage medium and executes the computer instructions, causing the computing device to perform a method for identifying wafer edge defect types provided in various alternative implementations of the above aspects.

[0125] Those skilled in the art will recognize that the functions described in the embodiments of this application in one or more of the above examples can be implemented using hardware, software, firmware, or any combination thereof. When implemented using software, these functions can be stored in a computer-readable medium or transmitted as one or more instructions or code on a computer-readable medium. Computer-readable media include computer storage media and communication media, wherein communication media include any medium that facilitates the transfer of a computer program from one place to another. Storage media can be any available medium that can be accessed by a general-purpose or special-purpose computer.

[0126] Furthermore, this disclosure also provides a silicon wafer processing method, the method comprising:

[0127] Multiple silicon wafers are obtained by processing silicon wafers using a predetermined method.

[0128] For each of the plurality of silicon wafers, a grade test and determination are performed using the silicon wafer testing method described above.

[0129] The following points need to be explained:

[0130] (1) The accompanying drawings of the embodiments of this disclosure only involve the structures involved in the embodiments of this disclosure. Other structures can be referred to the general design.

[0131] (2) For clarity, the thickness of layers or regions is enlarged or reduced in the drawings used to describe embodiments of the present disclosure, i.e., these drawings are not drawn to actual scale. It will be understood that when an element such as a layer, film, region or substrate is referred to as being “above” or “below” another element, the element may be “directly” located “above” or “below” the other element or there may be intermediate elements.

[0132] (3) Where there is no conflict, the embodiments of this disclosure and the features in the embodiments can be combined with each other to obtain new embodiments.

[0133] The above are merely specific embodiments of this disclosure, but the scope of protection of this disclosure is not limited thereto. The scope of protection of this disclosure shall be determined by the scope of the claims.

Claims

1. A silicon wafer testing method, characterized in that, include: Based on the first preset measurement parameters, the silicon wafers are measured one by one to obtain the specifications of the silicon wafers. The specifications include at least one of the following: particulate contamination degree, edge integrity, surface flatness, nano-morphology and silicon wafer thickness. Determine whether the specification parameters have reached the first target threshold corresponding to the first target level; If the determination result is that the specification parameters do not reach the first target threshold, the silicon wafer is simulated and tested based on the specification parameters to predict whether the predicted specification parameters of the silicon wafer under the second preset measurement parameters reach the second target threshold corresponding to the second target level, wherein the second target level is lower than the first target level. If the prediction result indicates that the predicted specification parameters do not reach the second target threshold, the silicon wafer will be reworked or scrapped. Specifically, if the determination result indicates that the specification parameter has not reached the first target threshold, the silicon wafer is subjected to a simulated test based on the specification parameter to predict whether the predicted specification parameter of the silicon wafer under the second preset measurement parameter has reached the second target threshold corresponding to the second target level. The correspondence between preset measurement parameters and target thresholds for different target levels is stored in advance; Based on the correspondence, and using the specification parameters, the first preset measurement parameters, and the second preset measurement parameters corresponding to the test after the silicon wafer is downgraded to the second target level, the simulated specification parameters of the silicon wafer after being downgraded to the second target level are obtained. The simulated specification parameters are compared with the second target threshold to obtain the prediction result; The method further includes: If the prediction result indicates that the predicted specification parameters reach the second target threshold, the silicon wafer is pre-downgraded, and the silicon wafer is subjected to a corresponding downgraded simulation test.

2. The silicon wafer testing method according to claim 1, characterized in that, The pre-downgrading process of the silicon wafer, followed by corresponding post-downgrading simulation testing, specifically includes: Stores the specifications of all silicon wafers; Based on the silicon wafer's identification code, the corresponding specification parameters of the silicon wafer are retrieved from the specification data of all silicon wafers. The retrieved specifications are used as the data to be tested. The data to be tested is simulated using a silicon wafer analysis system to determine its grade. If the result of the grade determination of the test data is that the grade of the silicon wafer reaches the second target grade, the silicon wafer is determined to belong to the second target grade; If the result of the grade determination of the test data is that the grade of the silicon wafer does not reach the second target grade, the silicon wafer will be reworked or scrapped.

3. A silicon wafer testing system, characterized in that, include: A silicon wafer measuring device is used to measure silicon wafers based on preset measurement parameters for different target grades of silicon wafers in order to obtain the specifications of the silicon wafers. Silicon wafer simulation analysis device, used for: Based on the specification parameters, determine whether the specification parameters have reached the first target threshold corresponding to the first target level; If the determination result is that the specification parameter does not reach the first target threshold, the silicon wafer is simulated and tested based on the specification parameter to predict whether the predicted specification parameter of the silicon wafer under the second preset measurement parameter reaches the second target threshold corresponding to the second target level, wherein the second target level is lower than the first target level. If the prediction result indicates that the predicted specification parameter does not reach the second target threshold, a first analysis result is generated indicating that the silicon wafer should be reworked or scrapped; wherein... The silicon wafer simulation analysis device is specifically used for: The correspondence between preset measurement parameters and target thresholds for different target levels is stored in advance; Based on the correspondence, and using the specification parameters, the first preset measurement parameters, and the second preset measurement parameters corresponding to the test after the silicon wafer is downgraded to the second target level, the simulated specification parameters of the silicon wafer after being downgraded to the second target level are obtained. The simulated specification parameters are compared with the second target threshold to obtain the prediction result; The silicon wafer simulation analysis device is further used for: If the prediction result indicates that the predicted specification parameters reach the second target threshold, the silicon wafer is pre-downgraded, and the silicon wafer is subjected to a corresponding downgraded simulation test.

4. The silicon wafer testing system according to claim 3, characterized in that, The silicon wafer simulation analysis device is further used for: Stores the specifications of all silicon wafers; Based on the silicon wafer's identification code, the corresponding specification parameters of the silicon wafer are retrieved from the specification data of all silicon wafers. The retrieved specifications are used as the data to be tested. The data to be tested is simulated using a silicon wafer analysis system to determine its grade. If the result of the grade determination of the test data is that the grade of the silicon wafer reaches the second target grade, the silicon wafer is determined to belong to the second target grade; If the result of the grade determination of the test data is that the grade of the silicon wafer does not reach the second target grade, the silicon wafer will be reworked or scrapped.

5. A computing device, characterized in that, The computing device includes a processor and a memory; the processor is used to execute instructions stored in the memory to implement the silicon wafer testing method as described in any one of claims 1 to 2.

6. A silicon wafer processing method, characterized in that, The method includes: Multiple silicon wafers are obtained by processing silicon wafers using a predetermined method. For each of the plurality of silicon wafers, a grade test and determination are performed using the silicon wafer test method according to any one of claims 1 to 2.

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