LVDS (Low Voltage Differential Signaling) driving circuit with slew rate control function for image sensor

Abstract

The invention discloses an LVDS (Low Voltage Differential Signaling) driving circuit with a slew rate control function for an image sensor. The LVDS driving circuit comprises a three-stage current driving unit and a delay unit, the three-stage current driving unit is used for receiving input voltage in stages, converting the input voltage into output current and outputting the output current in stages; the delay unit is connected with the input end of the three-stage current driving unit, and the input end of the three-stage current driving unit is provided with resistors with different resistance values, so that the three-stage current driving unit receives input voltages with different delays and receives the input voltages in stages. According to the embodiment of the invention, the input voltage is controlled to be input in stages, and then the output current is controlled to be output in stages, so that overlarge current is prevented from being generated at a certain moment, slew rate control during signal conversion is realized, and finally, signals at the input end are fully established, and signal noise at the output end is reduced.

Description

Technical Field

[0001] The invention belongs to the research field of interface circuits in CMOS image sensors, and in particular relates to an LVDS driving circuit with a slew rate control function for image sensors. Background Art

[0002] With the development of CMOS technology, CMOS image sensors have gradually become the mainstream sensor type. With the reduction of process feature sizes and the growing demand for high-performance imaging, more and more pixels can be integrated in the same area, the image resolution is getting higher and higher, the amount of data that needs to be processed is also increasing, and the circuit operating rate is growing rapidly.

[0003] Based on this situation, it is necessary to study the high-speed interface circuit applied to image sensors. LVDS (Low-Voltage Differential Signaling) technology uses extremely low voltage swing to transmit data at high speed differentially. It usually uses a differential signal of about 350mV to transmit through a pair of differential PCB traces or balanced cables. Its source driver consists of a constant current source (usually about 3.5mA, no more than 4mA at most) driving a pair of differential signal lines. The receiver at the receiving end itself has a high DC input impedance, so almost all of the driving current flows through the 100Ω terminal matching resistor and generates a voltage of about 350mV at the receiver input. When the source drive state reverses, the direction of the current flowing through the matching resistor changes, so a change in the high and low logic states occurs at the receiving end. Based on the above characteristics, the LVDS transmission mode has the characteristics of high-speed transmission capability, low power consumption, strong anti-noise capability, and effective suppression of electromagnetic interference. For the interface circuit of the image sensor, it is necessary to serialize the parallel pixel information quantized by the column-level ADC and output it through a high-speed driving circuit, so the LVDS transmission mode is a suitable choice.

[0004] In order to meet the slower slew rate required by the standard, the current typical LVDS driving circuit usually chooses to reduce the signal slew rate of the input end, but the effect is limited. In addition, blindly reducing the slew rate of the input end can easily cause problems such as insufficient signal establishment at the input end and increased signal noise at the output end when the process voltage temperature (PVT) fluctuates. Summary of the invention

[0005] The technical problem to be solved by the present invention is that, in order to make up for the various deficiencies of the existing LVDS driving circuit, the present invention provides an LVDS driving circuit with a slew rate control function for an image sensor.

[0006] In order to solve the above technical problems, an embodiment of the present invention provides an LVDS driving circuit with a slew rate control function for an image sensor, comprising: a three-level current driving unit and a delay unit;

[0007] The three-stage current driving unit is used to receive input voltage in stages, convert the input voltage into output current, and output the output current in stages;

[0008] The delay unit is connected to the input end of the three-level current driving unit, and by setting resistors with different resistance values ​​at the input end of the three-level current driving unit, the three-level current driving unit receives input voltages with different delays and receives the input voltage in stages;

[0009] Among them, the three-level current driving unit includes a first current driving module, a second current driving module and a third current driving module; the first current driving module, the second current driving module and the third current driving module are connected in parallel, and the input ends are all used to receive input voltage.

[0010] Preferably, the first current driving module includes: a first MOS tube, a second MOS tube, a third MOS tube and a fourth MOS tube;

[0011] The source electrodes of the first MOS tube and the third MOS tube are connected; the source electrodes of the second MOS tube and the fourth MOS tube are connected; the drain electrodes of the first MOS tube and the second MOS tube are connected; the drain electrodes of the third MOS tube and the fourth MOS tube are connected; the gate electrodes of the first MOS tube, the second MOS tube, the third MOS tube and the fourth MOS tube are the input terminals of the first current driving module; wherein the gate terminals of the first MOS tube and the second MOS tube are connected to the positive terminal of the input voltage; the gate terminals of the third MOS tube and the fourth MOS tube are connected to the negative terminal of the input voltage.

[0012] Preferably, the first MOS tube and the third MOS tube are PMOS tubes; the second MOS tube and the fourth MOS tube are NMOS tubes.

[0013] Preferably, the first current driving module, the second current driving module and the third current driving module have the same structure; all PMOS tube sources in the three-level current driving unit are connected to each other; all NMOS tube sources in the three-level current driving unit are connected to each other; and all MOS tube drains in the three-level current driving unit serve as output ends of the three-level current driving unit.

[0014] Preferably, the delay unit includes a first resistor and a second resistor; the first resistor is located between the input end of the second current driving module and the input voltage; the second resistor is located between the input end of the third current driving module and the input voltage; the resistance of the second resistor is twice the resistance of the first resistor.

[0015] Preferably, the first resistor and the second resistor are negative temperature characteristic resistors.

[0016] Preferably, the LVDS driving circuit with slew rate control function for the image sensor further comprises: a tail current source unit, a common mode negative feedback unit and a filter capacitor unit;

[0017] The tail current source unit is connected to the three-stage current driving unit and is used to provide current to the three-stage current driving unit;

[0018] The input end of the common mode negative feedback unit is connected to the three-stage current driving unit, and the output end is connected to the tail current source unit, so as to detect the output voltage of the three-stage current driving unit and feed it back to the tail current source unit;

[0019] The filter capacitor unit is connected to the tail current source unit and is used to control the stabilization of the drain voltage of the MOS tube in the tail current source unit.

[0020] Preferably, the tail current source unit includes: a fifth MOS tube, a sixth MOS tube and a seventh MOS tube;

[0021] The drain of the fifth MOS tube and the drain of the sixth MOS tube are connected to the source of all the PMOS tubes in the three-stage current driving unit; the source of the fifth MOS tube is connected to the power supply voltage; the gate of the fifth MOS tube is connected to the first reference voltage; the source of the sixth MOS tube is connected to the power supply voltage; the gate of the sixth MOS tube is connected to the output end of the common-mode negative feedback unit; the drain of the seventh MOS tube is connected to the source of all the NMOS tubes in the three-stage current driving unit; the gate of the seventh MOS tube is connected to the second reference voltage; the source of the seventh MOS tube is grounded.

[0022] Preferably, the filter capacitor unit includes a first filter capacitor and a second filter capacitor; one end of the first filter capacitor is connected to the drain of the fifth MOS tube and the drain of the sixth MOS tube, and the other end is grounded; one end of the second filter capacitor is connected to the drain of the seventh MOS tube, and the other end is grounded.

[0023] Preferably, the common-mode negative feedback unit includes an eighth MOS tube, a ninth MOS tube, a tenth MOS tube, an eleventh MOS tube, a twelfth MOS tube, a third capacitor, a third resistor, a fourth resistor and a fifth resistor;

[0024] The drain of the eighth MOS tube is connected to one end of the third capacitor and the gate of the sixth MOS tube; the gate of the eighth MOS tube is connected to the gate and drain of the ninth MOS tube; the source of the eighth MOS tube and the source of the ninth MOS tube are connected to the power supply voltage; the drain of the eighth MOS tube is connected to the drain of the tenth MOS tube; the drain of the ninth MOS tube is connected to the drain of the eleventh MOS tube; the gate of the tenth MOS tube is connected to the third reference voltage; the gate of the eleventh MOS tube is connected to the third resistor and the fourth resistor; the drain of the twelfth MOS tube is connected to the source of the tenth MOS tube and the source of the eleventh MOS tube; the gate of the twelfth MOS tube is connected to the second reference voltage; the other ends of the third resistor and the fourth resistor are respectively connected to the positive and negative output ends of the three-stage current driving unit; the other end of the third capacitor is connected to the fifth resistor; the other end of the fifth resistor is connected to the drain of the fifth MOS tube and the drain of the sixth MOS tube.

[0025] Implementing the embodiments of the present invention has the following beneficial effects:

[0026] (1) The embodiment of the present invention cooperates with the three-stage current driving unit and the delay unit to input the input voltage to each current driving module in stages, and then each current driving module outputs the output current in stages, thereby avoiding the generation of excessive current at a certain moment, thereby realizing the slew rate control during signal conversion. During signal conversion, the output current changes step by step, thereby extending the overall signal conversion time of the circuit, avoiding the large switching noise caused by the too fast conversion rate and reducing the oscillation effect caused by the parasitic capacitance and inductance of the external transmission line, thereby improving the integrity of the signal.

[0027] (2) The embodiment of the present invention sets the resistor of the delay unit as a negative temperature characteristic resistor, so that when the temperature is too high, the resistance value of the resistor is the minimum, thereby reducing the delay between the current driving modules, thereby compensating for the signal integrity problem caused by the slow signal slew rate. When the temperature is too low, the carrier mobility of the MOS tube is the largest, and the overall circuit works at the fastest speed. At this time, due to the negative temperature characteristic of the resistor, its resistance value is the highest at the lowest temperature, so the delay between the modules of the three-level current driving unit will be further increased, alleviating the situation of increased slew rate caused by increased MOS tube working speed.

[0028] (3) In the embodiment of the present invention, a first filter capacitor and a second filter capacitor are provided, and the filter capacitor is used to minimize the voltage glitch of the drain of the MOS tube in the tail current source unit at the moment of switching between different current driving modules in the three-stage current driving unit, thereby reducing the glitch transmitted to the output end and dividing a part of the current at the moment of signal conversion, so that when the first current driving module is switched, there will not be too much current flowing into the output impedance, thereby achieving slow control of the slew rate. BRIEF DESCRIPTION OF THE DRAWINGS

[0029] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0030] Figure 1 A schematic diagram of the structure of an ADC module to an interface driving circuit module in an image sensor provided for the implementation of the present invention;

[0031] Figure 2 A schematic diagram of a three-level current driving unit structure provided for the implementation of the present invention;

[0032] Figure 3 A schematic diagram of the structure of an LVDS driving circuit with a slew rate control function for an image sensor provided for the implementation of the present invention. DETAILED DESCRIPTION

[0033] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative work are within the scope of protection of the present invention.

[0034] like Figure 1 As shown, the embodiment discloses an ADC module to interface driving circuit module in an image sensor. In the ADC module to interface driving circuit module in the image sensor, multiple parallel ADCs quantize the previous stage signal and input it in parallel to the serializer circuit, which converts the parallel digital code stream output into high-speed serial data, and then inputs it to the LVDS driving circuit for external channel transmission. The LVDS driving circuit can ensure that the signal at the input end is fully established and the signal noise at the output end is reduced, thereby improving the integrity of the signal.

[0035] See also Figure 2 , Figure 3 , this embodiment discloses an LVDS driving circuit with a slew rate control function for an image sensor, and the LVDS driving circuit with a slew rate control function for an image sensor includes: a three-level current driving unit, a delay unit, a common-mode negative feedback unit, a filter capacitor unit and a tail current source unit.

[0036] The three-level current driving unit is used to receive input voltage in stages, convert the input voltage into output current, and output the output current in stages. The delay unit is connected to the input end of the three-level current driving unit, and by setting resistors with different resistance values ​​at the input end of the three-level current driving unit, the three-level current driving unit receives input voltages with different delays and receives the input voltage in stages. The tail current source unit is connected to the three-level current driving unit and is used to provide current to the three-level current driving unit. The input end of the common-mode negative feedback unit is connected to the three-level current driving unit, and the output end is connected to the tail current source unit, and is used to detect the output voltage of the three-level current driving unit and feed it back to the tail current source unit. The filter capacitor unit is connected to the tail current source unit and is used to control the voltage stability of the tail current source unit.

[0037] For details, please see Figure 2, the three-stage current driving unit includes a first current driving module (GM1) 101, a second current driving module (GM2) 102 and a third current driving module (GM3) 103. The first current driving module 101, the second current driving module 102 and the third current driving module 103 are connected in parallel, and the input ends are all used to receive input voltages. The delay unit includes: a first resistor 201 and a second resistor 202. The delay unit does not have an additional design of corresponding capacitor components, because the input end of the drive circuit itself has a certain parasitic capacitance, which can play a corresponding delay role. The first resistor 201 is located between the input end of the second current driving module 102 and the input voltage. The second resistor 202 is located between the input end of the third current driving module 103 and the input voltage. The resistance of the second resistor is twice the resistance of the first resistor. Thereby, the first current driving module 101, the second current driving module 102 and the third current driving module 103 in the three-stage current driving unit receive input voltages under different resistance values. Thus, the input voltage of the first current driving module 101 is faster than the input voltage of the second current driving module 102 and faster than the input voltage of the third current driving module 103. The input voltage is received in stages, and the converted output current is output in stages. When the input voltage changes, if the change value is Vin, the first current driving module 101 is switched first, thereby generating a corresponding current Gm1*Vin for the output impedance Rout. After a certain delay, the second current driving module 102 is switched, thereby generating a larger current (Gm1+Gm2)*Vin for the output impedance Rout in total. After a certain delay, the third current driving module 103 starts to switch, and the driving current of the output impedance Rout reaches (Gm1+Gm2+Gm3)*Vin, completing the conversion of the output signal. Since there is a certain order in the switching of each current driving module, the overall signal conversion time is extended, avoiding the generation of excessive current at a certain moment in the conversion process, thereby realizing the slew rate control during signal conversion.

[0038] Furthermore, the first resistor 201 and the second resistor 202 are negative temperature characteristic resistors. When the temperature is too high, the resistance value is the minimum, which reduces the delay between the current driving modules, thereby compensating for the signal integrity problem caused by the slow signal slew rate; when the temperature is too low, the carrier mobility of the MOS tube is the largest, and the overall circuit works at the fastest speed. At this time, due to the negative temperature characteristic of the resistor, its resistance value at the lowest temperature is the highest, so the delay between the modules of the three-level current driving unit will be further increased, which alleviates the increase in slew rate caused by the increase in the working speed of the MOS tube. By adopting the negative temperature characteristic resistor, the delay unit is more compatible with the three-level current driving unit, and the overall extended signal conversion time length is more efficiently controlled, so that the LVDS driving circuit with slew rate control function for the image sensor is more efficient and more accurate.

[0039] Specifically, the LVDS driving circuit with slew rate control function for the image sensor inputs the input voltage in stages through a three-stage current driving unit, and then sets resistors of different resistance values ​​at the input ends of different current driving modules through a delay unit, so that each current driving module receives the input voltage at different times. This avoids the generation of excessive current at a certain moment, thereby achieving slew rate control during signal conversion. During signal conversion, the output current changes step by step, thereby extending the overall signal conversion time of the circuit, avoiding the large switching noise caused by an excessively fast conversion rate and reducing the oscillation effect caused by parasitic capacitance and inductance of the external transmission line, thereby improving signal integrity.

[0040] Please see again Figure 3 The first current driving module 101 includes: a first MOS transistor (M1), a second MOS transistor (M2), a third MOS transistor (M 11 ) and the fourth MOS tube (M 12 The second current driving module 102 and the third current driving module 103 have the same structure as the first current driving module 101, and both include four MOS transistors. The second current driving module 102 includes: MOS transistors (M3, M4, M9, M 10 The third current driving module 103 includes: MOS transistors (M5, M6, M7, M8). The MOS transistor (M1), MOS transistor (M3), MOS transistor (M5), MOS transistor (M7), MOS transistor (M9), MOS transistor (M10), MOS transistor (M11), MOS transistor (M12), MOS transistor (M13), MOS transistor (M14), MOS transistor (M15), MOS transistor (M16), MOS transistor (M17 11 ) is a PMOS tube. The MOS tube (M2), MOS tube (M4), MOS tube (M6), MOS tube (M8), MOS tube (M 10 ), MOS tube (M 12 ) is an NMOS tube.

[0041] The connection mode within the first current driving module 101, the second current driving module 102 and the third current driving module 103 is also the same. Specifically, the drain electrodes of the MOS transistor (M1) and the MOS transistor (M2) are connected. The drain electrodes of the MOS transistor (M3) and the MOS transistor (M4) are connected. The drain electrodes of the MOS transistor (M5) and the MOS transistor (M6) are connected. The drain electrodes of the MOS transistor (M7) and the MOS transistor (M8) are connected. The drain electrodes of the MOS transistor (M9) and the MOS transistor (M10) are connected. 10 ) drain. The MOS tube (M 11 ), MOS tube (M 12 ) drain. The MOS tube (M1), MOS tube (M3), MOS tube (M5), MOS tube (M7), MOS tube (M9), MOS tube (M 11 ) source. The drains of the MOS tubes (M1), (M2), (M3), (M4), (M5), and (M6) serve as the positive output terminals of the three-stage current driving unit. The drains of the MOS tubes (M7), (M8), (M9), (M10), (M11), (M12), (M13), (M14), (M15), and (M16) serve as the positive output terminals of the three-stage current driving unit. 10 ), MOS tube (M 11 ), MOS tube (M 12 ) as the negative output terminal of the three-stage current driving unit. The MOS tube (M2), MOS tube (M4), MOS tube (M6), MOS tube (M8), MOS tube (M 10 ), MOS tube (M 12 ) source. The gates of the MOS transistor (M1) and the MOS transistor (M2) are connected and serve as the positive input terminal of the first current driving module 101 and are connected to the input voltage Q+. 11 ) and the gate of the MOS transistor (M12) are connected and serve as the negative input terminal of the first current driving module 101 and are connected to the input voltage Q-. The gates of the MOS transistors (M3) and (M4) are connected and serve as the positive input terminal of the second current driving module 102 and are connected to the first resistor 201, so as to obtain the input voltage Q+ with a resistance value of R. The MOS transistors (M9), (M10) and (M11) are connected and serve as the negative input terminal of the first current driving module 101 and are connected to the input voltage Q-. 10) gate is connected to the first resistor 201 as the negative input terminal of the second current driving module 102, so as to obtain an input voltage Q- with a resistance value of R. The gates of the MOS transistors (M5) and (M6) are connected to each other, and serve as the positive input terminal of the third current driving module 103 and are connected to the second resistor 202, so as to obtain an input voltage Q+ with a resistance value of 2R. The gates of the MOS transistors (M7) and (M8) are connected to each other, and serve as the negative input terminal of the third current driving module 103 and are connected to the second resistor 202, so as to obtain an input voltage Q- with a resistance value of 2R.

[0042] The tail current source unit includes: a fifth MOS tube (M 18 ), the sixth MOS tube (M 19 ) and the seventh MOS tube (M 20 );

[0043] The drain of the fifth MOS tube and the drain of the sixth MOS tube are connected to the MOS tube (M1), MOS tube (M3), MOS tube (M5), MOS tube (M7), MOS tube (M9), MOS tube (M1), MOS tube (M2), MOS tube (M3), MOS tube (M5), MOS tube (M7), MOS tube (M9), MOS tube (M1), MOS tube (M3), MOS tube (M5), MOS tube (M7), 11 ), and the output end of the common-mode negative feedback unit. The source of the fifth MOS tube is connected to the power supply voltage (VDD). The gate of the fifth MOS tube is connected to the first reference voltage (VP). The source of the sixth MOS tube is connected to the power supply voltage (VDD). The gate of the sixth MOS tube is connected to the common-mode negative feedback unit. The drain of the seventh MOS tube is connected to the MOS tube (M2), MOS tube (M4), MOS tube (M6), MOS tube (M8), MOS tube (M 10 ), MOS tube (M 12 ) source. The gate of the seventh MOS tube is connected to a second reference voltage (VN). The source of the seventh MOS tube is grounded.

[0044] The filter capacitor unit (Cdec) includes: a first filter capacitor 301 and a second filter capacitor 302. One end of the first filter capacitor 301 is connected to the drain of the fifth MOS tube and the drain of the sixth MOS tube, and the other end is grounded. One end of the second filter capacitor 302 is connected to the drain of the seventh MOS tube, and the other end is grounded. The first filter capacitor 301 and the second filter capacitor 302 reduce the voltage burrs of the drain of the fifth MOS tube, the drain of the sixth MOS tube and the drain of the seventh MOS tube in the tail current source unit to as small as possible at the moment of conversion of each current driving module in the three-level current driving unit, thereby reducing the burrs transmitted to the output end by each current driving module. In addition, the first filter capacitor 301 and the second filter capacitor 302 divide a part of the current at the moment of signal conversion, so that there will not be too much current flowing into the output impedance when the first current driving module is converted, thereby realizing slow control of the slew rate. Since the drain of the sixth MOS tube is also connected to a feedback signal, the filter capacitor at this place should not be too large. In the present invention, it is set at 2pF, and the main filtering effect is reflected by the filter capacitor at the seventh MOS tube.

[0045] The common mode negative feedback unit includes an eighth MOS tube (M 14 ), the ninth MOS tube (M 13 ), the tenth MOS tube (M 16 ), the eleventh MOS tube (M 15 ), the twelfth MOS tube (M 17 ), a third capacitor (Cc), a third resistor 501, a fourth resistor 502 and a fifth resistor (Rz).

[0046] The drain of the eighth MOS tube is connected to one end of the third capacitor and the gate of the sixth MOS tube. The gate of the eighth MOS tube is connected to the gate and drain of the ninth MOS tube. The source of the eighth MOS tube and the source of the ninth MOS tube are connected to the power supply voltage. The drain of the eighth MOS tube is connected to the drain of the tenth MOS tube. The drain of the ninth MOS tube is connected to the drain of the eleventh MOS tube. The gate of the tenth MOS tube is connected to the third reference voltage (CVM). The gate of the eleventh MOS tube is connected to the third resistor and the fourth resistor. The drain of the twelfth MOS tube is connected to the source of the tenth MOS tube and the source of the eleventh MOS tube. The gate of the twelfth MOS tube is connected to the second reference voltage (VN). The third resistor 501 is connected in parallel with the fourth resistor 502. The other ends of the third resistor and the fourth resistor are respectively connected to the positive and negative output ends of the three-stage current driving unit. The other end of the third capacitor is connected to the fifth resistor. The other end of the fifth resistor is connected to the drain of the fifth MOS tube and the drain of the sixth MOS tube. Among them, the eighth MOS tube and the ninth MOS tube are PMOS tubes. The tenth MOS tube, the eleventh MOS tube and the twelfth MOS tube are NMOS tubes.

[0047] After the output current passes through the third resistor 501 and the fourth resistor 502, since the third resistor 501 and the fourth resistor 502 are large resistors, the output current will be converted into an output common mode voltage (Vfb). The common mode negative feedback unit detects the output common mode voltage and finally feeds it back to the tail current source unit to achieve current calibration of the LVDS driving circuit with slew rate control function for the image sensor.

[0048] The size of the MOS tube in the three-level current driving unit is adjustable, and the size of each MOS tube can be the same or different. In one embodiment, the size of the MOS tube in the three-level current driving unit is as follows:

[0049] 1. PMOS tube: first current driving module 6u / 180n (m=8), second current driving module 6u / 180n (m=4), third current driving module 6u / 180n (m=4);

[0050] 2. NMOS tube: first current driving module 3u / 180n (m=8), second current driving module 3u / 180n (m=4), third current driving module 3u / 180n (m=4);

[0051] The size of the MOS tube in the three-level current driving unit needs to be moderate: too large a size is likely to consume too much area and its too large input-end parasitic current is likely to increase the driving capability requirements of the previous current driving module. In addition, too large a size means too large a MOS tube transconductance, making it easier for the source noise of the three-level current driving unit to propagate to the output end. Too small a size will affect the Vds voltage of the three-level current driving unit, causing the circuit to lose too much voltage margin, thereby affecting the circuit PVT robustness, signal swing and other aspects. The MOS tube of the tail current source unit is set to a driving voltage of around 200mV, so that the tail current source noise and mirror mismatch errors are small while leaving enough voltage margin for the output signal. The power supply voltage, the first, second, and third reference voltages are all constant and the voltages can be set arbitrarily. The third resistor 501 and the fourth resistor 502 in the common-mode negative feedback unit are made of high-resistance poly material, and the resistance value is set to 100KΩ, so that the current flowing through it is very small and does not occupy too much area. The DC gain of the operational amplifier is greater than 60dB, in order to fully give the overall circuit accurate feedback and make the third reference voltage (VCM) stable. The current consumed by the operational amplifier part is about 40uA, which ensures a certain bandwidth without generating too much power consumption, thereby achieving energy saving effect. The operating voltage of the LVDS drive circuit is 1.8V, using SMIC 180nmCMOS technology, and the output common-mode level is controlled at about 900mV through common-mode negative feedback.

[0052] What is disclosed above is only a preferred embodiment of the present invention, and it certainly cannot be used to limit the scope of rights of the present invention. Ordinary technicians in this field can understand that all or part of the processes of the above embodiment and equivalent changes made according to the claims of the present invention still fall within the scope of the invention.

Claims

1. An LVDS driving circuit with slew rate control function for an image sensor, characterized in that: include: Three-stage current drive unit and delay unit; The three-stage current driving unit is used to receive input voltage in stages, convert the input voltage into output current, and output the output current in stages; The delay unit is connected to the input end of the three-level current driving unit, and by setting resistors with different resistance values ​​at the input end of the three-level current driving unit, the three-level current driving unit receives input voltages with different delays and receives the input voltage in stages; Wherein, the three-level current driving unit includes a first current driving module, a second current driving module and a third current driving module; The first current driving module, the second current driving module and the third current driving module are connected in parallel, and the input ends are all used to receive input voltages.

2. The LVDS driving circuit with slew rate control function for an image sensor according to claim 1, characterized in that: The first current driving module includes: a first MOS tube, a second MOS tube, a third MOS tube and a fourth MOS tube; The source electrodes of the first MOS tube and the third MOS tube are connected; the source electrodes of the second MOS tube and the fourth MOS tube are connected; the drain electrodes of the first MOS tube and the second MOS tube are connected; the drain electrodes of the third MOS tube and the fourth MOS tube are connected; the gate electrodes of the first MOS tube, the second MOS tube, the third MOS tube and the fourth MOS tube are the input terminals of the first current driving module; wherein the gate terminals of the first MOS tube and the second MOS tube are connected to the positive terminal of the input voltage; the gate terminals of the third MOS tube and the fourth MOS tube are connected to the negative terminal of the input voltage.

3. The LVDS driving circuit with slew rate control function for an image sensor according to claim 2, characterized in that: The first MOS tube and the third MOS tube are PMOS tubes; the second MOS tube and the fourth MOS tube are NMOS tubes.

4. The LVDS driving circuit with slew rate control function for an image sensor according to claim 3, characterized in that: The first current driving module, the second current driving module and the third current driving module have the same structure; all PMOS tube sources in the three-level current driving unit are connected to each other; all NMOS tube sources in the three-level current driving unit are connected to each other; and all MOS tube drains in the three-level current driving unit serve as output ends of the three-level current driving unit.

5. The LVDS driving circuit with slew rate control function for an image sensor according to claim 1, characterized in that: The delay unit includes a first resistor and a second resistor; the first resistor is located between the input end of the second current driving module and the input voltage; the second resistor is located between the input end of the third current driving module and the input voltage; the resistance of the second resistor is twice the resistance of the first resistor.

6. The LVDS driving circuit with slew rate control function for an image sensor according to claim 5, characterized in that: The first resistor and the second resistor are negative temperature characteristic resistors.

7. The LVDS driving circuit with slew rate control function for an image sensor according to claim 1, characterized in that: The LVDS driving circuit with slew rate control function for the image sensor further includes: a tail current source unit, a common mode negative feedback unit and a filter capacitor unit; The tail current source unit is connected to the three-stage current driving unit and is used to provide current to the three-stage current driving unit; The input end of the common mode negative feedback unit is connected to the three-stage current driving unit, and the output end is connected to the tail current source unit, so as to detect the output voltage of the three-stage current driving unit and feed it back to the tail current source unit; The filter capacitor unit is connected to the tail current source unit and is used to control the stabilization of the drain voltage of the MOS tube in the tail current source unit.

8. The LVDS driving circuit with slew rate control function for an image sensor according to claim 7, characterized in that: The tail current source unit includes: a fifth MOS tube, a sixth MOS tube and a seventh MOS tube; The drain of the fifth MOS tube and the drain of the sixth MOS tube are connected to the source of all the PMOS tubes in the three-stage current driving unit; the source of the fifth MOS tube is connected to the power supply voltage; the gate of the fifth MOS tube is connected to the first reference voltage; the source of the sixth MOS tube is connected to the power supply voltage; the gate of the sixth MOS tube is connected to the output end of the common-mode negative feedback unit; the drain of the seventh MOS tube is connected to the source of all the NMOS tubes in the three-stage current driving unit; the gate of the seventh MOS tube is connected to the second reference voltage; the source of the seventh MOS tube is grounded.

9. The LVDS driving circuit with slew rate control function for an image sensor according to claim 7, characterized in that: The filter capacitor unit includes a first filter capacitor and a second filter capacitor; one end of the first filter capacitor is connected to the drain of the fifth MOS tube and the drain of the sixth MOS tube, and the other end is grounded; one end of the second filter capacitor is connected to the drain of the seventh MOS tube, and the other end is grounded.

10. The LVDS driving circuit with slew rate control function for an image sensor according to claim 7, characterized in that: The common-mode negative feedback unit includes an eighth MOS tube, a ninth MOS tube, a tenth MOS tube, an eleventh MOS tube, a twelfth MOS tube, a third capacitor, a third resistor, a fourth resistor and a fifth resistor; The drain of the eighth MOS tube is connected to one end of the third capacitor and the gate of the sixth MOS tube; the gate of the eighth MOS tube is connected to the gate and drain of the ninth MOS tube; the source of the eighth MOS tube and the source of the ninth MOS tube are connected to the power supply voltage; the drain of the eighth MOS tube is connected to the drain of the tenth MOS tube; the drain of the ninth MOS tube is connected to the drain of the eleventh MOS tube; the gate of the tenth MOS tube is connected to the third reference voltage; the gate of the eleventh MOS tube is connected to the third resistor and the fourth resistor; the drain of the twelfth MOS tube is connected to the source of the tenth MOS tube and the source of the eleventh MOS tube; the gate of the twelfth MOS tube is connected to the second reference voltage; the other ends of the third resistor and the fourth resistor are respectively connected to the positive and negative output ends of the three-stage current driving unit; the other end of the third capacitor is connected to the fifth resistor; the other end of the fifth resistor is connected to the drain of the fifth MOS tube and the drain of the sixth MOS tube.

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