Light source mask collaborative optimization method

Abstract

The invention provides a light source mask collaborative optimization method, which comprises the following steps of: preparing a pattern which needs to be subjected to SMO, determining the minimum period of the pattern, and providing photomask information; establishing an optical model; performing preliminary light source mask collaborative optimization based on the minimum period and the photomask information by using the established optical model to obtain a preliminarily optimized light source form and an optimized photomask key size; on the basis of an optimization result, after a photomask is manufactured, exposure and development are actually carried out, and photoresist data on an actual wafer are collected; and establishing a light resistance model based on the light resistance data, and carrying out light source mask collaborative optimization again by using the light resistance model to obtain a more accurate light source form and a photomask key size. According to the light source and mask collaborative optimization method, the light resistor is added into the SMO process, the light source, the light resistor and the photomask are optimized at the same time, the performance of a film layer after exposure and development in the integrated circuit manufacturing process is improved, and the DOF is improved.

Description

Technical Field

[0001] The invention belongs to the technical field of semiconductors and relates to a light source and mask collaborative optimization method. Background Art

[0002] Source mask co-optimization (SMO) is a computational lithography technology used to improve the quality of lithography imaging. It achieves this goal by optimizing both the illumination source and the mask pattern, which is conducive to the manufacture of integrated circuit chips at 28 nanometers and smaller technology nodes. Specifically, as the feature size of integrated circuit patterns continues to decrease, the diffraction-limited properties of the lithography system lead to a significant optical proximity effect, which reduces the quality of lithography imaging. SMO technology can effectively improve lithography resolution and increase process windows by optimizing illumination modes, mask patterns, and process parameters. The development of SMO technology began in 2000, and a variety of algorithm research results have emerged in the following years. There are two main optimization ideas: one is to optimize the light source and mask alternately globally until the result meets the requirements. This method is called the alternating optimization algorithm; the other is to optimize the local mask and light source collaboratively, taking into full account the coupling between the two to obtain the optimized light source. This method is called the collaborative optimization algorithm.

[0003] The existing SMO technology is to optimize the light source and the mask together to find the relatively best result. It only takes into account the information of the layout and the mask. However, as the process node is reduced, the influence of the photoresist in the process of exposure and development is getting bigger and bigger, especially in the process of negative tone development (NTD), the influence of the photoresist is even higher than the influence of optics. Among them, negative tone development (NTD) is a photolithography technology used in the semiconductor manufacturing process, which is opposite to the traditional positive development technology. In the negative development process, positive photoresist is used, but the developer is an organic solvent. This organic solvent can dissolve the unexposed hydrophobic photoresist, and the exposed photoresist is converted into a hydrophilic polymer due to the acid generated by the photochemical reaction. It is no longer soluble in the NTD developer, but can be dissolved in an alkaline solution. The most important photoresist effect of NTD technology is the resist shrinkage effect, which is caused by the deprotection reaction that occurs in the post-exposure baking stage. Negative development technology uses special solvents to reverse the image and form high-resolution patterns. It has been widely used in the industry in mass production of 20nm and below technology nodes.

[0004] Therefore, how to further improve the accuracy of SMO to improve the performance of the film layer after exposure and development has become an important technical problem that needs to be solved urgently by those skilled in the art.

[0005] It should be noted that the above introduction to the technical background is only for the convenience of providing a clear and complete description of the technical solutions of the present application and for the convenience of understanding by those skilled in the art. It cannot be considered that the above technical solutions are well known to those skilled in the art simply because they are described in the background technology section of the present application. Summary of the invention

[0006] In view of the above-mentioned shortcomings of the prior art, an object of the present invention is to provide a light source mask collaborative optimization method for solving the problem in the prior art that the SMO simulation results deviate greatly from the actual wafer situation.

[0007] To achieve the above object and other related objects, the present invention provides a light source mask collaborative optimization method, comprising the following steps:

[0008] Prepare the graphics to be SMO, determine the minimum period of the graphics, and provide mask information;

[0009] Establish optical model;

[0010] Using the optical model, based on the minimum period and the mask information, preliminary light source mask collaborative optimization is performed to obtain a preliminary optimized light source shape and an optimized mask key size;

[0011] Based on the optimization results, after the mask is produced, exposure and development are actually performed, and the photoresist data on the actual wafer is collected;

[0012] Establishing a light resistance model based on the light resistance data;

[0013] The light source mask collaborative optimization is performed again using the photoresist model to obtain a more accurate light source shape and mask critical dimensions.

[0014] Optionally, the photoresist data includes a planar shape, a cross-sectional shape and a photolithography process window of the photoresist.

[0015] Optionally, the optical model includes light source shape, light source intensity distribution and light source phase.

[0016] Optionally, the light source has a shape of a continuous circular ring or a discontinuous circular ring.

[0017] Optionally, the mask information includes pattern features of the mask, composition of structural layers, and transmittance of each structural layer.

[0018] Optionally, in the preliminary light source mask collaborative optimization and the repeated light source mask collaborative optimization, the optimization scheme adopted for the mask includes adjusting the line width and / or spacing of the mask pattern.

[0019] Optionally, in the preliminary light source mask collaborative optimization and the repeated light source mask collaborative optimization, the optimization scheme adopted for the mask includes adding an auxiliary line pattern to the mask pattern.

[0020] Optionally, the method of adding auxiliary line patterns to the mask pattern includes adding one or more auxiliary line patterns between two adjacent mask line patterns, or adding one or more auxiliary line patterns on both sides of an isolated mask line pattern.

[0021] Optionally, the mask line pattern and the auxiliary line pattern are both straight lines.

[0022] Optionally, in the preliminary light source mask coordinated optimization and the repeated light source mask coordinated optimization, the film layer stacking structure adopted includes a silicon layer, a mask layer, a bottom anti-reflection layer and a photoresist layer arranged in sequence from bottom to top.

[0023] As described above, the light source mask collaborative optimization method of the present invention includes the following steps: preparing the graphics that need to be SMO, determining the minimum period of the graphics, and providing mask information; establishing an optical model; using the established optical model, based on the minimum period and mask information, performing preliminary light source mask collaborative optimization, and obtaining a preliminary optimized light source morphology and optimized mask critical dimensions; based on the optimization results, after the mask is produced, actually performing exposure and development, and collecting photoresist data on the actual wafer; establishing a photoresist model based on the photoresist data, and using the photoresist model to perform light source mask collaborative optimization again, obtaining a more accurate light source morphology and mask critical dimensions. The light source mask collaborative optimization method of the present invention adds photoresist to the SMO process, and optimizes the light source, photoresist and mask at the same time, which helps to improve the performance of the film layer after exposure and development in the integrated circuit manufacturing process, improve DOF, and thus improve the manufacturing quality and output of integrated circuits. BRIEF DESCRIPTION OF THE DRAWINGS

[0024] Figure 1 Shown is a flow chart of the light source and mask collaborative optimization method of the present invention.

[0025] Figure 2 Displayed as a dense primitive.

[0026] Figure 3 Displayed as a sparse primitive graph.

[0027] Figure 4 Displayed as a structural layer composition of the mask.

[0028] Figure 5Appears as a continuous ring light.

[0029] Figure 6 Appears as an intermittent ring light source.

[0030] Figure 7 Shown is a schematic diagram of a film layer stack structure used in the light source mask co-optimization process.

[0031] Figure 8 Shown is a preliminary optimized light source form.

[0032] Fig. 9 Displayed as a preliminary optimized dense graph.

[0033] Fig.10 The diagram shows a schematic diagram of adding an auxiliary line graphic between two adjacent mask line graphics.

[0034] Fig.11 The diagram shows a schematic diagram of adding two auxiliary line graphics between two adjacent mask line graphics.

[0035] Fig.12 The diagram shows a schematic diagram of adding three auxiliary line graphics on both sides of an isolated mask line graphic.

[0036] Fig.13 Shown is a resist plane shape map obtained from an actual wafer.

[0037] Fig.14 Display as Fig.13 Magnified image of the white box area.

[0038] Fig.15 Shown is a photoresist cross-section shape image taken from an actual wafer.

[0039] Fig.16 Displayed as a further optimized light source form.

[0040] Fig.17 Shown is another further optimized light source form.

[0041] Fig.18 Displayed as a further optimized dense graph.

[0042] Fig.19 The diagram shows a schematic diagram of adding an auxiliary line pattern between two adjacent mask line patterns during further optimization.

[0043] Fig. 20 The diagram shows a schematic diagram of adding two auxiliary line graphics between two adjacent mask line graphics during further optimization.

[0044] Fig.21A schematic diagram showing the addition of three auxiliary line graphics on both sides of an isolated mask line graphic during further optimization.

[0045] Description of Reference Numerals

[0046] Steps S1 to S6

[0047] 1 Glass layer

[0048] 2 MoSi Graphical Layer

[0049] 3 Silicon layer

[0050] 4 Mask layer

[0051] 5 Bottom anti-reflection layer

[0052] 6 Photoresist layer DETAILED DESCRIPTION

[0053] In source-mask collaborative optimization (SMO), using the source-mask joint optimization model as a simulation model can simultaneously optimize the light source distribution and the mask layout, thereby obtaining a customized light source with a maximum lithography process window and a corrected mask shape.

[0054] In an SMO process, the following steps are included: (1) preparing the graphics to be SMOed, determining the minimum pitch and providing mask information; (2) establishing an optical model; (3) starting SMO; and (4) obtaining the key CD of the light source and mask.

[0055] In the above SMO process, only the minimum cycle, mask information and optical model are needed to start optimizing the light source and mask pattern, but without the information of photoresist, there will be a gap between the simulation result and the result on the actual wafer, and the depth of focus (DOF) is about 60-80% of the simulation result, where DOF is an important parameter for measuring the exposure process window, which refers to the distance range that the surface of the wafer can move up and down without causing a significant decrease in pattern resolution. In the photolithography process, the depth of focus determines the allowable deviation of the wafer surface relative to the focal position of the photolithography machine. If the wafer surface exceeds the allowable depth of focus range, the projected pattern may be deformed or blurred, causing the pattern size to exceed the specification, or causing uneven line spacing. The present invention improves the SMO process, and feeds back the actual wafer result (photoresist information) to the simulation model before starting SMO, thereby affecting the SMO result, making it closer to the actual wafer situation, and improving DOF.

[0056] The following describes the embodiments of the present invention through specific examples, and those skilled in the art can easily understand other advantages and effects of the present invention from the contents disclosed in this specification. The present invention can also be implemented or applied through other different specific embodiments, and the details in this specification can also be modified or changed in various ways based on different viewpoints and applications without departing from the spirit of the present invention.

[0057] It should be emphasized that the term “include / comprises” when used herein refers to the presence of features, integers, steps or components, but does not exclude the presence or addition of one or more other features, integers, steps or components.

[0058] Features described and / or illustrated with respect to one embodiment may be used in the same or similar manner in one or more other embodiments, combined with features in other embodiments, or substituted for features in other embodiments.

[0059] For example, when describing the embodiments of the present invention in detail, for the sake of convenience, the schematic diagrams showing the device structure will not be partially enlarged according to the general scale, and the schematic diagrams are only examples, which should not limit the scope of protection of the present invention. In addition, in actual production, the three-dimensional dimensions of length, width and depth should be included.

[0060] For ease of description, spatially relative terms such as "under", "below", "below", "below", "above", "on", etc. may be used herein to describe the relationship of one element or feature shown in the drawings to other elements or features. It will be understood that these spatially relative terms are intended to encompass other orientations of the device in use or operation in addition to the orientation depicted in the drawings. In addition, when a layer is referred to as being "between" two layers, it can be the only layer between the two layers, or one or more intervening layers may also be present.

[0061] In the context of the present application, a structure in which a first feature is described as being "above" a second feature may include embodiments in which the first and second features are in direct contact, and may also include embodiments in which additional features are formed between the first and second features, such that the first and second features may not be in direct contact.

[0062] It should be noted that the illustrations provided in this embodiment are only used to illustrate the basic concept of the present invention in a schematic manner, and therefore the illustrations only show components related to the present invention rather than being drawn according to the number, shape and size of components in actual implementation. In actual implementation, the type, quantity and proportion of each component may be changed arbitrarily, and the component layout may also be more complicated.

[0063] The present invention provides a light source mask collaborative optimization method, please refer to Figure 1 , shown as a flow chart of the method, comprising the following steps:

[0064] S1: Prepare the graphics to be SMO, determine the minimum period of the graphics, and provide mask information;

[0065] S2: Establish optical model;

[0066] S3: using the optical model, performing preliminary light source mask collaborative optimization based on the minimum period and the mask information, to obtain a preliminary optimized light source shape and an optimized mask key size;

[0067] S4: After the mask is produced based on the optimization results, exposure and development are actually performed, and photoresist data on the actual wafer is collected;

[0068] S5: establishing a light resistance model based on the light resistance data;

[0069] S6: Use the photoresist model to perform light source mask collaborative optimization again to obtain more accurate light source shape and mask key size.

[0070] The above steps are described in detail below with examples.

[0071] First, the step S1 is performed: preparing the pattern to be SMO, determining the minimum period (Pitch) of the pattern, and providing mask information.

[0072] As an example, see Figure 2 and Figure 3 ,in, Figure 2 It is displayed as a dense primitive pattern consisting of multiple parallel lines with a period of 100nm. Figure 3 It is displayed as a sparse original pattern with a period of 5000nm.

[0073] It should be pointed out that this is only an example. In actual applications, other forms of graphics can be selected as SMO according to actual needs.

[0074] As an example, the mask information includes pattern features of the mask, composition of structural layers, and transmittance of each structural layer.

[0075] As an example, the graphic characteristics of a reticle include the width, shape, and layout of lines and spaces.

[0076] As an example, see Figure 4 , showing a structural layer composition of a photomask, including a glass layer 1 with a transmittance T=100% and a MoSi patterned layer 2 with a transmittance T=6% located on one side of the glass layer 1.

[0077] Next, the step S2 is performed: establishing an optical model.

[0078] As an example, the optical model includes the light source shape, light source intensity distribution and light source phase, for example, see Figure 5 and Figure 6 , showing two basic light sources, among which, Figure 5 It appears as a continuous ring light source. Figure 6 It is shown as an intermittent circular ring light source, which includes a plurality of discretely arranged arc-shaped sub-light sources evenly distributed on the same circular ring.

[0079] Specifically, the basic light source and the initial mask image serve as the starting point of the simulation.

[0080] Next, the step S3 is performed: using the optical model, a preliminary light source mask collaborative optimization is performed based on the minimum period and the mask information to obtain a preliminary optimized light source shape and an optimized mask critical dimension.

[0081] As an example, according to different optimization scenarios and goals, TachyonTM, Mentor Graphics, Synopsys, Cadence or other suitable SMO software is selected to perform preliminary light source mask co-optimization.

[0082] As an example, see Figure 7 , which is a schematic diagram of a film layer stacking structure used in the light source mask collaborative optimization process, wherein the film layer stacking structure includes a silicon layer 3, a mask layer 4, a bottom anti-reflection layer 5 and a photoresist layer 6 arranged in sequence from bottom to top, wherein the bottom anti-reflection layer 5 can be designed as a single layer or a multi-layer, for example Figure 7 The double bottom anti-reflection layer presented, in some cases, the double anti-reflection layer can provide a wider spectral range and better anti-reflection effect.

[0083] Specifically, in the process of coordinated optimization of light source and mask, based on the principles of physical optics, such as diffraction, interference and scattering of light, the light field distribution in the lithography process is simulated, including the diffraction pattern of light after passing through the mask and the exposure pattern on the photoresist.

[0084] Specifically, through the coordinated optimization of the light source and the mask, the light source distribution and the mask pattern can be optimized simultaneously to obtain a customized light source with a maximum lithography process window and a corrected mask pattern, thereby improving the imaging quality.

[0085] As an example, see Figure 8, showing a preliminary optimized light source form, which is a freeform source (FFS). The light source map is calculated and is usually no longer a regular pattern, but a preliminary optimized lighting condition calculated based on the design pattern on the mask. It is pixelated lighting, and the distribution of light intensity in the aperture is uneven. This kind of lighting needs to rely on the programmable lighting system in the lithography machine to achieve. Pixelated lighting allows precise control of the light intensity at each pixel of the light source, which helps to increase the lithography process window.

[0086] As an example, in the preliminary light source mask collaborative optimization, the optimization scheme adopted for the mask includes adjusting the line width and / or spacing of the mask pattern, for example, see Fig. 9 , shown as a preliminary optimized dense graph, relative to Figure 2 The original graphic shown, Fig. 9 Graphics shown have lines with changed width and / or spacing.

[0087] As an example, in the preliminary light source mask collaborative optimization, the optimization scheme adopted for the mask includes adding auxiliary line patterns, that is, adding bars, to the mask pattern. The purpose of these auxiliary patterns is to improve the imaging quality during the lithography process, especially in improving resolution and contrast.

[0088] As an example, lithography simulation software is used to simulate the lithography effect after adding auxiliary patterns to evaluate the improvement in imaging quality.

[0089] As an example, the method of adding auxiliary line patterns to the mask pattern includes adding one or more auxiliary line patterns between two adjacent mask line patterns, or adding one or more auxiliary line patterns on both sides of an isolated mask line pattern. Figure 10-12 , showing several ways to add bar, among which, Fig.10 The diagram shows a schematic diagram of adding an auxiliary line graphic between two adjacent mask line graphics. Fig.11 The diagram shows a schematic diagram of adding two auxiliary line graphics between two adjacent mask line graphics. Fig.12 The diagram shows a schematic diagram of adding three auxiliary line graphics on both sides of an isolated mask line graphic.

[0090] As an example, the mask line pattern and the auxiliary line pattern are both straight lines.

[0091] As an example, when performing light source mask collaborative optimization, the optimization algorithm used in the simulation software includes but is not limited to a gradient optimization algorithm, a heuristic optimization algorithm, an alternating optimization algorithm, a collaborative optimization algorithm, a model-based optimization algorithm, a compressed sensing-based light source optimization algorithm, and at least one of GPU acceleration technology.

[0092] Next, the step S4 is performed: based on the optimization result, after the mask is produced, exposure and development are actually performed, and the photoresist data on the actual wafer is collected.

[0093] As an example, the photoresist data includes a planar shape, a cross-sectional shape, and a photolithography process window of the photoresist.

[0094] As an example, see Fig.13 and Fig.14 ,in, Fig.13 Shown is a photoresist plane shape image obtained from an actual wafer. Fig.14 Display as Fig.13 Magnified image of the white box area.

[0095] As an example, see Fig.15 , shown is a photoresist cross-section shape image obtained from an actual wafer.

[0096] Specifically, the lithography process window refers to the range of variation of exposure dose and focus conditions while ensuring the quality of lithography. Determining the process window can ensure that qualified lithography results can be obtained under different exposure and focus conditions.

[0097] Next, the step S5 is performed: a light-resistance model is established based on the light-resistance data.

[0098] Specifically, based on the photoresist data such as the planar shape data, cross-sectional shape data, process window data, etc. collected from the actual wafer, a mathematical model is established to describe the behavior of the photoresist under different conditions. The accuracy of the photoresist model can be verified through experiments to ensure that the photoresist model can reliably predict the behavior of the photoresist in the actual lithography process.

[0099] Specifically, the software used in establishing the photoresist model may be, but is not limited to, COMSOL Multiphysics, TracePro, SPEOS, etc. In actual application, suitable simulation software may be selected according to the photolithography process and equipment to be simulated.

[0100] Next, the step S6 is performed: using the photoresist model to perform light source mask collaborative optimization again to obtain a more accurate light source shape and mask critical dimensions.

[0101] As an example, the propagation of light in the photoresist layer, the photochemical reaction and the physical changes of the photoresist layer, as well as the dissolution of the photoresist layer and the formation of the pattern during the development process can be simulated in the simulation software. By analyzing the simulation results, including the shape of the photoresist profile, the line width, the clarity of the line edge, etc., the light source shape and the mask pattern can be adjusted to achieve the desired photoresist plane and profile shape.

[0102] As an example, see Fig.16 , showing a further optimized light source form, which is also a free-form light source.

[0103] As an example, see Fig.17 , showing another further optimized light source form, with a more complex shape and higher degree of refinement.

[0104] As an example, in further light source mask collaborative optimization, the optimization scheme adopted for the mask includes adjusting the line width and / or spacing of the mask pattern, for example, see Fig.18 , shown as a further optimized dense graph, relative to Fig. 9 The preliminary optimization graph shown, Fig.18 There are further adjustments to the line width and / or spacing in the .

[0105] As an example, in further light source mask collaborative optimization, the optimization scheme adopted for the mask includes adding auxiliary line patterns to the mask pattern, such as adding one or more auxiliary line patterns between two adjacent mask line patterns, or adding one or more auxiliary line patterns on both sides of an isolated mask line pattern. Figure 19-21 ,in, Fig.19 It is a schematic diagram showing that an auxiliary line graphic is added between two adjacent mask line graphics during further optimization. Fig. 20 It is a schematic diagram showing that two auxiliary line graphics are added between two adjacent mask line graphics during further optimization. Fig.21 A schematic diagram showing the addition of three auxiliary line graphics on both sides of an isolated mask line graphic during further optimization.

[0106] At this point, the further optimized SMO structure is obtained, which is closer to the actual wafer behavior, and the accuracy of defect prediction and DOF will be greatly improved. The final optimized mask layout can be used to manufacture the actual photomask, and the final optimized light source form can be applied to the actual exposure process. The resulting photoresist performance will better meet the needs.

[0107] In summary, the light source mask collaborative optimization method of the present invention includes the following steps: preparing the graphics that need to be SMO, determining the minimum period of the graphics, and providing mask information; establishing an optical model; using the established optical model, based on the minimum period and mask information, performing preliminary light source mask collaborative optimization, and obtaining a preliminary optimized light source shape and optimized mask key size; based on the optimization results, after the mask is produced, actually performing exposure and development, and collecting photoresist data on the actual wafer; establishing a photoresist model based on the photoresist data, and using the photoresist model to perform light source mask collaborative optimization again, to obtain a more accurate light source shape and mask key size. The light source mask collaborative optimization method of the present invention adds photoresist to the SMO process, and optimizes the light source, photoresist and mask at the same time, which helps to improve the performance of the film layer after exposure and development in the integrated circuit manufacturing process, improve DOF, and thus improve the manufacturing quality and output of integrated circuits. Therefore, the present invention effectively overcomes the various shortcomings of the prior art and has a high industrial utilization value.

[0108] The above embodiments are merely illustrative of the principles and effects of the present invention, and are not intended to limit the present invention. Anyone familiar with the art may modify or alter the above embodiments without departing from the spirit and scope of the present invention. Therefore, all equivalent modifications or alterations made by a person of ordinary skill in the art without departing from the spirit and technical concept disclosed by the present invention shall still be covered by the claims of the present invention.

Claims

1. A light source mask collaborative optimization method, characterized in that: The following steps are involved: Prepare the graphics to be SMO, determine the minimum period of the graphics, and provide mask information; Establish optical model; Using the optical model, based on the minimum period and the mask information, preliminary light source mask collaborative optimization is performed to obtain a preliminary optimized light source shape and an optimized mask key size; Based on the optimization results, after the mask is produced, exposure and development are actually performed, and the photoresist data on the actual wafer is collected; Establishing a light resistance model based on the light resistance data; The light source mask collaborative optimization is performed again using the photoresist model to obtain a more accurate light source shape and mask critical dimensions.

2. The light source mask collaborative optimization method according to claim 1, characterized in that: The photoresist data includes the planar shape, cross-sectional shape and photolithography process window of the photoresist.

3. The light source mask collaborative optimization method according to claim 1, characterized in that: The optical model includes light source shape, light source intensity distribution and light source phase.

4. The light source mask collaborative optimization method according to claim 3, characterized in that: The light source shape includes a continuous circular ring or a discontinuous circular ring.

5. The light source mask collaborative optimization method according to claim 1, characterized in that: The mask information includes the pattern characteristics of the mask, the composition of the structural layers and the light transmittance of each structural layer.

6. The light source mask collaborative optimization method according to claim 1, characterized in that: In the preliminary light source mask co-optimization and the repeated light source mask co-optimization, the optimization scheme adopted for the mask includes adjusting the line width and / or spacing of the mask pattern.

7. The light source mask collaborative optimization method according to claim 1, characterized in that: In the preliminary light source mask co-optimization and the repeated light source mask co-optimization, the optimization scheme adopted for the mask includes adding auxiliary line patterns to the mask pattern.

8. The light source mask collaborative optimization method according to claim 7, characterized in that: The method of adding auxiliary line patterns to the mask pattern includes adding one or more auxiliary line patterns between two adjacent mask line patterns, or adding one or more auxiliary line patterns on both sides of an isolated mask line pattern.

9. The light source mask collaborative optimization method according to claim 8, characterized in that: The mask line pattern and the auxiliary line pattern are both straight lines.

10. The light source mask collaborative optimization method according to claim 1, characterized in that: In the preliminary light source mask coordinated optimization and the repeated light source mask coordinated optimization, the film layer stacking structure used includes a silicon layer, a mask layer, a bottom anti-reflection layer and a photoresist layer arranged in sequence from bottom to top.

Images