Reliable asynchronous serial port communication method
By performing sliding verification in asynchronous serial communication, verifying frame header and check bytes, the problem of abnormality in the receiving end when data transmission is interrupted and the accuracy and reliability of communication is improved.
Patent Information
- Application Number
- CN202411538889.9
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-10-31
- Publication Date
- 2025-02-07
AI Technical Summary
In asynchronous serial communication, after the data transmission process suddenly interrupts and resumes, the receiver always has an abnormality, resulting in the communication failure.
Through the preset serial communication protocol, the frame header and the verification byte are agreed with the data sender, and sliding verification is performed when receiving the data to verify whether the current highest byte is the agreed frame header. If so, the verification byte is at the verification byte Whether the byte of the agreed check byte is whether the default check byte, if passed, the reception of the current frame data will be completed.
It solves the problem of abnormality in the receiving end when data transmission is interrupted, improves the accuracy and reliability of asynchronous serial communication, and ensures that even after data transmission is interrupted, serial reception can still operate normally.
Smart Images
Figure CN119396759A_ABST
Abstract
Description
Technical Field
[0001] The embodiments of the present application relate to the field of communication technology, and in particular to a reliable asynchronous serial communication method. Background Art
[0002] Serial communication (SC) is a communication method that sends and receives bytes bit by bit. Common serial communication methods include synchronous serial communication and asynchronous serial communication. Among them, asynchronous serial communication is a frequently used communication method between the host and external hardware. It can realize two-way transmission, and asynchronous serial communication does not require a synchronous clock signal during communication. The baud rate can be agreed upon in advance between devices.
[0003] In actual application scenarios, two devices using asynchronous serial communication agree on the character frame format and baud rate for communication. Under normal circumstances, according to the agreed protocol, after completing data reception, the data needs to be checked to determine the validity of the received data. When the frame header and check byte of the entire frame of data are checked correctly, it can be determined that the frame data is valid and allowed to be stored. If one of the frame header and check byte is checked incorrectly, the entire frame of data is discarded and communication fails.
[0004] Generally speaking, the device receiving data determines whether the receiving data has ended by accumulating the counter. For example, if the agreed protocol transmits a total of 10 bytes of data, then the frame header and frame tail of the received data can be checked when the counter accumulates to 10. However, in a certain abnormal communication, the sender stops for some reason after sending 2 bytes of data, while the receiver continues to receive. The counter is always waiting at 2. When the sender recovers and starts sending data again, the counter continues to accumulate from 2 to 10. The data actually received by the receiver will be misplaced. At this time, the data is invalid when checking, and the communication fails. Summary of the invention
[0005] In view of this, the embodiment of the present application proposes a reliable asynchronous serial communication method, which solves the problem of abnormal reception after sudden interruption and recovery during data transmission by receiving data sliding verification, thereby improving the accuracy of asynchronous serial communication.
[0006] To achieve the above-mentioned purpose, an embodiment of the present application proposes a reliable asynchronous serial communication method, which includes the following steps: receiving frame data sent by a data sending end through a preset serial communication protocol and agreeing on a frame header and a check byte with the data sending end, performing a sliding verification after each byte is received to verify whether the current highest byte is the agreed frame header; if the current highest byte is not the agreed frame header, directly waiting for receiving the next byte; if the current highest byte is the agreed frame header, verifying whether the byte at the check byte is the agreed check byte; if the byte at the check byte is not the agreed check byte, directly waiting for receiving the next byte; if the byte at the check byte is the agreed check byte, completing the reception of the current frame data.
[0007] Optionally, when agreeing on a frame header and a check byte with the data sending end through a preset serial port protocol, it is also necessary to agree on a frame tail with the data sending end through a preset serial port protocol, and the frame tail position is located before the check byte position, or the frame tail position is located after the check byte position; while verifying whether the byte at the check byte is the agreed check byte, it is also necessary to verify whether the byte at the frame tail position is the agreed frame tail; if the byte at the check byte is not the agreed check byte, or the byte at the frame tail position is not the agreed frame tail, then directly wait to receive the next byte; if the byte at the check byte is the agreed check byte, and the byte at the frame tail position is the agreed frame tail, then the reception of the current frame data is completed.
[0008] Optionally, after agreeing on a frame header and a check byte with the data sending end through a preset serial port protocol and before receiving the frame data sent by the data sending end, the method further includes: defining a 40-bit variable T0[39:0] for temporarily storing the received byte; performing a sliding verification after each byte is received to verify whether the current highest byte is the agreed frame header, including: after receiving a byte d, removing the highest byte in the variable T0[39:0], assigning the byte d to the variable T0[39:0] to obtain the variable T1[3 9:0], the assignment process is recorded as T1[39:0]={T0[31:0],d}; verify whether the current highest byte T1[39:32] of the variable T1[39:0] is the agreed frame header; if the current highest byte T1[39:32] of the variable T1[39:0] is the agreed frame header, then verify whether the byte T1[7:0] at the check byte of the variable T1[39:0] is the agreed check byte, and at the same time verify whether the byte T1[15:8] at the frame tail position of the variable T1[39:0] is the agreed frame tail.
[0009] Optionally, after agreeing on a frame header and a check byte with the data sending end through a preset serial port protocol and before receiving the frame data sent by the data sending end, the method further includes: defining a 40-bit variable T0[39:0] for temporarily storing the received byte; performing a sliding verification after each byte is received to verify whether the current highest byte is the agreed frame header, including: after receiving a byte d, removing the highest byte in the variable T0[39:0], assigning the byte d to the variable T0[39:0] to obtain the variable T1[3 9:0], the assignment process is recorded as T1[39:0]={T0[31:0],d}; verify whether the current highest byte T1[39:32] of the variable T1[39:0] is the agreed frame header; if the current highest byte T1[39:32] of the variable T1[39:0] is the agreed frame header, then verify whether the byte T1[15:8] at the check byte of the variable T1[39:0] is the agreed check byte, and at the same time verify whether the byte T1[7:0] at the frame tail position of the variable T1[39:0] is the agreed frame tail.
[0010] Optionally, the preset serial port communication protocol includes but is not limited to UART protocol, RS-232 protocol, RS-422 protocol, RS-485 protocol, MODBUS protocol, CAN bus protocol, I2C protocol and SPI protocol.
[0011] Optionally, completing the reception of the current frame data specifically includes: pulling a reception completion indication high.
[0012] To achieve the above-mentioned purpose, an embodiment of the present application also proposes a reliable asynchronous serial communication system, which includes a data sending end and a data receiving end, and the data receiving end is composed of an agreement module, a receiving module, a frame header verification module and a check byte verification module; the data sending end is used to send frame data; the agreement module is used to agree on the frame header and check byte with the data sending end through a preset serial communication protocol; the receiving module is used to receive the frame data sent by the data sending end; the frame header verification module is used to perform sliding verification after each byte is received to verify whether the current highest byte is the agreed frame header. If it is verified that the current highest byte is not the agreed frame header, the receiving module is notified to wait for the next byte to be received. If it is verified that the current highest byte is the agreed frame header, the check byte verification module is started; the check byte verification module is used to verify whether the byte at the check byte is the agreed check byte. If it is verified that the byte at the check byte is not the agreed check byte, the receiving module is notified to wait for the next byte to be received. If it is verified that the byte at the check byte is the agreed check byte, the reception of the current frame data is completed.
[0013] Optionally, a frame end verification module is also provided in the data receiving end; the check byte verification module is also used to start the frame end verification module when it is verified that the byte at the check byte is the agreed check byte; the frame end verification module is used to verify whether the byte at the frame end is the agreed frame end. If it is verified that the byte at the frame end is not the agreed frame end, the receiving module is notified to wait for receiving the next byte. If it is verified that the byte at the frame end is the agreed frame end, the reception of the current frame data is completed; or, the frame header verification module is also used to start the frame end verification module when it is verified that the current highest byte is the agreed frame header; the frame end verification module is used to verify whether the byte at the frame end is the agreed frame end. If it is verified that the byte at the frame end is not the agreed frame end, the receiving module is notified to wait for receiving the next byte. If it is verified that the byte at the frame end is the agreed frame end, the check byte verification module is started.
[0014] To achieve the above-mentioned purpose, an embodiment of the present application also proposes a data receiving end, which includes: at least one processor; and a memory communicatively connected to the at least one processor; wherein the memory stores instructions executable by the at least one processor, and the instructions are executed by the at least one processor so that the at least one processor can execute a reliable asynchronous serial port communication method as described above.
[0015] To achieve the above objectives, an embodiment of the present application further proposes a computer-readable storage medium, in which a computer program is stored. When the computer program is executed by a processor, it can implement a reliable asynchronous serial communication method as described above.
[0016] The embodiment of the present application proposes a reliable asynchronous serial communication method. First, the frame header and check byte are agreed with the data sending end through a preset serial communication protocol. After the agreement is completed, the data receiving end starts to receive the frame data sent by the data sending end. On the basis of the original received data, a sliding verification is performed after each byte is received to verify whether the current highest byte is the agreed frame header. If it is a frame header, then verify whether the byte at the check byte is the agreed check byte. If the byte at the check byte is the agreed check byte, it can be considered that the current frame data is valid and the reception of the current frame data is completed. By using the method of receiving data sliding verification, there is no need to use a counter, and the design is compatible with abnormal states, which solves the problem that the reception is always abnormal after a sudden interruption and recovery during the data transmission process. Even if the data transmission is restored after the interruption, the serial port reception can still operate normally, thereby effectively improving the reliability and accuracy of asynchronous serial communication. BRIEF DESCRIPTION OF THE DRAWINGS
[0017] In order to more clearly illustrate the embodiments of the present application or the technical solutions in the related technologies, the drawings required for use in the embodiments of the present application or the related technical descriptions will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.
[0018] Figure 1 It is a schematic diagram of a traditional serial port receiving using a counter;
[0019] Figure 2 is a flow chart of a reliable asynchronous serial communication method provided in one embodiment of the present application;
[0020] Figure 3 It is a level change diagram of a conventional serial port receiving using a counter provided in one embodiment of the present application;
[0021] Figure 4 is a level change diagram of a reliable asynchronous serial communication method provided in one embodiment of the present application;
[0022] Figure 5 is a structural schematic diagram of a reliable asynchronous serial communication system provided in another embodiment of the present application;
[0023] Figure 6 It is a structural diagram of a data receiving end provided in another embodiment of the present application. DETAILED DESCRIPTION
[0024] In order to make the purpose, technical scheme and advantages of the embodiments of the present application clearer, the embodiments of the present application will be described in detail below in conjunction with the accompanying drawings. In the various embodiments of the present application, many technical details are proposed in order to make the reader better understand the present application. However, even without these technical details and various changes and modifications based on the following embodiments, the technical scheme claimed in the present application can also be implemented. The division of the following embodiments is only for the convenience of description, and the specific implementation mode of the present application should not constitute any limitation. The various embodiments can be combined with each other and referenced to each other under the premise of no contradiction.
[0025] At present, the data receiving end generally determines whether the data reception is completed by accumulating the counter. For example, if the agreed protocol transmits a total of 10 bytes of data, the frame header and frame tail verification can be performed when the counter accumulates to 10. In a certain abnormal communication, the data sending end stops after sending 2 bytes of data, while the data receiving end continues to receive. The counter is always waiting at 2. When the data sending end starts sending again, the counter continues to accumulate to 10. The data at the actual data receiving end is misplaced. After receiving, the data is verified and the data is invalid, so the communication fails. This process is as follows: Figure 1 shown.
[0026] In order to solve the problem that the reception is always abnormal after the data transmission process is suddenly interrupted and then restored, an embodiment of the present application proposes a reliable asynchronous serial port communication method, which is applied to the data receiving end. The implementation details of the reliable asynchronous serial port communication method proposed in this embodiment are specifically described below. The following content is only the relevant implementation details provided for the convenience of understanding, and is not necessary for the implementation of this solution.
[0027] The specific process of a reliable asynchronous serial communication method proposed in this embodiment can be as follows: Figure 2 As shown, including:
[0028] Step 101, agreeing on a frame header and a check byte with a data transmitting end through a preset serial communication protocol.
[0029] In a specific implementation, the data receiving end first needs to agree on a frame header and a check byte with the data sending end through a preset serial communication protocol (that is, the serial communication protocol to be used when communicating) to facilitate subsequent sliding verification.
[0030] In one example, the preset serial communication protocol includes but is not limited to UART protocol, RS-232 protocol, RS-422 protocol, RS-485 protocol, MODBUS protocol, CAN bus protocol, I2C protocol and SPI protocol.
[0031] In an example, the data receiving end needs to agree on a frame header and a check byte with the data receiving end as well as a frame tail, which can be located before or after the check byte.
[0032] In one example, the data transmitter sends hexadecimal frame data, which has five bytes and is transmitted via an asynchronous serial port at a transmission rate of 115200 Gbits. The agreed frame header is 8'h5A, the agreed frame tail is 8'h13, and the agreed check byte is 8'h91. The correctly transmitted frame data should be 8'h5A, 8'h10, 8'h14, 8'h13, and 8'h91.
[0033] Step 102, receiving frame data sent by the data sending end, and performing sliding verification after each byte is received.
[0034] Step 103, verify whether the current highest byte is the agreed frame header, if so, execute step 104, otherwise directly execute step 106.
[0035] In the specific implementation, after the data receiving end completes the agreement with the data sending end, it can start to receive the frame data sent by the data sending end, and perform sliding verification after each byte is received. The first thing to do is to verify the frame header. The data receiving end verifies whether the current highest byte is the agreed frame header. If it is, it can perform subsequent verification of the check byte (in some cases, it is also necessary to verify the end of the frame). If not, it means that there is a problem with data reception, and the data receiving end will directly wait to receive the next byte.
[0036] In one example, after the data receiving end completes the agreement with the data sending end, before starting to receive the frame data sent by the data sending end, it is also necessary to define a 40-bit variable T0[39:0], which is used to temporarily store the received bytes. After receiving a byte d, the data receiving end removes the highest byte in the variable T0[39:0] and assigns the byte d to the variable T0[39:0] to obtain the variable T1[39:0]. The assignment process can be recorded as T1[39:0] = {T0[31:0], d}. The data receiving end then verifies whether the current highest byte T1[39:32] of the variable T1[39:0] is the agreed frame header. If so, it performs subsequent verification of the check byte (in some cases, it also performs verification of the frame tail). If not, it directly waits for receiving the next byte.
[0037] In one example, the data transmitter sends hexadecimal frame data, which has five bytes. The correct frame data is 8'h5A, 8'h10, 8'h14, 8'h13, and 8'h91. The agreed frame header is 8'h5A, so the data receiver needs to verify whether the current highest byte T1[39:32] of the variable T1[39:0] is 8'h5A. If it is 8'h5A, the subsequent check byte verification is performed (in some cases, the frame end verification is also performed). If it is not 8'h5A, it will directly wait for the next byte to be received.
[0038] Step 104, verify whether the byte at the check byte is the agreed check byte, if so, execute step 105, otherwise directly execute step 106.
[0039] Step 105, completing the reception of the current frame data.
[0040] Step 106, directly wait for receiving the next byte.
[0041] In the specific implementation, after verifying that the current highest byte is the agreed frame header, the server needs to continue to verify whether the byte at the check byte is the agreed check byte. If so, the reception of the current frame data is completed, and the reception completion indication is pulled high. If not, it directly waits for receiving the next byte.
[0042] In one example, the data receiving end needs to verify whether the byte at the check byte is the agreed check byte and whether the byte at the frame tail position is the agreed frame tail. If it is verified that the byte at the check byte is not the agreed check byte, or the byte at the frame tail position is not the agreed frame tail, the data receiving end directly waits to receive the next byte. If it is verified that the byte at the check byte is the agreed check byte, and the byte at the frame tail position is the agreed frame tail, the data receiving end completes the reception of the current frame data.
[0043] In one example, the data transmitter sends hexadecimal frame data, which has five bytes. The correct frame data is 8'h5A, 8'h10, 8'h14, 8'h13, and 8'h91. The fourth byte is agreed to be the end of the frame, and the fifth byte is the check byte. After verifying that the current highest byte T1[39:32] of the variable T1[39:0] is the agreed frame header, the data receiver continues to verify whether the byte T1[7:0] at the check byte of the variable T1[39:0] is the agreed check byte, and at the same time, verifies whether the byte T1[15:8] at the end of the frame of the variable T1[39:0] is the agreed frame end. If it is verified that the byte T1[7:0] at the check byte of the variable T1[39:0] is the agreed check byte, and the byte T1[15:8] at the end of the frame of the variable T1[39:0] is the agreed frame end, the reception of the current frame data is completed.
[0044] In one example, the data transmitter sends hexadecimal frame data, and the frame data sent has five bytes. The correct frame data is 8'h5A, 8'h10, 8'h14, 8'h13, and 8'h91. It is agreed that the fifth byte is the end of the frame, and the fourth byte is the check byte. After verifying that the current highest byte T1[39:32] of the variable T1[39:0] is the agreed frame header, the data receiver continues to verify whether the byte T1[15:8] at the check byte of the variable T1[39:0] is the agreed check byte, and at the same time, verifies whether the byte T1[7:0] at the end of the frame of the variable T1[39:0] is the agreed frame end. If it is verified that the byte T1[15:8] at the check byte of the variable T1[39:0] is the agreed check byte, and the byte T1[7:0] at the end of the frame of the variable T1[39:0] is the agreed frame end, the reception of the current frame data is completed.
[0045] It is worth noting that when the data sending end sends abnormally, that is, it is suddenly interrupted and then returns to normal, the traditional method will always be in the receiving unsuccessful state (that is, rx_done is always at a low level). Figure 3 The rx_done part in this application does not use a counter, and gradually removes the data received before the interruption by sliding verification. After the data transmission interruption returns to normal, the serial port reception can still operate normally. This can be referred to Figure 4 The rx_done section in the
[0046] In an example, suppose the data transmitter is interrupted after sending two bytes (the frame data has five bytes in total), and then returns to normal after a certain period of time and resends the frame data. The data received by the data receiver will start again from the first byte. The first two bytes will gradually move out of the variable T1[39:0] due to sliding verification until all five bytes are completely entered into the variable T1[39:0]. The verification of the frame data will pass, and data reception is completed.
[0047] In this embodiment, the frame header and check byte are first agreed with the data sending end through the preset serial communication protocol. After the agreement is completed, the data receiving end starts to receive the frame data sent by the data sending end. On the basis of the original received data, a sliding verification is performed after each byte is received to verify whether the current highest byte is the agreed frame header. If it is a frame header, then verify whether the byte at the check byte is the agreed check byte. If the byte at the check byte is the agreed check byte, it can be considered that the current frame data is valid and the reception of the current frame data is completed. By using the method of receiving data sliding verification, it is no longer necessary to use a counter, and the design is compatible with abnormal states, which solves the problem that the reception is always abnormal after a sudden interruption and recovery during the data transmission process. Even if the data transmission is restored after the interruption, the serial port reception can still operate normally, thereby effectively improving the reliability and accuracy of asynchronous serial communication.
[0048] The step division of the above methods is only for clear description. When implemented, they can be combined into one step or some steps can be split and decomposed into multiple steps. As long as they include the same logical relationship, they are all within the scope of protection of this application; adding insignificant modifications to the algorithm or process or introducing insignificant designs without changing the core design of the algorithm and process are all within the scope of protection of this application.
[0049] Another embodiment of the present application proposes a reliable asynchronous serial communication system. The implementation details of the reliable asynchronous serial communication system proposed in this embodiment are specifically described below. The following content is only the implementation details provided for ease of understanding and is not necessary for implementing this example.
[0050] Figure 5 1 is a schematic diagram of the structure of a reliable asynchronous serial communication system proposed in this embodiment, the system includes: a data sending end 200 and a data receiving end 300, the data receiving end 300 is composed of a protocol module 301, a receiving module 302, a frame header verification module 303 and a check byte verification module 304.
[0051] The data sending end 200 is used to send frame data.
[0052] The agreement module 301 is used to agree on the frame header and the check byte with the data sending end 200 through a preset serial communication protocol.
[0053] The receiving module 302 is used to receive frame data sent by the data sending end 200 .
[0054] The frame header verification module 303 is used to perform sliding verification after each byte is received to verify whether the current highest byte is the agreed frame header. If it is verified that the current highest byte is not the agreed frame header, the receiving module 302 is notified to wait for receiving the next byte. If it is verified that the current highest byte is the agreed frame header, the check byte verification module 304 is started.
[0055] The check byte verification module 304 is used to verify whether the byte at the check byte is the agreed check byte. If it is verified that the byte at the check byte is not the agreed check byte, the receiving module 302 is notified to wait for receiving the next byte. If it is verified that the byte at the check byte is the agreed check byte, the reception of the current frame data is completed.
[0056] In one example, a frame tail verification module is also provided in the data receiving end, and the frame tail verification module is connected to the rear of the check byte verification module. The check byte verification module is also used to start the frame tail verification module when it is verified that the byte at the check byte is the agreed check byte. The frame tail verification module is used to verify whether the byte at the end of the frame is the agreed frame end. If it is verified that the byte at the end of the frame is not the agreed frame end, the receiving module is notified to wait for the next byte to be received. If it is verified that the byte at the end of the frame is the agreed frame end, the reception of the current frame data is completed.
[0057] In one example, a frame tail verification module is also provided in the data receiving end, and the frame tail verification module is connected between the frame header verification module and the check byte verification module. The frame header verification module is also used to start the frame tail verification module when it is verified that the current highest byte is the agreed frame header. The frame tail verification module is used to verify whether the byte at the end of the frame is the agreed frame end. If it is verified that the byte at the end of the frame is not the agreed frame end, the receiving module is notified to wait for the next byte to be received. If it is verified that the byte at the end of the frame is the agreed frame end, the check byte verification module is started.
[0058] It is worth mentioning that all modules involved in this embodiment are logic modules. In practical applications, a logic unit can be a physical unit, a part of a physical unit, or a combination of multiple physical units. In addition, in order to highlight the innovative part of this application, this embodiment does not introduce units that are not closely related to solving the technical problems proposed by this application, but this does not mean that there are no other units in this embodiment.
[0059] It is not difficult to find that this embodiment is a system embodiment corresponding to the above method embodiment, and this embodiment can be implemented in conjunction with the above method embodiment. The relevant technical details and technical effects mentioned in the above embodiments are still valid in this embodiment, and in order to reduce repetition, they are not repeated here. Accordingly, the relevant technical details mentioned in this embodiment can also be applied in the above embodiments.
[0060] Another embodiment of the present application proposes a data receiving end, whose specific structure is as follows: Figure 6 As shown, it includes: at least one processor 301; and a memory 302 that is communicatively connected to the at least one processor 301; wherein the memory 302 stores instructions that can be executed by the at least one processor 301, and the instructions are executed by the at least one processor 301 so that the at least one processor 301 can execute a reliable asynchronous serial communication method described in the above-mentioned method embodiments.
[0061] Among them, the memory and the processor are connected in a bus manner, and the bus may include any number of interconnected buses and bridges, and the bus connects various circuits of one or more processors and memories together. The bus can also connect various other circuits such as peripheral devices, voltage regulators, and power management circuits, which are well known in the art and will not be further described in this article. The bus interface is responsible for providing an interface between the bus and the transceiver. The transceiver can be one component or multiple components, such as multiple receivers and transmitters, providing a unit for communicating with various other devices on a transmission medium. The data processed by the processor is transmitted on a wireless medium through an antenna, and further, the antenna also receives data and transmits the data to the processor.
[0062] The processor is responsible for managing the bus and general processing, and can also provide various functions, including timing, peripheral interfaces, voltage regulation, power management, and other control functions. Memory can be used to store data used by the processor when performing operations.
[0063] Another embodiment of the present application provides a computer-readable storage medium storing a computer program. When the computer program is executed by a processor, it can implement a reliable asynchronous serial communication method described in the above method embodiments.
[0064] That is, those skilled in the art can understand that all or part of the steps in the above-mentioned embodiment method can be completed by instructing the relevant hardware through a program, and the program is stored in a storage medium, including a number of instructions to enable a device (which can be a single-chip microcomputer, chip, etc.) or a processor to execute all or part of the steps of the method described in each embodiment of the present application. The aforementioned storage medium includes: U disk, mobile hard disk, ROM (Read-Only Memory), RAM (Random Access Memory), disk or optical disk and other media that can store program codes.
[0065] Those skilled in the art will appreciate that the above embodiments are specific embodiments for implementing the present application, and in actual applications, various changes may be made thereto in form and detail without departing from the spirit and scope of the present application.
Claims
1. A reliable asynchronous serial communication method, applied to a data receiving end, characterized in that: include: Agree on the frame header and check byte with the data sender through the preset serial communication protocol; Receive the frame data sent by the data sender, and perform sliding verification after each byte is received to verify whether the current highest byte is the agreed frame header; If the current highest byte is not the agreed frame header, it will directly wait for receiving the next byte; If the current highest byte is the agreed frame header, then verify whether the byte at the check byte is the agreed check byte; If the byte at the check byte is not the agreed check byte, it will directly wait for receiving the next byte; If the byte at the check byte position is the agreed check byte, the reception of the current frame data is completed.
2. A reliable asynchronous serial communication method according to claim 1, characterized in that: When agreeing on a frame header and a check byte with the data sending end through a preset serial port protocol, it is also necessary to agree on a frame tail with the data sending end through a preset serial port protocol, and the frame tail position is located before the check byte position, or the frame tail position is located after the check byte position; While verifying whether the byte at the check byte is the agreed check byte, it is also necessary to verify whether the byte at the frame tail position is the agreed frame tail; If the byte at the check byte position is not the agreed check byte, or the byte at the frame end position is not the agreed frame end, then wait directly for receiving the next byte; If the byte at the check byte position is the agreed check byte, and the byte at the frame tail position is the agreed frame tail, the reception of the current frame data is completed.
3. A reliable asynchronous serial communication method according to claim 2, characterized in that: After agreeing on a frame header and a check byte with the data transmitting end through a preset serial port protocol and before receiving frame data sent by the data transmitting end, the method further includes: Define a 40-bit variable T0[39:0] to temporarily store the received bytes; After each byte is received, a sliding verification is performed to verify whether the current highest byte is the agreed frame header, including: After receiving a byte d, remove the highest byte in the variable T0[39:0], assign the byte d to the variable T0[39:0] to obtain the variable T1[39:0], and the assignment process is recorded as T1[39:0]={T0[31:0], d}; Verify whether the current highest byte T1[39:32] of variable T1[39:0] is the agreed frame header; If the current highest byte T1[39:32] of the variable T1[39:0] is the agreed frame header, then verify whether the byte T1[7:0] at the check byte of the variable T1[39:0] is the agreed check byte, and at the same time verify whether the byte T1[15:8] at the frame tail position of the variable T1[39:0] is the agreed frame tail.
4. A reliable asynchronous serial communication method according to claim 2, characterized in that: After agreeing on a frame header and a check byte with the data transmitting end through a preset serial port protocol and before receiving frame data sent by the data transmitting end, the method further includes: Define a 40-bit variable T0[39:0] to temporarily store the received bytes; After each byte is received, a sliding verification is performed to verify whether the current highest byte is the agreed frame header, including: After receiving a byte d, remove the highest byte in the variable T0[39:0], assign the byte d to the variable T0[39:0] to obtain the variable T1[39:0], and the assignment process is recorded as T1[39:0]={T0[31:0], d}; Verify whether the current highest byte T1[39:32] of variable T1[39:0] is the agreed frame header; If the current highest byte T1[39:32] of the variable T1[39:0] is the agreed frame header, then verify whether the byte T1[15:8] at the check byte of the variable T1[39:0] is the agreed check byte, and at the same time verify whether the byte T1[7:0] at the frame tail position of the variable T1[39:0] is the agreed frame tail.
5. A reliable asynchronous serial communication method according to any one of claims 1 to 4, characterized in that: The preset serial communication protocols include but are not limited to UART protocol, RS-232 protocol, RS-422 protocol, RS-485 protocol, MODBUS protocol, CAN bus protocol, I2C protocol and SPI protocol.
6. A reliable asynchronous serial communication method according to any one of claims 1 to 4, characterized in that: The reception of the current frame data is completed by pulling the reception completion indication high.
7. A reliable asynchronous serial communication system, characterized in that: include: The data sending end and the data receiving end, the data receiving end is composed of a protocol module, a receiving module, a frame header verification module and a check byte verification module; The data sending end is used to send frame data; The agreement module is used to agree on the frame header and check byte with the data sending end through a preset serial communication protocol; The receiving module is used to receive frame data sent by the data sending end; The frame header verification module is used to perform sliding verification after each byte is received to verify whether the current highest byte is the agreed frame header. If it is verified that the current highest byte is not the agreed frame header, the receiving module is notified to wait for the next byte to be received. If it is verified that the current highest byte is the agreed frame header, the check byte verification module is started; The check byte verification module is used to verify whether the byte at the check byte is the agreed check byte. If it is verified that the byte at the check byte is not the agreed check byte, the receiving module is notified to wait for receiving the next byte. If it is verified that the byte at the check byte is the agreed check byte, the reception of the current frame data is completed.
8. A reliable asynchronous serial communication system according to claim 7, characterized in that: The data receiving end is also provided with a frame tail verification module; The check byte verification module is also used to start the frame end verification module when it is verified that the byte at the check byte position is the agreed check byte; The frame end verification module is used to verify whether the byte at the end of the frame is the agreed frame end. If it is verified that the byte at the end of the frame is not the agreed frame end, the receiving module is notified to wait for the next byte to be received. If it is verified that the byte at the end of the frame is the agreed frame end, the reception of the current frame data is completed. Alternatively, the frame header verification module is further used to start the frame tail verification module when verifying that the current highest byte is the agreed frame header; The frame end verification module is used to verify whether the byte at the end of the frame is the agreed frame end. If it is verified that the byte at the end of the frame is not the agreed frame end, the receiving module is notified to wait for receiving the next byte. If it is verified that the byte at the end of the frame is the agreed frame end, the check byte verification module is started.
9. A data receiving end, characterized in that: include: at least one processor; and, a memory communicatively coupled to the at least one processor; The memory stores instructions executable by the at least one processor, and the instructions are executed by the at least one processor so that the at least one processor can execute a reliable asynchronous serial communication method as described in any one of claims 1 to 7.
10. A computer-readable storage medium storing a computer program, characterized in that: When the computer program is executed by a processor, a reliable asynchronous serial communication method according to any one of claims 1 to 7 can be implemented.