Preparation method of semiconductor material and device

Abstract

The invention discloses a preparation method of a semiconductor material and a device, and the method comprises the steps: preparing two substrates, namely a substrate W1 and a substrate W2, stripping a part of the upper part of the substrate W2, bonding the part with a polycrystal Si C surface 110 grown on the substrate W1, forming a polycrystal SiC layer on the W1 and a high-quality single crystal S iC layer on the polycrystal SiC layer, and carrying out the epitaxy of the high-quality S iC layer to form a composite epitaxial material. The chip manufacturing is completed by performing chip process processing on the composite epitaxial material, so that the loss and waste of the SiC material in the preparation process of the SiC material and the device can be effectively reduced, the production efficiency is improved, and the great reduction of the cost of the device is facilitated.

Description

Technical Field

[0001] The present invention relates to the technical field of prenatal ultrasonic image processing, and more particularly to a method for preparing a semiconductor material and a device. Background Art

[0002] Compared with Si, wide bandgap semiconductor materials SiC and GaN have about 3 times the bandgap width, 10 times the critical breakdown electric field strength, and higher electron mobility. Therefore, SiC and GaN devices have advantages over Si devices such as higher withstand voltage, operating frequency, efficiency and temperature resistance. Power electronic systems based on wide bandgap semiconductor materials SiC and GaN devices can not only reduce switching losses by more than half, but also make the equipment smaller in size, weight and comprehensive cost advantages, which is the development direction of the new generation of power electronic systems.

[0003] Compared with Si single crystal materials, the cost of SiC and GaN materials is relatively high. For example, SiC is mainly because SiC is a compound semiconductor material with many crystal forms and no liquid phase, so it is difficult to grow. The current mature method of growing SiC single crystal materials is to use physical vapor transport, namely the PVT method. This is a method of vaporizing SiC powder at high temperature and then depositing it on a seed crystal for growth, and the growth rate is very slow. At the same time, due to the strong chemical bonds and large Young's modulus of SiC, the material is relatively hard and brittle, and the processing efficiency of the material is relatively low and the cost is high. For example, the processing flow commonly used in the current SiC crystal processing production line is mainly divided into multiple processes such as flattening, rounding, cutting, rough grinding, fine grinding, mechanical polishing, chemical mechanical polishing, cleaning, and testing. SiC materials with a diameter close to the cutting line will be ground into debris (150-250μm), which is called saw cut loss (KerfLoss), and the high-speed walking process of the cutting line will also cause 20-50μm roughness and surface / subsurface structural damage, which must be removed by subsequent grinding and polishing processes. The total material loss accounts for 30%-50% of the raw material. In addition, although the processing cost of SiC single crystal substrates is very high, the substrate is only used as a substrate and supporting material during the epitaxy and device (chip) manufacturing process, and is not a functional part of the chip. At the end of chip manufacturing, most of the substrate thickness will be ground away to reduce resistance and thermal resistance. Due to the high hardness of SiC materials, the final grinding in the chip manufacturing process is very difficult and inefficient, which is also a very high cost. The same similar situation also applies to the preparation of GaN materials and devices. Therefore, inventing a method for preparing materials and devices suitable for wide bandgap semiconductors such as SiC and GaN to reduce material loss and waste during the preparation process and improve production efficiency is one of the core methods for significantly reducing the cost of materials and devices for wide bandgap semiconductors, and it is also the focus of research and development in the industry. Summary of the invention

[0004] 1. Technical issues to be solved

[0005] In view of the problems existing in the prior art, the present invention provides a method for preparing a semiconductor material and a device to solve the technical problems mentioned in the background technology.

[0006] (II) Technical solution

[0007] To achieve the above object, the present invention provides the following technical solution: a method for preparing a semiconductor material and a device, comprising the following steps:

[0008] Step 1: prepare two substrates, namely substrate W1 and substrate W2; deposit a layer of polycrystalline low-resistance SiC thin film on the upper surface of substrate W1, which can be deposited by CVD method; perform ion implantation or laser to form a modified layer at a certain depth on the upper surface of substrate W2;

[0009] Step 2: The top surface of the substrate W2 is bonded to the polycrystalline SiC surface 110 of the substrate W1, and a chemical bond is formed between the interfaces to form a very strong bonding force;

[0010] Step 3: Separate the surface thin layer W2a of the substrate W2 from the substrate by heat or mechanical means, complete the peeling of the thin layer W2a, and form a composite substrate having a polycrystalline SiC layer on W1 and a bonded single crystal SiC layer on the polycrystalline SiC layer, polish the surface 201 of the composite substrate to obtain a very flat and smooth high-quality surface for subsequent epitaxial growth, epitaxially grow a SiC epitaxial layer 30 on the composite substrate, and the concentration and thickness of the epitaxial layer are determined according to the withstand voltage design of the device to form a composite epitaxial material;

[0011] Step 4: Perform chip processing on the composite epitaxial material, ion implantation and activation annealing to form different types of doped layers, thermal oxidation to form a gate dielectric layer, deposition and etching of polysilicon to form a gate, growth of an interlayer dielectric layer to isolate the source and the gate, opening of a dielectric on the source and performing an ohmic contact process, deposition and etching of metal to form a source and gate block metal, and application of a passivation layer to complete the front side process of the chip;

[0012] Step 5: Apply glue 40 to the front side of the wafer and temporarily bond it to a substrate W3 (50);

[0013] Step 6: Use laser to irradiate from the back side of W1 substrate and focus on the interface between W1 and polysilicon to form a modified layer, then peel off the W1 substrate, deposit metal on the surface of polysilicon, perform laser annealing to form ohmic contact, and then deposit thick block metal 60;

[0014] Step 7: Peel off the temporary bonding substrate 50 on the front side, clean and remove the glue 40, and complete the preparation of the device.

[0015] The present invention is further configured as follows: in step 1, W1 is a supporting material in the subsequent material device preparation process, which can be various crystal materials; W2 is a material provider in the preparation process, which is a high-quality 4H-SiC crystal; W1 material is generally a transparent material, so that most of the laser energy can pass through the W1 substrate during the subsequent laser lift-off process, and SiC material is preferably used.

[0016] The present invention is further configured such that the thickness of the SiC polycrystalline film in the step one has certain requirements, which must be greater than the thickness of the polycrystalline SiC film that is totally lost during the subsequent laser peeling of the substrate W1 and the polycrystalline film and the back polishing after peeling, that is, a certain thickness of the polycrystalline SiC film still remains at the end for the subsequent back ohmic contact process.

[0017] The present invention is further configured such that, since the epitaxy in step three is performed on high-quality W2a, the epitaxial layer formed has the characteristics of a high-quality single crystal, thereby ensuring the quality and reliability of the device. At the same time, the lattice damage caused by ion implantation in the W2a layer is repaired through high-temperature treatment during the epitaxial process.

[0018] The present invention is further configured such that the substrate material in step five may be various supporting materials such as silicon carbide, silicon or sapphire.

[0019] The present invention is further configured such that the substrate W1 can continue to be used as a supporting material for manufacturing new devices after being polished in step six, and can be reused, thereby reducing costs.

[0020] (III) Beneficial effects

[0021] Compared with the prior art, the present invention provides a method for preparing a semiconductor material and a device, which has the following beneficial effects:

[0022] The present invention provides a method for preparing semiconductor materials and devices, which can effectively reduce the loss and waste of SiC materials in the process of preparing SiC materials and devices. A high-quality SiC substrate W2 can peel off a part of W2a each time for device preparation. Therefore, the thickness of the W2 substrate does not need to be the common standard thickness of 350um in the current process. The thickness of the W2 substrate can be thicker, even to more than 1mm, which can effectively reduce the loss of the ingot cutting, grinding and other processes in the W2 substrate processing process, and improve production efficiency. In the chip manufacturing process, the W1 substrate and the base plate W3 can be reused without loss. Compared with the current general silicon carbide device preparation process, it does not require a large thinning of the substrate, thereby saving a large amount of substrate material and process costs. A piece of W2 substrate material can be peeled off by about 1um at a minimum each time, and can be divided into hundreds of pieces for use, which greatly reduces the cost of materials. BRIEF DESCRIPTION OF THE DRAWINGS

[0023] Figure 1 It is a schematic diagram of the process of two substrates (substrate W1 and substrate W2) before bonding in a specific embodiment of the present invention;

[0024] Figure 2 Schematic diagram of bonding the upper portion of the substrate W2 to the polycrystalline SiC surface of the substrate W1 in a specific embodiment of the present invention;

[0025] Figure 3 A schematic diagram of growing epitaxial material on a bonded composite substrate in a specific embodiment of the present invention;

[0026] Figure 4 It is a schematic diagram of a front device process after the composite epitaxial material is completed in a specific embodiment of the present invention;

[0027] Figure 5 It is a schematic diagram of temporarily bonding to a substrate after completing the front device process in a specific embodiment of the present invention;

[0028] Figure 6 It is a schematic diagram of the process after the W1 substrate is peeled off and the device process on the back side of the wafer is completed in a specific embodiment of the present invention;

[0029] Figure 7 It is a schematic diagram of a wafer after peeling off the zero-time bonding substrate on the front side in a specific embodiment of the present invention; DETAILED DESCRIPTION

[0030] Embodiment 1:

[0031] like Figure 1 As shown, the present invention discloses a method for preparing a semiconductor material and a device, comprising the following steps:

[0032] Step 1: prepare two substrates, namely substrate W1 and substrate W2; deposit a layer of polycrystalline low-resistance SiC thin film on the upper surface of substrate W1, which can be deposited by CVD method; perform ion implantation or laser to form a modified layer at a certain depth on the upper surface of substrate W2;

[0033] Step 2: The top surface of the substrate W2 is bonded to the polycrystalline SiC surface 110 of the substrate W1, and a chemical bond is formed between the interfaces to form a very strong bonding force;

[0034] Step 3: Separate the surface thin layer W2a of the substrate W2 from the substrate by thermal or mechanical means, complete the peeling of the thin layer W2a, and form a composite substrate having a polycrystalline SiC layer on W1 and a bonded single crystal SiC layer on the polycrystalline SiC layer, polish the surface 201 of the composite substrate to obtain a very flat and smooth high-quality surface for subsequent epitaxial growth, epitaxially grow a SiC epitaxial layer 30 on the composite substrate, and the concentration and thickness of the epitaxial layer are determined according to the withstand voltage design of the device to form a composite epitaxial material;

[0035] Step 4: Perform chip processing on the composite epitaxial material, ion implantation and activation annealing to form different types of doped layers, thermal oxidation to form a gate dielectric layer, deposition and etching of polysilicon to form a gate, growth of an interlayer dielectric layer to isolate the source and the gate, opening of a dielectric on the source and performing an ohmic contact process, deposition and etching of metal to form a source and gate block metal, and application of a passivation layer to complete the front side process of the chip;

[0036] Step 5: Apply glue 40 to the front side of the wafer and temporarily bond it to a substrate W3 (50);

[0037] Step 6: Use laser to irradiate from the back of W1 substrate and focus on the interface between W1 and polysilicon to form a modified layer, and then peel off the W1 substrate. Since there are many defects between polysilicon and substrate W1, and the defects in polysilicon are much higher than those in the substrate, it is easy to modify and peel off at the interface and in polysilicon. Deposit metal on the surface of polysilicon and perform laser annealing to form ohmic contact. Polycrystalline Si C can form a very low ohmic contact with metal, and then deposit thick block metal 60;

[0038] Step 7: Peel off the temporary bonding substrate 50 on the front side, clean and remove the glue 40, and complete the preparation of the device.

[0039] In a further embodiment, W1 in step 1 is a supporting material in the subsequent material device preparation process, which can be various crystal materials. W2 is a material provider in the preparation process, which is a high-quality 4H-SiC crystal; W1 material is generally a transparent material, so that most of the laser energy can pass through the W1 substrate during the subsequent laser lift-off process, and SiC material is preferably used.

[0040] In a further embodiment, the thickness of the film in step one has certain requirements, which is to be greater than the thickness of the polycrystalline Si C film that is totally lost during the subsequent laser peeling of the substrate W1 and the polycrystalline film and the back polishing after peeling, that is, a certain thickness of the polycrystalline Si C film still remains at the end for the subsequent back ohmic contact process.

[0041] In a further embodiment, since the epitaxy in step three is performed on high-quality W2a, the epitaxial layer formed has the characteristics of high-quality single crystal, ensuring the quality and reliability of the device. At the same time, the lattice damage caused by ion implantation in the W2a layer is repaired through high-temperature treatment during the epitaxial process.

[0042] In a further embodiment, the substrate material in step five may be various supporting materials such as silicon carbide, silicon or sapphire.

[0043] In a further embodiment, the substrate W1 can continue to be used as a supporting material for manufacturing new devices after being polished in step six, and can be reused, thereby reducing costs.

[0044] Embodiment 2:

[0045] A method for preparing semiconductor materials and devices, in particular a method for preparing silicon carbide materials and devices. The method comprises:

[0046] like Figure 1 As shown, there are two substrates, namely substrate W1 and substrate W2, where W1 is the supporting material in the subsequent material device preparation process, which can be various crystal materials. W2 is the material provider in the preparation process, which is a high-quality 4H-SiC crystal; W1 material is generally a transparent material, so that most of the laser energy can pass through the W1 substrate during the subsequent laser lift-off process, preferably SiC material.

[0047] A layer of polycrystalline low-resistance Si C film is deposited on the upper surface of the substrate W1, which can be deposited by CVD method. The thickness of the film has certain requirements, which should be greater than the total loss of the polycrystalline Si C film during the subsequent laser peeling of the substrate W1 and the polycrystalline film and the back polishing after peeling, that is, a certain thickness of polycrystalline Si C film is still left at the end for the subsequent back ohmic contact process.

[0048] Ion implantation or laser treatment is performed on the substrate W2 to form a modified layer at a certain depth.

[0049] like Figure 2 As shown, the top surface of substrate W2 is bonded to the polycrystalline SiC surface 110 of substrate W1, and chemical bonds are formed between the interfaces to form a very strong bonding force;

[0050] like Figure 3As shown, the surface thin layer W2a of the substrate W2 is separated from the substrate by heat or mechanical means, and the peeling of the thin layer W2a is completed, forming a composite substrate with a polycrystalline SiC layer on W1 and a bonded single crystal SiC layer on the polycrystalline SiC layer. The surface 201 of the composite substrate is polished to obtain a very flat and smooth high-quality surface for subsequent epitaxial growth. The SiC epitaxial layer 30 is epitaxially grown on the composite substrate, and the concentration and thickness of the epitaxial layer are determined according to the withstand voltage design of the device to form a composite epitaxial material. Since the epitaxy is performed on high-quality W2a, the epitaxial layer formed has the characteristics of high-quality single crystals, ensuring the quality and reliability of the device. At the same time, the lattice loss caused by ion implantation in the W2a layer is repaired by high-temperature treatment during the epitaxial process.

[0051] like Figure 4 As shown, the chip process is performed on the composite epitaxial material, ion implantation and activation annealing are performed to form different types of doped layers, thermal oxidation is performed to form a gate dielectric layer, polysilicon is deposited and etched to form a gate, an interlayer dielectric layer is grown to isolate the source and the gate, a dielectric hole is opened on the source and an ohmic contact process is performed, metal is deposited and etched to form a source and gate block metal, and a passivation layer is applied. The front process of the chip is completed.

[0052] like Figure 5 As shown, the front side of the wafer is coated with glue 40 and temporarily bonded to a substrate W3 (50), and the substrate material can be various supporting materials such as silicon carbide, silicon or sapphire.

[0053] As shown in FIG6 , laser is irradiated from the back of the W1 substrate and focused on the interface between W1 and polysilicon to form a modified layer, and the W1 substrate is peeled off, and metal is deposited on the surface of the polysilicon, and laser annealing is performed to form an ohmic contact. Then, a thick block metal 60 is deposited, and the substrate W1 can be polished and used as a support material for manufacturing new devices, and can be reused, thereby reducing costs.

[0054] As shown in FIG. 7 , the temporary bonding substrate 50 on the front side is peeled off, and the glue 40 is cleaned and removed to complete the preparation of the device.

[0055] The above-mentioned embodiments only express several implementation methods of the present invention, and the descriptions thereof are relatively specific and detailed, but they cannot be listed as limiting the scope of the invention patent. It should be pointed out that, for ordinary technicians in this field, several variations and improvements can be made without departing from the concept of the present invention, and these all belong to the protection scope of the present invention. Therefore, the protection scope of the patent of the present invention shall be subject to the attached claims.

Claims

1. A method for preparing a semiconductor material and a device, characterized in that: The following steps are involved: Step 1: prepare two substrates, namely substrate W1 and substrate W2; A layer of polycrystalline low-resistance SiC film is deposited on the upper surface of the substrate W1, which can be deposited by CVD method; ion implantation or laser method is performed on the upper surface of the substrate W2 to form a modified layer at a certain depth; Step 2: The top surface of the substrate W2 is bonded to the polycrystalline SiC surface 110 of the substrate W1, and a chemical bond is formed between the interfaces to form a very strong bonding force; Step 3: Separate the surface thin layer W2a of the substrate W2 from the substrate by heat or mechanical means, complete the peeling of the thin layer W2a, and form a composite substrate having a polycrystalline SiC layer on W1 and a bonded single crystal SiC layer on the polycrystalline SiC layer, polish the surface 201 of the composite substrate to obtain a very flat and smooth high-quality surface for subsequent epitaxial growth, epitaxially grow a SiC epitaxial layer 30 on the composite substrate, and the concentration and thickness of the epitaxial layer are determined according to the withstand voltage design of the device to form a composite epitaxial material; Step 4: Perform chip processing on the composite epitaxial material, ion implantation and activation annealing to form different types of doped layers, thermal oxidation to form a gate dielectric layer, deposition and etching of polysilicon to form a gate, growth of an interlayer dielectric layer to isolate the source and the gate, opening of a dielectric on the source and performing an ohmic contact process, deposition and etching of metal to form a source and gate block metal, and application of a passivation layer to complete the front side process of the chip; Step 5: Apply glue 40 to the front side of the wafer and temporarily bond it to a substrate W3 (50); Step 6: Use laser to irradiate from the back side of W1 substrate and focus on the interface between W1 and polysilicon to form a modified layer, then peel off the W1 substrate, deposit metal on the surface of polysilicon, perform laser annealing to form ohmic contact, and then deposit thick block metal 60; Step 7: Peel off the temporary bonding substrate 50 on the front side, clean and remove the glue 40, and complete the preparation of the device.

2. The method for preparing a semiconductor material and a device according to claim 1, characterized in that: In the step 1, W1 is the supporting material in the subsequent material device preparation process, which is various crystal materials. W2 is the material provider in the preparation process, which is a high-quality 4H-SiC crystal. The W1 material is a transparent material, so that the laser energy can pass through the W1 substrate during the subsequent laser stripping process.

3. The method for preparing a semiconductor material and a device according to claim 1, characterized in that: The thickness of the film in step 1 has certain requirements, which is to be greater than the thickness of the polycrystalline SiC film that is totally lost during the subsequent laser peeling of the substrate W1 and the polycrystalline film and the back polishing after peeling, that is, a certain thickness of polycrystalline SiC film still remains at the end for the subsequent back ohmic contact process.

4. The method for preparing a semiconductor material and a device according to claim 1, characterized in that: Since the epitaxy in step three is performed on high-quality W2a, the formed epitaxial layer has the characteristics of high-quality single crystal, ensuring the quality and reliability of the device. At the same time, the lattice damage caused by ion implantation in the W2a layer is repaired through high-temperature treatment during the epitaxial process.

5. The method for preparing a semiconductor material and a device according to claim 1, characterized in that: The substrate material in step five may be various supporting materials such as silicon carbide, silicon or sapphire.

6. The method for preparing a semiconductor material and a device according to claim 5, characterized in that: After being polished in step 6, the substrate W1 can continue to be used as a supporting material for manufacturing new devices and can be reused, thereby reducing costs.

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