Semiconductor device and method for manufacturing semiconductor device
By providing a buffer portion in the connection terminal of the semiconductor device to buffer stress, the problem of disengagement or breakage of the connection terminal caused by thermal expansion is solved, and the reliability and life of the device are improved.
Patent Information
- Application Number
- CN202411506698.4
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Priority Date
- 2016-06-22
- Filing Date
- 2017-06-19
- Publication Date
- 2025-02-07
AI Technical Summary
When a semiconductor device is turned on at a high current, due to the different thermal expansion coefficients of the stacked substrate and the heat dissipation base, stress may occur at the joint surface between the connecting terminal and the circuit board, increasing the possibility of the connecting terminal falling off or breaking.
A semiconductor device is designed, in which the internal joint part on one end side of the connecting terminal is connected to the circuit board, the intermediate part is buried in the case, and the external joint part on the other end side is extended from the case, and is provided on the inner side of the case. The buffering portion cushiones the stress of the internal joint portion.
Through the design of the buffer portion, the stress at the joint surface between the connecting terminal and the circuit board can be effectively reduced, the risk of falling off or breaking of the connecting terminal can be reduced, and the reliability and life of the semiconductor device can be improved.
Smart Images
Figure CN119400771A_ABST
Abstract
Description
[0001] This invention patent application is a divisional application of the invention patent application with application number 201710463571.2, application date June 19, 2017, and name “Semiconductor device and method for manufacturing semiconductor device”. Technical Field
[0002] The present invention relates to a semiconductor device and a method for manufacturing the semiconductor device. Background Art
[0003] Semiconductor devices include power semiconductor elements and are used as power conversion devices or switching devices. For example, in such semiconductor devices, semiconductor chips including IGBT (Insulated Gate Bipolar Transistor) and power MOSFET (Metal Oxide Semiconductor Field Effect Transistor) are connected to function as switching devices.
[0004] In this semiconductor device, there is included: a laminated substrate having an insulating plate with a circuit board disposed on the front side and a metal plate disposed on the back side; and a semiconductor chip disposed on the circuit board by soldering. The laminated substrate is disposed on a heat sink. In addition, in the semiconductor device, a connection terminal is molded and fixed in a housing, and one end of the connection terminal is bonded to the circuit board (for example, refer to Patent Document 1).
[0005] Prior art literature
[0006] Patent Literature
[0007] Patent Document 1: Japanese Patent Application Publication No. 2010-098036
[0008] However, when the semiconductor device generates heat as a large current is conducted, the laminated substrate and the heat sink may bend due to the different thermal expansion coefficients of the laminated substrate and the heat sink, and stress may be generated at the joint surface between the connection terminal and the circuit board. In particular, since the connection terminal is fixed to the housing, the stress on the joint surface becomes greater. Therefore, the possibility of the connection terminal falling off or breaking from the circuit board increases. Summary of the invention
[0009] The present invention has been made in view of the above-mentioned points, and an object of the present invention is to provide a semiconductor device and a method for manufacturing the semiconductor device which can reduce stress at a bonding surface between a connection terminal and a circuit board.
[0010] According to one aspect of the present invention, there is provided a semiconductor device, comprising: a semiconductor chip; a stacked substrate, the stacked substrate having an insulating plate, a circuit board and a metal plate, the circuit board being arranged on the front side of the insulating plate and provided with the semiconductor chip, and the metal plate being arranged on the back side of the insulating plate; a heat sink, the heat sink being provided with the stacked substrate in a manner joined to the metal plate; a shell, the shell accommodating the semiconductor chip and the stacked substrate; and a connecting terminal, the connecting terminal having an internal joining portion on one end side joined to the circuit board, a middle portion buried in the shell, an external joining portion on the other end side extending from the shell, and a buffer portion being provided between the inner side of the shell and the internal joining portion for buffering stress of the internal joining portion.
[0011] Furthermore, a method for manufacturing the semiconductor device is provided.
[0012] According to the disclosed technology, it is possible to suppress a decrease in the reliability of a semiconductor device. BRIEF DESCRIPTION OF THE DRAWINGS
[0013] Figure 1 It is a top view of the semiconductor device according to the embodiment.
[0014] Figure 2 is a cross-sectional view of a semiconductor device according to an embodiment.
[0015] Figure 3 is a cross-sectional view of a semiconductor device according to a reference example.
[0016] Figure 4 : is a graph showing stress at the connection terminal and the predicted thermal cycle tolerance of the semiconductor device in the embodiment.
[0017] Figure 5 It is a figure for demonstrating the ultrasonic bonding apparatus in embodiment.
[0018] Figure 6 It is a diagram for explaining ultrasonic bonding of a semiconductor device according to an embodiment.
[0019] (Explanation of symbols)
[0020] 100 Semiconductor devices
[0021] 110 Housing
[0022] 111a Control terminal
[0023] 119 heat sink
[0024] 120 Laminated substrate
[0025] 121 Insulation board
[0026] 122a, 122b, 122c circuit boards
[0027] 123 Metal Plate
[0028] 141, 142, 143N terminals
[0029] 151, 152, 153P terminal
[0030] 151a, 161a Internal joint
[0031] 151b, 161b first component
[0032] 151c, 161c second component
[0033] 151d, 161d third component
[0034] 151e, 161e fourth component
[0035] 151f, 161f external joint
[0036] 151g, 161g buffer
[0037] 161 U terminal
[0038] 162 V terminal
[0039] 163 W terminal
[0040] 170 Storage Department
[0041] 300 Ultrasonic bonding device
[0042] 310 Ultrasonic vibration part
[0043] 320 Ultrasonic vibrator
[0044] 330 contact
[0045] 331 Main body
[0046] 332 Pressing part
[0047] 332a Contact surface DETAILED DESCRIPTION
[0048] Below, refer to Figure 1 and Figure 2 A semiconductor device according to an embodiment will be described.
[0049] Figure 1 It is a top view of the semiconductor device according to the embodiment.
[0050] Figure 2 is a cross-sectional view of a semiconductor device according to an embodiment.
[0051] in addition, Figure 2 yes Figure 1 In addition, Figure 2 The description of the wires connecting the semiconductor chip and the circuit board is omitted.
[0052] The semiconductor device 100 includes a housing 110 and three laminated substrates 120, which are accommodated in a housing portion 170 disposed in the center of the housing 110. The laminated substrates 120 are disposed on a heat sink 119 made of a material with good heat dissipation properties such as aluminum or copper. Figure 2 ).
[0053] The housing 110 is formed by injection molding using resin to integrally mold the control terminal 111a, a control electrode (not shown) electrically connected to the control terminal 111a, P terminals 151, 152, 153, N terminals 141, 142, 143, U terminal 161, V terminal 162, and W terminal 163.
[0054] Hereinafter, the P terminals 151 , 152 , 153 , the N terminals 141 , 142 , 143 , the U terminal 161 , the V terminal 162 , and the W terminal 163 are collectively referred to as connection terminals.
[0055] The laminated substrate 120 has a metal plate 123 formed on the back of the insulating plate 121, and circuit boards 122a, 122b, and 122c made of, for example, copper, are formed on the front of the insulating plate 121. The insulating plate 121 is made of insulating materials such as aluminum oxide, silicon nitride, and aluminum nitride. The metal plate 123 is made of materials with good heat dissipation such as aluminum and copper. The circuit boards 122a, 122b, and 122c are made of conductive materials such as copper. In addition, semiconductor chips (omitted in the figure) are arranged on the circuit board 122a by welding. In addition, semiconductor chips (omitted in the figure) are respectively arranged on the circuit board 122a by welding. These semiconductor chips include, for example, IGBT (Insulated Gate Bipolar Transistor), power MOSFET (Metal Oxide Semiconductor Field Effect Transistor), FWD (Free Wheeling Diode), etc.
[0056] Next, the connection terminals (P terminals 151 , 152 , 153 , N terminals 141 , 142 , 143 , U terminal 161 , V terminal 162 , W terminal 163 ) will be described.
[0057] Here, the U terminal 161 is exemplified as one of the connection terminals.
[0058] like Figure 1 and Figure 2 As shown, the U terminal 161 has an internal joint portion 161a electrically connected to the circuit board 122a. The internal joint portion 161a is joined to the circuit board 122a by ultrasonic bonding. In addition, the U terminal 161 has: a first member 161b connected to the end of the internal joint portion 161a in a vertically upward direction relative to the main surface of the stacked substrate 120; a second member 161c connected to the end of the first member 161b in a parallel direction relative to the main surface of the stacked substrate 120; a third member 161d connected to the end of the second member 161c in a vertically downward direction relative to the main surface of the stacked substrate 120; and a fourth member 161e connected to the end of the third member 161d in a parallel direction relative to the main surface of the stacked substrate 120 and buried in the housing 110. In addition, the U terminal 161 has an external joint portion 161f, one end of which is connected to the fourth member 161e in the housing 110 and the other end of which protrudes from the surface of the housing 110. As described above, the U terminal 161 is composed of a first member 161b, a second member 161c, a third member 161d, and a fourth member 161e. Figure 2 A buffer portion 161g is curved convexly upward.
[0059] The P terminal 151 as another example of the connection terminal is also the same as the U terminal 161. Figure 2 As shown, the P terminal 151 has an internal joint 151a, a first member 151b, a second member 151c, a third member 151d, a fourth member 151e and an external joint 151f. As mentioned above, the P terminal 151 is composed of the first member 151b, the second member 151c, the third member 151d, the fourth member 151e. Figure 2 A buffer portion 151g is curved convexly upward.
[0060] In this way, the remaining connection terminals also have an internal joint portion, a first member, a second member, a third member, a fourth member and an external joint portion like the U terminal 161 and the P terminal 151, and the first to fourth members constitute a buffer portion that is curved convexly upward.
[0061] Furthermore, the inner joint portions of the P terminals 152 and 153 are joined to the circuit board 122 c , the inner joint portions of the N terminals 141 , 142 , and 143 are joined to the circuit board 122 b , and the inner joint portions of the V terminal 162 and the W terminal 163 are joined to the circuit board 122 a .
[0062] Therefore, the control terminal 111 a electrically connects the control electrode and the gate electrode of the semiconductor chip via a wire (not shown).
[0063] Furthermore, the P terminals 151 , 152 , and 153 are electrically connected to the back surface electrodes of the semiconductor chip via the circuit board 122 c while being electrically connected to the external positive electrodes.
[0064] The N terminals 141 , 142 , and 143 are electrically connected to the surface electrodes of the semiconductor chip through wires (not shown) while being electrically connected to the external negative electrodes.
[0065] The U terminal 161, V terminal 162, and W terminal 163 are electrically connected to the back electrodes of the semiconductor chip through the circuit board 122a. In addition, the U terminal 161, V terminal 162, and W terminal 163 are electrically connected to the front electrodes of the semiconductor chip through wires (not shown).
[0066] As described above, in the semiconductor device 100, the storage portion 170 is filled with a packaging material such as gel or potting resin (not shown in the figure), and the stacked substrate 120, the P terminals 151, 152, 153 (on the storage portion 170 side), the N terminals 141, 142, 143, the U terminal 161, the V terminal 162, the W terminal 163 and the wire 113 are packaged by the packaging material (not shown in the figure).
[0067] Next, as a reference example for the semiconductor device 100, Figure 3 Another semiconductor device will be described.
[0068] Figure 3 is a cross-sectional view of a semiconductor device according to a reference example.
[0069] The semiconductor device 1000 has the same structure as the semiconductor device 100 except for the connection terminals (see FIG. Figure 1 ).
[0070] The U terminal 261 and the P terminal 251 among the connection terminals of the semiconductor device 1000 will be described below.
[0071] Figure 3 is the sum of the semiconductor device 1000 Figure 1 The same cross-sectional view is shown along the dashed line YY.
[0072] In the semiconductor device 1000, as Figure 3 (and Figure 1), the U terminal 261 has an internal joint portion 261a electrically connected to the circuit board 122a. The internal joint portion 261a is joined to the circuit board 122a by ultrasonic bonding. In addition, the U terminal 261 has: a first member 261b connected to the end of the internal joint portion 261a in a vertically upward direction relative to the main surface of the stacked substrate 120; and a second member 261c connected to the end of the first member 261b in a parallel direction relative to the main surface of the stacked substrate 120. The U terminal 261 has an external joint portion 261d whose one end is connected to the second member 261c in the housing 110 and the other end extends from the surface of the housing 110.
[0073] The P terminal 251, which is another example of a connection terminal of the semiconductor device 1000, is also similar to the U terminal 261. Figure 3 As shown, there is an inner joint 251a, a first member 251b, a second member 251c, and an outer joint 251d.
[0074] The remaining connecting terminals are also the same as the U terminal 261 and the P terminal 251, and have: an internal joint; a first component connected to the end of the internal joint in a vertically upward direction relative to the main surface of the stacked substrate 120; a second component connected to the first component in a parallel direction relative to the main surface of the stacked substrate 120; and an external joint having one end connected to the second component inside the shell 110 and the other end extending from the surface of the shell 110.
[0075] As mentioned above, the thickness of the connection terminal is, for example, about 0.5 mm or more and 1.5 mm or less. In addition, the thickness and width of the connection terminal are substantially the same as a whole, and there is no locally thin part.
[0076] As described above, the semiconductor device 1000 is also filled with packaging materials such as gel and potting resin (omitted in the figure) in the storage portion 170, and the stacked substrate 120, connecting terminals such as the P terminal 251 (on the storage portion 170 side) and the U terminal 261, and the wire 113 are encapsulated by the packaging material (omitted in the figure).
[0077] When the semiconductor device 1000 described above is used as a vehicle-mounted device, for example, it can be considered to be used in an environment where the external temperature changes drastically. In addition, when the semiconductor device 1000 is in operation, a large current will pass through, so heat will be dissipated. The heat inside and outside the semiconductor device 1000 will cause the housing 110, the laminated substrate 120, and the heat sink 119 to compress and shrink, so that the device will be deformed as a whole or in part. In particular, the laminated substrate 120 and the heat sink 119 may bend due to the difference in linear expansion coefficients. The internal joint 261a of one end side of the U terminal 261 is fixed to the circuit board 122a, and the other end is buried in the housing 110. Therefore, when the semiconductor device 1000 is deformed as a whole or partially, stress concentration will occur at the joint between the internal joint 261a and the circuit board 122a. When stress concentration occurs, the internal joint 261a of the U terminal 261 may fall off from the circuit board 122a, or the U terminal 261 may also break.
[0078] So, if Figure 1 and Figure 2 In the semiconductor device 100 shown in the figure, regarding the connection terminal, for example, the U terminal 161, the internal joint portion 161a, the first member 161b, the second member 161c, the third member 161d, and the fourth member 161e inside the housing 110 constitute a Figure 2 The buffer portion 161g is bent upwardly convexly. Therefore, even if the entire semiconductor device 100 is deformed, or a part of the semiconductor device 100 is deformed, resulting in stress concentration on the joint surface between the internal joint portion 161a and the circuit board 122a, the stress will be buffered by the buffer portion 161g. Therefore, in the semiconductor device 100, it is possible to prevent the internal joint portion 161a of the U terminal 161 from falling off the circuit board 122a and the U terminal 161 from breaking. As a result, the semiconductor device 100 can achieve an increase in the life of the U terminal 161 and suppress a decrease in reliability.
[0079] Next, refer to Figure 4 The stress simulation test results and the predicted thermal cycle tolerance of the connection terminal of the semiconductor device 100 (U terminal 161 as an example) and the connection terminal of the semiconductor device 1000 (U terminal 261 as an example) are described.
[0080] Figure 4 : is a graph showing stress at the connection terminal and the predicted thermal cycle tolerance of the semiconductor device in the embodiment.
[0081] And, as an example of a connection terminal, Figure 4 The case of U terminals 161 and 261 is shown. However, Figure 4The results shown are not limited to the U terminals 161 and 261, and the same results can be obtained with other connecting members.
[0082] Figure 4 (A) is a graph showing the results of a stress simulation test at the joint of the U terminals 161 and 261, where the horizontal axis represents the U terminal 161 or the U terminal 261 (reference example), and the vertical axis represents the stress (Kgf / mm 2 ).
[0083] Figure 4 In (B), the horizontal axis represents the semiconductor device 100 or the semiconductor device 1000 (reference example), and the vertical axis represents the predicted thermal cycle tolerance (times).
[0084] Regarding stress simulation experiments and thermal cycle prediction tolerance, the insulating plate 121 of the stacked substrate 120 of the semiconductor devices 100 and 1000 is made of silicon nitride, the connecting terminals such as the P terminal, N terminal, U terminal, V terminal, and W terminal are made of copper, and the packaging material is made of gel.
[0085] Furthermore, as a stress simulation experiment, stress analysis of the connection terminals (U terminals 161 and 261 ) was performed using FEM (Finite Element Method: finite element analysis).
[0086] In the thermal cycle tolerance prediction, for the semiconductor device 100, 1000, the temperature is raised from -40°C to 125°C within a specified time, and then the temperature is lowered from 125°C to -40°C within a specified time, and this is one cycle. In this case, it can be obtained by Figure 4 The stress and fatigue life curve of (A) (omitted in the figure) is calculated to determine in which cycle the joint of the U terminal 161 and the U terminal 261 of the circuit board 122b will fall off, and in which cycle the U terminal 161 and the U terminal 261 will reach the fatigue limit that causes breakage.
[0087] First, according to Figure 4 The stress simulation test result shown in (A) shows that the stress at the U terminal 161 in the semiconductor device 100 is smaller than the stress at the U terminal 261 (reference example) in the semiconductor device 1000 .
[0088] In addition, according to Figure 4 The predicted thermal cycle tolerance result shown in (B) shows that the number of times of the semiconductor device 100 having the U terminal 161 is four times greater than that of the semiconductor device 1000 (reference example) having the U terminal 261 .
[0089] As described above, the semiconductor device 100 has a laminated substrate 120, which includes an insulating plate 121, circuit boards 122a, 122b, and 122c disposed on the upper surface of the insulating plate 121 and on which semiconductor chips 131 to 134 are disposed, and a metal plate 123 disposed on the back surface of the insulating plate 121. The semiconductor device 100 also has a heat sink 119, on which the laminated substrate 120 is disposed in a manner bonded to the metal plate 123, and a housing 110, which accommodates the semiconductor chips 131 to 134 and the laminated substrate 120. The semiconductor device 100 has a U-terminal 161, an internal joint portion 161a on one end side of the U-terminal 161 is joined to the circuit board 122a, a middle portion is buried in the shell 110, and an external joint portion 161f on the other end side extends out of the surface of the shell 110. The U-terminal 161 is provided with a buffer portion 161g, which buffers the stress acting on the internal joint portion 161a between the inner side of the shell 110 and the internal joint portion 161a. Furthermore, the buffer portion 161g of the U terminal 161 is composed of a first member 161b, a second member 161c, a third member 161d, and a fourth member 161e, wherein the first member 161b is connected to the end of the internal joint portion 161a in the vertical upward direction relative to the main surface of the laminated substrate 120, the second member 161c is connected to the end of the first member 161b in the direction parallel to the main surface of the laminated substrate 120, the third member 161d is connected to the end of the second member 161c in the vertical downward direction relative to the main surface of the laminated substrate 120, and the fourth member 161e is connected to the end of the third member 161d in the direction parallel to the main surface of the laminated substrate 120, and is buried in the housing 110. In addition, the remaining connection terminals of the semiconductor device 100 also have the same structure as the U terminal 161.
[0090] The semiconductor device 100 is provided with the buffer portion 161g as described above. Even if the semiconductor device 100 as a whole is deformed, or a part of the semiconductor device 100 is deformed, resulting in stress concentration on the joint surface between the internal joint portion 161a and the circuit board 122a, the stress will be buffered by the buffer portion 161g. Therefore, in the semiconductor device 100, the internal joint portion 161a of the U terminal 161 can be prevented from falling off from the circuit board 122a, and the U terminal 161 can be prevented from breaking. In addition, the remaining connection terminals can also prevent the internal joint portion from falling off from the circuit board, and the remaining connection terminals can be prevented from breaking, just like the U terminal 161. As a result, the semiconductor device 100 can achieve an increase in the life of the connection terminal and prevent a decrease in reliability.
[0091] In addition, as described above, the thickness and width of the connection terminal are substantially the same as a whole, and there is no locally thin part. A large current flows through the connection terminal of the semiconductor device 100. If a part of the connection terminal is thinned and bent, for example, in order to buffer the stress at the connection terminal, the thinned part of the connection terminal through which the large current flows may generate heat, causing the semiconductor device 100 to become hot. Therefore, it is most ideal that the thickness and width of the connection terminal are substantially the same as a whole.
[0092] In the semiconductor device 100, as described above, the connection terminals and the circuit board are connected by ultrasonic bonding. However, the connection terminals and the circuit board are not limited to ultrasonic bonding as described above, and the same effect can be achieved by bonding the connection terminals and the circuit board by welding.
[0093] Next, ultrasonic bonding between the connection terminals and the circuit board in the method of manufacturing the semiconductor device 100 will be described.
[0094] First, use Figure 5 , an ultrasonic bonding device for performing ultrasonic bonding is described.
[0095] Figure 5 It is a figure for demonstrating the ultrasonic bonding apparatus which concerns on embodiment.
[0096] in, Figure 5 (A) is a schematic diagram of an ultrasonic bonding device. Figure 5 (B) and Figure 5 (C) shows a contact surface of a contact piece of the ultrasonic bonding device and a front view of another contact piece.
[0097] The ultrasonic bonding device 300 includes an ultrasonic vibration unit 310 , an ultrasonic vibrator 320 connected to the ultrasonic vibration unit 310 and transmitting the generated ultrasonic wave, and a contact 330 connected to the ultrasonic vibrator 320 and pressing the connection terminal to the circuit board.
[0098] The ultrasonic vibration unit 310 vibrates at a predetermined vibration frequency to generate ultrasonic waves.
[0099] The ultrasonic vibrator 320 is connected to the ultrasonic vibration unit 310 , and propagates the ultrasonic wave emitted from the ultrasonic vibration unit 310 .
[0100] The contact 330 is in the shape of a rod and has a main body 331 and a pressing part 332 processed so that the front end side of the main body 331 is smaller than the diameter of the main body 331. The contact surface 332a of the pressing part 332 of the contact 330 is as shown in FIG. Figure 5As shown in (B), it is rectangular and presses the internal joint of the connection terminal. The contact piece 330 as mentioned above is connected to the ultrasonic vibrator 320 and vibrates with the vibration of the ultrasonic vibrator 320. Thus, the connection terminal can press the circuit board while vibrating.
[0101] In addition, if Figure 5 As shown in (C), the contact 330 may be, for example, in a T-shape. As long as the contact 330 is as described above, the plurality of connection terminals can be pressed against the circuit board while vibrating together.
[0102] In the ultrasonic bonding device 300, the contact members 330 can be oriented in different directions according to the vibration direction of the ultrasonic vibration part 310. Figure 5 Vibration in the x and y directions.
[0103] Next, use Figure 6 ,right Figure 5 (A) Figure 5 The ultrasonic bonding apparatus 300 shown in (B) performs ultrasonic bonding of a circuit board having connection terminals.
[0104] Figure 6 It is a diagram for explaining ultrasonic bonding performed on the semiconductor device according to the embodiment.
[0105] Figure 6 (A) shows ultrasonic bonding performed by a contact 430 of a reference example with respect to the contact 330 of the ultrasonic bonding apparatus 300. Figure 6 (B) shows ultrasonic bonding performed by the contact member 330 of the ultrasonic bonding apparatus 300 .
[0106] Before ultrasonic bonding, the heat sink 119 , the laminated substrate 120 , and the semiconductor chips 131 to 134 are laminated in this order. Next, the laminated substrate 120 and the semiconductor chips 131 to 134 are housed in the housing 110 .
[0107] Thereafter, as described later, the connection terminal and the circuit board are bonded to each other by ultrasonic bonding using an ultrasonic bonding device 300 .
[0108] First, as a reference example with respect to the contactor 330 , a case where the ultrasonic bonding apparatus 300 includes the contactor 430 will be described.
[0109] Such a contact 430 is Figure 6 (A) shows a rod-like shape with uniform width (and thickness) and extending straight. In this case, if the connection terminal (e.g., U terminal 161) of the semiconductor device 100 is ultrasonically bonded to the circuit board 122a, the contact 430 may contact the U terminal 161 ( Figure 6If the contact 430 interferes with the U terminal 161, the ultrasonic wave cannot be properly propagated from the contact 430 to the U terminal 161, and the U terminal 161 and the circuit board 122a may not be properly ultrasonically bonded.
[0110] Therefore, in the ultrasonic bonding device 300, a contact piece 300 is used, which includes: a main body 331; and a pressing portion 332 processed so that the front end side of the main body 331 is smaller than the diameter of the main body 331. Figure 6 As shown in (B), there will be no interference with the U terminal 161, and the circuit board 122b can be pressed while applying vibration to the internal bonding portion 161a of the U terminal 161, so that the internal bonding portion 161a and the circuit board 122b can be ultrasonically bonded.
Claims
1. A semiconductor device, characterized in that: include: Semiconductor chips; A laminate substrate, the laminate substrate comprising an insulating plate, a circuit board and a metal plate, wherein the circuit board is disposed on the front surface of the insulating plate and is provided with the semiconductor chip, and the metal plate is disposed on the back surface of the insulating plate; a heat sink configured with the laminated substrate in a manner joined to the metal plate; A housing, which is disposed on the upper surface of the heat sink and includes a storage portion with an opening in the center, the storage portion surrounds and stores the semiconductor chip and the stacked substrate; as well as A connecting terminal, wherein a plurality of internal joints on one end side of the connecting terminal are arranged on and joined to the upper surface of the circuit board, a portion of the middle portion is buried in the shell, an external joint on the other end side extends from the shell, is parallel to the stacked substrate and extends along the upper surface of the shell, a plurality of buffer portions for buffering stress on the plurality of internal joint portions are provided between the inner wall of the shell and the plurality of internal joint portions, and the width of each of the plurality of buffer portions is narrower than the width of the middle portion, The plurality of buffer portions include: a first member connected to ends of the plurality of internal joining portions in a vertically upward direction relative to the main surface of the laminated substrate and having a first length in the vertically upward direction; a second member connected to an end of the first member in a direction parallel to the main surface of the laminated substrate; a third member connected to an end of the second member in a vertically downward direction relative to the main surface of the laminated substrate, and having a second length shorter than the first length in the vertically downward direction; as well as A fourth member, which is connected to the end of the third member in a direction parallel to the main surface of the stacked substrate, is located above the circuit board of the stacked substrate, and the end extending from the storage portion toward the inner wall of the shell without contact with the shell is connected to the end of the external joint portion via the portion buried in the middle portion of the shell.
2. The semiconductor device according to claim 1, wherein The first member, the second member, and the third member of the plurality of buffer portions are arranged above an end portion of the multilayer substrate.
3. The semiconductor device according to claim 1 or 2, wherein: The thickness and width of the connection terminal are the same as a whole.
4. The semiconductor device according to claim 1 or 2, wherein: The plurality of inner engagement portions are ultrasonically bonded to the circuit board.
5. The semiconductor device according to claim 1 or 2, wherein: The plurality of inner joints are solder-joined to the circuit board.
6. A method for manufacturing a semiconductor device, characterized in that: include: A step of arranging a laminate substrate on a heat sink in a manner in which a metal plate is bonded, the laminate substrate comprising an insulating plate, a circuit board and a metal plate, the circuit board being provided on the front surface of the insulating plate and having a semiconductor chip arranged thereon, and the metal plate being provided on the back surface of the insulating plate; The step of housing the semiconductor chip and the stacked substrate in a housing, wherein the housing is provided on the upper surface of the heat sink and includes a housing portion with an opening in the center, and the housing portion surrounds and houses the semiconductor chip and the stacked substrate; as well as The process of using the pressing portion of the contact piece to perform ultrasonic vibration while vertically pressing multiple internal joining portions of the connecting terminal against the upper surface of the circuit board, wherein the multiple internal joining portions on one end side of the connecting terminal extend to the inner wall of the shell, the multiple internal joining portions are arranged on the upper surface of the circuit board and joined, a part of the middle portion is buried in the shell, and the external joining portion on the other end side extends from the shell, parallel to the stacked substrate and extends along the upper surface of the shell, and multiple buffer portions are provided between the inner wall of the shell and the multiple internal joining portions, the buffer portion having a first component, a second component, a third component and a fourth component, the first component is connected to the end portions of the multiple internal joining portions in a vertical upward direction relative to the main surface of the stacked substrate, has a first length in the vertical upward direction, and the second component The component is connected to the end of the first component in a direction parallel to the main surface of the stacked substrate, the third component is connected to the end of the second component in a direction vertically downward relative to the main surface of the stacked substrate, and has a second length shorter than the first length in the vertically downward direction, the fourth component is connected to the end of the third component in a direction parallel to the main surface of the stacked substrate, and is located above the circuit board of the stacked substrate, and the end extending from the storage portion toward the inner side of the shell without contact with the shell is connected to the end of the external joint portion via the part buried in the middle portion of the shell, the width of each of the multiple buffer portions is narrower than the width of the middle portion, and the contact piece has a rod-shaped main body and a pressing portion, the pressing portion is the front end of the main body and is smaller than the diameter of the main body.
Citation Information
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Resin case and method of manufacturing the same
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