Magnetic random access memory unit, magnetic random access memory, phase inverter and memory

Abstract

The invention discloses a magnetic random access memory unit, a magnetic random access memory, a phase inverter and a memory, and the magnetic random access memory unit comprises a substrate; the free layer structure is located on the substrate, the free layer structure comprises one or more layers of stacked structures, the stacked structures comprise a first free layer and a plurality of second free layers which are located in the first free layer and are separated from each other, and the first free layer and the second free layers are made of different materials; the multiple layers of stacked structures are stacked in the direction perpendicular to the surface of the substrate; a tunnel layer on the free layer structure; and the fixed layer is positioned on the tunnel layer. The magnetic random storage unit can be used as a basic unit of a logic device and a memory, so that the logic device and the memory have relatively low power consumption, relatively low working voltage and high-temperature reliability.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor technology, and in particular to a magnetic random access memory unit, a magnetic random access memory, an inverter and a memory. Background Art

[0002] Artificial intelligence has the potential to enable the next technological revolution. Advanced models of artificial intelligence require a lot of computing to implement. Considering scalability, energy efficiency, speed and temperature stability, a new structure is needed to surpass traditional CMOS logic devices and memories. Summary of the invention

[0003] The technical problem solved by the present invention is to provide a magnetic random access memory unit, a magnetic random access memory, an inverter and a memory to meet the requirements of advanced technology.

[0004] In order to solve the above technical problems, the technical solution of the present invention provides a magnetic random access memory unit, comprising: a substrate; a free layer structure located on the substrate, the free layer structure comprising one or more stacked structures, the stacked structure comprising: a first free layer and a plurality of second free layers separated from each other and located in the first free layer, the first free layer and the second free layer are made of different materials, and the plurality of stacked structures are stacked in a direction perpendicular to the surface of the substrate; a tunnel layer located on the free layer structure; and a fixed layer located on the tunnel layer.

[0005] Optionally, the second free layer includes a nano-column structure, and a plurality of the nano-column structures are distributed in the first free layer along a direction parallel to a surface of the substrate; and the first free layer is located on a sidewall surface of the nano-column structure.

[0006] Optionally, two adjacent layers of the stacked nanocolumn structures are in contact with each other.

[0007] Optionally, the projection shape of the nanocolumn structure on the substrate includes: a cylindrical shape, an elliptical cylindrical shape or a square cylindrical shape.

[0008] Optionally, the second free layer includes nanoparticles, and the first free layer surrounds the surfaces of the nanoparticles.

[0009] Optionally, a material of the second free layer is different from a material of the fixed layer.

[0010] Optionally, the material of the second free layer includes a ferromagnetic material, and the ferromagnetic material includes cobalt ferrite, nickel ferrite or manganese ferrite.

[0011] Optionally, the material of the first free layer includes a ferroelectric material, and the ferroelectric material includes barium titanium, barium titanate, barium strontium titanate or lead titanate.

[0012] Optionally, the number of the second free layers is greater than or equal to ten.

[0013] Optionally, the material of the second free layer includes superparamagnetic material.

[0014] Optionally, the superparamagnetic material includes a ferromagnetic material that exhibits superparamagnetism at a certain nanometer size, and the ferromagnetic material includes cobalt ferrite, nickel ferrite or manganese ferrite.

[0015] Optionally, the material of the fixed layer includes a ferromagnetic material, and the ferromagnetic material includes cobalt-iron-boron, a mixture of cobalt-iron and cobalt-iron-boron, or iron-platinum.

[0016] Optionally, the material of the tunnel layer includes an insulating material, and the insulating material includes: magnesium oxide, magnesium aluminum oxide or aluminum oxide.

[0017] Optionally, it also includes: a first electrode structure located on the substrate, the first electrode structure including a first electrode layer and a second electrode layer located on the first electrode layer, the projection of the second electrode layer on the substrate is located within the projection range of the first electrode layer on the substrate; the free layer structure is located between the second electrode layer and the tunnel layer; and a third electrode layer located on the fixed layer, the fixed layer is located between the third electrode layer and the tunnel layer.

[0018] Optionally, it also includes: a conductive layer surrounding the free layer structure, the conductive layer being electrically connected to the first free layer; and an isolation layer located between the conductive layer and the first electrode layer, the isolation layer being located on a side wall of the second electrode layer.

[0019] Optionally, part of the free layer structure is also located on the isolation layer.

[0020] Optionally, a projection shape of the first free layer on the substrate includes a circle or an ellipse.

[0021] Correspondingly, the technical solution of the present invention also provides a magnetic random access memory, comprising: a plurality of magnetic random access memory units, the plurality of magnetic random access memory units are arranged in an array, the magnetic random access memory units include: a free layer structure, the free layer structure includes one or more stacked structures, the stacked structure includes: a first free layer and a plurality of second free layers separated from each other and located in the first free layer, the first free layer and the second free layer are made of different materials, and the plurality of stacked structures are stacked in a direction perpendicular to the surface of the substrate; a tunnel layer located on the free layer structure; a fixed layer located on the tunnel layer; a plurality of bit lines, any one of which is electrically connected to the first free layer of a column of magnetic random access memory units; a plurality of word lines, any one of which is electrically connected to the third electrode layer of a row of magnetic random access memory units.

[0022] Optionally, it also includes: a plurality of read-write units, any one of which is electrically connected to the first electrode layer of a column of magnetic random access memory cells, and is electrically connected to the bit lines corresponding to the column of magnetic random access memory cells; a plurality of groups of input terminals and output terminals, any one group of input terminals and output terminals is electrically connected to a read-write unit, the input terminal is used to apply an input voltage to the bit line, the output terminal is used to apply an output voltage to the first electrode layer, and the input voltage and the output voltage are opposite.

[0023] Optionally, the first electrode layers of several of the magnetic random access memory cells are connected to a ground voltage.

[0024] Optionally, the bit line is electrically connected to the first free layer through a conductive layer.

[0025] Correspondingly, the technical solution of the present invention also provides an inverter, including: a magnetic random storage unit, the magnetic random storage unit including: a free layer structure, the free layer structure including one or more stacked structures, the stacked structure including: a first free layer and a plurality of second free layers separated from each other and located in the first free layer, the first free layer and the second free layer are made of different materials, and the plurality of stacked structures are stacked in a direction perpendicular to the surface of the substrate; a tunnel layer located on the free layer structure; a fixed layer located on the tunnel layer; an input end electrically connected to the first free layer; and an output end electrically connected to the first electrode layer.

[0026] Optionally, it also includes: a power supply terminal and a ground terminal, wherein the power supply terminal is electrically connected to the second electrode layer of the magnetic random access memory unit, and the ground terminal is electrically connected to the first electrode layer of the magnetic random access memory unit.

[0027] Optionally, the input end is electrically connected to the first free layer through a conductive layer.

[0028] Correspondingly, the technical solution of the present invention also provides a memory, including: a plurality of magnetic random access memory units, including a first magnetic random access memory unit, a second magnetic random access memory unit and a third magnetic random access memory unit, the first free layer of the first magnetic random access memory unit is electrically connected to the first electrode layer of the second magnetic random access memory unit, and the third electrode layer of the first magnetic random access memory unit is electrically connected to the third electrode layer of the third magnetic random access memory unit.

[0029] Optionally, it also includes: a power supply end, and the third electrode layer of the first magnetic random access memory unit and the third electrode layer of the third magnetic random access memory unit are electrically connected to the power supply end.

[0030] Optionally, the first free layer of the first magnetic random access memory cell is electrically connected to the first electrode layer of the third magnetic random access memory cell; and the third electrode layer of the second magnetic random access memory cell is electrically connected to the power supply terminal.

[0031] Optionally, the second electrode layer of the second magnetic random access memory unit is electrically connected to the first electrode layer of the third magnetic random access memory unit.

[0032] Optionally, it also includes: a ground terminal, wherein the ground terminal is electrically connected to the first electrode layer of the first magnetic random access memory unit.

[0033] Optionally, it also includes: a first input terminal, a second input terminal and an output terminal, wherein the first input terminal is electrically connected to the first free layer of the third magnetic random memory unit, the second input terminal is electrically connected to the first free layer of the second magnetic random memory unit, the output terminal is electrically connected to the first electrode layer of the first magnetic random memory unit, and the voltage applied to the output terminal is opposite to the voltage applied to at least one of the first input terminal and the second input terminal.

[0034] Compared with the prior art, the technical solution of the present invention has the following beneficial effects:

[0035] The technical solution of the present invention provides a new type of magnetic random access memory unit, wherein the free layer structure includes one or more stacked structures, the stacked structure includes a first free layer and a plurality of second free layers separated from each other and located in the first free layer. The magnetic random access memory unit can be used as a basic unit of a logic device and a memory, so that the logic device and the memory have lower power consumption, lower operating voltage and high temperature reliability.

[0036] Furthermore, since the materials of the first free layer and the second free layer are different, the material of the second free layer includes a ferromagnetic material, the material of the first free layer includes a ferroelectric material, the second free layer is located in the first free layer, and the ferroelectric material surrounds the ferromagnetic material, by applying voltage to the ferroelectric first free layer, a stress-induced elastic interaction can be generated between the ferroelectric first free layer and the ferromagnetic second free layer, so that the ferromagnetic second free layer is deformed and a magnetostrictive effect is generated, thereby changing the magnetization direction to obtain a high magnetoresistance state and a low magnetoresistance state, thereby realizing a read-write state.

[0037] Furthermore, the number of the second free layers is greater than or equal to 10, and the multiple second free layers increase the contact interface between the first free layer and the second free layer. When a voltage is applied to the first free layer, the control effect on the second free layer is better. At the same time, the multiple second free layers provide multiple current channels, so that the resistance in the low resistance state is smaller, and the multiple second free layers can also contribute to the resistance in the high resistance state, so that the resistance in the high resistance state is larger, and the ratio of high magnetic resistance to low magnetic resistance is higher, thereby reducing the operating voltage, improving the magnetic resistance on / off ratio, and making the stability of the magnetic random storage unit better.

[0038] Furthermore, the material of the second free layer includes a superparamagnetic material. The superparamagnetic second free layer has a higher magnetization response speed, so that the reading and writing speed of the magnetic random access memory unit is faster.

[0039] Furthermore, the nano-pillar structures of two adjacent stacked structures are in contact with each other, and the stacking of the multi-layer stacked structures can add more first free layers and second free layers, and can provide more contact interfaces between the first free layers and the second free layers. The more second free layers there are, the greater the resistance value of the high resistance state can be. At the same time, the nano-pillar structures of two adjacent stacked structures are in contact with each other, so that the current channel is increased to a limited extent, thereby limiting the increase in the low resistance value, and further making the ratio of high magnetic resistance to low magnetic resistance higher, thereby improving the magnetic resistance on / off ratio, and making the stability of the magnetic random storage unit better.

[0040] Furthermore, the second free layer includes nanoparticles, and the first free layer surrounds the surface of the nanoparticles. The size of the nanoparticles is smaller, and the first free layer surrounds the surface of the nanoparticles, so the contact interface between the first free layer and the second free layer is larger, and when a voltage is applied to the first free layer, the control effect on the second free layer is better, thereby reducing the operating voltage, improving the magnetoresistance on / off ratio, and making the stability of the magnetic random access memory unit better. BRIEF DESCRIPTION OF THE DRAWINGS

[0041] Figure 1 and Figure 2 is a schematic structural diagram of a magnetic random access memory unit in one embodiment of the present invention;

[0042] Figure 3 and Figure 4 is a schematic structural diagram of a magnetic random access memory unit in another embodiment of the present invention;

[0043] Figure 5 is a schematic structural diagram of a magnetic random access memory unit in another embodiment of the present invention;

[0044] Figure 6 is a schematic diagram of the structure of a magnetic random access memory in one embodiment of the present invention;

[0045] Figure 7 and Figure 8 is a schematic structural diagram of an inverter in one embodiment of the present invention;

[0046] Fig. 9 and Fig.10 is a schematic diagram of the structure of a memory in one embodiment of the present invention;

[0047] Fig.11 and Fig.12 It is a schematic diagram of the structure of a memory in one embodiment of the present invention. DETAILED DESCRIPTION

[0048] As described in the background art, a new structure of logic devices and memories that surpass traditional CMOS is needed.

[0049] Specifically, conventional CMOS logic devices and memories include static random access memory (SRAM), dynamic access memory (DRAM), NAND flash memory, and NOR flash memory.

[0050] Traditional CMOS logic devices and memories have certain defects in speed, power consumption, and area. Among them, static random access memory is fast, but volatile and large in area; dynamic access memory is smaller in area, but slower than static random access memory and highly volatile; NAND flash and NOR flash provide smaller area and non-volatility, but lower speed and worse durability.

[0051] Spin-transfer torque magnetic random access memory (STT-MRAM) is a new type of non-volatile magnetic random access memory that realizes information writing through spin current. It is a highly competitive alternative to dynamic access memory, NAND flash memory and NOR flash memory, but spin-transfer torque magnetic random access memory has high current density switching magnetization.

[0052] Therefore, new structured memory technologies are needed to meet the needs of artificial intelligence technology.

[0053] In order to solve the above problems, the technical solution of the present invention provides a magnetic random access memory unit, a magnetic random access memory, an inverter and a memory, wherein the free layer structure includes one or more stacked structures, the stacked structure includes a first free layer and a plurality of second free layers separated from each other and located in the first free layer, and the magnetic random access memory unit can be used as a basic unit of a logic device and a memory, so that the logic device and the memory have lower power consumption, lower operating voltage and high temperature reliability.

[0054] In order to make the above-mentioned objects, features and beneficial effects of the present invention more obvious and easy to understand, specific embodiments of the present invention are described in detail below with reference to the accompanying drawings.

[0055] Figure 1 and Figure 2 It is a schematic diagram of the structure of a magnetic random access memory unit in one embodiment of the present invention.

[0056] Please refer to Figure 1 and Figure 2 , Figure 1 for Figure 2 Schematic diagram of the cross-section structure along the section line AA1. Figure 2 for Figure 1The figure only includes a top view of a free layer structure and a conductive layer 110, and the magnetic random memory cell includes: a substrate 100; a free layer structure located on the substrate 100, and the free layer structure includes one or more stacked structures, and the stacked structure includes: a first free layer 108 and a plurality of second free layers 106 separated from each other and located in the first free layer 108, wherein the first free layer 108 and the second free layer 106 are made of different materials, and the plurality of stacked structures are stacked in a direction perpendicular to the surface of the substrate 100; a tunnel layer 114 located on the free layer structure; and a fixed layer 115 located on the tunnel layer 114.

[0057] The magnetic random access memory unit, the free layer structure includes one or more stacked structures, the stacked structure includes a first free layer 108 and a plurality of second free layers 106 separated from each other and located in the first free layer 108, the magnetic random access memory unit can be used as a basic unit of a logic device and a memory, so that the logic device and the memory have lower power consumption, lower operating voltage and high temperature reliability.

[0058] It should be noted that the magnetic random access memory cell described in this embodiment only includes one layer of stacking structure.

[0059] In this embodiment, the second free layer 106 includes a nano-column structure, and a plurality of the nano-column structures are distributed in the first free layer 108 along a direction parallel to the surface of the substrate 100 ; the first free layer 108 is located on the sidewall surface of the nano-column structure.

[0060] The projection shape of the nano-column structure on the substrate includes: a cylindrical shape, an elliptical cylindrical shape or a square cylindrical shape.

[0061] In this embodiment, the projection shape of the nano-column structure on the substrate includes a cylindrical shape. The cylindrical nano-column structure has a larger surface area and is easier to realize in terms of process. At the same time, the stress distribution of the cylindrical nano-column structure is more uniform.

[0062] The material of the second free layer 106 includes a ferromagnetic material, and the ferromagnetic material includes cobalt ferrite, nickel ferrite or manganese ferrite.

[0063] In this embodiment, the material of the second free layer 106 includes cobalt ferrite.

[0064] In this embodiment, the number of the second free layers 106 is greater than or equal to 10, and the plurality of second free layers 106 increases the contact interface between the first free layer 108 and the second free layer 106. When a voltage is applied to the first free layer 108, the control effect on the second free layer 106 is better. At the same time, the plurality of second free layers 106 provide a plurality of current channels, so that the resistance in the low resistance state is smaller, and in the high resistance state, the plurality of second free layers 106 can also contribute to the resistance value, so that the resistance in the high resistance state is larger, and the ratio of high magnetic resistance to low magnetic resistance is higher, thereby reducing the operating voltage, improving the magnetic resistance on / off ratio, and making the stability of the magnetic random storage unit better.

[0065] In another embodiment, the material of the second free layer includes a superparamagnetic material. The superparamagnetic second free layer has a higher magnetization response speed, so that the read and write speed of the magnetic random access memory unit is faster, and the logic device and memory composed of the magnetic random access memory unit are faster.

[0066] The superparamagnetic material includes a ferromagnetic material that exhibits superparamagnetism at a certain nanometer size, and the ferromagnetic material includes cobalt ferrite, nickel ferrite or manganese ferrite. The ferromagnetic material has superparamagnetism when its diameter is less than a certain range. For example, when the second free layer material includes cobalt ferrite and the diameter range of the second free layer is less than 10 nanometers, the material of the second free layer has superparamagnetism.

[0067] The material of the first free layer 108 includes a ferroelectric material, and the ferroelectric material includes barium titanium, barium titanate, barium strontium titanate or lead titanate.

[0068] In this embodiment, the material of the first free layer 108 includes titanium barium.

[0069] In this embodiment, the projection shape of the first free layer 108 on the substrate includes a circular or elliptical shape. The circular or elliptical first free layer 108 is easier to realize in process technology and avoids process defects caused by square sharp corners.

[0070] The material of the fixed layer 115 includes a ferromagnetic material, and the ferromagnetic material includes cobalt iron boron, a mixture of cobalt iron and cobalt iron boron, or iron platinum.

[0071] The material of the tunnel layer 114 includes an insulating material, and the insulating material includes magnesium oxide, magnesium aluminum oxide or aluminum oxide.

[0072] In this embodiment, the material of the second free layer 106 is different from the material of the fixed layer 115. The material of the fixed layer 115 needs to have perpendicular magnetic anisotropy and low attenuation, and the material of the second free layer 106 needs to have a large magnetoelectric coefficient for interaction with the first free layer 108. The material of the second free layer 106 and the material of the fixed layer 115 are selected based on different characteristics.

[0073] In other embodiments, the material of the second free layer can be the same as the material of the fixed layer.

[0074] In this embodiment, the magnetic random memory unit also includes: a first electrode structure located on the substrate 100, the first electrode structure including a first electrode layer 102 and a second electrode layer 105 located on the first electrode layer 102, the projection of the second electrode layer 105 on the substrate 100 is located within the projection range of the first electrode layer 102 on the substrate 100; the free layer structure is located between the second electrode layer 105 and the tunnel layer 114; a third electrode layer 116 located on the fixed layer 115, and the fixed layer 115 is located between the third electrode layer 116 and the tunnel layer 114.

[0075] The material of the first electrode layer 102 includes metal or metal nitride; the metal includes: a combination of one or more of copper, aluminum, tungsten, cobalt, nickel and tantalum; the metal nitride includes a combination of one or more of tantalum nitride and titanium nitride.

[0076] The material of the second electrode layer 105 includes metal or metal nitride; the metal includes: a combination of one or more of copper, aluminum, tungsten, cobalt, nickel and tantalum; the metal nitride includes a combination of one or more of tantalum nitride and titanium nitride.

[0077] The material of the third electrode layer 116 includes metal or metal nitride; the metal includes: a combination of one or more of copper, aluminum, tungsten, cobalt, nickel and tantalum; the metal nitride includes a combination of one or more of tantalum nitride and titanium nitride.

[0078] In this embodiment, the materials of the first electrode layer 102 and the second electrode layer 105 are the same. In other embodiments, the materials of the first electrode layer and the second electrode layer may be different.

[0079] In this embodiment, the magnetic random access memory unit also includes: a conductive layer 110 surrounding the free layer structure, the conductive layer 110 being electrically connected to the first free layer 108; an isolation layer 104 located between the conductive layer 110 and the first electrode layer 102, the isolation layer 104 being located on the side wall of the second electrode layer 105.

[0080] The conductive layer 110 is subsequently used to connect the first free layer 108 to an external circuit. The isolation layer 104 is used to electrically isolate the conductive layer 110 from the first electrode layer 102 .

[0081] In this embodiment, part of the first free layer 108 is also located on the isolation layer 104. In other embodiments, the first free layer may not be located on the isolation layer.

[0082] In this embodiment, the material of the conductive layer 110 includes metal, and the metal includes: a combination of one or more of copper, aluminum, tungsten, cobalt, nickel and tantalum.

[0083] In this embodiment, the material of the isolation layer 104 includes: a dielectric material, and the dielectric material includes one or more combinations of silicon oxide, silicon nitride, silicon carbide, silicon oxycarbide, silicon oxynitride, aluminum oxide, aluminum nitride, silicon carbide nitride and silicon carbon nitride oxynitride.

[0084] In this embodiment, the magnetic random access memory cell further includes: a protection layer 101 located on the substrate 100 , and the protection layer 101 is located between the first electrode layer 102 and the substrate 100 .

[0085] In this embodiment, the material of the protection layer 101 includes silicon oxide. The protection layer 101 is used to protect the surface of the substrate 100.

[0086] The magnetic random access memory unit, since the materials of the first free layer 108 and the second free layer 106 are different, the material of the second free layer 106 includes a ferromagnetic material, the material of the first free layer includes a ferroelectric material, the second free layer 106 is located in the first free layer 108, and the ferroelectric material surrounds the ferromagnetic material. By applying voltage to the ferroelectric first free layer 108, a stress-induced elastic interaction can be generated between the ferroelectric first free layer 108 and the ferromagnetic second free layer 106, so that the ferromagnetic second free layer 106 is deformed, generating a magnetostrictive effect, thereby changing the magnetization direction to obtain a high magnetoresistance state and a low magnetoresistance state, thereby realizing a read-write state.

[0087] Figure 3 and Figure 4 It is a schematic diagram of the structure of a magnetic random access memory unit in another embodiment of the present invention.

[0088] Please refer to Figure 3 and Figure 4 , Figure 3 for Figure 4 Schematic diagram of the cross-section structure along the section line AA1. Figure 4 for Figure 3 The top view only includes the free layer structure and the conductive layer 110. Figure 3 and Figure 4 The structure and Figure 1 and Figure 2 The difference between the structures in the figure is that the free layer structure includes a multi-layer stacking structure, and the multi-layer stacking structure is stacked in a direction perpendicular to the surface of the substrate 100. The stacking structure includes: a first free layer 208 and a plurality of second free layers 206 separated from each other and located in the first free layer 208. The materials of the first free layer 208 and the second free layer 206 are different.

[0089] In this embodiment, two adjacent layers of stacked nanorod structures are in contact with each other, thereby reducing the current path and further reducing the resistance.

[0090] The stacking of the multi-layer stacked structure can add more first free layers 208 and second free layers 206, and can provide more contact interfaces between the first free layers 208 and the second free layers 206. The more second free layers 206 there are, the greater the resistance of the high resistance state can be. At the same time, the contact between the nano-pillar structures of the two adjacent stacked structures makes the increase of the current channel limited, thereby making the increase of the low resistance value limited, and further making the ratio of high magnetic resistance to low magnetic resistance higher, thereby improving the magnetic resistance on / off ratio and making the stability of the magnetic random storage unit better.

[0091] In this embodiment, the material of the second free layer 206 of the multi-layer stacked structure is the same, and the material of the first free layer 208 of the multi-layer stacked structure is the same. On the one hand, when forming the multi-layer second free layer 206 and the multi-layer first free layer 208, since the materials are the same, the same target material can be reused, the process cost is low, and the production capacity utilization rate is improved; on the other hand, the multi-layer second free layer 206 is in contact with each other, and the multi-layer first free layer 208 is in contact with each other, and the materials between the layers are the same, so no dislocation will be generated when in contact, which can reduce defects.

[0092] In other embodiments, the material of the second free layer of the multi-layer stacked structure may be different, and the material of the first free layer of the multi-layer stacked structure may be different.

[0093] Figure 5 It is a schematic diagram of the structure of a magnetic random access memory unit in another embodiment of the present invention.

[0094] Please refer to Figure 5 , Figure 5 The structure and Figure 3 The difference between the structures is that the second free layer 306 includes nanoparticles, and the first free layer 308 surrounds the surface of the nanoparticles.

[0095] The second free layer 306 includes nanoparticles, and the first free layer 308 surrounds the surface of the nanoparticles. The size of the nanoparticles is smaller, and the first free layer 306 surrounds the surface of the nanoparticles, so the contact interface between the first free layer 306 and the second free layer 308 is larger, and when a voltage is applied to the first free layer 306, the control effect on the second free layer 308 is better, thereby reducing the operating voltage, improving the magnetoresistance on / off ratio, and making the stability of the magnetic random access memory unit better.

[0096] Figure 6 It is a schematic diagram of the structure of a magnetic random access memory in one embodiment of the present invention.

[0097] Please refer to Figure 6 The magnetic random access memory comprises: a plurality of magnetic random access memory cells arranged in an m×n array; a tunnel layer located on the free layer structure; a fixed layer located on the tunnel layer; a plurality of bit lines BL, any one of which is electrically connected to the first free layer of a column of magnetic random access memory cells; a plurality of word lines WL, any one of which is electrically connected to the third electrode layer of a row of magnetic random access memory cells.

[0098] The magnetic random access memory cell comprises: a free layer structure, the free layer structure comprises one or more stacked structures, the stacked structure comprises: a first free layer and a plurality of second free layers separated from each other in the first free layer, the first free layer and the second free layer are made of different materials, and the plurality of stacked structures are stacked in a direction perpendicular to the substrate surface. For the structure, material and function of the magnetic random access memory cell, please refer to Figure 1 and Figure 2 , Figure 3 and Figure 4 ,or Figure 5 The drawings and text descriptions in the specification will not be repeated here.

[0099] In this embodiment, any bit line BL is electrically connected to the first free layer of a column of magnetic random access memory cells through a conductive layer.

[0100] In this embodiment, Figure 6 The magnetic random access memory cell in FIG. Figure 1 The substrate 100, the protective layer 101, the isolation layer 104 and the conductive layer 110 are omitted, wherein the first electrode structure is omitted as a single layer.

[0101] In this embodiment, the magnetic random access memory cell also includes: a plurality of read-write units, any read-write unit is electrically connected to the first electrode layer of a column of magnetic random access memory cells, and is electrically connected to the bit line BL corresponding to the column of magnetic random access memory cells; a plurality of groups of input terminals IN and output terminals OUT, any group of input terminals IN and output terminals OUT is electrically connected to a read-write unit, the input terminal IN is used to apply an input voltage to the bit line BL, the output terminal OUT is used to apply an output voltage to the first electrode layer, and the input voltage and the output voltage are opposite.

[0102] The input voltage and the output voltage are opposite, that is, the voltages applied to the first free layer and the first electrode layer are opposite, which can generate stress-induced elastic interaction between the ferroelectric first free layer and the ferromagnetic second free layer, so that the ferromagnetic second free layer is deformed, resulting in a magnetostrictive effect, thereby changing the magnetization direction to obtain a high magnetoresistance state and a low magnetoresistance state, thereby realizing a read-write state.

[0103] In this embodiment, the first electrode layers of the magnetic random access memory cells are connected to a ground voltage VSS.

[0104] Figure 7 and Figure 8 Schematic diagram of the structure of an inverter in one embodiment of the present invention.

[0105] Please refer to Figure 7 , the inverter includes: Figure 1 and Figure 2 , Figure 3 and Figure 4 ,or Figure 5 A magnetic random access memory unit described in the drawings and text; an input terminal A electrically connected to the first free layer; and an output terminal Y electrically connected to the first electrode layer.

[0106] In this embodiment, Figure 7 The magnetic random access memory cell in FIG. Figure 1 The substrate 100, the protective layer 101, the isolation layer 104 and the conductive layer 110 are omitted, wherein the first electrode structure is omitted as a single layer.

[0107] The magnetic random storage unit includes: a free layer structure, the free layer structure includes one or more stacked structures, the stacked structure includes: a first free layer and a plurality of second free layers separated from each other and located in the first free layer, the first free layer and the second free layer are made of different materials, and the plurality of stacked structures are stacked in a direction perpendicular to the substrate surface; a tunnel layer located on the free layer structure; and a fixed layer located on the tunnel layer.

[0108] In this embodiment, the inverter further includes: a power supply terminal VDD and a ground terminal VSS, the power supply terminal VDD is electrically connected to the third electrode layer of the magnetic random access memory cell, and the ground terminal VSS is electrically connected to the first electrode layer of the magnetic random access memory cell.

[0109] In this embodiment, the input terminal A is electrically connected to the first free layer through the conductive layer.

[0110] The input terminal A is used to apply an input voltage to the first free layer, and the output terminal Y is used to apply an output voltage to the first electrode layer, and the input voltage and the output voltage are opposite.

[0111] The input voltage and the output voltage are opposite, and a stress-induced elastic interaction can be generated between the ferroelectric first free layer and the ferromagnetic second free layer, so that the ferromagnetic second free layer is deformed, resulting in a magnetostrictive effect, thereby changing the magnetization direction to obtain a high magnetoresistance state and a low magnetoresistance state, thereby realizing a read-write state.

[0112] Please refer to Figure 8 , Figure 8 This is a schematic diagram of the state where the voltages at the input terminal A and the output terminal Y are opposite. When the state of the input terminal A is "0", the state of the output terminal Y is "1"; when the state of the input terminal A is "1", the state of the output terminal Y is "0".

[0113] The inverter formed by the magnetic random access memory unit has small size, low voltage, low energy consumption and high operating speed.

[0114] Fig. 9 and Fig.10 It is a schematic diagram of the structure of a memory in one embodiment of the present invention.

[0115] Please refer to Fig. 9 The memory includes: a plurality of magnetic random access memory cells, including a first magnetic random access memory cell C1, a second magnetic random access memory cell C2 and a third magnetic random access memory cell C3, wherein the first free layer of the first magnetic random access memory cell C1 is electrically connected to the first electrode layer of the second magnetic random access memory cell C2, and the third electrode layer of the first magnetic random access memory cell C1 is electrically connected to the third electrode layer of the third magnetic random access memory cell C3.

[0116] For the structure, materials and functions of the magnetic random access memory cell, please refer to Figure 1 and Figure 2 , Figure 3 and Figure 4 ,or Figure 5 The drawings and text descriptions in the specification will not be repeated here.

[0117] In this embodiment, Fig. 9The magnetic random access memory cell in FIG. Figure 1 The substrate 100, the protective layer 101, the isolation layer 104 and the conductive layer 110 are omitted, wherein the first electrode structure is omitted as a single layer.

[0118] In this embodiment, the memory further includes: a power supply terminal VDD, and the third electrode layer of the first magnetic random access memory unit C1 and the third electrode layer of the third magnetic random access memory unit C3 are electrically connected to the power supply terminal VDD.

[0119] In this embodiment, the first free layer of the first magnetic random access memory cell C1 is electrically connected to the first electrode layer of the third magnetic random access memory cell C3; the third electrode layer of the second magnetic random access memory cell C2 is electrically connected to the power supply terminal VDD.

[0120] In this embodiment, the memory further includes: a ground terminal VSS, and the ground terminal VSS is electrically connected to the first electrode layer of the first magnetic random access memory unit C1.

[0121] In this embodiment, the memory also includes: a first input terminal A, a second input terminal B and an output terminal Y, the first input terminal A is electrically connected to the first free layer of the third magnetic random memory unit C3, the second input terminal B is electrically connected to the first free layer of the second magnetic random memory unit C2, the output terminal Y is electrically connected to the first electrode layer of the first magnetic random memory unit C1, and the voltage applied to the output terminal Y is opposite to the voltage applied to at least one of the first input terminal A and the second input terminal B.

[0122] Please refer to Fig.10 , Fig.10 It is a state diagram of the voltages of the first input terminal A, the second input terminal B and the output terminal Y. The voltage applied to the output terminal Y is opposite to the voltage applied to at least one of the first input terminal A and the second input terminal B. The memory composed of the first magnetic random access memory cell C1, the second magnetic random access memory cell C2 and the third magnetic random access memory cell C3 can be used as a NAND flash memory.

[0123] The NAND flash memory formed by the first magnetic random access memory cell C1, the second magnetic random access memory cell C2 and the third magnetic random access memory cell C3 has a small size, a low voltage, a small energy consumption and a high operating speed.

[0124] In this embodiment, the first input terminal A is electrically connected to the first free layer of the third magnetic random access memory unit C3 through the conductive layer; the second input terminal B is electrically connected to the first free layer of the second magnetic random access memory unit C2 through the conductive layer.

[0125] Fig.11 and Fig.12It is a schematic diagram of the structure of a memory in one embodiment of the present invention.

[0126] Please refer to Fig.11 The memory includes: a plurality of magnetic random access memory cells, including a first magnetic random access memory cell C1, a second magnetic random access memory cell C2 and a third magnetic random access memory cell C3, wherein the first free layer of the first magnetic random access memory cell C1 is electrically connected to the first electrode layer of the second magnetic random access memory cell C2, and the third electrode layer of the first magnetic random access memory cell C1 is electrically connected to the third electrode layer of the third magnetic random access memory cell C3.

[0127] For the structure, materials and functions of the magnetic random access memory cell, please refer to Figure 1 and Figure 2 , Figure 3 and Figure 4 ,or Figure 5 The drawings and text descriptions in the specification will not be repeated here.

[0128] In this embodiment, Fig.11 The magnetic random access memory cell in FIG. Figure 1 The substrate 100, the protective layer 101, the isolation layer 104 and the conductive layer 110 are omitted, wherein the first electrode structure is omitted as a single layer.

[0129] In this embodiment, the memory further includes: a power supply terminal VDD, and the third electrode layer of the first magnetic random access memory unit C1 and the third electrode layer of the third magnetic random access memory unit C3 are electrically connected to the power supply terminal VDD.

[0130] In this embodiment, the third electrode layer of the second magnetic random access memory cell C2 is electrically connected to the first electrode layer of the third magnetic random access memory cell C3.

[0131] In this embodiment, the memory further includes: a ground terminal VSS, and the ground terminal VSS is electrically connected to the first electrode layer of the first magnetic random access memory unit C1.

[0132] In this embodiment, the memory also includes: a first input terminal A, a second input terminal B and an output terminal Y, the first input terminal A is electrically connected to the first free layer of the third magnetic random memory unit C3, the second input terminal B is electrically connected to the first free layer of the second magnetic random memory unit C2, the output terminal Y is electrically connected to the first electrode layer of the first magnetic random memory unit C1, and the voltage applied to the output terminal Y is opposite to the voltage applied to at least one of the first input terminal A and the second input terminal B.

[0133] Please refer to Fig.12 , Fig.12It is a state diagram of the voltages of the first input terminal A, the second input terminal B and the output terminal Y. The voltage applied to the output terminal Y is opposite to the voltage applied to at least one of the first input terminal A and the second input terminal B. The memory composed of the first magnetic random access memory cell C1, the second magnetic random access memory cell C2 and the third magnetic random access memory cell C3 can be used as a NOR flash memory.

[0134] The NOR flash memory formed by the first magnetic random access memory cell C1, the second magnetic random access memory cell C2 and the third magnetic random access memory cell C3 has a small size, a low voltage, a small energy consumption and a high operating speed.

[0135] In this embodiment, the first input terminal A is electrically connected to the first free layer of the third magnetic random access memory unit C3 through the conductive layer; the second input terminal B is electrically connected to the first free layer of the second magnetic random access memory unit C2 through the conductive layer.

[0136] Figure 1 and Figure 2 , Figure 3 and Figure 4 ,or Figure 5 The memory and logic device composed of the magnetic random access memory unit described in the drawings and text can be used as L1 / L2 / L3 cache of high-speed memory, Figure 1 and Figure 2 , Figure 3 and Figure 4 ,or Figure 5 The high-speed memory composed of the magnetic random access memory unit described in the drawings and text has a smaller area, faster response speed, better high-temperature reliability and better stability, and can be applied to more advanced technical fields, such as artificial intelligence, automotive fields, etc.

[0137] Although the present invention is disclosed as above, the present invention is not limited thereto. Any person skilled in the art can make various changes and modifications without departing from the spirit and scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the scope defined by the claims.

Claims

1. A magnetic random access memory cell, characterized in that: include: substrate; A free layer structure located on a substrate, the free layer structure comprising one or more stacked structures, the stacked structure comprising: a first free layer and a plurality of second free layers located in the first free layer and separated from each other, the first free layer and the second free layer being made of different materials, and the plurality of stacked structures being stacked in a direction perpendicular to a surface of the substrate; a tunnel layer disposed on the free layer structure; A fixed layer located on the tunnel layer.

2. The magnetic random access memory cell according to claim 1, wherein: The second free layer includes a nano-column structure, and a plurality of the nano-column structures are distributed in the first free layer along a direction parallel to a surface of the substrate; the first free layer is located on a side wall surface of the nano-column structure.

3. The magnetic random access memory cell according to claim 2, wherein: Two adjacent layers of stacked nanocolumn structures are in contact with each other.

4. The magnetic random access memory cell according to claim 2, characterized in that: The projection shape of the nano-column structure on the substrate includes: a cylindrical shape, an elliptical cylindrical shape or a square cylindrical shape.

5. The magnetic random access memory cell according to claim 1, wherein: The second free layer includes nanoparticles, and the first free layer surrounds surfaces of the nanoparticles.

6. The magnetic random access memory cell according to claim 1, wherein: The material of the second free layer is different from that of the fixed layer.

7. The magnetic random access memory cell according to claim 1, wherein: The material of the second free layer includes a ferromagnetic material, and the ferromagnetic material includes cobalt ferrite, nickel ferrite or manganese ferrite.

8. The magnetic random access memory cell according to claim 1, wherein: The material of the first free layer includes a ferroelectric material, and the ferroelectric material includes barium titanium, barium titanate, barium strontium titanate or lead titanate.

9. The magnetic random access memory cell according to claim 1, wherein: The number of the second free layers is greater than or equal to ten.

10. The magnetic random access memory cell according to claim 1, wherein: The material of the second free layer includes superparamagnetic material.

11. The magnetic random access memory cell according to claim 10, wherein: The superparamagnetic material includes a ferromagnetic material exhibiting superparamagnetism at a certain nanometer size, and the ferromagnetic material includes cobalt ferrite, nickel ferrite or manganese ferrite.

12. The magnetic random access memory cell according to claim 1, wherein: The material of the fixed layer includes a ferromagnetic material, and the ferromagnetic material includes cobalt iron boron, a mixture of cobalt iron and cobalt iron boron, or iron platinum.

13. The magnetic random access memory cell according to claim 1, wherein: The material of the tunnel layer includes an insulating material, and the insulating material includes magnesium oxide, magnesium aluminum oxide or aluminum oxide.

14. The magnetic random access memory cell according to claim 1, wherein: Also includes: a first electrode structure located on the substrate, the first electrode structure comprising a first electrode layer and a second electrode layer located on the first electrode layer, the projection of the second electrode layer on the substrate being located within the projection range of the first electrode layer on the substrate; the free layer structure being located between the second electrode layer and the tunnel layer; A third electrode layer is located on the fixed layer, and the fixed layer is located between the third electrode layer and the tunnel layer.

15. The magnetic random access memory cell according to claim 14, characterized in that: Also includes: A conductive layer surrounding the free layer structure, the conductive layer being electrically connected to the first free layer; An isolation layer is located between the conductive layer and the first electrode layer, and the isolation layer is located on a side wall of the second electrode layer.

16. The magnetic random access memory cell according to claim 15, characterized in that: A portion of the free layer structure is also located on the isolation layer.

17. The magnetic random access memory cell according to claim 1, wherein: The projection shape of the first free layer on the substrate includes a circle or an ellipse.

18. A magnetic random access memory, characterized in that: include: A plurality of magnetic random access memory cells according to any one of claims 1 to 17, wherein the plurality of magnetic random access memory cells are arranged in an array, and the magnetic random access memory cells comprise: a free layer structure, wherein the free layer structure comprises one or more stacked structures, wherein the stacked structures comprise: a first free layer and a plurality of second free layers separated from each other and located in the first free layer, wherein the first free layer and the second free layer are made of different materials, and the plurality of stacked structures are stacked in a direction perpendicular to a substrate surface; a tunnel layer located on the free layer structure; and a fixed layer located on the tunnel layer. A plurality of bit lines, any one of which is electrically connected to the first free layer of a column of magnetic random memory cells; a plurality of word lines, any one of which is electrically connected to the third electrode layer of a row of magnetic random memory cells.

19. The magnetic random access memory according to claim 18, wherein: Also includes: A plurality of read-write units, any one of which is electrically connected to the first electrode layer of a column of magnetic random access memory cells, and is electrically connected to the bit lines corresponding to the column of magnetic random access memory cells; a plurality of groups of input terminals and output terminals, any one of which is electrically connected to a read-write unit, the input terminal being used to apply an input voltage to the bit line, the output terminal being used to apply an output voltage to the first electrode layer, and the input voltage and the output voltage being opposite.

20. The magnetic random access memory according to claim 18, wherein: The first electrode layers of a plurality of the magnetic random access memory cells are connected to a ground voltage.

21. The magnetic random access memory according to claim 18, wherein: The bit line is electrically connected to the first free layer through a conductive layer.

22. An inverter, characterized in that: include: The magnetic random access memory unit according to any one of claims 1 to 17, the magnetic random access memory unit comprising: a free layer structure, the free layer structure comprising one or more stacked structures, the stacked structure comprising: a first free layer and a plurality of second free layers separated from each other and located in the first free layer, the first free layer and the second free layer being made of different materials, the plurality of stacked structures being stacked in a direction perpendicular to a substrate surface; a tunnel layer located on the free layer structure; and a fixed layer located on the tunnel layer; an input terminal electrically connected to the first free layer; An output terminal electrically connected to the first electrode layer.

23. The inverter according to claim 22, characterized in that Also includes: A power supply terminal and a ground terminal, wherein the power supply terminal is electrically connected to the second electrode layer of the magnetic random access memory unit, and the ground terminal is electrically connected to the first electrode layer of the magnetic random access memory unit.

24. The inverter according to claim 22, characterized in that The input end is electrically connected to the first free layer through a conductive layer.

25. A memory, characterized in that: include: A plurality of magnetic random access memory cells as described in any one of claims 1 to 17, comprising a first magnetic random access memory cell, a second magnetic random access memory cell and a third magnetic random access memory cell, wherein the first free layer of the first magnetic random access memory cell is electrically connected to the first electrode layer of the second magnetic random access memory cell, and the third electrode layer of the first magnetic random access memory cell is electrically connected to the third electrode layer of the third magnetic random access memory cell.

26. The memory according to claim 25, characterized in that Also includes: A power supply end, wherein the third electrode layer of the first magnetic random access memory unit and the third electrode layer of the third magnetic random access memory unit are electrically connected to the power supply end.

27. The memory according to claim 26, wherein: The first free layer of the first magnetic random access memory cell is electrically connected to the first electrode layer of the third magnetic random access memory cell; the third electrode layer of the second magnetic random access memory cell is electrically connected to the power supply terminal.

28. The memory according to claim 26, wherein: The second electrode layer of the second magnetic random access memory unit is electrically connected to the first electrode layer of the third magnetic random access memory unit.

29. The memory according to claim 25, characterized in that Also includes: A ground terminal is electrically connected to the first electrode layer of the first magnetic random access memory unit.

30. The memory according to claim 25, wherein: Also includes: A first input terminal, a second input terminal and an output terminal, wherein the first input terminal is electrically connected to the first free layer of the third magnetic random memory unit, the second input terminal is electrically connected to the first free layer of the second magnetic random memory unit, the output terminal is electrically connected to the first electrode layer of the first magnetic random memory unit, and the voltage applied to the output terminal is opposite to the voltage applied to at least one of the first input terminal and the second input terminal.

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