Driving circuit capable of adaptively inhibiting hybrid parallel crosstalk of Si IGBT and SiC MOSFET

Abstract

The invention discloses a drive circuit capable of adaptively suppressing hybrid parallel crosstalk of a Si IGBT (Insulated Gate Bipolar Translator) and a SiC MOSFET (Metal-Oxide-Semiconductor Field Effect Transistor). The drive circuit comprises a bilateral gate drive chip, a differential amplification circuit, an analog multiplier and a crosstalk suppression circuit. According to the invention, the differential amplification circuit extracts the corresponding time-delay switch driving signal, then the analog multiplier multiplies the time-delay switch driving signal with the lifted driving signal of the parallel tube to generate a crosstalk suppression circuit turn-on signal corresponding to the main power tube which will generate crosstalk, and the negative crosstalk suppression circuit is turned on. In addition, a triode in the forward crosstalk suppression circuit detects voltages at two ends of a driving resistor in real time, and once forward crosstalk current flows through the driving resistor, the forward crosstalk suppression circuit is automatically started. According to the method, the influence of crosstalk on hybrid parallel connection can be effectively eliminated, and the method has the advantages of self-adaptability, high response speed and good real-time performance.

Description

Technical Field

[0001] The invention relates to a crosstalk suppression circuit in which Si IGBT and SiC MOSFET are mixed and connected in parallel. Background Art

[0002] Si IGBT is a device that combines the advantages of BJT and MOSFET, with the advantages of large current capacity, low on-voltage drop and fast switching speed, but as a bipolar device, it has tail current, large switching loss, and is limited by the properties of Si materials. The switching frequency of Si IGBT has been difficult to meet the needs of high power density power electronic devices. As a new third-generation wide bandgap semiconductor, SiC MOSFET has extremely low on-resistance and higher switching frequency, which can greatly improve the power density of power electronic devices, but it is expensive and the current carrying capacity of a single SiC MOSFET is limited.

[0003] The hybrid parallel connection of Si IGBT and SiC MOSFET is usually formed by the parallel connection of discrete Si IGBT and discrete SiC MOSFET. It combines the advantages of Si IGBT and SiC MOSFET and is a device with both large current tolerance and low switching loss. At present, the driving strategy of SiC MOSFET turning on first and then off, and Si IGBT turning on last and then off is generally adopted, which can effectively eliminate the influence of IGBT tail current and reduce the switching loss of the device. The driving strategy of SiC MOSFET turning on last and then off, and Si IGBT turning on first and then off ensures the reliability of SiC MOSFET devices.

[0004] However, when the SiC MOSFET (IGBT) is turned on early, the parallel device V DS (V CE ) will suddenly change from the bus voltage to zero, which will generate a negative crosstalk current flowing through the IGBT (SiC MOSFET) drive resistor, causing a negative voltage to be generated at the gate emitter (gate source) of the IGBT (SiC MOSFET), which will cause great damage to the Si IGBT (SiC MOSFET) device. At the same time, when the SiC MOSFET (IGBT) is turned off later, the parallel device V DS (V CE ) will suddenly change from zero to the bus voltage, which will generate a forward crosstalk current flowing through the Si IGBT (SiC MOSFET) drive resistor, causing the Si IGBT (SiC MOSFET) gate emitter (gate source) to generate a forward voltage, which may cause the Si IGBT (SiC MOSFET) to be turned on incorrectly, seriously affecting the reliability of the device and the power electronic conversion device.

[0005] There are few existing studies on crosstalk suppression that are specifically applied to the mixed parallel connection of Si IGBT and SiC MOSFET. Therefore, it is extremely important to propose a solution specifically applied to solving the crosstalk of the mixed parallel connection of Si IGBT and SiC MOSFET. Summary of the invention

[0006] Purpose of the invention: In view of the above-mentioned prior art, a driving circuit for adaptively suppressing crosstalk of mixed parallel connection of Si IGBT and SiC MOSFET is proposed to solve the crosstalk problem caused by inconsistent switching timing and improve the reliability of the device.

[0007] Technical solution: A driving circuit for adaptively suppressing crosstalk of Si IGBT and SiC MOSFET mixed parallel connection, including a bilateral gate driving chip, a differential amplifier circuit, an analog multiplier and a crosstalk suppression circuit;

[0008] The differential amplifier circuit extracts the delayed switching part of the driving signal respectively. When the switching timing of SiC MOSFET and SiIGBT is inconsistent, the operational amplifier will output the delayed switching part of the switching timing, and the output signal will be connected to the analog multiplier;

[0009] In the analog multiplier part, since the turn-off voltage in the SiC MOSFET and Si IGBT driving signals is generally a negative voltage, the driving voltage is first raised upward by a voltage raising circuit until the turn-off voltage is zero. The SiC MOSFET analog multiplier multiplies the output signal of the differential amplifier circuit with the Si IGBT drive signal after the voltage boost circuit. If the SiC MOSFET is turned on first and then off, no crosstalk will occur on the SiC MOSFET. Then the result PWM1 of the multiplier after multiplication is zero, and the crosstalk suppression circuit will not be triggered to turn on. If the SiC MOSFET is turned on last and turned off first, crosstalk will occur on the SiC MOSFET. Then the output result PWM1 of the multiplier is not zero, and the crosstalk suppression circuit will be turned on during the delay switch part of the time. The Si IGBT analog multiplier multiplies the output signal of the differential amplifier circuit with the SiC MOSFET drive signal after the voltage boost circuit. If the Si IGBT is turned on first and then off, no crosstalk will occur on the Si IGBT. Then the result PWM2 of the multiplier after multiplication is zero, and the crosstalk suppression circuit will not be triggered to turn on. If the Si IGBT is turned on last and turned off first, crosstalk will occur on the Si IGBT. Then the output result PWM2 of the multiplier is not zero, and the crosstalk suppression circuit will be turned on during the delay switch part of the time.

[0010] The crosstalk suppression circuit is divided into a forward crosstalk suppression circuit and a reverse crosstalk suppression circuit. When forward crosstalk occurs, there is a forward crosstalk current, which flows through the driving resistor and generates a voltage difference on the driving resistor. The voltage difference is applied to the base-emitter terminals of the PNP transistor, which turns on the transistor, allowing the forward crosstalk current to pass through the transistor and flow into the RC parallel circuit, thereby not passing through the driving resistor of the main power tube, thus avoiding the occurrence of forward crosstalk. When negative crosstalk occurs, there is a negative crosstalk current. At this time, the analog multiplier will output a corresponding suppression circuit turn-on signal, turning on the N-channel MOSFET. At this time, the negative crosstalk current passes through the N-channel MOSFET and is quickly derived from the RC parallel branch, thereby suppressing the occurrence of negative crosstalk.

[0011] Beneficial effect: Due to inconsistent switching timing, when SiC MOSFET (Si IGBT) is turned on early, the parallel device V DS (V CE ) will suddenly change from the bus voltage to zero, which will generate a negative crosstalk current flowing through the Si IGBT (SiC MOSFET) drive resistor, causing a negative voltage to be generated at the gate emitter (gate source) of the Si IGBT (SiC MOSFET), which will cause great damage to the Si IGBT (SiCMOSFET) device. When the SiC MOSFET (Si IGBT) is turned off later, the parallel device V DS (V CE ) will suddenly change from zero to the bus voltage, which will generate a positive crosstalk current flowing through the Si IGBT (SiC MOSFET) driving resistor, causing the SiIGBT (SiC MOSFET) gate emitter (gate source) to generate a positive voltage, which may cause the Si IGBT (SiC MOSFET) to be turned on by mistake. However, there are few methods currently used to specifically solve the crosstalk problem existing in mixed parallel connection. The present invention extracts the corresponding delayed switch driving signal through a differential amplifier circuit, and then multiplies the delayed switch driving signal with the parallel tube after the driving signal is lifted by an analog multiplier to generate a crosstalk suppression circuit opening signal corresponding to the main power tube that will generate crosstalk, and turns on the negative crosstalk suppression circuit. In addition, the transistor in the positive crosstalk suppression circuit will detect the voltage across the driving resistor in real time. Once the positive crosstalk current flows through the driving resistor, the positive crosstalk suppression circuit will be automatically turned on. The present invention can effectively eliminate the influence of crosstalk on mixed parallel connection, has the advantages of adaptability, fast response speed and good real-time performance. BRIEF DESCRIPTION OF THE DRAWINGS

[0012] Figure 1 It is a topological structure diagram of the present invention;

[0013] Figure 2The driving voltage differential amplifier circuit diagram, where (a) corresponds to SiC MOSFET and (b) corresponds to Si IGBT;

[0014] Figure 3 The analog multiplier circuit diagram, where (a) corresponds to SiC MOSFET and (b) corresponds to Si IGBT;

[0015] Figure 4 The crosstalk suppression circuit diagram, where (a) corresponds to SiC MOSFET and (b) corresponds to Si IGBT;

[0016] Figure 5 Schematic diagram of the crosstalk current flow when crosstalk occurs in SiC MOSFET, where (a) corresponds to positive crosstalk and (b) corresponds to negative crosstalk;

[0017] Figure 6 Schematic diagram of the crosstalk current flow when crosstalk occurs in Si IGBT, where (a) corresponds to positive crosstalk and (b) corresponds to negative crosstalk;

[0018] Figure 7 Schematic diagram of the operation of the crosstalk suppression circuit when crosstalk occurs in SiC MOSFET, where (a) corresponds to positive crosstalk and (b) corresponds to negative crosstalk;

[0019] Figure 8 Schematic diagram of the operation of the crosstalk suppression circuit when crosstalk occurs in Si IGBT, where (a) corresponds to positive crosstalk and (b) corresponds to negative crosstalk;

[0020] Fig. 9 Schematic diagram of Si IGBT gate-emitter voltage without and with crosstalk suppression measures, where (a) corresponds to when it is turned on, and (b) corresponds to when it is turned off;

[0021] Fig.10 Schematic diagram of Si MOSFET gate-source voltage without and with crosstalk suppression measures, where (a) corresponds to when it is turned on and (b) corresponds to when it is turned off. DETAILED DESCRIPTION

[0022] The present invention will be further explained below in conjunction with the accompanying drawings.

[0023] like Figure 1 As shown, a driving circuit for adaptively suppressing crosstalk of mixed parallel connection of Si IGBT and SiC MOSFET includes Si IGBT Q, SiC MOSFET M, bilateral gate driving chip, differential amplifier circuit, analog multiplier and crosstalk suppression circuit.

[0024] The bilateral gate driver chip outputs a set of PWM signals with adjustable duty cycle as the driving signals for Si IGBT and SiC MOSFET.

[0025] The SiC MOSFET differential amplifier circuit extracts the delayed switching part of the driving signal of the Si IGBT relative to the SiC MOSFET under different driving timings, and this output result is connected to the input of the SiC MOSFET analog multiplier. Since the turn-off voltage in the SiC MOSFET and Si IGBT driving signals is generally negative, the driving voltage is first raised upward through the voltage boosting circuit to a turn-off voltage of zero. The Si IGBT driving signal after voltage boosting is connected to the other input of the SiC MOSFET analog multiplier, and the two are multiplied. If the SiC MOSFET switching timing is first turned on and then turned off relative to the Si IGBT at this time, crosstalk will not occur, and the analog multiplier outputs zero; if the SiC MOSFET switching timing is turned on and then turned off relative to the Si IGBT at this time, crosstalk will occur, and the analog multiplier outputs the PWM1 driving signal to turn on the crosstalk suppression circuit. The Si IGBT differential amplifier circuit extracts the delayed switching part of the driving signal of the SiC MOSFET relative to the Si IGBT under different driving timings, and this output result is connected to the input of the Si IGBT analog multiplier. At the same time, the SiC MOSFET drive signal that has passed through the voltage boost circuit is connected to the other input terminal of the Si IGBT analog multiplier, and the two are multiplied. If the Si IGBT switch timing is turned on first and then off relative to the SiC MOSFET at this time, crosstalk will not occur, and the analog multiplier outputs zero; if the Si IGBT switch timing is turned on later and then off relative to the SiC MOSFET at this time, crosstalk will occur, and the analog multiplier outputs the PWM2 drive signal to turn on the crosstalk suppression circuit. When the crosstalk suppression circuit starts working, the PNP transistor in the crosstalk suppression circuit is turned on, and the positive crosstalk current flows through the transistor and is derived from the RC parallel branch; the N-channel MOSFET in the crosstalk suppression circuit is turned on, and the negative crosstalk current passes through the N-channel MOSFET and is quickly derived from the RC parallel branch, thereby suppressing the occurrence of negative crosstalk.

[0026] like Figure 2 As shown in (a), the SiC MOSFET differential amplifier circuit includes an operational amplifier U 1 , resistor R 3 ~R 6 ; Resistance R 3 One end is connected to the Si IGBT drive signal OUT2, and the other end is connected to the operational amplifier U 1 The non-inverting input terminal and the resistor R 5 One end, resistor R 5 The other end is grounded; the resistor R 4One end is connected to the SiC MOSFET drive signal OUT1, and the other end is connected to the operational amplifier U 1 The inverting input terminal and the resistor R 6 One end, resistor R 6 The other end is connected to the operational amplifier U 1 Output terminal; Operational amplifier power supply terminal is connected to positive voltage V cc and negative voltage V ss .

[0027] like Figure 2 As shown in (b), the Si IGBT differential amplifier circuit includes an operational amplifier U 2 , R 12 ~R 15 ; Resistance R 12 One end is connected to the SiC MOSFET drive signal OUT1, and the other end is connected to the operational amplifier U2 non-inverting input and the resistor R 14 One end, resistor R 14 The other end is grounded; the resistor R 13 One end is connected to Si IGBT drive signal OUT2, and the other end is connected to operational amplifier U 1 The inverting input terminal and the resistor R 15 One end, resistor R 15 The other end is connected to the operational amplifier U 2 Output terminal; Operational amplifier power supply terminal is connected to positive voltage V cc and negative voltage V ss .

[0028] like Figure 3 As shown in (a), the SiC MOSFET analog multiplier includes a resistor R 7 ~R 11 , R f1 ~R f3 、Operational amplifier U 3 、NPN transistor Q 5 ~Q 7 ; Resistance R 7 One end is connected to the operational amplifier U 1 Output, the other end is connected to transistor Q 5 The base of transistor Q 5 The collector is connected to the resistor R 9 One end, and the output signal PWM1 is drawn here, the resistor R 9 The other end is connected to a positive voltage V cc , transistor Q 5 The emitter of transistor Q 6 The emitter and transistor Q 7 The collector of transistor Q 6 The base is grounded and the collector is connected to the resistor R 10One end, resistor R 10 The other end is connected to a positive voltage V cc , transistor Q 7 The emitter is connected to the resistor R 11 One end, resistor R 11 The other end is grounded, transistor Q 7 The base of the operational amplifier U 3 Output terminal and resistor R f3 One end, resistor R f3 The other end is connected to the operational amplifier U 3 Inverting input terminal, operational amplifier U 3 The power supply end is connected to the positive voltage V cc and negative voltage V ss , operational amplifier U 3 The non-inverting input terminal resistor R 8 One end and resistor R f1 , resistor R f2 One end, resistor R 8 The other end is connected to the Si IGBT drive signal OUT2, the resistor R f1 The other end is connected to a positive voltage V cc , resistor R f2 The other end is grounded.

[0029] like Figure 3 As shown in (b), the Si IGBT analog multiplier includes a resistor R 16 ~R 20 , R f4 ~R f6 、Operational amplifier U 4 、NPN transistor Q 8 ~Q 10 ; Resistance R 16 One end is connected to the operational amplifier U 2 Output, the other end is connected to transistor Q 8 The base of transistor Q 8 The collector is connected to the resistor R 18 One end, and the output signal PWM2 is also drawn here, R 18 The other end is connected to a positive voltage V cc , transistor Q 8 The emitter of transistor Q 9 The emitter and transistor Q 10 The collector of transistor Q 9 The base is grounded and the collector is connected to the resistor R 19 One end, resistor R 19 The other end is connected to a positive voltage V cc , transistor Q 10 The emitter is connected to the resistor R 20 One end, resistor R 20The other end is grounded, transistor Q 10 The base of the operational amplifier U 4 Output terminal and resistor R f6 One end, resistor R f6 The other end is connected to the operational amplifier U 4 Inverting input terminal, operational amplifier U 4 The power supply end is connected to the positive voltage V cc and negative voltage V ss , operational amplifier U 4 The non-inverting input terminal resistor R 17 One end and resistor R f4 , resistor R f5 One end, resistor R 17 The other end is connected to the Si MOSFET drive signal OUT1, and the resistor R f4 The other end is connected to a positive voltage V cc , resistor R f5 The other end is grounded.

[0030] like Figure 4 As shown in (a), the SiC MOSFET crosstalk suppression circuit includes a resistor R 1 , capacitor C 1 、PNP transistor Q 1 、N-channel MOSFET Q 3 、Diode D 1 ; Transistor Q 1 The base of the SiC MOSFET is connected to the drive resistor R g_MOS One end and SiCMOSFET drive signal OUT1, transistor Q 1 The emitter of the SiC MOSFET is connected to the drive resistor R g_MOS The other end and diode D 1 The cathode of the SiC MOSFET, the source of the transistor Q 1 The collector of the connected MOSFET Q 3 The source and resistor R 1 , capacitor C 1 One end, resistor R 1 and capacitor C 1 The other end is grounded, and the MOSFET Q 3 The gate of the SiC MOSFET is connected to the analog multiplier output signal PWM1, MOSFET Q 3 The drain of the diode D 1 anode.

[0031] like Figure 4 As shown in (b), the Si IGBT crosstalk suppression circuit includes a resistor R 2 , capacitor C 2、PNP transistor Q 2 、N-channel MOSFET Q 4 、Diode D 2 ; Transistor Q 2 The base of the Si IGBT is connected to the drive resistor R g_IGBT One end and Si IGBT drive signal OUT2, transistor Q 2 The emitter of the Si IGBT is connected to the drive resistor R g_IGBT The other end and diode D 2 The cathode of the SiIGBT, the source of the transistor Q 2 The collector of the connected MOSFET Q 4 The source and resistor R 2 , capacitor C 2 One end, resistor R 2 and capacitor C 2 The other end is grounded, and the MOSFET Q 4 The gate of Si IGBT is connected to the analog multiplier output signal PWM2, MOSFET Q 4 The drain of the diode D 2 anode.

[0032] To analyze the working principle of the circuit, the following definitions are made: V OUT_MOS is the output of the SiC MOSFET differential amplifier circuit, that is, U 1 ; V OUT_IGBT is the output of the Si IGBT differential amplifier circuit, that is, U 2 ; V drive_MOS is the SiC MOSFET driving voltage, which is OUT1; V drive_IGBT is the Si IGBT driving voltage, which is OUT2; V drive_up is the driving signal after passing through the voltage boost circuit; V PWM1 is the N-channel MOSFET driving signal in the SiC MOSFET crosstalk suppression circuit, that is, PWM1, V PWM2 is the N-channel MOSFET driving signal in the Si IGBT crosstalk suppression circuit, that is, PWM2; I gd_MOS+ is the forward crosstalk current when the SiC MOSFET has forward crosstalk, I gd_MOS- is the negative crosstalk current when SiC MOSFET has negative crosstalk, I gc_IGBT+ is the forward crosstalk current when the Si IGBT has forward crosstalk, I gc_IGBT- is the negative crosstalk current when negative crosstalk occurs in Si IGBT; C gd is the Miller capacitance of SiC MOSFET, C gs is the gate-source capacitance of SiC MOSFET, Cds is the drain-source capacitance of SiC MOSFET, C gc is the Miller capacitance of SiIGBT, C ge is the gate-emitter capacitance of Si IGBT, C ce is the collector-emitter capacitance of Si IGBT.

[0033] like Figure 2 The differential amplifier circuit shown in FIG. 1 forms a differential circuit through an operational amplifier. Figure 2 The SiC MOSFET differential amplifier circuit shown in (a) makes a difference between the Si IGBT drive signal and the SiC MOSFET drive signal, and outputs the delayed switching part of the two drive signals, as shown in the following formula:

[0034]

[0035] Generally take R 3 =R 4 , R 5 =R 6 , then the above formula can be simplified to:

[0036]

[0037] like Figure 2 The Si IGBT differential amplifier circuit shown in (b) makes a difference between the SiC MOSFET drive signal and the Si IGBT drive signal, and outputs the delayed switching part of the two drive signals, as shown in the following formula:

[0038]

[0039] Generally take R 12 =R 13 , R 14 =R 15 , then the above formula can be simplified to:

[0040]

[0041] like Figure 3 The analog multiplier shown multiplies the output of the differential amplifier circuit with the boosted drive signal of another switch tube in the hybrid parallel connection (if it is a SiC MOSFET analog multiplier, the tube is Si IGBT; if it is a Si IGBT analog multiplier, the tube is SiMOSFET) for adaptive judgment of the switch of the crosstalk suppression circuit, where the boosted voltage is shown in the following formula:

[0042]

[0043] Generally take R 8 =R f1=R 17 =R f4 =R, R f3 =R f6 =R f , V drive It is the driving signal of SiC MOSFET or Si IGBT.

[0044] like Figure 3 The SiC MOSFET analog multiplier shown in (a) multiplies the boosted Si IGBT drive signal with the output of the SiC MOSFET differential amplifier circuit to output the drive signal of the N-channel MOSFET in the crosstalk suppression circuit. The output is shown in the following formula:

[0045]

[0046] Among them, R is generally taken 9 =R 10 , U T1 It is a differential transistor single tube upper Q 5 , Q 6 When the switching sequence of SiC MOSFET relative to Si IGBT is "on first and off first", crosstalk will occur in SiC MOSFET. At this time, the output signal of the analog multiplication circuit turns on the N-channel MOSFET in the SiC MOSFET crosstalk suppression circuit. When the switching sequence of SiC MOSFET relative to Si IGBT is "on first and off last", crosstalk will not occur in SiC MOSFET. At this time, the output signal of the analog multiplication circuit is zero, and the N-channel MOSFET in the SiC MOSFET crosstalk suppression circuit is not turned on.

[0047] like Figure 3 The Si IGBT analog multiplier shown in (b) multiplies the boosted SiC MOSFET drive signal with the output of the Si IGBT differential amplifier circuit to output the drive signal of the N-channel MOSFET in the crosstalk suppression circuit. The output is shown in the following formula:

[0048]

[0049] Among them, R is generally taken 18 =R 19 , U T2 It is a differential transistor single tube upper Q 8 , Q 9When the switching sequence of the Si IGBT relative to the SiC MOSFET is "on first, then off", the Si IGBT will have crosstalk, and the output signal of the analog multiplication circuit will turn on the N-channel MOSFET in the Si IGBT crosstalk suppression circuit; when the switching sequence of the Si IGBT relative to the SiC MOSFET is "on first, then off", the Si IGBT will not have crosstalk, and the output signal of the analog multiplication circuit will be zero, and the N-channel MOSFET in the Si IGBT crosstalk suppression circuit will not turn on.

[0050] like Figure 4 The crosstalk suppression circuit shown in the figure realizes positive crosstalk suppression and negative crosstalk suppression respectively through an auxiliary transistor and an RC parallel branch, as well as an N-channel MOSFET and an RC parallel branch, and derives the crosstalk current through the suppression circuit.

[0051] like Figure 5 (a) shows the direction of crosstalk current flow when the SiC MOSFET has forward crosstalk. At this time, the SiC MOSFET is turned off in advance. When the Si IGBT is turned off, the voltage of the parallel device rises rapidly from zero to the bus voltage, and the drain-source voltage V DS Rapidly rises, due to the Miller capacitance C between the gate and drain gd , will generate Miller current I gd_MOS+ , which is the forward crosstalk current, which will give the gate-source capacitance C gs Charging causes a forward voltage spike in the gate-source voltage, which may cause false turn-on.

[0052] like Figure 5 (b) shows the direction of crosstalk current flow when negative crosstalk occurs in SiC MOSFET. At this time, Si IGBT is turned on in advance. At this time, the voltage of the parallel device drops rapidly from the bus voltage to nearly zero, and the drain-source voltage V DS Rapidly decreases due to the Miller capacitance C between the gate and drain gd , will generate Miller current I gd_MOS- , at this time, the current is a negative crosstalk current, which will give the gate-source capacitance C gs Discharge causes a reverse voltage spike in the gate-source voltage, which may cause the switch tube to break down.

[0053] like Figure 6 (a) shows the crosstalk current flow direction when the Si IGBT has forward crosstalk. At this time, the Si IGBT is turned off in advance. When the SiC MOSFET is turned off, the voltage of the parallel device rises rapidly from zero to the bus voltage. The collector-emitter voltage V ce Rapidly rises due to the Miller capacitance C between the gate and collector gc, will generate Miller current I gc_IGBT+ , which is the forward crosstalk current, which will give the gate-emitter capacitance C ge Charging causes a forward voltage spike in the gate-emitter voltage, which may cause misleading conduction.

[0054] like Figure 6 (b) shows the direction of crosstalk current flow when negative crosstalk occurs in the Si IGBT. At this time, the SiC MOSFET is turned on in advance. At this time, the voltage of the parallel device drops rapidly from the bus voltage to nearly zero, and the collector-emitter voltage V ce Rapidly decreases due to the Miller capacitance C between the gate and collector gc , will generate Miller current I gc_IGBT- , at this time, the current is a negative crosstalk current, which will give the gate-emitter capacitance C ge Discharge causes a reverse voltage spike in the gate-emitter voltage, which may cause the switching tube to break down.

[0055] like Figure 7 The crosstalk suppression circuit shown in FIG. 1 is a schematic diagram of the operation of the crosstalk suppression circuit when positive and negative crosstalk occur in the SiC MOSFET. The crosstalk suppression circuit derives positive crosstalk current and negative crosstalk current by turning on the PNP transistor and the N-channel MOSFET, respectively, thereby suppressing the crosstalk.

[0056] like Figure 7 (a) shows the working process of the crosstalk suppression circuit when the SiC MOSFET has forward crosstalk, and the forward crosstalk current I gd_MOS+ When positive crosstalk occurs, the driving resistor R g_MOS The voltage at both ends changes, causing the transistor Q 1 On, crosstalk current I gd_MOS+ The current flows through the transistor and is led out from the RC parallel branch, so that it will not flow to the gate-source capacitance C gs Charging, no forward voltage spike will be generated on the gate source, and forward crosstalk is suppressed.

[0057] like Figure 7 (b) shows the working process of the crosstalk suppression circuit when the SiC MOSFET has negative crosstalk, and the negative crosstalk current I gd_MOS- When negative crosstalk occurs, the analog multiplier outputs Q 3 Turn on the signal, so that MOSFETQ 3 When the gate-source capacitor C is turned on, the negative crosstalk current will no longer flow through the gate-source capacitor C gs , gate-source capacitance C gs It will not discharge but be derived from the RC parallel branch. A reverse voltage spike will not be generated on the gate source and the negative crosstalk will be suppressed.

[0058] like Figure 8The schematic diagram of the operation of the crosstalk suppression circuit when positive and negative crosstalk occur in the Si IGBT shown in the figure, the crosstalk suppression circuit derives the positive crosstalk current and the negative crosstalk current by turning on the PNP transistor and the N-channel MOSFET respectively, thereby suppressing the crosstalk.

[0059] like Figure 8 (a) shows the working process of the crosstalk suppression circuit when the Si IGBT has forward crosstalk, and the forward crosstalk current I gc_IGBT+ When positive crosstalk occurs, the driving resistor R g_IGBT The voltage at both ends changes, causing the transistor Q 2 On, crosstalk current I gc_IGBT+ The current flows through the transistor and is led out from the RC parallel branch, so that it will not flow to the gate-emitter capacitor C ge Charging, no forward voltage spike will be generated on the gate emitter, and forward crosstalk will be suppressed.

[0060] like Figure 8 (b) shows the working process of the crosstalk suppression circuit when the Si IGBT has negative crosstalk, and the negative crosstalk current I gc_IGBT- When negative crosstalk occurs, the analog multiplier outputs Q 4 Turn on the signal, so that MOSFETQ 4 The negative crosstalk current will no longer flow through the gate-emitter capacitor C ge , gate-emitter capacitance C ge There will be no discharge, no reverse voltage spike will be generated on the gate emitter, and negative crosstalk will be suppressed.

[0061] The present invention mainly aims at the crosstalk problem caused by the different switching timings of Si IGBT and SiC MOSFET. In order to better illustrate the working principle of the suppression circuit, in one switching cycle, it is assumed that SiC MOSFET is turned on first and then turned off compared with Si IGBT. The forward crosstalk current is I gc_IGBT+ , the negative crosstalk current is I gc_IGBT- .

[0062] Opening process:

[0063] State 1: SiC MOSFET starts to turn on, but Si IGBT is not turned on. The voltage across the parallel devices drops rapidly due to the turning on of SiC MOSFET. The collector-emitter voltage V ce The bus voltage drops to nearly zero, due to the Miller capacitance C between the gate and collector gc , a negative Miller current I gc_IGBT- .

[0064] State 2: The Si IGBT differential amplifier circuit obtains the driving signal during the period when the SiC MOSFET is turned on and the Si IGBT is not turned on by subtracting the driving signals of the SiC MOSFET and the Si IGBT. The signal is sent to the Si IGBT analog multiplier and multiplied by the SiC MOSFET driving signal after the voltage boost circuit. The driving signal timing will not change, and the voltage amplitude will change according to the corresponding coefficient of the multiplier. At the same time, the SiC MOSFET differential amplifier circuit obtains the driving signal during the period when the SiC MOSFET is turned on and the Si IGBT is not turned on by subtracting the driving signals of the Si IGBT and the SiC MOSFET. The signal is sent to the SiC MOSFET analog multiplier and multiplied by the driving signal of the Si IGBT after boosting, and the output voltage is always kept at zero.

[0065] State 3: Si IGBT analog multiplier output voltage turns on Q in Si IGBT negative crosstalk suppression circuit 4 , Miller current I gc_IGBT- By Q 4 and the RC parallel branch, and no longer flows through the gate-emitter capacitor C ge , gate-emitter capacitance C ge There is no discharge, no reverse voltage spike is generated on the gate emitter, and negative crosstalk is suppressed. 3 Since the SiC MOSFET analog multiplier output is zero, it will not conduct.

[0066] State 4: Si IGBT is turned on, SiC MOSFET remains on, the output voltage of Si IGBT analog multiplier turns to zero, Q 4 When turned off, the negative crosstalk suppression circuit stops working and the Si IGBT turns on normally.

[0067] Shutdown process:

[0068] State 1: Si IGBT turns off early, SiC MOSFET starts to turn off after a delay, the voltage across the parallel device rises rapidly due to the turn-off of SiC MOSFET, and the collector-emitter voltage V ce From zero to the bus voltage, due to the Miller capacitance C between the gate and collector gc , will generate a forward Miller current I gc_IGBT+ .

[0069] State 2: Forward Miller current I gc_IGBT+ Flowing through the Si IGBT drive resistor R g_IGBT At this time, the PNP transistor Q 2 V be <0 and Vbc >0,Q 2 Conductivity.

[0070] State 3: Miller current I gc_IGBT+ By Q 2 and the RC parallel branch, and no longer flows through the gate-emitter capacitor C ge , gate-emitter capacitance C ge There will be no further charging, no forward voltage spike will be generated on the gate emitter, and forward crosstalk will be suppressed.

[0071] State 4: Miller current I gc_IGBT+ Elimination, Q 2 V be is no longer less than zero, Q 2 The forward crosstalk suppression circuit stops working naturally, and both the SiC MOSFET and Si IGBT wait for the next switching cycle.

[0072] Fig. 9 (a) and (b) are schematic diagrams of SiIGBT gate-emitter voltage when turned on and off without and with crosstalk suppression measures, respectively; Fig.10 (a) and (b) are schematic diagrams of the gate-source voltage of Si MOSFET when it is turned on and off without and with crosstalk suppression measures. Fig. 9 (a) Gate-emitter voltage comparison when turned on Fig.10 By comparing the gate-source voltage when the switch is on (a), it can be found that the drive circuit for adaptively suppressing the crosstalk of Si IGBT and SiC MOSFET mixed in parallel proposed by the present invention has a significant effect on suppressing the negative crosstalk problem that occurs during the switch-on process of Si IGBT and SiC MOSFET. Fig. 9 (b) Gate-emitter voltage comparison when turned off and Fig.10 By comparing the gate-source voltage during shutdown (b), it can be found that the drive circuit for adaptively suppressing the mixed parallel crosstalk of Si IGBT and SiC MOSFET proposed in the present invention also has an obvious effect on suppressing the forward crosstalk problem occurring during the shutdown process of Si IGBT and SiC MOSFET.

[0073] The above is only a preferred embodiment of the present invention. It should be pointed out that for ordinary technicians in this technical field, several improvements and modifications can be made without departing from the principle of the present invention. These improvements and modifications should also be regarded as the scope of protection of the present invention.

Claims

1. A driving circuit for adaptively suppressing crosstalk of Si IGBT and SiC MOSFET mixed parallel connection, characterized in that: It includes a bilateral gate driver chip, a crosstalk suppression circuit, a differential amplifier circuit and an analog multiplier; The bilateral gate driver chip is used to output drive signals for the mixed parallel Si IGBT and SiC MOSFET; The differential amplifier circuit includes a SiC MOSFET differential amplifier circuit and a Si IGBT differential amplifier circuit; the SiCMOSFET differential amplifier circuit connects the Si IGBT drive signal to the non-inverting input terminal of the operational amplifier, and the SiC MOSFET drive signal to the inverting input terminal of the operational amplifier, and after the two signals are differentially amplified, a drive signal including only the delay switch part is generated; the SiIGBT differential amplifier circuit connects the SiC MOSFET M drive signal to the non-inverting input terminal of the operational amplifier, and the Si IGBT Q drive signal to the inverting input terminal of the operational amplifier, and after the two signals are differentially amplified, a drive signal including only the delay switch part is generated; The analog multiplier includes a SiC MOSFET analog multiplier and a Si IGBT analog multiplier; the SiC MOSFET analog multiplier multiplies the output of the SiC MOSFET differential amplifier circuit with the Si IGBT drive signal after voltage boosting to generate PWM1; If the SiC MOSFET drive signal is turned on last and turned off first relative to the Si IGBT drive signal at this time, the PWM1 signal is output; the Si IGBT analog multiplier multiplies the output of the Si IGBT drive signal differential amplifier circuit with the boosted SiC MOSFET drive signal to generate the Si IGBT negative crosstalk suppression circuit turn-on signal PWM2. If the Si IGBT drive signal is turned on last and turned off first at this time, the PWM2 signal is output; The hybrid parallel SiC MOSFET and Si IGBT are respectively connected to a group of crosstalk suppression circuits; the crosstalk suppression circuit includes a positive crosstalk suppression circuit and a negative crosstalk suppression circuit; the positive crosstalk circuit includes a PNP transistor and an RC parallel branch, the base and emitter of the PNP transistor are respectively connected to the two ends of the driving resistor, when positive crosstalk occurs, the PNP transistor is turned on, the positive crosstalk current passes through the PNP transistor and flows into the RC parallel branch, thereby suppressing the occurrence of positive crosstalk; the negative crosstalk suppression circuit includes an N-channel MOSFET and an RC parallel branch, the RC parallel branch reuses the RC parallel branch part in the positive crosstalk suppression circuit, when the Si IGBT Q or SiC MOSFET M has negative crosstalk, the PWM signal connected to the gate of the N-channel MOSFET will turn it on, the reverse crosstalk current passes through the N-channel MOSFET, and is derived from the RC parallel branch, thereby suppressing the occurrence of negative crosstalk.

2. The driving circuit for adaptively suppressing crosstalk of Si IGBT and SiC MOSFET mixed parallel connection according to claim 1, characterized in that: The SiC MOSFET differential amplifier circuit includes an operational amplifier U1, a resistor R 3~ R 6. Resistance R 3 One end is connected to the Si IGBT drive signal OUT2, and the other end is connected to the operational amplifier U1 non-inverting input terminal and the resistor R 5 one end, resistor R 5The other end is grounded; resistance R 4 One end is connected to the SiC MOSFET drive signal OUT1, and the other end is connected to the inverting input terminal of the operational amplifier U1 and the resistor R 6 one end, resistor R 6The other end is connected to the output of the operational amplifier U1; the power supply end of the operational amplifier is connected to the positive voltage V cc and negative voltage V ss ; The Si IGBT differential amplifier circuit includes an operational amplifier U2, R 12 ~ R 15 ;resistance R 12 One end is connected to the SiC MOSFET drive signal OUT1, and the other end is connected to the operational amplifier U2 non-inverting input and the resistor R 14 One end, resistor R 14 The other end is grounded; the resistor R 13 One end is connected to the Si IGBT drive signal OUT2, and the other end is connected to the inverting input of the operational amplifier U1 and the resistor R 15 One end, resistor R 15 The other end is connected to the output of operational amplifier U2; the power supply end of the operational amplifier is connected to the positive voltage V cc and negative voltage V ss .

3. The driving circuit for adaptively suppressing crosstalk of Si IGBT and SiC MOSFET mixed parallel connection according to claim 1, characterized in that: The SiC MOSFET analog multiplier includes resistors R 7 ~R 11 , R f1 ~R f3 , operational amplifier U3, NPN transistors Q5~Q7; resistors R 7 One end is connected to the output of operational amplifier U1, the other end is connected to the base of transistor Q5, and the collector of transistor Q5 is connected to the resistor R 9, and the output signal PWM1 is drawn here, and the resistor R 9The other end is connected to a positive voltage V cc , the emitter of transistor Q5 is connected to the emitter of transistor Q6 and the collector of transistor Q7, the base of transistor Q6 is grounded, and the collector is connected to the resistor R 10 One end, resistor R 10 The other end is connected to a positive voltage V cc , the emitter of transistor Q7 is connected to the resistor R 11 One end, resistor R 11 The other end is grounded, and the base of transistor Q7 is connected to the output of operational amplifier U3 and resistor R f3 One end, resistor R f3 The other end is connected to the inverting input of the operational amplifier U3, and the power supply end of the operational amplifier U3 is connected to the positive voltage V cc and negative voltage V ss , the operational amplifier U3 non-inverting input is terminated with a resistor R 8 One end and resistor R f1 ,resistance R f2 One end, resistor R 8The other end is connected to Si IGBT drive signal OUT2, resistor R f1 The other end is connected to a positive voltage V cc ,resistance R f2 The other end is grounded; The Si IGBT analog multiplier includes resistors R 16 ~R 20 , R f4 ~R f6 , operational amplifier U4, NPN transistor Q8~Q 10 ;resistance R 16 One end is connected to the output of operational amplifier U2, the other end is connected to the base of transistor Q8, and the collector of transistor Q8 is connected to the resistor R 18 One end, and the output signal PWM2 is also drawn out here. R 18 The other end is connected to a positive voltage V cc , the emitter of transistor Q8 is connected to the emitter of transistor Q9 and the emitter of transistor Q 10 The collector of transistor Q9 is connected to the ground, and the collector is connected to the resistor R 19 One end, resistor R 19 The other end is connected to a positive voltage V cc , transistor Q 10 The emitter is connected to a resistor R 20 One end, resistor R 20 The other end is grounded, transistor Q 10 The base of is connected to the output of operational amplifier U4 and resistor R f6 One end, resistor R f6 The other end is connected to the inverting input of the operational amplifier U4, and the power supply end of the operational amplifier U4 is connected to the positive voltage V cc and negative voltage V ss , the operational amplifier U4 non-inverting input is terminated with a resistor R 17 One end and resistor R f4 ,resistance R f5 One end, resistor R 17 The other end is connected to the Si MOSFET drive signal OUT1, and the resistor R f4 The other end is connected to a positive voltage V cc ,resistance R f5 The other end is grounded.

4. The driving circuit for adaptively suppressing crosstalk of Si IGBT and SiC MOSFET mixed parallel connection according to claim 1, characterized in that: The crosstalk suppression circuit of SiC MOSFET includes resistors R 1. Capacitor C 1. PNP transistor Q1, N-channel MOSFET Q3, diode D1; the base of transistor Q1 is connected to the SiC MOSFET driving resistor R g_MOS One end and SiC MOSFET drive signal OUT1, the emitter of transistor Q1 is connected to SiC MOSFET drive resistor R g_MOS The other end and the cathode of diode D1, the source of SiC MOSFET, and the collector of transistor Q1 are connected to the source of MOSFET Q3 and resistor R 1. Capacitor C 1 one end, resistor R 1 and capacitor C 1 The other end is grounded, the gate of MOSFET Q3 is connected to the SiC MOSFET analog multiplier output signal PWM1, and the drain of MOSFET Q3 is connected to the anode of diode D1; Crosstalk suppression circuit of Si IGBT includes resistors R 2. Capacitor C 2. PNP transistor Q2, N-channel MOSFET Q4, diode D2; the base of transistor Q2 is connected to Si IGBT drive resistor R g_IGBT One end and Si IGBT drive signal OUT2, the emitter of transistor Q2 is connected to Si IGBT drive resistor R g_IGBT The other end and the cathode of diode D2, the source of Si IGBT, and the collector of transistor Q2 are connected to the source of MOSFET Q4 and resistor R 2. Capacitor C 2 one end, resistor R 2 and capacitor C 2 The other end is grounded, the gate of MOSFET Q4 is connected to the Si IGBT analog multiplier output signal PWM2, and the drain of MOSFET Q4 is connected to the anode of diode D2.

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