Video signal conversion board card based on 3UVPX

Abstract

The invention relates to a 3UVPX video signal conversion board card, which comprises a 3UVPX standard shell and a printed circuit board, and is characterized in that the printed circuit board is provided with a main processor for video signal conversion, a power supply conversion module, a coprocessor, an RS485 isolation conversion circuit, an MIPI output circuit and a USB3.0 amp; the system is characterized in that the system comprises a 2.0 processing circuit, a gigabit Ethernet processing circuit, a PCIE circuit, an SDI input circuit, an HDMI output circuit, an FPGA debugging circuit, a CAN isolation circuit, an IIC communication circuit, a serial port circuit and a VPX connector; according to the invention, multiple paths of 3G-SDI / HD-SDI video data can be accessed, video information is converted from SDI to MIPI and PCIE formats to be output, processing such as correction, cutting, rotation and data superposition can be carried out on single-path images, and splicing processing and the like can be carried out on multiple paths of images. And buses such as Ethernet, PCIE (Peripheral Component Interface Express) and CAN (Controller Area Network) buses can be The generalization and standardization of the module are realized to a certain extent, and the reliability of the system is improved.

Description

Technical Field

[0001] The invention belongs to the technical field of signal processing, and in particular relates to a video signal conversion board based on 3UVPX. Background Art

[0002] At present, the localization, unmanned and intelligentization of special vehicles and unmanned equipment are becoming increasingly higher, and the requirements for the functions and performance of the camera components of the perception system are gradually increasing. The acquisition and processing of traditional analog cameras are gradually transitioning to more anti-interference and higher-definition digital cameras. The high-definition digital cameras used in the unmanned equipment processed by the image processing device are mostly SDI, CameraLink, GMSL and other interface cameras, which perform real-time image acquisition, compression processing, network streaming processing, and target recognition, and also put forward certain processing requirements for the processing of camera signals.

[0003] At present, most cameras used in special vehicles and unmanned equipment are SDI cameras, and domestically produced image processing modules cannot directly access multi-channel SDI digital full HD cameras. Most of them use MIPI, LVDS, HDMI and other interfaces as video data input, and a few use PCIE and other interfaces as video data input. In addition, other industries mostly use IP, Camera Link, GMSL, PAL and other cameras. In addition, the computing power and processing capabilities of image conversion chips are relatively weak, and there are certain risks in processing the data conversion of multi-channel full HD videos. These shortcomings are all caused by the performance of the hardware itself.

[0004] At present, the effective solution to this problem is to realize the conversion of SDI video signal based on external domestically produced high-performance FPGA and internal efficient logic code. Summary of the invention

[0005] The present invention provides a video signal conversion board based on 3UVPX, and the technical problem to be solved is: realizing the conversion of multi-channel SDI video signals into MIPI and PCIE formats for output, thereby solving the defects of the prior art.

[0006] In order to solve the above technical problems, the present invention provides a video signal conversion board based on 3UVPX, characterized in that it includes a printed circuit board, on which a main processor for video signal conversion, a power conversion module, a coprocessor, an RS485 isolation conversion circuit, a MIPI output circuit, a USB3.0&2.0 processing circuit, a Gigabit Ethernet processing circuit, a PCIE circuit, an SDI input circuit, an HDMI output circuit, a CAN isolation circuit, an IIC communication circuit, a serial port circuit, and a VPX connector are arranged.

[0007] Furthermore, a 3UVPX standard housing is provided outside the printed circuit board.

[0008] Furthermore, there is 1 main processor, 1-2 coprocessors, and 3 VPX connectors.

[0009] Furthermore, the VPX connector includes a VPX-P0 connector, a VPX-P1 connector, and a VPX-P2 connector.

[0010] Furthermore, the power enters the power conversion module through the VPX-P0 connector, thereby generating power to provide power for all circuits of the entire board.

[0011] Furthermore, the 12V power supply enters the power conversion module through the VPX-P0 connector, thereby generating 5V, 3.3V, 1.8V and other power supplies to power all circuits of the entire board.

[0012] Furthermore, the IIC bus data is connected to the IIC communication circuit through the VPX-P0 connector for signal conversion and then transmitted to the FPGA processor; the SDI video information is connected to the SDI input circuit through the VPX-P1 connector, EMI processing is performed and connected to the FPGA processor to realize the image acquisition function; the FPGA processor outputs the processed video information through the corresponding 8-way MIPI output circuit and / or one-way HDMI output circuit through the VPX-P1 connector for display.

[0013] Furthermore, the FPGA processor converts the video information as needed and performs processing such as correction, cropping, rotation, and data superposition, and outputs it through the VPX-P2 connector after conversion through the Gigabit Ethernet processing circuit and the PCIE circuit; the USB bus, Gigabit / 100M Ethernet, and PCIE bus data are connected through the VPX-P2 connector and the bus protection is realized through the corresponding USB3.0&2.0 processing circuit, Gigabit Ethernet processing circuit, and PCIE circuit, and data interaction is realized with the FPGA processor; the CAN bus, RS485 bus, and serial port information are connected through the VPX-P2 connector and isolated and protected through the CAN isolation circuit, RS485 processing circuit, and serial port circuit, and connected to the coprocessor for data interaction; the coprocessor realizes data interaction between the FPGA processor and the coprocessor through the internal SPI bus, and interacts with each other through the bus interface data processing they own.

[0014] Furthermore, after the FPGA processor processes the video, it generates corresponding control / feedback information which is sent to the CAN bus, RS485 bus, and serial port through the coprocessor.

[0015] Furthermore, a purely domestically produced chip is used to build an SDI to MIPI conversion circuit to achieve the conversion of multiple SDI video signals to MIPI.

[0016] Beneficial effects: The present invention can access multiple channels of 3G-SDI / HD-SDI video data, convert video information from SDI to MIPI and PCIE formats for output, and can perform correction, cropping, rotation, data superposition and other processing on single-channel images, and splicing processing on multiple-channel images. It can also access Ethernet, PCIE, CAN bus and other buses for data interaction. To a certain extent, it realizes the universalization and standardization of modules and improves the reliability of the system. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] Figure 1 The internal structure block diagram of the present invention. DETAILED DESCRIPTION

[0018] In order to make the purpose, content and advantages of the present invention more clear, the specific implementation methods of the present invention are further described in detail below.

[0019] The present invention proposes a 3UVPX-based video signal conversion board, comprising a 3UVPX standard housing and a printed circuit board, wherein the printed circuit board is provided with a main processor for performing video signal conversion, a power conversion module, a coprocessor, an RS485 isolation conversion circuit, a MIPI output circuit, a USB3.0&2.0 processing circuit, a Gigabit Ethernet processing circuit, a PCIE circuit, an SDI input circuit, an HDMI output circuit, an FPGA debugging circuit, a CAN isolation circuit, an IIC communication circuit, a serial port circuit, and a VPX connector;

[0020] There is one main processor, 1-2 coprocessors, and three VPX connectors, namely VPX-P0 connector, VPX-P1 connector, and VPX-P2 connector.

[0021] The 12V power supply enters the power conversion module through the VPX-P0 connector, thereby generating 5V, 3.3V, 1.8V and other power supplies to power all circuits of the entire board.

[0022] The IIC bus data is connected to the IIC communication circuit through the VPX-P0 connector for signal conversion and then transmitted to the FPGA processor;

[0023] The 8-channel SDI video information is connected to the SDI input circuit through the VPX-P1 connector, EMI processing is performed and connected to the FPGA processor to realize the image acquisition function; the FPGA processor outputs the processed video information through the corresponding 8-channel MIPI output circuit or one HDMI output circuit through the VPX-P1 connector for display;

[0024] At the same time, the FPGA processor can also convert the video information and perform correction, cropping, rotation, data superposition and other processing as needed, and output it through the VPX-P2 connector after conversion through the Gigabit Ethernet processing circuit and PCIE circuit;

[0025] USB bus, Gigabit / 100M Ethernet, and PCIE bus data can be accessed through the VPX-P2 connector and can achieve bus protection and data interaction with the FPGA processor through the corresponding USB3.0&2.0 processing circuit, Gigabit Ethernet processing circuit, and PCIE circuit;

[0026] Information such as the CAN bus, RS485 bus, and serial port can be accessed through the VPX-P2 connector and isolated and protected through the CAN isolation circuit, RS485 processing circuit, and serial port circuit to access the coprocessor for data interaction; the coprocessor can realize data interaction between the FPGA processor and the coprocessor through the internal SPI bus, and can interact with each other on the bus interface data processing they own, and the FPGA processor can also process the video and generate the corresponding control / feedback information, which is sent down to the CAN bus, RS485 bus, serial port, and other buses through the coprocessor.

[0027] The present invention adopts purely domestically produced chips to build an SDI to MIPI conversion circuit, thereby realizing the conversion of multi-channel SDI video signals into MIPI.

[0028] Control information and key data information can be processed and superimposed in real time through bus interfaces such as CAN bus, ETH, PCIE, etc., and output in real time through interfaces such as MIPI, PCIE, ETH, etc.

[0029] The number of input video channels and splicing processing channels can be flexibly configured according to the application scenario, and the original video can be quickly subjected to distortion correction, rotation and cropping, which greatly improves the decoupling capability of each module within the system.

[0030] The advantages of the present invention are:

[0031] 1. The core processing device has simple connection logic, high integration, low cost, good consistency, can support multi-channel mipi video output, and support multi-type communication bus conversion, so it has good promotion and use value.

[0032] 2. It can improve the effective intervention of control information, conveniently complete the processing and output of control information, data information and images at the front end, and effectively alleviate the pressure of back-end image processing.

[0033] 3. The video signal conversion board is designed with a module, so that the board can be flexibly applied to various standard 3U chassis. It can quickly interact with the core control board through PCIE, ETH, and MIPI interfaces in the machine for data exchange. On the other hand, the standardized design of the whole board makes the board more maintainable.

[0034] The present invention adopts a purely domestic chip to build an SDI to MIPI conversion circuit to realize the conversion of multi-channel SDI video signals to MIPI. Through bus interfaces such as CAN bus, ETH, PCIE, etc., control information and key data information can be processed and superimposed in real time and output in real time through interfaces such as MIPI, PCIE, ETH, etc. According to the application scenario, the number of input video channels and the number of splicing processing channels can be flexibly configured, and the original video can be quickly subjected to distortion correction, rotation and cropping, etc., which greatly improves the decoupling capability of each module in the system.

[0035] The above is only a preferred embodiment of the present invention. It should be pointed out that for ordinary technicians in this technical field, several improvements and modifications can be made without departing from the technical principles of the present invention. These improvements and modifications should also be regarded as the scope of protection of the present invention.

Claims

1. A video signal conversion board based on 3UVPX, characterized in that: The invention comprises a printed circuit board, on which a main processor for performing video signal conversion, a power conversion module, a coprocessor, an RS485 isolation conversion circuit, a MIPI output circuit, a USB3.0&2.0 processing circuit, a Gigabit Ethernet processing circuit, a PCIE circuit, an SDI input circuit, an HDMI output circuit, a CAN isolation circuit, an IIC communication circuit, a serial port circuit and a VPX connector are arranged.

2. The video signal conversion board based on 3UVPX according to claim 1, characterized in that: The printed circuit board is provided with a 3UVPX standard housing.

3. The video signal conversion board based on 3UVPX according to claim 1, characterized in that: There is one main processor, one to two coprocessors, and three VPX connectors.

4. The video signal conversion board based on 3UVPX according to claim 1, characterized in that: VPX connectors include VPX-P0 connector, VPX-P1 connector, and VPX-P2 connector.

5. The video signal conversion board based on 3UVPX according to claim 4, characterized in that: The power supply enters the power conversion module through the VPX-P0 connector, thereby generating power to provide power for all circuits of the entire board.

6. The video signal conversion board based on 3UVPX according to claim 5, characterized in that: The 12V power supply enters the power conversion module through the VPX-P0 connector, thereby generating 5V, 3.3V, 1.8V and other power supplies to power all circuits of the entire board.

7. The video signal conversion board based on 3UVPX according to claim 4, characterized in that: The IIC bus data is connected to the IIC communication circuit through the VPX-P0 connector for signal conversion and then transmitted to the FPGA processor; the SDI video information is connected to the SDI input circuit through the VPX-P1 connector for EMI processing and connected to the FPGA processor to realize the image acquisition function; the FPGA processor outputs the processed video information through the corresponding 8-way MIPI output circuit and / or one-way HDMI output circuit through the VPX-P1 connector for display.

8. The video signal conversion board based on 3UVPX according to claim 4, characterized in that: The FPGA processor converts the video information as needed and performs processing such as correction, cropping, rotation, and data superposition, and then outputs it through the VPX-P2 connector after conversion through the Gigabit Ethernet processing circuit and PCIE circuit; the USB bus, Gigabit / 100M Ethernet, and PCIE bus data are connected through the VPX-P2 connector and the bus protection is realized through the corresponding USB3.0&2.0 processing circuit, Gigabit Ethernet processing circuit, and PCIE circuit, and the data interaction is realized with the FPGA processor; the CAN bus, RS485 bus, and serial port information are connected through the VPX-P2 connector and isolated and protected through the CAN isolation circuit, RS485 processing circuit, and serial port circuit, and connected to the coprocessor for data interaction; the coprocessor realizes data interaction between the FPGA processor and the coprocessor through the internal SPI bus, and interacts with each other through the bus interface data processing they own.

9. The video signal conversion board based on 3UVPX according to claim 8, characterized in that: After the FPGA processor processes the video, it generates corresponding control / feedback information and sends it to the CAN bus, RS485 bus, and serial port through the coprocessor.

10. The video signal conversion board based on 3UVPX according to claim 1, characterized in that: Use purely domestically produced chips to build the SDI to MIPI conversion circuit to achieve the conversion of multi-channel SDI video signals to MIPI.

Images