Video data transmission system based on PCIE interface

Abstract

The invention provides a video data transmission system based on a PCIE interface, the system comprises a PCIE RC terminal system and a PCIE EP terminal system, each of the PCIE RC terminal system and the PCIE EP terminal system comprises a PCIE interface module and a PCIE virtualization module, the PCIE RC terminal system and the PCIE EP terminal system are connected through the PCIE interface module, and the PCIE interface module is connected with the PCIE EP terminal system through the PCIE virtualization module. The PCIE virtualization module is connected with the PCIE interface module; wherein the PCIE interface module is used for carrying out bidirectional video data transmission between the PCIE RC terminal subsystem and the PCIE EP terminal subsystem, and the PCIE virtualization module is used for controlling the PCIE interface module to execute corresponding operation according to the transmission requirement of video data and respectively creating a corresponding virtual device node for each path of video data.

Description

Technical Field

[0001] The present invention relates to the technical field of data transmission, and in particular to a video data transmission system based on a PCIE interface. Background Art

[0002] With the rapid development of intelligent connected vehicles in the global market, the data processing and transmission requirements of vehicles are becoming more and more complex. Although the traditional Mobile Industry Processor Interface (MIPI) performs well in video transmission, its capabilities are fixed after the chip is taped out. This hardware-fixed feature limits the scalability and flexibility of the system, making it difficult to support the ever-changing application scenarios and the introduction of new functions, especially in intelligent connected vehicles, which cannot meet the growing data transmission and interface expansion requirements. Summary of the invention

[0003] In view of the problems existing in the prior art, the present invention provides a video data transmission system based on a PCIE interface, the system comprising a PCIE RC terminal system and a PCIE EP terminal system, the PCIE RC terminal system and the PCIE EP terminal system both comprising a PCIE interface module and a PCIE virtualization module, the PCIE RC terminal system and the PCIE EP terminal system are connected via the PCIE interface module, and the PCIE virtualization module is connected to the PCIE interface module; Among them, the PCIE interface module is used to perform bidirectional video data transmission between the PCIE RC terminal system and the PCIE EP terminal system, and the PCIE virtualization module is used to control the PCIE interface module to perform corresponding operations according to the transmission requirements of the video data, and create corresponding virtual device nodes for each channel of video data.

[0004] In some embodiments, the PCIE interface module includes a PCIE interrupt processing submodule; In the PCIE RC terminal system, the PCIE interrupt processing submodule is used to send an interrupt signal to the PCIE EP terminal system according to a control command of the PCIE virtualization module; In the PCIE EP terminal system, the PCIE interrupt processing submodule is used to send an interrupt request to the PCIE RC terminal system according to a control command of the PCIE virtualization module.

[0005] In some embodiments, the PCIE interface module further includes a shared access submodule, which implements shared access between the PCIE RC terminal system and the PCIE EP terminal system through a shared access area, and the shared access area is established by mapping a segment of physical memory of the PCIE EP terminal system to the BAR space of the PCIE RC terminal system.

[0006] In some embodiments, the PCIE EP terminal system is provided with a circular buffer, and the circular buffer is used to temporarily store video data transmitted between the PCIE RC terminal system and the PCIE EP terminal system.

[0007] In some embodiments, the PCIE virtualization module includes a ring buffer control submodule, and the ring buffer control submodule is used to control data reading and writing operations to the ring buffer.

[0008] In some embodiments, the PCIE virtualization module further includes a DMA control submodule, and the DMA control submodule is used to control the video data transmission between the PCIE RC terminal system and the PCIE EP terminal system through DMA.

[0009] In some embodiments, the PCIE RC terminal system further includes a video link driver module, which is used to register the virtual device node with the operating system and provide a standardized interface to the operating system so that the operating system can manage and control the virtual device node.

[0010] In some embodiments, the PCIE RC terminal system is a vehicle-mounted SOC, and the PCIE EP terminal system is a video data aggregation IC.

[0011] In some embodiments, the PCIE RC terminal system and the PCIE EP terminal system are different vehicle-mounted SOCs.

[0012] In some embodiments, the virtual device node includes a virtualized camera device node and a virtualized display device node, the vehicle-mounted camera device corresponding to the virtualized camera device node is connected to the video data aggregation IC, and the display device corresponding to the virtualized display device node is connected to the video data aggregation IC.

[0013] The video data transmission system based on the PCIE interface provided by the present invention performs video data transmission based on the PCIE interface, and performs virtualization design on both the RC end and the EP end, which not only solves the inherent limitations of the traditional MIPI interface, but also greatly improves the scalability and flexibility of the system. In addition, unlike the traditional data transmission based on the PCIE interface, the present invention can perform two-way video data transmission between the RC terminal system and the PCIE EP terminal system through virtualization design, and supports multi-channel video data, and can create corresponding virtual device nodes for each channel of video data, so that the system can flexibly manage and allocate the transmission path of the video data, thereby achieving more efficient and reliable data transmission. BRIEF DESCRIPTION OF THE DRAWINGS

[0014] In order to more clearly illustrate the technical solutions in the present invention or the prior art, the following briefly introduces the drawings required for use in the embodiments or the description of the prior art. Obviously, the drawings described below are some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0015] Figure 1 It is a structural schematic diagram of a video data transmission system based on a PCIE interface provided by the present invention.

[0016] Figure 2 This is one of the typical scene example diagrams provided by the present invention.

[0017] Figure 3 This is the second typical scenario example diagram provided by the present invention.

[0018] Figure 4 It is a schematic diagram of the bidirectional interrupt and shared access area provided by the present invention.

[0019] Figure 5 It is a schematic diagram of the ring buffer and interrupt control provided by the present invention.

[0020] Figure 6 The invention provides a video link driver module for a Linux operating system. DETAILED DESCRIPTION

[0021] In order to make the purpose, technical solution and advantages of the present invention clearer, the technical solution of the present invention will be clearly and completely described below in conjunction with the drawings of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0022] With the rapid development of intelligent connected vehicles in the global market, the data processing and transmission requirements of vehicles are becoming more and more complex. Intelligent connected vehicles not only need to process data from multiple sensors, but also need to ensure that this data is transmitted and processed with extremely low latency to meet the requirements of real-time vehicle decision-making. For example, in the Advanced Driving Assistance System (ADAS) and autonomous driving functions, data from multiple sensors such as cameras, radars, and lidars must be transmitted quickly and stably to the on-board control unit to ensure that the vehicle can respond in a timely manner. Therefore, how to efficiently transmit and process massive amounts of data with limited hardware resources has become a technical problem that needs to be solved in the industry.

[0023] With the continuous development of fiber-optic communication technology, optical fiber has gradually penetrated into the application of various industries. Its high bandwidth, low latency and low loss characteristics make it an ideal choice in the field of communications. In the automotive industry, as the demand for high-bandwidth and high-reliability communications increases with the intelligence and networking of vehicles, automakers have begun to explore the application of fiber-optic technology to in-vehicle communication systems to replace traditional coaxial cables. However, how to quickly apply fiber-optic communication technology to in-vehicle high-bandwidth video transmission remains a major challenge. The use of fiber-optic communication in an in-vehicle environment needs to consider effective integration with the in-vehicle system, while the traditional in-vehicle video transmission architecture lacks effective support for fiber-optic links.

[0024] To this end, the present invention proposes a PCIE-based virtualized video link technology to provide upper-layer interface support for optical fiber links to achieve efficient docking with vehicle-mounted video transmission. It also brings higher flexibility and expansion capabilities to the vehicle-mounted system, and provides an innovative solution for video data transmission in intelligent connected vehicles.

[0025] Combine the following Figure 1-Figure 6 Embodiments of the present invention are described.

[0026] Figure 1 FIG. 1 is a schematic diagram of the structure of a video data transmission system based on a PCIE interface provided by the present invention. Figure 1As shown, the system includes a PCIE RC terminal system and a PCIE EP terminal system, both of which include a PCIE interface module and a PCIE virtualization module, the PCIE RC terminal system and the PCIE EP terminal system are connected via the PCIE interface module, and the PCIE virtualization module is connected to the PCIE interface module. The PCIE interface module is used to perform bidirectional video data transmission between the PCIE RC terminal system and the PCIE EP terminal system, and the PCIE virtualization module is used to control the PCIE interface module to perform corresponding operations according to the transmission requirements of the video data, and to create corresponding virtual device nodes for each channel of video data.

[0027] PCIE (Peripheral Component Interconnect Express) is a high-speed serial computer expansion bus standard. The PCIE interface is an ideal interface choice for fiber-optic communication in vehicle systems due to its high speed, scalability, and support for multi-device connections. The PCIE interface not only provides extremely high data transmission rates, but also supports link aggregation and parallel connection of multiple devices, providing a flexible and reliable solution for chip expansion in vehicle systems.

[0028] PCIe devices can be divided into root complex (RC) and endpoint (EP) according to their functions and roles. The present invention performs virtualization design on both the RC end and the EP end. Both the PCIE RC terminal system and the PCIE EP terminal system include a PCIE interface module and a PCIE virtualization module. The communication connection between the RC terminal system and the PCIE EP terminal system is realized through the PCIE interface module. It can be understood that the PCIE interface module includes some necessary software and hardware configurations for realizing communication between the RC terminal system and the PCIE EP terminal system. For example, using optical fiber communication, the PCIE interface module may include a PCIE interface card, an optical fiber communication adapter, a PCIE driver, an optical fiber communication protocol stack and other software and hardware configurations.

[0029] The video data transmission system based on the PCIE interface provided by the present invention performs video data transmission based on the PCIE interface, and performs virtualization design on both the RC end and the EP end, which not only solves the inherent limitations of the traditional MIPI interface, but also greatly improves the scalability and flexibility of the system. In addition, unlike the traditional data transmission based on the PCIE interface, the present invention can perform two-way video data transmission between the RC terminal system and the PCIE EP terminal system through virtualization design, and supports multi-channel video data, and can create corresponding virtual device nodes for each channel of video data, so that the system can flexibly manage and allocate the transmission path of the video data, thereby achieving more efficient and reliable data transmission.

[0030] The PCIE interface-based video data transmission system provided by the present invention can be applied to a variety of different scenarios.

[0031] In some scenarios, the PCIE RC terminal system can be an on-board SOC (System on Chip), and the PCIE EP terminal system is a video data aggregation IC (Integrated Circuit).

[0032] Figure 2 is one of the typical scene example diagrams provided by the present invention, such as Figure 2 As shown, in this scenario, the PCIE RC terminal system is the vehicle-mounted SOC, the PCIE EP terminal system is the video data aggregation IC, and the virtual device node includes a virtualized camera device node (i.e., the virtual camera in the figure) and a virtualized display device node (i.e., the virtual display in the figure). The vehicle-mounted camera device corresponding to the virtualized camera device node is connected to the video data aggregation IC, and the display device corresponding to the virtualized display device node is connected to the video data aggregation IC. Among them, the camera device can include various vehicle-mounted camera (or sensor) devices. The display device can include various vehicle-mounted display devices.

[0033] Figure 2 In the video data aggregation IC, the field programmable gate array (FPGA) is used. As a video data aggregation device, FPGA can make full use of its flexibility and programmability to receive video data from various sensors (PHY in the figure). n), and transmit the data to SOC through the PCIE interface. As the PCIE RC end, SOC can restore the transmitted data to multiple virtual device nodes (n) through PCIE virtualization technology. vcam, that is, inputting the data of each virtual camera separately), in this way, the domain controller can process multiple channels of high-resolution video data at the same time, thereby ensuring that the vehicle can obtain and process image data from different cameras in real time in various driving scenarios.

[0034] In addition, if Figure 2 As shown, the SOC also supports a virtual multi-channel video display output interface (i.e., data transmission from a virtual display to a display device, which is similar to data transmission from a camera device to a virtual camera and will not be elaborated here), which can be used for functional display of a multi-screen cockpit in the vehicle. This not only meets the passengers' high-quality demand for in-vehicle information display, but also provides more design and application possibilities for traditional cockpit chips, especially on chip platforms with limited video output interfaces.

[0035] Through the technical solution of the present invention, the multi-channel data transmission capability of the PCIE interface is utilized to achieve multiple virtual device nodes sharing the same PCIE channel, thereby improving system resource utilization and data transmission efficiency.

[0036] In some scenarios, the PCIE RC terminal system and the PCIE EP terminal system can be different vehicle-mounted SOCs respectively.

[0037] Figure 3 This is the second typical scene example diagram provided by the present invention, such as Figure 3 As shown in the figure, in this scenario, the dual SOCs act as RC and EP respectively to share video link data. The system contains two SOCs and shares video data through the PCIE interface. The RC end and the EP end can act as producers (i.e., video publishers in the figure) and consumers (i.e., video subscribers in the figure) of video data respectively, and these roles can be interchangeable. Specifically, the RC end can act as a producer of video data and transmit the data to the EP end for processing or display; at the same time, the EP end can also act as a producer and send the processed video data back to the RC end.

[0038] The technical solution of the present invention breaks through the fixed role allocation of RC and EP in the traditional PCIE protocol, and upgrades the PCIE interface to a peer-to-peer full-duplex transmission link, which means that not only can two SOCs transmit data in both directions, but they can also send and receive data at the same time, greatly improving the efficiency and flexibility of data transmission. This design is particularly suitable for complex vehicle-mounted systems that need to share video information across domains, and can achieve efficient and real-time video data exchange between different domain controllers.

[0039] In some embodiments, the PCIE interface module includes a PCIE interrupt processing submodule; In the PCIE RC terminal system, the PCIE interrupt processing submodule is used to send an interrupt signal to the PCIE EP terminal system according to the control command of the PCIE virtualization module; In the PCIE EP terminal system, the PCIE interrupt processing submodule is used to send an interrupt request to the PCIE RC terminal system according to the control command of the PCIE virtualization module.

[0040] This embodiment improves the unidirectional interrupt mechanism in the traditional PCIE protocol and designs a bidirectional interrupt mechanism. PCIE interrupt processing submodules are set in the PCIE interface modules at the RC end and the EP end. The PCIE virtualization module can send a control command to the PCIE interface module according to data transmission requirements, instructing the EP end to send an interrupt request to the RC end in time, or instructing the RC end to send an interrupt signal to the EP end in time, thereby realizing high-speed and low-latency event notification.

[0041] For example, when the data is ready to be transmitted, the PCIE interrupt processing submodule sends an interrupt signal (or interrupt request) to immediately notify the other end to process it, thereby eliminating the delay problem of the traditional polling method. Through the two-way interrupt mechanism, the EP end and the RC end can respond to data transmission requests in a timely manner, thereby realizing low-latency data interaction, greatly improving the response speed of the system, and ensuring the rapid processing and transmission of data between devices.

[0042] In some embodiments, the PCIE interface module further includes a shared access submodule, which implements shared access between the PCIE RC terminal system and the PCIE EP terminal system through a shared access area. The shared access area is established by mapping a segment of physical memory of the PCIE EP terminal system to the BAR space of the PCIE RC terminal system.

[0043] BAR space refers to the address space mapped by the base address register (BAR) in the PCIE device. Each PCIE device has multiple BARs to indicate the location of the device in the system address space. These BAR registers are usually used to map the device's memory area or I / O port so that the system software can communicate with the device.

[0044] In this embodiment, a shared access area can be established by mapping a physical memory section of the EP end to the BAR space of the RC end, thereby realizing shared access between the RC end and the EP end. The EP end maps a physical memory section to the RC end through the BAR space, so that both ends can efficiently read and write data in the same memory area (i.e., the shared access area). This sharing mechanism greatly improves the data transmission efficiency and enhances the overall performance of the system, providing a guarantee for the transmission of high-speed video data and messages.

[0045] The PCIE interface module also includes a PCIE protocol handshake submodule, through which the RC and EP ends implement handshakes. The PCIE protocol handshake submodule on the RC end can be a custom PCI device driver module, through which the RC end can identify and initialize the EP end device and establish a reliable communication channel. The PCIE protocol handshake submodule of the EP end device is responsible for processing the handshake signal sent by the RC end and initializing its own hardware resources to prepare for subsequent data transmission.

[0046] The PCIE interface module is mainly responsible for implementing the underlying device driver of PCIE and providing solid software and hardware support for the system's data transmission and inter-device communication. Through PCIE protocol handshake, shared access area, bidirectional interrupt mechanism, etc., it can provide stable and efficient underlying support for upper-layer protocols and applications.

[0047] Figure 4 Schematic diagram of the bidirectional interrupt and shared access area provided by the present invention, such as Figure 4 As shown, the EP end can actively send an interrupt request to the RC end, and the central processing unit (CPU) of the RC end executes an interrupt response according to the interrupt request; the RC end can also send an interrupt signal to the EP end, and the CPU of the EP end executes an interrupt response according to the interrupt signal. Figure 4 The shared space in is a section of physical memory mapped to the BAR space on the RC side.

[0048] In some embodiments, the PCIE EP terminal system is provided with a circular buffer, and the circular buffer is used to temporarily store video data transmitted between the PCIERC terminal system and the PCIE EP terminal system.

[0049] A ring buffer, also known as a circular queue, cyclic buffer or circular buffer, is a special data structure used to represent a fixed-size, head-to-tail connected buffer whose storage space logically forms a ring. Data is written from one end and moves along the ring space to the other end. When the buffer is full, if new data needs to be written, the oldest data is usually overwritten (other strategies may also be adopted, such as returning an error code or throwing an exception). In this embodiment, the ring buffer may be located in a shared space (i.e., the physical memory of the EP end corresponding to the shared access area).

[0050] The ring buffer is used to temporarily store the video data transmitted between the RC and EP ends, so that data can be written and read continuously and efficiently, avoiding the data blocking problem of the traditional buffer. The design of the ring buffer not only reduces the waiting time for data transmission, but also effectively alleviates the performance bottleneck caused by data congestion.

[0051] In some embodiments, the PCIE virtualization module includes a ring buffer control submodule, and the ring buffer control submodule is used to control data reading and writing operations to the ring buffer.

[0052] For example, the ring buffer control submodule of the RC end is used to control the data read and write operations of the RC end to the ring buffer, and the ring buffer control submodule of the EP end is used to control the data read and write operations of the EP end to the ring buffer.

[0053] In some embodiments, the PCIE virtualization module further includes a DMA control submodule, and the DMA control submodule is used to control the video data transmission between the PCIE RC terminal system and the PCIE EP terminal system through DMA.

[0054] Direct Memory Access (DMA) technology is an efficient data transfer mechanism that allows PCIE devices to exchange data directly with system memory without the need for continuous CPU intervention. The DMA mechanism enables high-speed data transmission between the EP and RC ends without CPU involvement, significantly reducing the CPU load and freeing up more computing resources for other critical tasks.

[0055] In some embodiments, DMA is combined with interrupts to implement automated data transfer and processing, which can further optimize overall data transfer efficiency.

[0056] The PCIE virtualization module can achieve fast and reliable data transmission between the EP end and the RC end by establishing an efficient message notification mechanism based on PCIE, significantly improving system performance.

[0057] Figure 5 Schematic diagram of the ring buffer and interrupt control provided by the present invention, such as Figure 5As shown, the ring buffer is set at the EP end, the PCIE interface module caches data through the ring buffer, and the PCIE virtualization module controls the data read and write operations to the ring buffer. In addition, the MSI (Message Signaled Interrupt) interrupt mechanism can realize fast event notification between the EP end and the RC end. When the data is ready to be transmitted, the interrupt signal immediately notifies the other end to process, thereby eliminating the delay problem of the traditional polling method. The EP and RC ends can respond to data transmission requests in a timely manner, thereby realizing low-latency data interaction and greatly improving the response speed of the system.

[0058] In some embodiments, the PCIE RC terminal system further includes a video link driver module, which is used to register the virtual device node with the operating system and provide a standardized interface to the operating system so that the operating system can manage and control the virtual device node.

[0059] Figure 6 The video link driver module for the Linux operating system provided by the present invention is provided. It should be noted that the operating system applicable to the technical solution of the present invention is not limited to the Linux operating system, and other operating systems are also applicable, such as the Windows operating system, macOS, etc., as long as the video link driver module is adapted according to the operating system. Figure 6 As shown in the figure, the video link driver module is implemented based on the Linux V4L2 (Video for Linux version 2) architecture. The video link driver module can register multiple video devices to realize the virtualization of multiple camera device nodes. This design makes the virtualization process of camera devices completely transparent. After registering the corresponding module, the virtualized camera device can be directly used in various image processing and video analysis applications without additional interface adaptation. At the same time, the video link driver module provides standardized control of camera devices by implementing the necessary V4L2 control function (V4L2 ctrl function), and can also use the message transmission mechanism provided by the PCIE virtualization module to realize the virtualization of the video buffer queue (vb2_queue). By implementing the control functions defined in the V4L2 API, the operating system can control the virtualized camera device like managing physical devices, including typical camera control functions such as focus, exposure, and white balance.

[0060] The following are Figure 6 Description of some parameters in .

[0061] dev / videoX: This is a character device file that represents a video device in the system. User space applications interact with the video device by accessing this file. X is a number that is usually used to distinguish different video devices in the system.

[0062] Linux V4L2 core layer: This is the core part of the V4L2 architecture, which is located in the kernel space. This core layer is responsible for processing requests from user space and forwarding them to the appropriate device drivers.

[0063] V4L2 device: This is a device object in the V4L2 core layer, which represents the representation of the video device in kernel space.

[0064] Ctrl subdev: Control subdevice, responsible for handling control functions related to video devices.

[0065] DMA subdev: A subdevice related to DMA operations, responsible for managing and coordinating data transfer between the video device and the memory.

[0066] It should be noted that the system embodiments described above are merely illustrative, wherein the modules described as separate components may or may not be physically separated, and the components displayed as modules may or may not be physical units, that is, they may be located in one place, or may be distributed on multiple network units. Some or all of the modules may be selected according to actual needs to achieve the purpose of the scheme of this embodiment. Ordinary technicians in this field can understand and implement it without creative work.

[0067] Through the description of the above implementation methods, those skilled in the art can clearly understand that each implementation method can be implemented by means of software plus a necessary general hardware platform, and of course, it can also be implemented by hardware. Based on this understanding, the above technical solution is essentially or the part that contributes to the prior art can be embodied in the form of a software product, and the computer software product can be stored in a computer-readable storage medium, such as ROM / RAM, a disk, an optical disk, etc., including a number of instructions for a computer device (which can be a personal computer, a server, or a network device, etc.) to execute the steps of each embodiment or some parts of the embodiment.

[0068] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit it. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or make equivalent replacements for some of the technical features therein. However, these modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims

1. A video data transmission system based on PCIE interface, characterized in that: include: A PCIE RC terminal system and a PCIE EP terminal system, wherein the PCIE RC terminal system and the PCIE EP terminal system both comprise a PCIE interface module and a PCIE virtualization module, the PCIE RC terminal system and the PCIE EP terminal system are connected via the PCIE interface module, and the PCIE virtualization module is connected to the PCIE interface module; Among them, the PCIE interface module is used to perform bidirectional video data transmission between the PCIE RC terminal system and the PCIE EP terminal system, and the PCIE virtualization module is used to control the PCIE interface module to perform corresponding operations according to the transmission requirements of the video data, and create corresponding virtual device nodes for each channel of video data.

2. The video data transmission system based on PCIE interface according to claim 1, characterized in that: The PCIE interface module includes a PCIE interrupt processing submodule; In the PCIE RC terminal system, the PCIE interrupt processing submodule is used to send an interrupt signal to the PCIE EP terminal system according to a control command of the PCIE virtualization module; In the PCIE EP terminal system, the PCIE interrupt processing submodule is used to send an interrupt request to the PCIE RC terminal system according to a control command of the PCIE virtualization module.

3. The PCIE interface-based video data transmission system according to claim 1 or 2, characterized in that: The PCIE interface module also includes a shared access submodule, which implements shared access between the PCIERC terminal system and the PCIE EP terminal system through a shared access area, and the shared access area is established by mapping a section of physical memory of the PCIEEP terminal system to the BAR space of the PCIE RC terminal system.

4. The video data transmission system based on PCIE interface according to claim 1, characterized in that: The PCIEEP terminal system is provided with a circular buffer, and the circular buffer is used to temporarily store the video data transmitted between the PCIE RC terminal system and the PCIEEP terminal system.

5. The PCIE interface-based video data transmission system according to claim 4, characterized in that: The PCIE virtualization module includes a ring buffer control submodule, and the ring buffer control submodule is used to control data reading and writing operations to the ring buffer.

6. The PCIE interface-based video data transmission system according to claim 1 or 5, characterized in that: The PCIE virtualization module further includes a DMA control submodule, and the DMA control submodule is used to control the video data transmission between the PCIE RC terminal system and the PCIE EP terminal system through DMA.

7. The video data transmission system based on PCIE interface according to claim 1, characterized in that: The PCIERC terminal system further comprises a video link driver module, which is used to register the virtual device node with the operating system and provide a standardized interface to the operating system so that the operating system can manage and control the virtual device node.

8. The video data transmission system based on PCIE interface according to claim 1, characterized in that: The PCIERC terminal system is a vehicle-mounted SOC, and the PCIE EP terminal system is a video data aggregation IC.

9. The video data transmission system based on PCIE interface according to claim 1, characterized in that: The PCIERC terminal system and the PCIE EP terminal system are different vehicle-mounted SOCs.

10. The video data transmission system based on PCIE interface according to claim 8, characterized in that: The virtual device node includes a virtualized camera device node and a virtualized display device node. The vehicle-mounted camera device corresponding to the virtualized camera device node is connected to the video data aggregation IC, and the display device corresponding to the virtualized display device node is connected to the video data aggregation IC.

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