Solar cell and preparation method thereof
By setting a crystalline silicon layer, a silicon oxide layer and a metal oxide layer on the third surface of the shard battery, the problem of poor performance of the shard battery is solved, and the effect of improving the photoelectric conversion efficiency is achieved.
Patent Information
- Application Number
- CN202411506108.8
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-10-25
- Publication Date
- 2025-02-07
- Estimated Expiration
- 2044-10-25
AI Technical Summary
The performance of sharded batteries is poor, especially in terms of battery lobe probability and efficiency loss of cutting surfaces.
A crystalline silicon layer is provided on the third surface of the chip battery, and a silicon oxide layer and a metal oxide layer are formed thereon. The cross-section is passivated by a multi-layer passivation structure to reduce the recombination rate and improve the photoelectric conversion efficiency.
By passivating the hanging bond and reducing the recombination rate, the life of minority carriers is significantly improved, the open circuit voltage is increased, and ultimately the photoelectric conversion efficiency is improved.
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Figure CN119403296A_ABST
Abstract
Description
Technical Field
[0001] The embodiments of the present application relate to the field of solar cells, and in particular to a solar cell and a method for preparing the same. Background Art
[0002] At present, with the gradual depletion of fossil energy, solar cells are becoming more and more widely used as a new energy alternative. Solar cells are devices that convert sunlight into electrical energy. Solar cells use the photovoltaic principle to generate carriers, and then use electrodes to lead the carriers out, thereby facilitating the effective use of electrical energy.
[0003] The current solar cells mainly include IBC cells (Interdigitated Back Contact), TOPCON (Tunnel Oxide Passivated Contact), PERC cells (Passivated emitter and real cell) and heterojunction cells, etc. The photoelectric conversion efficiency of solar cells is improved by reducing optical losses and reducing the recombination of photogenerated carriers on the surface and in the body of the silicon substrate through different film layer settings and functional limitations.
[0004] In the process of assembling cells into battery strings, the whole cell is usually split and the split cells are assembled into battery strings, which helps to reduce packaging losses, optimize the problems in the assembly production process, improve the reliability of the assembly, and also help reduce manufacturing costs. However, this technology also brings some new challenges and problems, such as the probability of cell splitting and the efficiency loss of the cut surface, which need to be further optimized and improved. Summary of the invention
[0005] The embodiments of the present application provide a solar cell and a method for preparing the same, which are at least helpful in solving the problem of poor performance of sliced cells.
[0006] According to some embodiments of the present application, on one hand, an embodiment of the present application provides a solar cell, comprising: a slice cell, at least two of the slice cells are formed by splitting the same whole solar cell along a first direction, the slice cell comprises a first surface, a second surface and a third surface connecting the first surface and the second surface, the first surface is a partial area of the front side of the whole solar cell, the second surface is a partial area of the back side of the whole solar cell, and the third surface is a cross-section of the slice cell after the splitting process; a crystalline silicon layer, the crystalline silicon layer is located on the third surface; a silicon oxide layer, the silicon oxide layer is located on the surface of the crystalline silicon layer; a metal oxide layer, the metal oxide layer is located on the silicon oxide layer.
[0007] In some embodiments, the crystalline silicon layer is an amorphous silicon layer or a microcrystalline silicon layer; the thickness of the crystalline silicon layer is 1 nm to 10 nm.
[0008] In some embodiments, the metal element in the metal oxide layer is an amorphous metal element.
[0009] In some embodiments, the angle between the first surface and the third surface is an acute angle.
[0010] In some embodiments, it also includes: an intermediate passivation layer, the intermediate passivation layer is located between the silicon oxide layer and the metal oxide layer, and the intermediate passivation layer contains at least one of the silicon element in the silicon oxide layer or the metal element in the metal oxide layer.
[0011] In some embodiments, the intermediate passivation layer contains the metal element, and the metal element increases gradually along the direction from the silicon oxide layer to the metal oxide layer.
[0012] According to some embodiments of the present application, on the other hand, the embodiments of the present application further provide a method for preparing a solar cell, comprising: providing a whole solar cell, the whole solar cell comprising a front side and a back side that are relatively arranged; splitting the whole solar cell along a first direction to form at least two split cells, the split cells comprising a first surface, a second surface, and a third surface connecting the first surface and the second surface, the first surface being a partial area of the front side of the whole solar cell, the second surface being a partial area of the back side of the whole solar cell, and the third surface being a cross-section of the split cell after the splitting process; forming a crystalline silicon layer, the crystalline silicon layer being located on the third surface; forming a silicon oxide layer, the silicon oxide layer being located on the surface of the crystalline silicon layer; forming a metal oxide layer, the metal oxide layer being located on the silicon oxide layer.
[0013] In some embodiments, the reaction temperatures for forming the crystalline silicon layer, the silicon oxide layer, and the metal oxide layer are all less than or equal to 300°C.
[0014] In some embodiments, the whole solar cell includes a substrate, and the substrate is laser processed so that a partial thickness of the substrate is converted into the crystalline silicon layer.
[0015] In some embodiments, the process parameters of the laser treatment include: laser wavelength of 300nm to 550nm, pulse width of 5ps to 100ns, laser power of 1W to 25W, pulse frequency of 50kHz to 1250kHz, spot area of 5000um 2 ~50000um 2 , scanning speed 300mm / s~80000mm / s.
[0016] The technical solution provided by the embodiments of the present application has at least the following advantages:
[0017] In the solar cell provided by the embodiment of the present application, a crystalline silicon layer is provided on the third surface of the sliced cell, and the dangling bonds are passivated by the crystalline silicon layer, thereby reducing the number of dangling bonds in the cross section of the sliced cell, thereby avoiding the decrease in photoelectric conversion efficiency caused by the minority carriers excited by light being captured by the dangling bonds and recombined after reaching the surface, thereby effectively hydrogenating the dangling bonds and reducing surface defects, significantly improving the minority carrier lifetime, increasing the open circuit voltage, and ultimately improving the photoelectric conversion efficiency. In addition, a silicon oxide layer and a metal oxide layer are provided on the crystalline silicon layer, the silicon oxide layer can provide chemical passivation, and the metal oxide layer provides field passivation and chemical passivation, thereby reducing the recombination rate of the cross section and improving the photoelectric conversion efficiency of the sliced cell.
[0018] In addition, the crystals in the crystalline silicon layer have a disordered structure or most of them have a disordered structure, the electron and hole mobility rates are low, and the lateral conductivity is poor. This can effectively avoid short circuits and leakage currents caused by the first and second sides of the split battery through the crystalline silicon layer, thereby improving the photoelectric conversion efficiency of solar cells. BRIEF DESCRIPTION OF THE DRAWINGS
[0019] One or more embodiments are exemplarily illustrated by the figures in the corresponding drawings. These exemplified descriptions do not constitute a limitation on the embodiments. Unless otherwise specified, the figures in the drawings do not constitute a scale limitation. In order to more clearly illustrate the embodiments of the present application or the technical solutions in the traditional technology, the drawings required for use in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.
[0020] Figure 1 A first top view of a solar cell provided in one embodiment of the present application;
[0021] Figure 2 A first cross-sectional view of a split cell in a solar cell provided in an embodiment of the present application;
[0022] Figure 3 A second top view of a solar cell provided in one embodiment of the present application;
[0023] Figure 4 A third top view of a solar cell provided in one embodiment of the present application;
[0024] Figure 5 A second cross-sectional view of a split cell in a solar cell provided in an embodiment of the present application;
[0025] Figure 6 A third cross-sectional view of a split cell in a solar cell provided in an embodiment of the present application;
[0026] Figure 7 A fourth cross-sectional view of a split cell in a solar cell provided in an embodiment of the present application;
[0027] Figure 8 A fifth cross-sectional view of a split cell in a solar cell provided in an embodiment of the present application;
[0028] Fig. 9 A sixth cross-sectional view of a split cell in a solar cell provided in an embodiment of the present application;
[0029] Fig.10 A cross-sectional view of a split cell formed in a method for preparing a solar cell provided in an embodiment of the present application;
[0030] Fig.11 A cross-sectional view of a photovoltaic module provided in one embodiment of the present application. DETAILED DESCRIPTION
[0031] As can be seen from the background technology, the performance of current sliced batteries is relatively poor.
[0032] The solar cell provided in the embodiment of the present application arranges a crystalline silicon layer, a silicon oxide layer and a metal oxide layer on the third surface of the slice cell, and passivates the third surface through a multi-layer passivation structure. Under the premise of not damaging the performance of the original slice cell, the recombination rate of the cross section of the slice cell is reduced, thereby improving the performance of the slice cell.
[0033] In the description of the embodiments of the present application, the technical terms "first", "second", etc. are only used to distinguish different objects, and cannot be understood as indicating or implying relative importance or implicitly indicating the number, specific order or primary and secondary relationship of the indicated technical features. In the description of the embodiments of the present application, the meaning of "multiple" is more than two, unless otherwise clearly and specifically defined.
[0034] Reference to "embodiments" herein means that a particular feature, structure, or characteristic described in conjunction with the embodiments may be included in at least one embodiment of the present application. The appearance of the phrase in various locations in the specification does not necessarily refer to the same embodiment, nor is it an independent or alternative embodiment that is mutually exclusive with other embodiments. It is explicitly and implicitly understood by those skilled in the art that the embodiments described herein may be combined with other embodiments.
[0035] In the description of the embodiments of the present application, the term "and / or" is only a description of the association relationship of associated objects, indicating that three relationships may exist. For example, A and / or B can represent: A exists, A and B exist at the same time, and B exists. In addition, the character " / " in this article generally indicates that the associated objects before and after are in an "or" relationship.
[0036] In the description of the embodiments of the present application, the term "multiple" refers to more than two (including two). Similarly, "multiple groups" refers to more than two groups (including two groups), and "multiple pieces" refers to more than two pieces (including two pieces).
[0037] In the description of the embodiments of the present application, the technical terms "center", "longitudinal", "lateral", "length", "width", "thickness", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside", "clockwise", "counterclockwise", "axial", "radial", "circumferential", etc. indicate orientations or positional relationships based on the orientations or positional relationships shown in the accompanying drawings, which are only for the convenience of describing the embodiments of the present application and simplifying the description, and do not indicate or imply that the referred device or element must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be understood as a limitation on the embodiments of the present application.
[0038] In the description of the embodiments of the present application, unless otherwise clearly specified and limited, technical terms such as "installed", "connected", "connected", "fixed" and the like should be understood in a broad sense. For example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection or an indirect connection through an intermediate medium, and it can be the internal connection of two elements or the interaction relationship between two elements. For those of ordinary skill in the art, the specific meanings of the above terms in the embodiments of the present application can be understood according to the specific circumstances.
[0039] In the accompanying drawings corresponding to the embodiments of the present application, the thickness and area of the layer are magnified for better understanding and ease of description. When describing a component (such as a layer, film, region or substrate) on another component or on the surface of another component, the component can be "directly" located on the surface of another component, or there can be a third component between the two components. On the contrary, when describing a component on the surface of another component or when another component is formed or provided on the surface of a component, it means that there is no third component between the two components. In addition, when describing a component as "substantially" formed on another component, it means that the component is not formed on the entire surface (or front surface) of the other component, nor is it formed on a partial edge of the entire surface.
[0040] In the description of the embodiments of the present application, when a component "includes" another component, unless otherwise specified, other components are not excluded, and other components may be further included. In addition, when a component such as a layer, film, region, or plate is referred to as being "on / located on" another component, it may be "directly on" the other component (i.e., located on the surface of the other component with no other components between them), or another component may exist in between. In addition, when a component such as a layer, film, region, or plate is "directly located on" another component, or when a component such as a layer, film, region, or plate is located on the surface of another component, it means that no other components are located in between.
[0041] The terms used in the description of the various embodiments described herein are only used to describe specific embodiments and are not intended to be limiting. As used in the description of the various embodiments described and in the appended claims, "the part" is also intended to include the plural form unless the context clearly indicates otherwise. Among them, a component includes a layer, a film, a region, or a plate.
[0042] The following will describe the various embodiments of the present application in detail with reference to the accompanying drawings. However, it will be appreciated by those skilled in the art that in the various embodiments of the present application, many technical details are provided in order to enable the reader to better understand the present application. However, even without these technical details and various changes and modifications based on the following embodiments, the technical solution claimed in the present application can be implemented.
[0043] Figure 1 A first top view of a solar cell provided in one embodiment of the present application; Figure 2 A first cross-sectional view of a split cell in a solar cell provided in an embodiment of the present application.
[0044] According to some embodiments of the present application, on one hand, a solar cell is provided, which can improve the photoelectric conversion efficiency of the sliced cell.
[0045] refer to Figure 1 and Figure 2The solar cell includes: a slice cell 110, at least two of which are formed by dividing the same whole solar cell 100 along the first direction. The slice cell 110 includes a first surface 110a, a second surface 110b, and a third surface 110c connecting the first surface 110a and the second surface 110b. The first surface 110a is a partial area of the front side of the whole solar cell 100, the second surface 110b is a partial area of the back side of the whole solar cell 100, and the third surface 110c is a cross section of the slice cell 110 after the segmentation process along the first direction. The solar cell includes: a crystalline silicon layer 111, and the crystalline silicon layer 111 is located on the third surface 110c. The solar cell includes: a silicon oxide layer 121, and the silicon oxide layer 121 is located on the surface of the crystalline silicon layer 111. The solar cell includes: a metal oxide layer 122, and the metal oxide layer 122 is located on the silicon oxide layer 121.
[0046] The solar cell provided in the embodiment of the present application has a crystalline silicon layer 111 disposed on the third surface 110c of the slice cell 110, and the crystalline silicon layer 111 passivates the dangling bonds, thereby reducing the number of dangling bonds in the cross section of the slice cell 110, thereby avoiding the decrease in photoelectric conversion efficiency caused by the minority carriers excited by light being captured and recombined by the dangling bonds after reaching the surface, thereby effectively hydrogenating the dangling bonds and reducing surface defects, significantly improving the minority carrier lifetime, increasing the open circuit voltage, and ultimately improving the photoelectric conversion efficiency. In addition, a silicon oxide layer 121 and a metal oxide layer 122 are disposed on the crystalline silicon layer 111, and the silicon oxide layer 121 can provide chemical passivation, and the metal oxide layer 122 provides field passivation and chemical passivation, thereby reducing the recombination rate of the cross section and improving the photoelectric conversion efficiency of the slice cell 110.
[0047] In addition, the crystals in the crystalline silicon layer 111 are disordered or mostly disordered, the electron and hole mobility rates are low, and the lateral conductivity is poor. In this way, the short circuit and leakage current caused by the first surface 110a and the second surface 110b of the segmented battery 110 through the crystalline silicon layer 111 can be effectively avoided, thereby improving the photoelectric conversion efficiency of the solar cell.
[0048] In some embodiments, the whole solar cell 100 may be any one of an IBC cell, a TOPCON cell, a PERC cell, and a heterojunction cell. Correspondingly, the sliced cell 110 may be any one of an IBC cell, a TOPCON cell, a PERC cell, and a heterojunction cell.
[0049] Figure 3 A second top view of a solar cell provided in one embodiment of the present application; Figure 4 A third top view of a solar cell provided in one embodiment of the present application.
[0050] The split battery 110 refers to a battery cell that is cut into two or more than two cells by cutting technology. The current of each split battery 110 is 1 / n of the original whole cell, and n is the number of split batteries 110 formed by cutting the whole cell. Depending on n, the split battery 110 may include any split battery 110 such as a two-slice battery 110, a three-slice battery 110, a four-slice battery 110, and an eight-slice battery 110. For example Figure 1 The two-piece battery 110 shown, Figure 3 The four-piece battery 110 and Figure 4 A nine-piece battery 110 is shown.
[0051] It should be noted that the number of sections or cut surfaces included in the split battery 110 may vary depending on the cutting position. For example, Figure 1 The split cell 110 shown includes a cut surface; Figure 3 The split cell 110 shown includes two cut surfaces; Figure 4 The split battery 110 shown includes two cutting surfaces, three cutting surfaces, and four cutting surfaces. The third surface 110c in the embodiment of the present application can be Figure 1 , Figure 3 as well as Figure 4 Any one or more of the cutting surfaces shown.
[0052] The split battery 110 may be split along a first direction, wherein the first direction may be an X direction or a Y direction. The embodiment of the present application takes the first direction as an example of the X direction.
[0053] In some embodiments, the front side of the whole solar cell 100 refers to the light-receiving side of the whole solar cell 100, and the back side refers to the backlight side of the whole solar cell 100. The backlight side can also receive incident light, but the efficiency of receiving the incident light is weaker than that of the light-receiving side.
[0054] In some embodiments, the angle between the first surface 110a and the third surface 110c can be any value, that is, the cut surface and the thickness direction Z of the entire solar cell 100 can be any value of intersection or parallel. It is only necessary to ensure the break between two adjacent split cells 110. For example, Figure 2 The cut surface shown is parallel to the thickness direction Z of the entire solar cell.
[0055] Figure 5 A second cross-sectional view of a split cell in a solar cell provided in an embodiment of the present application.
[0056] In some embodiments, reference Figure 5, the angle θ between the first surface 110a and the third surface 110c is an acute angle, that is, the cut surface forms an acute angle with the thickness direction Z of the entire solar cell. In this way, the entire solar cell 100 is beveled to form a split cell 110. For the first surface 110a and the second surface 110b on the split cell 110, the cross section of the split cell 110 can be regarded as an inclined surface. Based on this, compared with dividing the entire solar cell along the thickness direction Z of the entire solar cell to form a cross-section of the sliced cell 110, in one embodiment of the present application, the atomic arrangement density is smaller on the inclined cross-section designed on the sliced cell 110, and the covalent bond surface density is smaller, so the connection between adjacent atoms on the cross-section is not firm, which is more conducive to promoting the crystalline silicon layer 111, silicon oxide layer 121 and metal oxide layer 122 located on the cross-section to form bonds with the dangling bonds on the cross-section, that is, making it easier for the crystalline silicon layer 111, silicon oxide layer 121 and metal oxide layer 122 to saturate the dangling bonds on the cross-section, and the crystalline silicon layer 111, silicon oxide layer 121 and metal oxide layer 122 can also passivate other surface defects on the cross-section, which is conducive to further enhancing the ability of the crystalline silicon layer 111, silicon oxide layer 121 and metal oxide layer 122 to reduce the defect state density of the cross-section, so as to further reduce the recombination center of the cross-section to reduce the probability of carrier recombination. In other words, designing the cross section of the slice cell 110 to be inclined rather than perpendicular to the first surface 110a and cooperating with the passivation function of the crystalline silicon layer 111, the silicon oxide layer 121 and the metal oxide layer 122 is beneficial to further improve the passivation effect of the crystalline silicon layer 111, the silicon oxide layer 121 and the metal oxide layer 122 on the cross section, so as to further reduce the probability of carrier recombination on the cross section, increase the carrier lifetime, and thus further improve the photoelectric conversion efficiency of the slice cell 110.
[0057] The substrate of the entire solar cell is crystalline silicon, and the crystal structure of crystalline silicon is a face-centered cubic unit cell structure. Due to the microscopic anisotropy of crystalline silicon crystals, the distribution of atoms on different crystal planes in the crystalline silicon crystals is different. Among them, the silicon atom density of the (111) crystal plane in single crystal silicon is the lowest; the atomic density of the (110) crystal plane is the highest. The embodiment of the present application forms the sliced cell 110 by beveling, that is, more (111) planes are formed on the inclined cross-section designed on the sliced cell 110, so that the cross-section has fewer dangling bonds, and the crystalline silicon layer 111, the silicon oxide layer 121 and the metal oxide layer 122 can better passivate the cross-section.
[0058] refer to Figure 5, the angle θ between the first surface 110a and the third surface 110c is an acute angle, and the acute angle can be 45° to 80°. If the acute angle is less than 45°, the inclination of the third surface 110c relative to the first surface 110a is too large, and the portion of the slice battery 110 including the third surface 110c can be regarded as a tip protruding from the entire slice battery 110. The smaller the acute angle, the more protruding the tip, and the easier it is for the tip to break when under pressure, which is not conducive to improving the structural stability of the slice battery 110; if the acute angle is greater than 80°, the inclination of the third surface 110c relative to the first surface 110a is too small, which is not conducive to reducing the atomic arrangement density on the third surface 110c, and thus is not conducive to improving the passivation effect of the crystalline silicon layer 111 and the silicon oxide layer 121 on the third surface 110c. Therefore, the acute angle is designed to be 45° to 80°, and the inclination of the third surface 110c relative to the first surface 110a is controlled, which is beneficial to improving the structural stability of the slice battery 110 and reducing the probability of damage to the slice battery 110. At the same time, it is effective to reduce the atomic arrangement density on the third surface 110c, so as to enhance the passivation effect of the crystalline silicon layer 111 and the silicon oxide layer 121 on the third surface 110c.
[0059] In some examples, the acute angle formed between the third surface 110c and the plane where the first surface 110a is located can be 45° to 50°. For example, the acute angle can be 46°, 47°, 48° or 49°, etc., which is conducive to making the third surface 110c approach the fcc (111) crystal plane of the slice battery 110. It is worth noting that compared with other crystal planes, the atomic arrangement density of the fcc (111) crystal plane is the smallest, and the covalent bond surface density is the smallest, and the connection between adjacent atoms is not firm. Based on this, the acute angle formed between the third surface 110c and the plane where the first surface 110a is located is designed to be 45°~50°, which is beneficial to reduce the atomic arrangement density on the third surface 110c as much as possible, and enhance the ability of the crystalline silicon layer 111, the silicon oxide layer 121 and the metal oxide layer 122 to saturate the dangling bonds on the third surface 110c as much as possible, so as to further enhance the passivation effect of the crystalline silicon layer 111, the silicon oxide layer 121 and the metal oxide layer 122 on the third surface 110c, so as to further reduce the probability of carrier recombination on the third surface 110c, and increase the carrier lifetime, thereby further improving the photoelectric conversion efficiency of the slice battery 110.
[0060] In some examples, the acute angle formed between the third surface 110c and the plane where the first surface 110a is located may also be 55°, 60°, 65°, 70°, 75°, or 80°, etc.
[0061] Continue to refer Figure 2In some embodiments, the crystalline silicon layer 111 is an amorphous silicon layer or a microcrystalline silicon layer. In this way, the low-temperature process based on the amorphous silicon layer and the microcrystalline silicon layer will not affect the electrodes and each film layer on the slice battery 110, effectively avoiding the warping caused by high temperature and the problem of reduced doping concentration of the doped layer. Among them, the doped layer can be an emitter or a doped polycrystalline silicon layer. In addition, the amorphous silicon layer and the microcrystalline silicon layer contain hydrogen ions, which can saturate the dangling bonds, and then can better field passivate the cross section, thereby improving the photoelectric conversion efficiency of the slice battery 110.
[0062] In some embodiments, the thickness of the crystalline silicon layer 111 is 1 nm to 10 nm. If the thickness of the crystalline silicon layer 111 is set to be less than 1 nm, the thickness of the crystalline silicon layer 111 is not enough to provide more hydrogen ions, and the cross section is subjected to hydrogen passivation treatment. If the thickness of the crystalline silicon layer 111 is set to be greater than 10 nm, the optical absorption brought by the crystalline silicon layer 111 itself is more, which affects the photoelectric conversion efficiency of the sliced battery 110. The thickness of the crystalline silicon layer 111 provided in an embodiment of the present application is set to be between 1 nm and 10 nm. The crystalline silicon layer 111 provides more hydrogen ions and saturates the dangling bonds of the third surface 110c, reduces the carrier recombination rate of the third surface 110c, and the crystalline silicon layer 111 has less optical absorption, which can improve the photoelectric conversion efficiency.
[0063] The thickness of the crystalline silicon layer 111 may be 1 nm, 2 nm, 3 nm, 4 nm, 5 nm, 6 nm, 7 nm, 8 nm, 9 nm or 10 nm.
[0064] In some embodiments, the crystalline silicon layer 111 may be an intrinsic crystalline silicon layer, that is, there is no doping element in the crystalline silicon layer 111. Thus, the conductivity of the intrinsic crystalline silicon layer is relatively weak, and the mobility of electrons and holes is relatively poor, which can effectively avoid edge leakage current.
[0065] In some embodiments, the crystalline silicon layer 111 may be a doped crystalline silicon layer, and the doped element type may be the same as the doped element of the film layer of the contacting slice battery 110. The elements in the doped crystalline silicon layer may be diffused from the film layer of the slice battery 110, or may be retained by amorphizing a portion of the width of the film layer of the slice battery 110. In this way, the doped element content in the doped crystalline silicon layer is relatively small, and is not sufficient to form a diffusion channel and an electric field, and thus will not form a large edge leakage current, or even no edge leakage current.
[0066] In some embodiments, the crystalline silicon layer 111 may be a doped crystalline silicon layer, and the thickness of the crystalline silicon layer 111 is 1 nm to 10 nm. Thus, the thickness of the crystalline silicon layer 111 itself is relatively thin, and the content of doping elements in the doped crystalline silicon layer is relatively small, thereby not forming a large edge leakage current, or even no edge leakage current.
[0067] There are two cases where the crystalline silicon layer 111 is located on the third surface 110 c , and the two cases will be described in detail below with reference to specific drawings.
[0068] Figure 6 A third cross-sectional view of a split cell in a solar cell provided in an embodiment of the present application; Figure 7 A fourth cross-sectional view of a split cell in a solar cell provided in an embodiment of the present application; Figure 8 A fifth cross-sectional view of a split cell in a solar cell provided in an embodiment of the present application.
[0069] It should be noted that Figure 6 to Figure 8 The solar cell shown is a TOPCON cell. The embodiment of the present application takes the whole solar cell as a TOPCON cell as an example to illustrate the positional relationship between the crystalline silicon layer 111 and the film layer in the sliced cell 110. The whole solar cell at least includes a substrate 101, a tunneling oxide layer 104 and a doped polysilicon layer 105 located on one side of the substrate 101.
[0070] A person skilled in the art may add functional film layers according to the specific design, for example, adding an emitter and a passivation layer on the other side of the substrate; for another example, adding a passivation layer on the surface of the doped polysilicon layer; for another example, adding another tunneling oxide layer and another doped polysilicon layer on the other side of the substrate.
[0071] refer to Figure 6 The slice cell 110 includes a substrate 101, and the substrate 101 has a first side and a second side opposite to each other. The slice cell 110 includes an emitter 102, and the emitter 102 is located on the first side of the substrate 101. The slice cell 110 includes a first passivation layer 103, and the first passivation layer 103 is located on the surface of the emitter 102. The slice cell 110 includes a tunneling oxide layer 104 and a doped polysilicon layer 105, and the tunneling oxide layer 104 is located on the second side of the substrate 101, and the doped polysilicon layer 105 is located on the surface of the tunneling oxide layer 104. The slice cell 110 includes a second passivation layer 106, and the second passivation layer 106 is located on the surface of the doped polysilicon layer 105.
[0072] It should be noted that the substrate, emitter, first passivation layer, second passivation layer, tunneling oxide layer and doped polysilicon layer are well known to those skilled in the art, and the embodiments of the present application do not further describe them. The embodiments of the present application take the substrate as an N-type single crystal silicon layer, the emitter as a P-type single crystal silicon layer, the first passivation layer as a silicon nitride layer, the second passivation layer as a silicon nitride layer, the tunneling oxide layer as a silicon dioxide layer and the doped polysilicon layer as an N-type polysilicon layer as an example.
[0073] The first case: reference Figure 6 , the crystalline silicon layer 111 is located in the slice cell 110, that is, the crystalline silicon layer 111 is located on the inner side of the third surface 110c. The crystalline silicon layer 111 is formed by amorphizing the film layer containing crystalline silicon crystals in the slice cell 110. In this way, the third surface 110c can be amorphized, thereby reducing the number of dangling bonds on the third surface 110c, so that it has a lower carrier recombination rate.
[0074] The film layers including crystalline silicon crystals may be the substrate 101 , the emitter 102 and the doped polysilicon layer 105 .
[0075] It should be noted that in some examples, due to the thin thickness of the tunnel oxide layer 104, it may be amorphized to become a part of the crystalline silicon layer 111. In some examples, the silicon element of the tunnel oxide layer 104 is still ordered silicon and has not been converted into unordered silicon (amorphous silicon or microcrystalline silicon), but due to the thin thickness, it cannot be reflected in the figure and cannot be easily seen in reality.
[0076] In the second case, refer to Figure 7 The crystalline silicon layer 111 is located outside the split cell 110, that is, the crystalline silicon layer 111 is located outside the third surface 110c. The crystalline silicon layer 111 is formed by a deposition process.
[0077] In some embodiments, reference Figure 6 or Figure 7 , the end surface of the crystalline silicon layer 111 is flush with the first surface 110a and the second surface 110b. Figure 8 The crystalline silicon layer 111 extends to a portion of the first surface 110 a and the second surface 110 b .
[0078] The silicon oxide layer 121 contains oxygen atoms, which form silicon-oxygen bonds with silicon dangling bonds, and the bond between O atoms and Si is more stable. At the same time, accompanied by the transfer of electrons from Si to O, the dangling bonds on the third surface 110c and the surface of the crystalline silicon layer 111 are passivated, thereby passivating the third surface 110c and the crystalline silicon layer 111.
[0079] In some embodiments, reference Figure 2 , the silicon oxide layer 121 is an amorphous silicon oxide layer. The amorphous silicon oxide layer absorbs less blue light, so that more wavelengths of light can be absorbed by the slice cell 110, and thus has lower optical absorption, which improves the photoelectric conversion efficiency of the slice cell 110, and the amorphous silicon oxide layer has good passivation thermal stability, so that it can maintain a good passivation effect, effectively extend the life of the silicon oxide layer 121 and the passivation life, and reduce the light attenuation efficiency of the slice cell 110. The amorphous silicon oxide layer has a wide deposition process window, so it is easier and more stable to form, reducing the difficulty of the preparation process.
[0080] In some embodiments, the silicon oxide layer 121 is a crystalline silicon oxide layer. The crystalline silicon oxide layer has good optical transparency and low optical loss, thereby reducing optical loss.
[0081] In some embodiments, the thickness of the silicon oxide layer 121 is 1 nm to 10 nm. Thus, the silicon oxide layer 121 provides more oxygen atoms and saturates the dangling bonds of the third surface 110 c, thereby reducing the carrier recombination rate of the third surface 110 c and improving the photoelectric conversion efficiency.
[0082] In some embodiments, the thickness of the silicon oxide layer 121 is 4 nm to 7 nm. The film layer formed by the silicon oxide layer 121 has high density, which can effectively prevent the metal elements in the metal oxide layer from entering the crystalline silicon layer 111 and the sliced cell 110 .
[0083] Moreover, the silicon oxide material also has a good anti-PID effect. Since the subsequent packaging materials of the photovoltaic modules formed based on solar cells are difficult to achieve 100% isolation from the outside world, water vapor may enter the interior of the solar cell through the packaging materials or backplane used for edge sealing in a humid environment. At this time, the glass in the packaging material will produce sodium ions, and the sodium ions will move to the surface of the solar cell under the action of the external electric field to produce the PID phenomenon, resulting in a decrease in the photoelectric conversion efficiency of the solar cell. The silicon oxide material has good compactness and insulation, so it has a good effect on preventing water vapor from entering the third surface 110c to enter the slice battery 110, thereby having a good anti-PID effect. In this way, even if the packaging material of the photovoltaic module is difficult to achieve complete insulation, water vapor enters the environment of the solar cell through the packaging material used for edge sealing, and the film layer composed of the silicon oxide material can also prevent the sodium ions in the glass in the packaging material from moving to the third surface 110c, thereby preventing the PID phenomenon and maintaining a high photoelectric conversion rate of the solar cell.
[0084] For example, the thickness of the silicon oxide layer 121 may be 1 nm, 2 nm, 3 nm, 4 nm, 5 nm, 6 nm, 7 nm, 8 nm, 9 nm, or 10 nm.
[0085] The metal oxide layer 122 can provide metal elements, which make the metal oxide layer 122 itself have a high density of fixed charges. The high density of fixed charges can generate a large electric field, thereby performing good field effect passivation on the third surface 110c. For example, a large energy band bending is generated between the metal oxide layer 122 and the third surface 110c, which hinders the migration of minority carriers to the third surface 110c and reduces the concentration of minority carriers at the third surface 110c, which is beneficial to reduce the probability of recombination of majority carriers and minority carriers on the third surface 110c.
[0086] The formation energy of oxygen vacancies in the metal oxide layer 122 is lower than that of oxygen vacancies in the silicon oxide layer 121, so that O atoms can easily migrate from the metal oxide layer 122 to the substrate and the crystalline silicon layer 111 side, and then continue to further field passivate the substrate and the crystalline silicon layer 111, and convert some silicon dangling bonds into silicon-oxygen bonds, so as to continue to form the silicon oxide layer 121 and increase the density of the silicon oxide layer 121; in substitutional defects, the formation energy of silicon element replacing metal element in the metal oxide layer 122 is much greater than the formation energy of metal element replacing silicon in the silicon oxide layer 121, so that the metal element can be easily doped into the silicon oxide and release oxygen vacancies in the silicon oxide layer 121, further saturating the dangling bonds.
[0087] In some embodiments, the metal element in the metal oxide layer 122 is an amorphous metal element. Thus, the metal oxide layer 122 can be formed by a low temperature process, thereby avoiding the thermal damage caused by a high temperature process.
[0088] In some embodiments, the metal element in the metal oxide layer 122 may be any one or more of elements such as Al, Ti, Zn, Zr, Hf, Mo, W or Ni.
[0089] In some embodiments, the thickness of the metal oxide layer 122 may be 20 nm to 100 nm. The thickness of the metal oxide layer 122 may be 20 nm to 40 nm, 40 nm to 60 nm, 60 nm to 80 nm, or 80 nm to 100 nm. For example, the thickness of the metal oxide layer 122 may be 23 nm, 38 nm, 45 nm, 56 nm, 69 nm, 83 nm, 91 nm, or 99 nm.
[0090] Fig. 9 This is a sixth cross-sectional view of a segmented cell 110 in a solar cell provided in an embodiment of the present application.
[0091] In some embodiments, the solar cell further includes: an intermediate passivation layer 123 , which is located between the silicon oxide layer 121 and the metal oxide layer 122 , and contains at least one of the silicon element in the silicon oxide layer 121 or the metal element in the metal oxide layer 122 .
[0092] In some embodiments, the thickness of the intermediate passivation layer 123 may be 4 nm to 15 nm. The thickness of the intermediate passivation layer 123 may be 4 nm, 6 nm, 8 nm, 10 nm, 11 nm, 12 nm, 13 nm, or 14 nm.
[0093] In some embodiments, the intermediate passivation layer 123 contains metal elements, and the metal elements increase gradually along the direction from the silicon oxide layer 121 to the metal oxide layer 122 .
[0094] The solar cell provided in the embodiment of the present application has a crystalline silicon layer 111 disposed on the third surface 110c of the slice cell 110, and the crystalline silicon layer 111 passivates the dangling bonds, thereby reducing the number of dangling bonds in the cross section of the slice cell 110, thereby avoiding the decrease in photoelectric conversion efficiency caused by the minority carriers excited by light being captured and recombined by the dangling bonds after reaching the surface, thereby effectively hydrogenating the dangling bonds and reducing surface defects, significantly improving the minority carrier lifetime, increasing the open circuit voltage, and ultimately improving the photoelectric conversion efficiency. In addition, a silicon oxide layer 121 and a metal oxide layer 122 are disposed on the crystalline silicon layer 111, and the silicon oxide layer 121 can provide chemical passivation, and the metal oxide layer 122 provides field passivation and chemical passivation, thereby reducing the recombination rate of the cross section and improving the photoelectric conversion efficiency of the slice cell 110.
[0095] In addition, the crystals in the crystalline silicon layer 111 are disordered or mostly disordered, the electron and hole mobility rates are low, and the lateral conductivity is poor. In this way, the short circuit and leakage current caused by the first surface 110a and the second surface 110b of the segmented battery 110 through the crystalline silicon layer 111 can be effectively avoided, thereby improving the photoelectric conversion efficiency of the solar cell.
[0096] Accordingly, according to some embodiments of the present application, the embodiments of the present application also provide a method for preparing a solar cell, which is used to prepare the solar cell provided by the above embodiments. The technical features that are the same or corresponding to the above embodiments will not be elaborated here.
[0097] The preparation method includes: Figure 1 , providing a whole solar cell 100, the whole solar cell 100 includes a front side and a back side that are arranged opposite to each other.
[0098] Fig.10 A cross-sectional view of a split cell formed in a method for preparing a solar cell provided in an embodiment of the present application.
[0099] refer to Fig.10 The preparation method includes: splitting a whole solar cell along a first direction to form at least two split cells 110, the split cell 110 includes a first surface 110a, a second surface 110b and a third surface 110c connecting the first surface 110a and the second surface 110b, the first surface 110a is a partial area of the front side of the whole solar cell, the second surface 110b is a partial area of the back side of the whole solar cell, and the third surface 110c is a cross section of the split cell 110 after the splitting process.
[0100] The preparation method includes: Figure 2 , a crystalline silicon layer 111 is formed, and the crystalline silicon layer 111 is located on the third surface 110c.
[0101] In some embodiments, the reaction temperature for forming the crystalline silicon layer 111 is less than or equal to 300° C.
[0102] In some embodiments, reference Figure 6 The entire solar cell 100 includes a substrate 101 , and the substrate 101 is laser processed so that a portion of the thickness of the substrate 101 is converted into a crystalline silicon layer 111 .
[0103] In some embodiments, the process parameters of the laser treatment include: laser wavelength of 300nm to 550nm, pulse width of 5ps to 100ns, laser power of 1W to 25W, pulse frequency of 50kHz to 1250kHz, spot area of 5000um 2 ~50000um 2 , scanning speed 300mm / s~80000mm / s.
[0104] In some embodiments, reference Figure 7 , a crystalline silicon layer 111 is formed by a deposition process.
[0105] In some embodiments, reference Figure 8 The crystalline silicon layer 111 also extends to a portion of the width of the first surface 110 a and the second surface 110 b .
[0106] In some embodiments, the crystalline silicon layer 111 is formed by a plasma deposition process, so that hydrogen ions are present in the crystalline silicon layer 111. The hydrogen ions can perform hydrogen passivation on the third surface 110c, passivate the surface dangling bonds of the third surface 110c, and reduce the photoelectric conversion efficiency loss caused by recombination.
[0107] In some embodiments, after the crystalline silicon layer 111 is formed, the crystalline silicon layer 111 is subjected to hydrogen plasma treatment to increase the hydrogen ion content in the crystalline silicon layer 111. By subjecting the crystalline silicon layer 111 to hydrogen ion treatment, the hydrogen ion content of the crystalline silicon layer 111 after the hydrogen ion treatment is high, and the hydrogen ions can be combined with the dangling bonds on the third surface 110c to form non-recombination centers, thereby achieving a good passivation effect.
[0108] In some embodiments, the process steps of hydrogen plasma treatment include: in the chamber for forming the crystalline silicon layer 111, after the crystalline silicon layer 111 is formed, continuing to introduce hydrogen source gas, the flow rate of the hydrogen source gas is 5000sccm~15000sccm, and the RF power is 10000W~15000W.
[0109] The preparation method includes: forming a silicon oxide layer 121 , wherein the silicon oxide layer 121 is located on the surface of the crystalline silicon layer 111 .
[0110] In some embodiments, the reaction temperature for forming the silicon oxide layer 121 is less than or equal to 300° C.
[0111] The preparation method includes: forming a metal oxide layer 122 , wherein the metal oxide layer 122 is located on the silicon oxide layer 121 .
[0112] In some embodiments, the reaction temperature for forming the metal oxide layer 122 is less than or equal to 300°C.
[0113] It should be noted that, in the above embodiment, the crystalline silicon layer 111 has hydrogen ions as an example. In the process of the deposition process of the metal oxide layer 122, hydrogen ions can also be formed by a nitrogen source or a hydrogen source. The action principle of the hydrogen atoms is the same as that of the hydrogen ions of the crystalline silicon layer 111, that is, a large amount of hydrogen also exists in the metal oxide layer 122, and the third surface 110c can also be chemically passivated. The metal oxide layer 122 can also be treated with hydrogen plasma to increase the content of hydrogen ions in the metal oxide layer 122.
[0114] Accordingly, according to some embodiments of the present application, another aspect of the embodiments of the present application further provides a photovoltaic component, comprising the solar cell provided by the above embodiments.
[0115] Fig.11 A cross-sectional view of a photovoltaic module provided in one embodiment of the present application.
[0116] refer to Fig.11 The photovoltaic module includes: a battery string, which is formed by connecting a plurality of solar cells 201 as in any one of the above embodiments or the solar cells 201 prepared by the preparation method as in any one of the above embodiments; a packaging film 203, which is used to cover the surface of the battery string; and a cover plate 204, which is used to cover the surface of the packaging film 203 away from the battery string.
[0117] Specifically, in some embodiments, multiple cells can be electrically connected through the connecting component 202, and the connecting component 202 is welded to the main grid on the cell. In some embodiments, the connecting component 202 is welded to the auxiliary grid on the cell, and the auxiliary grid includes a first electrode and a second electrode.
[0118] In some embodiments, no intervals are set between the battery cells, that is, the battery cells overlap each other.
[0119] In some embodiments, the encapsulation film 203 includes a first encapsulation layer and a second encapsulation layer, the first encapsulation layer covers one of the front side or the back side of the solar cell, and the second encapsulation layer covers the other of the front side or the back side of the solar cell. Specifically, at least one of the first encapsulation layer or the second encapsulation layer can be an organic encapsulation film such as a polyvinyl butyral (PVB) film, an ethylene-vinyl acetate copolymer (EVA) film, a polyethylene octene co-elastomer (POE) film or a polyethylene terephthalate (PET) film.
[0120] It is worth noting that there is a boundary line between the first encapsulation layer and the second encapsulation layer before lamination. After lamination, the photovoltaic module is no longer a first encapsulation layer and a second encapsulation layer, that is, the first encapsulation layer and the second encapsulation layer have formed an integral encapsulation film 203.
[0121] In some embodiments, the cover plate 204 may be a glass cover plate, a plastic cover plate or the like with a light-transmitting function. Specifically, the surface of the cover plate 204 facing the encapsulation film 203 may be a concave-convex surface, thereby increasing the utilization rate of the incident light. The cover plate 204 includes a first cover plate and a second cover plate, the first cover plate is opposite to the first encapsulation layer, and the second cover plate is opposite to the second encapsulation layer; or the first cover plate is opposite to one side of the solar cell, and the second cover plate is opposite to the other side of the solar cell.
[0122] Those skilled in the art will appreciate that the above-mentioned embodiments are specific examples for implementing the present application, and in practical applications, various changes may be made to the embodiments in form and detail without departing from the spirit and scope of the present application. Any person skilled in the art may make various changes and modifications without departing from the spirit and scope of the present application, and therefore the scope of protection of the present application shall be subject to the scope defined in the claims.
Claims
1. A solar cell, characterized in that: include: Slice cells, at least two of which are formed by segmenting the same whole solar cell along a first direction, the slice cell comprising a first surface, a second surface, and a third surface connecting the first surface and the second surface, the first surface is a partial area of the front surface of the whole solar cell, the second surface is a partial area of the back surface of the whole solar cell, and the third surface is a cross section of the slice cell after the segmentation process; a crystalline silicon layer, wherein the crystalline silicon layer is located on the third surface; a silicon oxide layer, wherein the silicon oxide layer is located on a surface of the crystalline silicon layer; A metal oxide layer is located on the silicon oxide layer.
2. The solar cell according to claim 1, characterized in that: The crystalline silicon layer is an amorphous silicon layer or a microcrystalline silicon layer; The thickness of the crystalline silicon layer is 1 nm to 10 nm.
3. The solar cell according to claim 1 or 2, characterized in that: The metal element in the metal oxide layer is an amorphous metal element.
4. The solar cell according to claim 1, characterized in that The angle between the first surface and the third surface is an acute angle.
5. The solar cell according to claim 1, characterized in that: Also includes: An intermediate passivation layer is located between the silicon oxide layer and the metal oxide layer, and the intermediate passivation layer contains at least one of the silicon element in the silicon oxide layer and the metal element in the metal oxide layer.
6. The solar cell according to claim 5, characterized in that: The intermediate passivation layer contains the metal element, and the metal element increases gradually along the direction from the silicon oxide layer to the metal oxide layer.
7. A method for preparing a solar cell, characterized in that: include: Providing a whole solar cell, wherein the whole solar cell comprises a front side and a back side which are arranged opposite to each other; The whole solar cell is split along a first direction to form at least two split cells, wherein the split cell includes a first surface, a second surface, and a third surface connecting the first surface and the second surface, wherein the first surface is a partial area of the front surface of the whole solar cell, the second surface is a partial area of the back surface of the whole solar cell, and the third surface is a cross section of the split cell after the splitting process; forming a crystalline silicon layer, wherein the crystalline silicon layer is located on the third surface; forming a silicon oxide layer, wherein the silicon oxide layer is located on a surface of the crystalline silicon layer; A metal oxide layer is formed, the metal oxide layer being located on the silicon oxide layer.
8. The preparation method according to claim 7, characterized in that: The reaction temperatures for forming the crystalline silicon layer, the silicon oxide layer and the metal oxide layer are all less than or equal to 300°C.
9. The preparation method according to claim 7, characterized in that: The whole solar cell comprises a substrate, and the substrate is laser processed so that a part of the thickness of the substrate is converted into the crystalline silicon layer.
10. The preparation method according to claim 9, characterized in that: The process parameters of the laser treatment include: laser wavelength of 300nm to 550nm, pulse width of 5ps to 100ns, laser power of 1W to 25W, pulse frequency of 50kHz to 1250kHz, spot area of 5000um 2 ~50000um 2 , scanning speed 300mm / s~80000mm / s.
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