A voltage regulator chip debugging method, device, equipment and medium

Abstract

This invention discloses a method, apparatus, device, and medium for debugging voltage regulator chips, relating to the field of server technology. The solution provides a voltage regulator chip debugging adapter board, specifically connecting a voltage regulator chip debugging tool via a first preset bus and a motherboard's baseboard management controller via a second preset bus. Because the motherboard has an external second preset bus interface, no adjustments to the motherboard's chassis environment are required when connecting the voltage regulator chip debugging adapter board to the baseboard management controller, simplifying operation. The debugging process of the voltage regulator chip is entirely controlled by the voltage regulator chip debugging adapter board, eliminating the need for remote firmware flashing and ensuring high stability. Furthermore, troubleshooting output voltage faults eliminates the need for multimeters and oscilloscopes, significantly improving debugging efficiency.

Description

Technical Field

[0001] This invention relates to the field of server technology, and in particular to a method, apparatus, device, and medium for debugging voltage regulator chips. Background Technology

[0002] In servers, data centers, and high-performance computing systems, the efficiency and reliability of power management are crucial. Voltage regulator (VR) chips, as key components, directly impact server operation through their performance and stability. During actual debugging and testing, VR chips may encounter various issues, including firmware version flashing, parameter adjustments, and abnormal output voltage.

[0003] Currently, there are two main debugging methods. One is to connect to the VR debugging tool via the Inter-Integrated Circuit (I2C) connector on the board to achieve firmware burning and troubleshooting. Although this method is low-cost and suitable for mass production, it suffers from problems such as physical damage, cumbersome operation, difficult wiring, and complex design. The other method is to remotely burn the VR firmware version through the BMC management interface, but its application scenarios are currently limited, the technology is not mature, and additional development and debugging are required. In addition, troubleshooting VR chip output voltage faults usually involves using a multimeter and oscilloscope, but this requires following the power-on sequence and chip datasheet. For pins with unclear functions, it is also necessary to compare the measurement results with those of normal boards, making the operation cumbersome and inefficient.

[0004] Given the above problems, how to solve the cumbersome and inefficient debugging and troubleshooting of current VR chips is an urgent issue for technicians in this field. Summary of the Invention

[0005] The purpose of this invention is to provide a voltage regulator chip debugging method, apparatus, equipment, and medium to solve the problem of cumbersome and inefficient debugging and troubleshooting of current VR chips.

[0006] To solve the above-mentioned technical problems, the present invention provides a voltage regulator chip debugging method, applied to a voltage regulator chip debugging adapter board; the voltage regulator chip debugging adapter board includes a controller and pin headers; the controller is connected to the pin headers via a first preset bus, and the pin headers are connected to a voltage regulator chip debugging tool via the first preset bus; the controller is connected to a motherboard's baseboard management controller via a second preset bus; wherein, the motherboard is provided with an external second preset bus interface; the method includes:

[0007] Identify the target voltage regulator chip to be debugged in the motherboard and generate a connection request to the target voltage regulator chip;

[0008] A connection request is sent to the substrate management controller via a second preset bus, so that the substrate management controller can obtain the data information of the target voltage regulator chip according to the connection request and send the data information to the controller via the second preset bus.

[0009] Data information is sent to the voltage regulator chip debugging tool via a first preset bus, so that the voltage regulator chip debugging tool can communicate and debug the target voltage regulator chip based on the data information.

[0010] On one hand, sending a connection request to the baseboard management controller via the second preset bus includes:

[0011] Based on a preset communication protocol, a connection request is sent to the baseboard management controller via a second preset bus; wherein, the format of the preset communication protocol is a frame header, function code, command bit, address bit, data bit, check bit, and frame trailer;

[0012] Correspondingly, the substrate management controller sends data information to the controller via a second preset bus, including:

[0013] The baseboard management controller sends data information to the controller via a second preset bus based on a preset communication protocol.

[0014] On the other hand, the voltage regulator chip debugging adapter board also includes: buttons and DIP switches;

[0015] Both the button and the DIP switch are connected to the controller;

[0016] Correspondingly, determining the target voltage regulator chip to be debugged in the motherboard and generating a connection request for the target voltage regulator chip includes:

[0017] The target preset bus number is set based on the DIP switch;

[0018] Determine whether the DIP switch is set correctly;

[0019] If it is confirmed that the DIP switch setting is incorrect, return to the step of setting the target preset bus number based on the DIP switch setting;

[0020] If the DIP switch setting is confirmed to be correct, the target voltage regulator chip in the motherboard is determined according to the set target preset bus number, and a connection request to the target voltage regulator chip is generated.

[0021] Correspondingly, sending a connection request to the baseboard management controller via the second preset bus includes:

[0022] Enable the button and notify the baseboard management controller to stop printing debugging information;

[0023] Initiate data transmission to the baseboard management controller and send a connection request to the baseboard management controller.

[0024] On the other hand, the voltage regulator chip debugging adapter board also includes: indicator lights;

[0025] The indicator light is connected to the controller;

[0026] Correspondingly, determining whether the DIP switch is set correctly includes:

[0027] Determine whether the illumination status of the indicator light corresponds to the set target preset bus number;

[0028] If so, then confirm that the DIP switch setting is correct;

[0029] If not, then the DIP switch setting is incorrect.

[0030] On the other hand, after the baseboard management controller sends data information to the controller via a second preset bus based on a preset communication protocol, the system further includes:

[0031] Determine whether the data information is correct based on the data bits and check bits in the data information;

[0032] If the data information is confirmed to be correct, proceed to the step of sending data information to the voltage regulator chip debugging tool via the first preset bus;

[0033] If the data is confirmed to be incorrect, a request to reacquire the data is sent to the substrate management controller.

[0034] On the other hand, after sending data information to the voltage regulator chip debugging tool via the first preset bus, the method further includes:

[0035] Monitor the debugging results sent by the voltage regulator chip debugging tool through the first preset bus;

[0036] When a debugging result indicating an output voltage fault is received, the indicator light is controlled to output a prompt message indicating an output voltage fault.

[0037] On the other hand, the voltage regulator chip debugging adapter board also includes: a controller firmware programming connector; the controller firmware programming connector is connected to a preset interface of the controller;

[0038] Correspondingly, the method also includes:

[0039] The controller is programmed with preset firmware via the controller firmware programming connector.

[0040] To address the aforementioned technical problems, the present invention also provides a voltage regulator chip debugging device, applied to a voltage regulator chip debugging adapter board; the voltage regulator chip debugging adapter board includes a controller and pin headers; the controller is connected to the pin headers via a first preset bus, and the pin headers are connected to a voltage regulator chip debugging tool via the first preset bus; the controller is connected to a motherboard's baseboard management controller via a second preset bus; wherein the motherboard is provided with an external second preset bus interface; the device includes:

[0041] The determination module is used to determine the target voltage regulator chip to be debugged in the motherboard and generate a connection request to the target voltage regulator chip;

[0042] The first transmitting module is used to send a connection request to the substrate management controller via a second preset bus, so that the substrate management controller can obtain the data information of the target voltage regulator chip according to the connection request and send the data information to the controller via the second preset bus.

[0043] The second sending module is used to send data information to the voltage regulator chip debugging tool through the first preset bus, so that the voltage regulator chip debugging tool can communicate and debug the target voltage regulator chip according to the data information.

[0044] To address the aforementioned technical problems, the present invention also provides a voltage regulator chip debugging device, comprising:

[0045] Memory, used to store computer programs;

[0046] The processor is used to implement the steps of the voltage regulator chip debugging method described above when executing the computer program.

[0047] To address the aforementioned technical problems, the present invention also provides a computer-readable storage medium storing a computer program, which, when executed by a processor, implements the steps of the voltage regulator chip debugging method described above.

[0048] The voltage regulator chip debugging method provided by this invention is applied to a voltage regulator chip debugging adapter board. The voltage regulator chip debugging adapter board includes a controller and pin headers. The controller is connected to the pin headers via a first preset bus, and the pin headers are connected to a voltage regulator chip debugging tool via the first preset bus. The controller is connected to the substrate management controller of the motherboard via a second preset bus. The motherboard has an external second preset bus interface. Specifically, the method determines the target voltage regulator chip to be debugged on the motherboard and generates a connection request for the target voltage regulator chip. The connection request is sent to the substrate management controller via the second preset bus, so that the substrate management controller can obtain the data information of the target voltage regulator chip according to the connection request and send the data information to the controller via the second preset bus. The data information is sent to the voltage regulator chip debugging tool via the first preset bus, so that the voltage regulator chip debugging tool can communicate and debug the target voltage regulator chip according to the data information.

[0049] The beneficial effects of this invention are that it provides a voltage regulator chip debugging adapter board for programming voltage regulator chip firmware and troubleshooting voltage regulator chip output voltage faults. This voltage regulator chip debugging adapter board connects to a voltage regulator chip debugging tool via a first preset bus and to the motherboard's baseboard management controller via a second preset bus. Because the motherboard has an external second preset bus interface, no adjustments to the motherboard's chassis environment are required when connecting the voltage regulator chip debugging adapter board to the baseboard management controller, simplifying operation. The voltage regulator chip debugging process is entirely controlled by the voltage regulator chip debugging adapter board, eliminating the need for remote programming of the voltage regulator chip firmware version, resulting in high stability. Furthermore, when troubleshooting output voltage faults, multimeters and oscilloscopes are not required, significantly improving debugging efficiency.

[0050] On the other hand, this invention specifically sets a preset communication protocol between the controller and the baseboard management controller, ensuring that connection requests and data information are transmitted in an orderly manner during transmission, avoiding data loss or errors. By setting DIP switches and buttons in the voltage regulator chip debugging adapter board, the target voltage regulator chip to be debugged can be conveniently selected, and data transmission to the baseboard management controller can be initiated simultaneously, sending a connection request to the baseboard management controller, thus ensuring the accurate execution of the target voltage regulator chip debugging.

[0051] In addition, the present invention also provides a voltage regulator chip debugging device, equipment and medium, with the same effect as above. Attached Figure Description

[0052] To more clearly illustrate the embodiments of the present invention, the accompanying drawings used in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0053] Figure 1 A schematic diagram of the voltage regulator chip debugging architecture provided in an embodiment of the present invention;

[0054] Figure 2 A flowchart of a voltage regulator chip debugging method provided in an embodiment of the present invention;

[0055] Figure 3 This is a topology diagram of a voltage regulator chip debugging adapter board provided in an embodiment of the present invention;

[0056] Figure 4 A schematic diagram of a voltage regulator chip debugging device provided in an embodiment of the present invention;

[0057] Figure 5 This is a schematic diagram of a voltage regulator chip debugging device provided in an embodiment of the present invention. Detailed Implementation

[0058] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the protection scope of the present invention.

[0059] The core of this invention is to provide a voltage regulator chip debugging method, apparatus, equipment, and medium to solve the problem of cumbersome and inefficient debugging and troubleshooting of current VR chips.

[0060] To enable those skilled in the art to better understand the present invention, the present invention will be further described in detail below with reference to the accompanying drawings and specific embodiments.

[0061] In servers, data centers, and high-performance computing systems, effective power management is crucial for ensuring stable system operation. As a core component, the performance and reliability of the VR chip directly impact the server's operational status. However, during actual debugging and testing, VR chips may encounter various issues, such as firmware version flashing, parameter adjustments, and abnormal output voltage.

[0062] Currently, there are two main debugging methods to address these issues. One is to design an I2C connector on the board to connect VR debugging tools. This method is low-cost, suitable for mass production, and allows for rapid flashing of various VR firmware versions for testing during the debugging phase. It eliminates the conversion process, reduces communication latency, improves response speed, and enables faster problem localization. The other method is to remotely flash VR firmware versions through the BMC management interface. This method eliminates the need for on-site operation, saving time, and is especially suitable for scenarios requiring frequent firmware updates. For troubleshooting VR chip output voltage faults, multimeters and oscilloscopes are typically used for measurement.

[0063] However, the first approach, which involves designing an I2C connector on the board, may become inoperable due to physical handling, impact, or other unforeseen circumstances. Each debugging session requires physical contact, potentially increasing maintenance costs and time, and wiring is difficult in compact or hard-to-reach spaces. Furthermore, during integrated circuit design, adequate space needs to be reserved for the I2C interface, and proper wiring must be ensured, which can increase design complexity. Some boards remove this connector after mass production to save costs, which hinders troubleshooting. Meanwhile, the second approach for burning VR firmware suffers from limited current applications, low technological maturity, and the need for development and debugging. Troubleshooting VR chip output voltage faults requires measurements based on power-on sequence and chip specifications; for pins with unclear functions, comparison with measurements from normal boards is necessary, making the process cumbersome and only suitable for specific situations. Therefore, to address these issues, this invention provides a voltage regulator chip debugging method.

[0064] It should be noted that the method provided by this invention is applied to voltage regulator chip debugging adapter boards. Figure 1 This is a schematic diagram of the voltage regulator chip debugging architecture provided in an embodiment of the present invention. Figure 1 As shown, the voltage regulator chip debugging adapter board includes a controller and pin headers. The controller connects to the pin headers via a first preset bus, and the pin headers connect to the voltage regulator chip debugging tool via the same first preset bus. In this embodiment, the first preset bus is not limited and depends on the specific implementation. It should be noted that since voltage regulator chip debugging tools are generally designed based on the I2C bus, in order to ensure normal communication between the adapter board and the voltage regulator chip debugging tool, the first preset bus can be set to an I2C bus in specific implementations. Furthermore, in the server motherboard, the voltage regulator chip and the baseboard management controller communicate via an I2C bus.

[0065] Furthermore, the controller in the voltage regulator chip debugging adapter board is connected to the motherboard's baseboard management controller via a second preset bus. It should be noted that the motherboard has an external second preset bus interface; that is, the second preset bus interface is directly exposed on the server motherboard, allowing direct wiring operations without removing the server chassis. This embodiment does not limit the second preset bus; for example, it can be a Universal Asynchronous Receiver / Transmitter (UART) bus or a Universal Serial Bus (USB), depending on the specific implementation. The voltage regulator chip debugging method will be described in detail below.

[0066] Figure 2 This is a flowchart illustrating a voltage regulator chip debugging method provided in an embodiment of the present invention. Figure 2 As shown, the method includes:

[0067] S10: Identify the target voltage regulator chip to be debugged on the motherboard and generate a connection request to the target voltage regulator chip.

[0068] Specifically, to debug a voltage regulator chip, the target voltage regulator chip on the motherboard needs to be identified first. Understandably, a server motherboard typically contains multiple voltage regulator chips, each connected to the baseboard management controller via a corresponding I2C bus. After identifying the target voltage regulator chip, the adapter board's controller generates a connection request to it.

[0069] It should be noted that this embodiment does not restrict the method of determining the target voltage regulator chip. It can be selected sequentially from all voltage regulator chips according to the preset test order, or a specific voltage regulator chip can be specified as the target voltage regulator chip, depending on the specific implementation.

[0070] S11: Send a connection request to the substrate management controller via the second preset bus, so that the substrate management controller can obtain the data information of the target voltage regulator chip according to the connection request and send the data information to the controller via the second preset bus.

[0071] Furthermore, the controller sends a connection request to the baseboard management controller via the second preset bus. Upon receiving the connection request, the baseboard management controller determines the data information of the target voltage regulator chip required by the controller based on the connection request, then acquires the data information of the target voltage regulator chip, and sends the data information to the controller via the second preset bus.

[0072] It should be noted that this embodiment does not restrict the communication protocol between the controller and the baseboard management controller, nor does it restrict the specific content of the data information; it depends on the specific implementation.

[0073] S12: Send data information to the voltage regulator chip debugging tool through the first preset bus so that the voltage regulator chip debugging tool can communicate and debug the target voltage regulator chip according to the data information.

[0074] Finally, after receiving the data information from the target voltage regulator chip, the controller converts it into a signal format of the first preset bus and sends the data information to the voltage regulator chip debugging tool through the first preset bus. This allows the voltage regulator chip debugging tool to communicate with and debug the target voltage regulator chip based on the data information, thereby realizing the debugging of the target voltage regulator chip.

[0075] This embodiment provides a voltage regulator chip debugging adapter board for programming the firmware of a voltage regulator chip and troubleshooting output voltage faults in the voltage regulator chip. The voltage regulator chip debugging adapter board connects to a voltage regulator chip debugging tool via a first preset bus and to the motherboard's baseboard management controller via a second preset bus. Since the motherboard has an external second preset bus interface, no adjustments to the motherboard's chassis environment are required when connecting the voltage regulator chip debugging adapter board to the baseboard management controller, simplifying operation. The debugging process of the voltage regulator chip is entirely controlled by the voltage regulator chip debugging adapter board, eliminating the need for remote programming of the voltage regulator chip firmware version, resulting in high stability. Furthermore, when troubleshooting output voltage faults, multimeters and oscilloscopes are not required, significantly improving debugging efficiency.

[0076] Based on the above embodiments, in some embodiments, a connection request is sent to the baseboard management controller via a second preset bus, including:

[0077] S101: Based on a preset communication protocol, a connection request is sent to the baseboard management controller via a second preset bus; wherein, the format of the preset communication protocol is a frame header, function code, command bit, address bit, data bit, check bit, and frame tail.

[0078] Correspondingly, the substrate management controller sends data information to the controller via the second preset bus, including:

[0079] S102: The substrate management controller sends data information to the controller via a second preset bus based on a preset communication protocol.

[0080] To better transmit connection requests and data information, a preset communication protocol is set for the controller and the baseboard management controller in this embodiment, as follows:

[0081] Table 1. Preset Communication Protocol Formats between the Controller and the Baseboard Management Controller

[0082]

[0083] As shown in Table 1, the preset communication protocol format consists of a frame header, function code, command bits, address bits, data bits, checksum, and frame trailer. During the connection request and data information transmission between the controller and the baseboard management controller, data interaction is performed based on the preset communication protocol format in Table 1. The following provides a detailed explanation of each part of the preset communication protocol:

[0084] Function Code: 0x00 represents a request, 0x01 represents a response. Command Bit: 0x00 represents I2C bus number 0, 0x01 represents I2C bus number 1, and so on. It should be noted that the I2C bus number here refers to the I2C bus number connected to the baseboard management controller and the voltage regulator chip; each I2C bus corresponds to a different voltage regulator chip. Address Bit: 0x01 represents the device at address 01, 0x02 represents the device at address 02, and so on. When the command bit is 0xFF, it indicates the end of the request. Data Bits: Defines a quantity of N (N is a natural number) of data bits, starting from 0x00. If there is no data, this bit will be 0xFF. Parity Bit: Inverted from the data bits. 0x01 is parity 0xFE, 0x0A is parity 0xF5. If the data bits and parity bit do not meet the requirements, it indicates that the data has been interfered with and will not be received.

[0085] In this embodiment, by setting a preset communication protocol between the controller and the baseboard management controller, it is possible to ensure that connection requests and data information are transmitted in an orderly manner during the transmission process, thereby avoiding data loss or errors.

[0086] Figure 3 This is a topology diagram of a voltage regulator chip debugging adapter board provided in an embodiment of the present invention. Figure 3 As shown, the voltage regulator chip debugging adapter board also includes: buttons and DIP switches;

[0087] Both the buttons and DIP switches are connected to the controller;

[0088] Specifically, the button is a debug trigger button. When pressed, the motherboard's baseboard management controller and the adapter board's controller begin communication. The DIP switch is used to manually adjust the I2C bus sequence number to be communicated, which means manually adjusting the voltage regulator chip to be communicated; after obtaining the I2C bus sequence number, the controller obtains the address and communicates according to that sequence number.

[0089] Correspondingly, the target voltage regulator chip to be debugged in the motherboard is identified, and a connection request to the target voltage regulator chip is generated, including:

[0090] S111: Set the target preset bus number based on the DIP switch;

[0091] S112: Determine if the DIP switch is set correctly; if not, return to step S111; if yes, proceed to step S113.

[0092] S113: Determine the corresponding target voltage regulator chip in the motherboard according to the set target preset bus number, and generate a connection request to the target voltage regulator chip.

[0093] Correspondingly, a connection request is sent to the baseboard management controller via the second preset bus, including:

[0094] S114: Enable the control button and notify the board management controller to stop printing debugging information;

[0095] S115: Initiate data transmission to the board management controller and send a connection request to the board management controller.

[0096] In practical implementation, when it is necessary to program the voltage regulator chip firmware or troubleshoot the voltage regulator chip, the target preset bus number is first set based on the DIP switch. It can be understood that the target preset bus number is actually the I2C bus number corresponding to the target voltage regulator chip, through which the target voltage regulator chip connects to the baseboard management controller. When this target preset bus number is set, it is assumed that subsequent communication and debugging of the target voltage regulator chip will be required. Further checks are then performed to determine if the DIP switch setting is correct. This embodiment does not limit the specific method for determining whether the DIP switch setting is correct. For example, it can be determined based on a file containing the correspondence between the voltage regulator chip and the preset bus number, or other methods can be used, depending on the specific implementation.

[0097] If the DIP switch setting is confirmed to be incorrect, return to the step of setting the target preset bus number based on the DIP switch to reselect the correct target preset bus number. If the DIP switch setting is confirmed to be correct, determine the corresponding target voltage regulator chip on the motherboard based on the set target preset bus number, and generate a connection request for the target voltage regulator chip.

[0098] Furthermore, since the button is a trigger signal, the adapter board's controller will not send a connection request to the motherboard's baseboard management controller when it is not pressed. The motherboard's baseboard management controller's serial port is typically designed to continuously print debugging information for timely analysis in case of problems. Also, due to the different protocol formats of the controller and the baseboard management controller, the debugging information transmitted from the motherboard's baseboard management controller to the adapter board controller will be intercepted. Therefore, after the control button is enabled, the controller will first notify the motherboard's baseboard management controller to stop printing debugging information, simultaneously initiate data transmission to the baseboard management controller, and send a connection request to the baseboard management controller.

[0099] In this embodiment, by setting DIP switches and buttons in the voltage regulator chip debugging adapter board, the target voltage regulator chip to be debugged can be conveniently selected, and at the same time, data transmission to the baseboard management controller is initiated, and a connection request is sent to the baseboard management controller, ensuring the accurate execution of the target voltage regulator chip debugging.

[0100] Based on the above embodiments, in some embodiments, the voltage regulator chip debugging adapter board further includes: indicator lights;

[0101] The indicator light is connected to the controller;

[0102] Correspondingly, determining whether the DIP switch is set correctly includes:

[0103] S116: Determine whether the illumination status of the indicator light corresponds to the set target preset bus number; if yes, confirm that the DIP switch setting is correct; if no, confirm that the DIP switch setting is incorrect.

[0104] In practical implementation, in order to quickly confirm whether the manually adjusted target preset bus number is set correctly, such as... Figure 3 As shown, the voltage regulator chip debugging adapter board also includes indicator lights, which are connected to the controller. It should be noted that the indicator lights are controlled by the controller to display the target preset bus number it has acquired.

[0105] Correspondingly, when determining whether the DIP switch is set correctly, one can specifically check whether the indicator light's illumination corresponds to the set target preset bus number; if so, the DIP switch setting is confirmed to be correct; if not, the DIP switch setting is confirmed to be incorrect. The following example illustrates the debugging process of the target voltage regulator chip:

[0106] After the adapter board's controller receives the target preset bus number requested by the current DIP switch, it illuminates the corresponding indicator light. When the button is pressed, the adapter board's controller receives a low-level signal and then sends a connection request for the target preset bus number to the motherboard's baseboard management controller. Example request for I2C bus number 07:

[0107] 0xFF 0x00 0x07 0xFF;

[0108] The beginning of the bus is 0xFF, indicating the start; 0x00 indicates a request; 0x07 indicates bus number 07; and the end of the bus is 0xFF, indicating the end.

[0109] After receiving a connection request from the adapter board's controller, the motherboard's baseboard management controller first stops printing serial port information for debugging. Then, according to the preset communication protocol, it sequentially sends the devices and data connected to the I2C bus number to the adapter board's controller. For example, transmitting data for device I2C bus number 07, with 3 connected devices and 2 data bits per device:

[0110] 0xFF 0x01 0x07 0x00 0x00 0xFF 0x0A 0xF5 0x01 0x02 0xFD 0x03 0xFC 0x020x03 0xFC 0x01 0xFE 0xFF;

[0111] The sequence is as follows: 0xFF indicates the start; 0x01 indicates the reply; 0x07 indicates bus number 07; 0x00 indicates address 00, 0x00 indicates data 1, 0xFF indicates data 1 checksum, 0x0A indicates data 2, 0xF5 indicates data 2 checksum; 0x01 indicates address 01, 0x02 indicates data 1, 0xFD indicates data 1 checksum, 0x03 indicates data 2, 0xFC indicates data 2 checksum; 0x02 indicates address 02, 0x03 indicates data 1, 0xFC indicates data 1 checksum, 0x01 indicates data 2, 0xFE indicates data 2 checksum; 0xFF indicates the end.

[0112] Based on the above embodiments, in some embodiments, after the baseboard management controller sends data information to the controller via a second preset bus based on a preset communication protocol, the method further includes:

[0113] S121: Determine if the data information is correct based on the data bits and check bits in the data information; if the data information is confirmed to be correct, proceed to step S12; if the data information is confirmed to be incorrect, then...

[0114] S122: Send a request to the substrate management controller to indicate that the data information has been reacquired.

[0115] To ensure accurate debugging of the target voltage regulator chip, the accuracy of its data information must be guaranteed. Therefore, after receiving data from the baseboard management controller, the controller needs to determine the correctness of the data based on the data bits and check bits. As described in the above embodiment, the check bit is inverted compared to the data bits; 0x01 is 0xFE, and 0x0A is 0xF5. If the data bits and check bits do not meet the requirements, it indicates that the data has been interfered with and will not be received. Therefore, if the data information is confirmed to be correct, the process proceeds to sending the data information to the voltage regulator chip debugging tool via the first preset bus. If the data information is confirmed to be incorrect, a request to re-acquire the data information needs to be sent to the baseboard management controller so that the baseboard management controller can resend the target voltage regulator chip's data information, thereby ensuring the accurate execution of the target voltage regulator chip debugging.

[0116] Based on the above embodiments, in some embodiments, after sending data information to the voltage regulator chip debugging tool via the first preset bus, the method further includes:

[0117] S131: Monitor the debugging results sent by the voltage regulator chip debugging tool through the first preset bus;

[0118] S132: When a debugging result indicating an output voltage fault is received, the control indicator light outputs a prompt message indicating an output voltage fault.

[0119] To facilitate user access to the debugging results of the voltage regulator chip, in this embodiment, after data information is sent to the voltage regulator chip debugging tool via a first preset bus, the debugging tool debugs the target voltage regulator chip based on the data information. During the debugging process, the controller continuously monitors the debugging results sent by the voltage regulator chip debugging tool via the first preset bus. This embodiment does not limit the debugging results; for example, it may include debugging results indicating successful debugging, debugging results indicating a voltage fault, and debugging results indicating debugging errors, depending on the specific implementation.

[0120] When a debugging result indicating an output voltage fault is received, the control indicator light outputs a prompt message indicating the output voltage fault, so that the user can promptly obtain information that the target voltage regulator chip has an output voltage fault and take maintenance measures.

[0121] For example, after determining that the target voltage regulator chip has an output voltage fault, check the power input and load conditions to ensure that the power input voltage of the target voltage regulator chip is within the specified range and that the connected load meets its rated load range. If the output voltage drops, you can try adding an output capacitor to stabilize the output voltage. You can also adjust the parameters of the target voltage regulator chip, such as the undervoltage protection threshold and overcurrent protection threshold, according to the specific application requirements to optimize its performance and ensure the normal operation of the target voltage regulator chip.

[0122] Based on the above embodiments, in some embodiments, the voltage regulator chip debugging adapter board further includes: a controller firmware programming connector; and a preset interface of the controller connected to the controller firmware programming connector. This embodiment does not limit the preset interface; for example, it can be a Joint Test Action Group (JTAG) interface. Correspondingly, in specific implementations, preset firmware can be programmed into the controller via the controller firmware programming connector. It should be noted that programming different controller firmware versions via the controller firmware programming connector for debugging can adapt to different models of baseboard management controller chips, greatly improving the practicality of the adapter board.

[0123] In the above embodiments, the voltage regulator chip debugging method has been described in detail. The present invention also provides embodiments of the voltage regulator chip debugging device.

[0124] Figure 4 This is a schematic diagram of a voltage regulator chip debugging device provided in an embodiment of the present invention. The device is applied to a voltage regulator chip debugging adapter board; the voltage regulator chip debugging adapter board includes a controller and pin headers; the controller is connected to the pin headers via a first preset bus, and the pin headers are connected to a voltage regulator chip debugging tool via the first preset bus; the controller is connected to the motherboard's substrate management controller via a second preset bus; wherein, the motherboard is provided with an external second preset bus interface; as shown... Figure 4 As shown, the device includes:

[0125] The determination module 10 is used to determine the target voltage regulator chip to be debugged in the motherboard and generate a connection request to the target voltage regulator chip.

[0126] The first transmitting module 11 is used to send a connection request to the substrate management controller via the second preset bus, so that the substrate management controller can obtain the data information of the target voltage regulator chip according to the connection request and send the data information to the controller via the second preset bus.

[0127] The second sending module 12 is used to send data information to the voltage regulator chip debugging tool through the first preset bus, so that the voltage regulator chip debugging tool can communicate and debug the target voltage regulator chip according to the data information.

[0128] In some embodiments, the first transmitting module 11 includes:

[0129] The first transmitting submodule is used to send a connection request to the baseboard management controller via a second preset bus based on a preset communication protocol; wherein the preset communication protocol is formatted as frame header, function code, command bits, address bits, data bits, check bits, and frame trailer.

[0130] Correspondingly, the substrate management controller sends data information to the controller via the second preset bus, specifically based on a preset communication protocol, and sends data information to the controller via the second preset bus.

[0131] In some embodiments, the voltage regulator chip debugging adapter board further includes: buttons and DIP switches;

[0132] Both the buttons and DIP switches are connected to the controller;

[0133] Correspondingly, module 10 is defined, including:

[0134] The setting submodule is used to set the target preset bus number based on the DIP switch;

[0135] The first judgment submodule is used to determine whether the DIP switch is set correctly; if it is confirmed that the DIP switch is set incorrectly, the setting submodule is triggered; if it is confirmed that the DIP switch is set correctly, the first determination submodule is triggered.

[0136] The first determination submodule is used to determine the corresponding target voltage regulator chip in the motherboard according to the set target preset bus number, and generate a connection request to the target voltage regulator chip.

[0137] Correspondingly, the first transmitting module 11 includes:

[0138] The control submodule is used to control button enable and notify the baseboard management controller to stop printing debugging information;

[0139] The startup submodule is used to initiate data transmission to the baseboard management controller and send a connection request to the baseboard management controller.

[0140] In some embodiments, the voltage regulator chip debugging adapter board further includes: indicator lights;

[0141] The indicator light is connected to the controller;

[0142] Correspondingly, the first judgment submodule includes:

[0143] The second judgment submodule is used to determine whether the illumination status of the indicator light corresponds to the set target preset bus number; if yes, it confirms that the DIP switch setting is correct; if no, it confirms that the DIP switch setting is incorrect.

[0144] In some embodiments, it also includes:

[0145] The third judgment submodule is used to determine whether the data information is correct based on the data bits and the check bits in the data information; if the data information is confirmed to be correct, the second sending module 12 is triggered; if the data information is confirmed to be incorrect, the second sending submodule is triggered.

[0146] The second sending submodule is used to send a request representing the reacquisition of data information to the baseboard management controller.

[0147] In some embodiments, it also includes:

[0148] The monitoring submodule is used to monitor the debugging results sent by the voltage regulator chip debugging tool through the first preset bus;

[0149] The prompt submodule is used to control the indicator light to output a prompt message indicating an output voltage fault when a debugging result indicating an output voltage fault is received.

[0150] In some embodiments, the voltage regulator chip debugging adapter board further includes: a controller firmware programming connector; the controller firmware programming connector is connected to a preset interface of the controller;

[0151] Correspondingly, the device also includes:

[0152] The programming submodule is used to program preset firmware onto the controller via the controller firmware programming connector.

[0153] Since the embodiments of the apparatus and the embodiments of the method correspond to each other, please refer to the description of the embodiments of the method for the embodiments of the apparatus, which will not be repeated here.

[0154] Figure 5 This is a schematic diagram of a voltage regulator chip debugging device provided in an embodiment of the present invention. Figure 5 As shown, the voltage regulator chip debugging equipment includes:

[0155] Memory 20 is used to store computer programs;

[0156] The processor 21 is used to implement the steps of the voltage regulator chip debugging method mentioned in the above embodiments when executing a computer program.

[0157] The voltage regulator chip debugging device provided in this embodiment may include, but is not limited to, smartphones, tablets, laptops, or desktop computers.

[0158] The processor 21 may include one or more processing cores, such as a quad-core processor or an octa-core processor. The processor 21 may be implemented using at least one of the following hardware forms: Digital Signal Processor (DSP), Field-Programmable Gate Array (FPGA), or Programmable Logic Array (PLA). The processor 21 may also include a main processor and a coprocessor. The main processor, also known as the Central Processing Unit (CPU), is used to process data in the wake-up state; the coprocessor is a low-power processor used to process data in the standby state. In some embodiments, the processor 21 may integrate a Graphics Processing Unit (GPU), which is responsible for rendering and drawing the content to be displayed on the screen. In some embodiments, the processor 21 may also include an Artificial Intelligence (AI) processor, which handles computational operations related to machine learning.

[0159] The memory 20 may include one or more computer-readable storage media, which may be non-transitory. The memory 20 may also include high-speed random access memory and non-volatile memory, such as one or more disk storage devices or flash memory devices. In this embodiment, the memory 20 is used to store at least the following computer program 201, which, after being loaded and executed by the processor 21, can implement the relevant steps of the voltage regulator chip debugging method disclosed in any of the foregoing embodiments. In addition, the resources stored in the memory 20 may also include an operating system 202 and data 203, and the storage method may be temporary or permanent storage. The operating system 202 may include Windows, Unix, Linux, etc. The data 203 may include, but is not limited to, the data involved in the voltage regulator chip debugging method.

[0160] In some embodiments, the voltage regulator chip debugging device may further include a display screen 22, an input / output interface 23, a communication interface 24, a power supply 25, and a communication bus 26.

[0161] Those skilled in the art will understand that Figure 5The structure shown does not constitute a limitation on voltage regulator chip debugging equipment and may include more or fewer components than shown.

[0162] Finally, the present invention also provides an embodiment corresponding to a computer-readable storage medium. The computer-readable storage medium stores a computer program, which, when executed by a processor, performs the steps described in the above method embodiments.

[0163] It is understood that if the methods in the above embodiments are implemented as software functional units and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present invention, in essence, or the part that contributes to the prior art, or all or part of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and executes all or part of the steps of the methods described in the various embodiments of the present invention. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks.

[0164] The present invention provides a detailed description of a voltage regulator chip debugging method, apparatus, device, and medium. The various embodiments are described in a progressive manner, with each embodiment focusing on its differences from other embodiments. Similar or identical parts between embodiments can be referred to interchangeably. For the apparatus disclosed in the embodiments, since it corresponds to the method disclosed in the embodiments, the description is relatively simple; relevant parts can be referred to in the method section. It should be noted that those skilled in the art can make various improvements and modifications to the present invention without departing from its principles, and these improvements and modifications also fall within the protection scope of the present invention.

[0165] It should also be noted that, in this specification, relational terms such as "first" and "second" are used only to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.

Claims

1. A method for debugging a voltage regulator chip, characterized in that, An adapter board for debugging voltage regulator chips is used; the adapter board includes a controller and pin headers; the controller is connected to the pin headers via a first preset bus, and the pin headers are connected to a voltage regulator chip debugging tool via the first preset bus; The controller is connected to the motherboard's baseboard management controller via a second preset bus; wherein the motherboard is provided with an external second preset bus interface; the method includes: Identify the target voltage regulator chip to be debugged in the motherboard and generate a connection request to the target voltage regulator chip; A connection request is sent to the substrate management controller via a second preset bus, so that the substrate management controller can obtain the data information of the target voltage regulator chip according to the connection request and send the data information to the controller via the second preset bus. Data information is sent to the voltage regulator chip debugging tool via a first preset bus, so that the voltage regulator chip debugging tool can communicate and debug the target voltage regulator chip based on the data information; The voltage regulator chip debugging adapter board also includes: buttons and DIP switches; Both the button and the DIP switch are connected to the controller; Correspondingly, determining the target voltage regulator chip to be debugged in the motherboard and generating a connection request for the target voltage regulator chip includes: The target preset bus number is set based on the DIP switch; Determine whether the DIP switch is set correctly; If it is confirmed that the DIP switch setting is incorrect, return to the step of setting the target preset bus number based on the DIP switch setting; If the DIP switch setting is confirmed to be correct, the target voltage regulator chip in the motherboard is determined according to the set target preset bus number, and a connection request to the target voltage regulator chip is generated. Correspondingly, sending a connection request to the baseboard management controller via the second preset bus includes: Enable the button and notify the baseboard management controller to stop printing debugging information; Initiate data transmission to the baseboard management controller and send a connection request to the baseboard management controller.

2. The voltage regulator chip debugging method according to claim 1, characterized in that, The step of sending a connection request to the baseboard management controller via the second preset bus includes: Based on a preset communication protocol, a connection request is sent to the baseboard management controller via a second preset bus; wherein, the format of the preset communication protocol is a frame header, function code, command bit, address bit, data bit, check bit, and frame trailer; Correspondingly, the substrate management controller sends data information to the controller via a second preset bus, including: The baseboard management controller sends data information to the controller via a second preset bus based on a preset communication protocol.

3. The voltage regulator chip debugging method according to claim 1, characterized in that, The voltage regulator chip debugging adapter board also includes: indicator lights; The indicator light is connected to the controller; Correspondingly, determining whether the DIP switch is set correctly includes: Determine whether the illumination status of the indicator light corresponds to the set target preset bus number; If so, then confirm that the DIP switch setting is correct; If not, then the DIP switch setting is incorrect.

4. The voltage regulator chip debugging method according to claim 2, characterized in that, After the baseboard management controller sends data information to the controller via a second preset bus based on a preset communication protocol, the system further includes: Determine whether the data information is correct based on the data bits and check bits in the data information; If the data information is confirmed to be correct, proceed to the step of sending data information to the voltage regulator chip debugging tool via the first preset bus; If the data is confirmed to be incorrect, a request to reacquire the data is sent to the substrate management controller.

5. The voltage regulator chip debugging method according to claim 3, characterized in that, After sending data information to the voltage regulator chip debugging tool via the first preset bus, the method further includes: Monitor the debugging results sent by the voltage regulator chip debugging tool through the first preset bus; When a debugging result indicating an output voltage fault is received, the indicator light is controlled to output a prompt message indicating an output voltage fault.

6. The voltage regulator chip debugging method according to any one of claims 1 to 5, characterized in that, The voltage regulator chip debugging adapter board also includes: a controller firmware programming connector; the controller firmware programming connector is connected to a preset interface of the controller; Correspondingly, the method also includes: The controller is programmed with preset firmware via the controller firmware programming connector.

7. A voltage regulator chip debugging device, characterized in that, An adapter board for debugging voltage regulator chips is used; the adapter board includes a controller and pin headers; the controller is connected to the pin headers via a first preset bus, and the pin headers are connected to a voltage regulator chip debugging tool via the first preset bus; The controller is connected to the motherboard's baseboard management controller via a second preset bus; wherein the motherboard is provided with an external second preset bus interface; the device includes: The determination module is used to determine the target voltage regulator chip to be debugged in the motherboard and generate a connection request to the target voltage regulator chip; The first transmitting module is used to send a connection request to the substrate management controller via a second preset bus, so that the substrate management controller can obtain the data information of the target voltage regulator chip according to the connection request and send the data information to the controller via the second preset bus. The second sending module is used to send data information to the voltage regulator chip debugging tool through the first preset bus, so that the voltage regulator chip debugging tool can communicate and debug the target voltage regulator chip according to the data information; The voltage regulator chip debugging adapter board also includes: buttons and DIP switches; Both the button and the DIP switch are connected to the controller; Correspondingly, the determining module includes: A setting submodule is used to set a target preset bus number based on the DIP switch; The first judgment submodule is used to determine whether the DIP switch is set correctly; if it is confirmed that the DIP switch is set incorrectly, the setting submodule is triggered; if it is confirmed that the DIP switch is set correctly, the first determination submodule is triggered. The first determining submodule is used to determine the target voltage regulator chip in the motherboard according to the set target preset bus number, and generate a connection request to the target voltage regulator chip. Correspondingly, the first sending module includes: The control submodule is used to enable the button and notify the baseboard management controller to stop printing debugging information; The startup submodule is used to initiate data transmission to the baseboard management controller and send a connection request to the baseboard management controller.

8. A voltage regulator chip debugging device, characterized in that, include: Memory, used to store computer programs; A processor, configured to implement the steps of the voltage regulator chip debugging method as described in any one of claims 1 to 6 when executing the computer program.

9. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores a computer program that, when executed by a processor, implements the steps of the voltage regulator chip debugging method as described in any one of claims 1 to 6.

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