Low-proportion full-bridge hybrid MMC fault ride-through control method and system

Abstract

The invention discloses a low-proportion full-bridge hybrid MMC fault ride-through control method and system, and relates to the technical field of direct current transmission, and the method comprises the steps: responding to a received fault ride-through control request, obtaining the steady-state working condition parameters of a hybrid MMC, and controlling a half-bridge sub-module bypass of the hybrid MMC, thereby achieving the fault ride-through control of the hybrid MMC. Performing limit value processing on a preset capacitor voltage reference curve by adopting the steady-state working condition parameters to obtain a target capacitor voltage reference curve, and determining an alternating current modulation instruction corresponding to each fault self-clearing sub-module in the hybrid MMC according to the target capacitor voltage reference curve and a preset steady-state control model, and performing non-locking fault ride-through control on the associated fault self-clearing sub-module by adopting each alternating current modulation instruction. The technical problems that an existing low-proportion full-bridge hybrid MMC control strategy enables each full-bridge sub-module in the MMC to share higher voltage, overvoltage is likely to be generated, and the operation reliability of the hybrid MMC is reduced are solved.

Description

Technical Field

[0001] The present invention relates to the technical field of direct current transmission, and in particular to a hybrid MMC fault ride-through control method and system for a low-ratio full-bridge. Background Art

[0002] In recent years, flexible DC transmission technology based on modular multilevel converter (MMC) has played its advantages in large-capacity, long-distance multi-terminal transmission occasions, and has become the preferred topology for building multi-terminal DC power grids in the future. However, in order to achieve requirements such as fault ride-through and valve group input and output, hybrid MMC has a core constraint that the ratio of full-bridge submodules must not be less than 50%. However, the number of IGBTs in FBSM is twice that of HBSM, and the operating loss is about 1.7 times that of HBSM, which makes the cost of semi-full hybrid MMC still relatively high. Therefore, it is crucial to solve the cost and loss caused by the excessive proportion of FBSM.

[0003] At present, the cost and loss problems caused by the high proportion of FBSM are mainly solved from two aspects: topology or control strategy. In terms of topology transformation, a HFH-MMC is proposed, which reduces the amount of FBSM by 50% compared with the hybrid MMC with a full-bridge proportion of 50%. An EFB-MMC is also proposed, which can reduce the cost by 23.7% and can pass through without blocking by parallel nesting the bridge arm with some half-bridge valve sections in the bridge arm. In terms of control strategy improvement, by increasing reactive power or injecting low-frequency current, the corresponding DC step-down operation value when the bridge arm zero-crossing disappears is reduced, and the FBSM proportion demand for step-down operation is reduced, or the short-term boost capability of the sub-module capacitor is used to raise the capacitor voltage for a short time (millisecond level), so that the MMC with a full-bridge proportion of less than 50% has the non-blocking fault crossing capability of the MMC with a full-bridge proportion of 50%. However, in this scheme, each full-bridge sub-module will share a higher voltage, which is easy to produce overvoltage, reducing the reliability of the hybrid MMC operation. Summary of the invention

[0004] The present invention provides a hybrid MMC fault ride-through control method and system of a low-ratio full-bridge, which solves the technical problem that the existing hybrid MMC control strategy of a low-ratio full-bridge causes each full-bridge sub-module in the MMC to share a higher voltage, easily generates overvoltage, and reduces the reliability of the hybrid MMC operation.

[0005] A first aspect of the present invention provides a hybrid MMC fault ride-through control method for a low-ratio full-bridge, comprising:

[0006] In response to the received fault ride-through control request, obtaining steady-state operating parameters of the hybrid MMC, and controlling the bypass of the half-bridge submodule of the hybrid MMC;

[0007] The preset capacitor voltage reference curve is subjected to limit processing by using the steady-state operating condition parameters to obtain a target capacitor voltage reference curve;

[0008] Determining, according to the target capacitor voltage reference curve and a preset steady-state control model, an AC modulation instruction corresponding to each fault self-clearing submodule in the hybrid MMC;

[0009] Each of the AC modulation instructions is used to perform non-lockout fault ride-through control on the associated fault self-clearing submodule.

[0010] Optionally, the steady-state operating parameters include a full-bridge ratio and a steady-state submodule capacitor voltage, and the step of using the steady-state operating parameters to perform limit processing on a preset capacitor voltage reference curve to obtain a target capacitor voltage reference curve includes:

[0011] Performing ratio processing on a preset limit coefficient and the full-bridge ratio to obtain a first ratio;

[0012] The first ratio is multiplied by the steady-state submodule capacitor voltage to obtain a full-bridge submodule capacitor voltage limit;

[0013] The capacitor voltage limit is used to perform limit processing on a preset capacitor voltage reference curve to obtain a target capacitor voltage reference curve.

[0014] Optionally, the steady-state control model includes a first controller and a second controller, and the step of determining the AC modulation instructions corresponding to each fault self-clearing submodule in the hybrid MMC according to the target capacitor voltage reference curve and the preset steady-state control model includes:

[0015] Extracting a target capacitor voltage reference value at the current moment from the target capacitor voltage reference curve according to the current moment;

[0016] The target capacitor voltage reference value, the capacitor voltage of each module acquired in advance, and the reactive power of each module are respectively subjected to dual-loop optimization control by the first controller to obtain voltage reference component parameters corresponding to each fault self-clearing submodule in the hybrid MMC;

[0017] The second controller performs fault optimization control on each of the voltage reference component parameters and each of the pre-acquired bridge arm DC currents to obtain an AC modulation instruction corresponding to each of the fault self-clearing submodules.

[0018] Optionally, the first controller includes an active outer loop controller, a reactive outer loop controller and an inner loop controller, and the step of performing dual-loop optimization control on the target capacitor voltage reference value, the pre-acquired capacitor voltages of each module and the reactive power of each module by the first controller to obtain voltage reference component parameters corresponding to each fault self-clearing submodule in the hybrid MMC includes:

[0019] respectively using the active outer loop controller to perform capacitor voltage optimization control on the target capacitor voltage reference value and the capacitor voltages of each module acquired in advance, to obtain the first module current component corresponding to each fault self-clearing submodule in the hybrid MMC;

[0020] The reactive outer loop controller is used to perform reactive optimization control on a preset reactive reference value and a pre-acquired module reactive power, respectively, to obtain a second module current component corresponding to the fault self-clearing submodule;

[0021] The inner loop controller is used to perform voltage stabilization optimization control on the first module current component and the second module current component associated with each of the fault self-clearing submodules, respectively, to obtain voltage reference component parameters corresponding to each of the fault self-clearing submodules.

[0022] Optionally, the second controller includes a DC current controller, a circulating current suppressor and a fault ride-through controller, and the steps of respectively performing fault optimization control on each of the voltage reference component parameters and each of the pre-acquired bridge arm DC currents through the second controller to obtain an AC modulation instruction corresponding to each of the fault self-clearing submodules include:

[0023] The DC current controller performs current optimization control on the preset current reference value and the pre-acquired DC current of each bridge arm respectively, so as to obtain the DC reference voltage corresponding to each fault self-clearing submodule;

[0024] The circulating current suppressor is respectively used to perform a circulating current suppression operation on the current-related quantities of each module obtained in advance, so as to obtain a circulating current reference voltage corresponding to each fault self-clearing submodule;

[0025] The fault-ride-through controller is respectively used to perform fault optimization control on the voltage reference component parameters, the DC reference voltage and the circulating current reference voltage associated with the fault self-clearing submodules to obtain the AC modulation instructions corresponding to each of the fault self-clearing submodules.

[0026] Optionally, the step of respectively using each of the AC modulation instructions to perform non-lockout fault ride-through control on the associated fault self-clearing submodules includes:

[0027] Sending each of the AC modulation instructions to the associated fault self-clearing submodules respectively, so that each of the fault self-clearing submodules executes in response to the AC modulation instructions and outputs the AC modulation voltage after execution;

[0028] Acquire the faulty DC line current of the hybrid MMC in real time, and determine whether the faulty DC line current is less than or equal to a preset fault clearing threshold;

[0029] When the fault DC line current is greater than the fault clearing threshold, the step of determining the AC modulation instructions corresponding to each fault self-clearing sub-module in the hybrid MMC according to the target capacitor voltage reference curve and the preset steady-state control model is jumped to execution until the fault DC line current is less than or equal to the fault clearing threshold.

[0030] A second aspect of the present invention provides a low-ratio full-bridge hybrid MMC fault ride-through control system, comprising:

[0031] An acquisition module, configured to obtain steady-state operating parameters of the hybrid MMC in response to a received fault ride-through control request, and control a half-bridge submodule bypass of the hybrid MMC;

[0032] A limit module, used to perform limit processing on a preset capacitor voltage reference curve using the steady-state operating condition parameters to obtain a target capacitor voltage reference curve;

[0033] A steady-state control module, used to determine the AC modulation instructions corresponding to each fault self-clearing submodule in the hybrid MMC according to the target capacitor voltage reference curve and a preset steady-state control model;

[0034] The fault ride-through control module is used to respectively use each of the AC modulation instructions to perform non-lockout fault ride-through control on the associated fault self-clearing submodules.

[0035] A third aspect of the present invention provides an electronic device, comprising a memory and a processor, wherein the memory stores a computer program, and when the computer program is executed by the processor, the processor executes the steps of the hybrid MMC fault ride-through control method of a low-ratio full-bridge as described in any one of the above items.

[0036] A fourth aspect of the present invention provides a computer-readable storage medium having a computer program stored thereon, wherein when the computer program is executed, the hybrid MMC fault ride-through control method for a low-ratio full-bridge as described in any one of the above items is implemented.

[0037] A fifth aspect of the present invention provides a computer program product, which includes a computer program stored on a non-transitory computer-readable storage medium, and the computer program includes program instructions, wherein when the program instructions are executed by a computer, the computer executes the hybrid MMC fault-crossing control method for a low-ratio full-bridge as described in any one of the above items.

[0038] It can be seen from the above technical solutions that the present invention has the following advantages:

[0039] The present invention uses a steady-state operating condition parameter to limit a preset capacitor voltage reference curve when a hybrid MMC fails, obtains a target capacitor voltage reference curve, and then regulates the fault self-clearing submodule in the hybrid MMC according to the target capacitor voltage reference curve and a preset steady-state control model, ensuring that the fault self-clearing submodule does not exceed the limit, overcoming the technical problem that the existing low-ratio full-bridge hybrid MMC control strategy causes each full-bridge submodule in the MMC to share a higher voltage, easily generating overvoltage, and reducing the reliability of the hybrid MMC operation. Compared with the traditional hybrid MMC control strategy, the present invention regulates the capacitor voltage reference value during the fault period in real time through the target capacitor voltage reference curve, controls the submodule capacitor voltage within a safe range, avoids overvoltage in the full-bridge submodule, and improves the reliability of the hybrid MMC operation. BRIEF DESCRIPTION OF THE DRAWINGS

[0040] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative labor.

[0041] Figure 1 A flow chart of the steps of a hybrid MMC fault ride-through control method for a low-ratio full-bridge provided in Embodiment 1 of the present invention;

[0042] Figure 2 A flow chart of the steps of a hybrid MMC fault ride-through control method for a low-ratio full-bridge provided in Embodiment 2 of the present invention;

[0043] Figure 3 A schematic diagram of a bridge arm voltage waveform during a DC fault clearing period provided in the second embodiment of the present invention;

[0044] Figure 4 A schematic diagram of a capacitor boosting process of a full-bridge submodule provided in Embodiment 2 of the present invention;

[0045] Figure 5A schematic diagram of a target capacitor voltage reference curve provided in Embodiment 2 of the present invention;

[0046] Figure 6 A schematic diagram of the structure of a steady-state control model provided in the second embodiment of the present invention;

[0047] Figure 7 A structural block diagram of a hybrid MMC fault ride-through control system of a low-ratio full-bridge provided in Embodiment 3 of the present invention;

[0048] Figure 8 This is a structural block diagram of an electronic device provided in Embodiment 4 of the present invention. DETAILED DESCRIPTION

[0049] The embodiment of the present invention provides a hybrid MMC fault ride-through control method and system of a low-ratio full-bridge, which is used to solve the technical problem that the existing low-ratio full-bridge hybrid MMC control strategy causes each full-bridge sub-module in the MMC to share a higher voltage, easily generates overvoltage, and reduces the reliability of the hybrid MMC operation.

[0050] In order to make the purpose, features and advantages of the present invention more obvious and easy to understand, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the embodiments described below are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0051] See also Figure 1 , Figure 1 A flow chart of the steps of a hybrid MMC fault ride-through control method for a low-ratio full-bridge provided in Embodiment 1 of the present invention.

[0052] The present invention provides a hybrid MMC fault ride-through control method for a low-ratio full-bridge, comprising:

[0053] Step 101: In response to a received fault ride-through control request, a steady-state operating parameter of the hybrid MMC is obtained, and a half-bridge submodule of the hybrid MMC is controlled to be bypassed;

[0054] It should be noted that the fault ride-through control request refers to the early warning signal issued by the system when a DC fault occurs in the hybrid MMC of the low-ratio full-bridge.

[0055] The steady-state operating parameters refer to the sub-module capacitor voltage and the full-bridge sub-module ratio when the hybrid MMC is in steady state.

[0056] In the embodiment of the present invention, when a fault ride-through control request is received, steady-state operating parameters of the hybrid MMC are acquired, and the half-bridge submodule in the hybrid MMC is controlled to be bypassed.

[0057] It should be noted that the hybrid MMC includes multiple half-bridge sub-modules and fault self-clearing sub-modules. Among them, the half-bridge sub-module: only has positive level and zero level output capabilities, and the fault self-clearing sub-module: is composed of full-bridge sub-modules with positive level, zero level and negative level output capabilities. The half-bridge sub-module does not have the ability to self-clear faults, its cost is the lowest, and the sub-module accounts for more than 50%. The fault self-clearing sub-module can achieve negative input and has the ability to provide negative pressure. Its cost is higher than that of the half-bridge sub-module, and the full-bridge sub-module accounts for less than 50%.

[0058] Step 102: Use steady-state operating parameters to perform limit processing on a preset capacitor voltage reference curve to obtain a target capacitor voltage reference curve;

[0059] In an embodiment of the present invention, a preset capacitor voltage limit function is input according to steady-state operating parameters to obtain a full-bridge sub-module capacitor voltage limit, and a preset capacitor voltage reference curve is limited based on the full-bridge sub-module capacitor voltage limit to obtain a target capacitor voltage reference curve.

[0060] It should be noted that the capacitor voltage limit function is specifically:

[0061]

[0062] in, is the full-bridge submodule capacitor voltage limit, is the full-bridge submodule ratio, is the steady-state submodule capacitor voltage, It is the ratio of the rated voltage of the full bridge after boosting to the voltage of all sub-module capacitors in steady state.

[0063] Step 103: determining the AC modulation instructions corresponding to each fault self-clearing submodule in the hybrid MMC according to the target capacitor voltage reference curve and the preset steady-state control model;

[0064] In an embodiment of the present invention, the target capacitor voltage reference value at the current moment is extracted from the target capacitor voltage reference curve, and the target capacitor voltage reference value and the pre-acquired capacitor voltages of each module, the reactive power of each module and the DC current of each bridge arm are optimized and controlled to obtain the AC modulation instructions corresponding to each fault self-clearing sub-module in the hybrid MMC.

[0065] Step 104 , respectively use each AC modulation instruction to perform non-lockout fault ride-through control on the associated fault self-clearing submodule.

[0066] In the embodiment of the present invention, each AC modulation instruction is used to perform non-lockout fault ride-through control on the associated fault self-clearing submodule, so that the faulty DC line current passes through zero, thereby achieving DC fault clearing.

[0067] In the embodiment of the present invention, when a hybrid MMC fails, the preset capacitor voltage reference curve is limited by using steady-state operating parameters to obtain a target capacitor voltage reference curve, and then the fault self-clearing submodule in the hybrid MMC is regulated according to the target capacitor voltage reference curve and the preset steady-state control model, ensuring that the fault self-clearing submodule does not exceed the limit, overcoming the technical problem that the existing low-ratio full-bridge hybrid MMC control strategy will cause each full-bridge submodule in the MMC to share a higher voltage, easily generating overvoltage, and reducing the reliability of the operation of the hybrid MMC. Compared with the traditional hybrid MMC control strategy, the present invention regulates the capacitor voltage reference value during the fault period in real time through the target capacitor voltage reference curve, controls the submodule capacitor voltage within a safe range, avoids overvoltage in the full-bridge submodule, and improves the reliability of the operation of the hybrid MMC.

[0068] See also Figure 2 , Figure 2 A flow chart of the steps of a hybrid MMC fault ride-through control method for a low-ratio full-bridge provided in Embodiment 2 of the present invention.

[0069] The present invention provides a hybrid MMC fault ride-through control method for a low-ratio full-bridge, comprising:

[0070] Step 201: In response to the received fault ride-through control request, obtain steady-state operating parameters of the hybrid MMC, and control the bypass of the half-bridge submodule of the hybrid MMC;

[0071] In the embodiment of the present invention, when a fault ride-through control request is received, steady-state operating parameters of the hybrid MMC are acquired, and the half-bridge submodule bypass in the hybrid MMC is controlled.

[0072] It is worth mentioning that when the hybrid MMC is in normal operation, the bridge arm voltage is obtained according to the AC modulation voltage, DC voltage and circulating current suppression voltage, and all sub-modules of each bridge arm are sorted together, and the sub-module is determined to be in the input or bypass state according to the required sub-module input mode and the bridge arm current direction. Since the two types of sub-modules are sorted together, the voltages of the two types of sub-modules are balanced during normal operation.

[0073] Step 202: Use steady-state operating parameters to perform limit processing on a preset capacitor voltage reference curve to obtain a target capacitor voltage reference curve;

[0074] Further, the steady-state operating parameters include the full-bridge ratio and the steady-state submodule capacitor voltage, and step 202 includes the following sub-steps:

[0075] S11, performing ratio processing on the preset limit coefficient and the full-bridge ratio to obtain a first ratio;

[0076] S12, multiplying the first ratio by the steady-state submodule capacitor voltage to obtain a full-bridge submodule capacitor voltage limit;

[0077] In an embodiment of the present invention, the ratio between the preset limit coefficient and the full-bridge ratio is calculated to obtain a first ratio, and the multiplication value between the first ratio and the steady-state submodule capacitor voltage is calculated to obtain the full-bridge submodule capacitor voltage limit.

[0078] S13, using the capacitor voltage limit to perform limit processing on the preset capacitor voltage reference curve to obtain a target capacitor voltage reference curve.

[0079] In the embodiment of the present invention, a capacitor voltage limit value is used to perform limit value calibration on a pre-designed capacitor voltage reference curve to obtain a target capacitor voltage reference curve.

[0080] It should be noted that according to the operation principle of the hybrid MMC of the low-ratio full bridge, after the fault is detected at time t1, the MMC switches to constant DC current control and stator module capacitor voltage control. arm 、Current i arm In the bridge arms that are all negative, the capacitor voltage of FBSM increases the most, and the voltage increase of FBSM is:

[0081]

[0082] In the formula, is the energy increase value of the bridge arm, Δt is the boost time, U cn is the stator module capacitor voltage, N F is the proportion of the full bridge, and C is the capacitance of the submodule.

[0083] From the above formula, we can see that the main factors affecting the submodule voltage boost during a fault are: bridge arm current, full bridge ratio, and submodule capacitance. arm The expression is:

[0084]

[0085] In the formula, i vj (j = a, b, c) is the AC side current, is the fault DC current.

[0086] DC current control output voltage reference value U dcref Will affect the bridge arm voltage u arm Size; AC active power outer loop control output current reference value i drefWill affect the AC side feed current, and thus affect the bridge arm current i arm According to the above formula, the bridge arm voltage u arm With the bridge arm current i arm It will directly affect the sub-module capacitor voltage.

[0087] See also Figure 3 As shown, after time t1, as the fault DC current I dc The active power injected into the MMC by the AC side decreases, and the bridge arm current i arm Gradually decrease, i arm The maximum value appears at the beginning of the fault. Assume that in a bridge arm with constant negative current, the full-bridge submodule is put into operation negatively at time t1, and the duration is ΔT1, and the charging period is recorded as t1-t2. As the negative input time increases, the voltage boost value of the full-bridge submodule increases. When ΔT1 is the longest duration of the constant negative voltage of the bridge arm, there is the highest boost value of the full-bridge submodule within ΔT1. At this time, time t1 is the zero-crossing point of the bridge arm voltage reference value from positive to negative, and time t2 is the zero-crossing point of the bridge arm voltage from negative to positive. ΔT1 is shown in the following formula:

[0088]

[0089] Where, T is the power frequency alternating current period, T=20ms, ω is the power frequency angular frequency, ω=100π.

[0090] For the hybrid MMC with a reduced full-bridge ratio, in the case where the submodule boost is the largest and the overvoltage risk is the highest, if the active outer loop immediately controls the submodule boost after time t1, the AC current i v Increase, i arm As the amplitude increases, the risk of overvoltage increases greatly after a single submodule absorbs additional energy. To avoid overvoltage in the full-bridge submodule, the reference value of the capacitor voltage in t1-t2 is set to the rated operating value Ucn. From the above formula, if the full-bridge ratio is 40%, then at Ucn dcref_min =-0.12U dcn Under the premise of , the submodule voltage reference value remains at the rated value for a duration of ΔT1=11ms. If the current of the bridge arm continues to be negative within ΔT1, the submodule capacitor voltage of the bridge arm will reach a peak value u at time t2. cmax Although the submodule voltage peak may appear at a time less than ΔT1 due to the influence of PI control parameters and engineering parameters, ΔT1 is still selected considering the most serious boost scenario.

[0091] See also Figure 4 As shown, during the period t1-t2, the input state of the submodules of other bridge arms and the polarity of the bridge arm current will change, and the submodules are in a discharge state, so u cmaxis the maximum value of the boost peak of the six bridge arm submodules. cmax c_limup , then the FBSM voltage of each bridge arm can operate within the safe range at this stage. cmax If the voltage does not increase significantly, the stator module capacitor voltage should be controlled to the rated value, that is, the controller does not actively raise the full-bridge sub-module voltage.

[0092] After t2, the bridge arm current decays as the fault is cleared, and the bridge arm with the greatest overvoltage risk has entered the positive input voltage reduction period, and the full-bridge submodule to be boosted has already been reduced in the previous stage. Therefore, starting from t2, the full-bridge submodule can be controlled to increase the voltage, and the additional energy fed by the AC is mainly absorbed by the submodule that has been reduced during t1-t2.

[0093] The reference voltage rise time ΔT2 should not be designed to be too short. If there is also a bridge arm with negative input boost at time t2, and the boost duration is the maximum maintenance time ΔT1 of the negative voltage of the bridge arm, the faster the boost speed, the more energy is fed into the AC side, and the higher the risk of overvoltage. Figure 4 As shown in the middle curve 1.

[0094] For safety reasons, ΔT2 should be greater than or equal to the maximum duration ΔT1 of the negative pressure in the bridge arm. At the same time, since the bridge arm with the greatest risk of overvoltage during the t1-t2 period will still increase in voltage after voltage reduction, the reference value rise time should not be too long. U should be reduced cref The increase is consistent with the subsequent voltage increase of this bridge arm to avoid it facing the risk of overvoltage again.

[0095] See also Figure 5 As shown in the figure, based on the above analysis, the preset capacitor voltage reference curve is to take into account that all submodules are not over-voltage throughout the whole process, and t2 is selected as the reference value boost starting point. The control submodule capacitor voltage reference value is the measured value of the submodule average voltage U at t2. cfm(t2) , rises to U within ΔT2=ΔT1 cfn =k Ucn The calculated capacitor voltage limit is then used as the module capacitor voltage reference value at t3-t4 in the capacitor voltage reference curve, and the fault is restarted at time t4, and the control submodule voltage is restored to U cn , and obtain the target capacitance voltage reference curve.

[0096] Step 203: Determine the AC modulation instructions corresponding to each fault self-clearing submodule in the hybrid MMC according to the target capacitor voltage reference curve and the preset steady-state control model;

[0097] Further, see Figure 6 As shown, the steady-state control model includes a first controller and a second controller, and step 203 includes the following sub-steps:

[0098] ​S21, extracting a target capacitor voltage reference value at the current moment from a target capacitor voltage reference curve at the current moment;

[0099] In an embodiment of the invention, a target capacitor voltage reference value at a current moment is extracted from a target capacitor voltage reference curve.

[0100] S22, respectively performing dual-loop optimization control on the target capacitor voltage reference value, the pre-acquired capacitor voltage of each module, and the reactive power of each module through the first controller to obtain voltage reference component parameters corresponding to each fault self-clearing submodule in the hybrid MMC;

[0101] Further, the first controller includes an active outer loop controller, a reactive outer loop controller and an inner loop controller, and S22 includes the following sub-steps:

[0102] S221, respectively using an active outer loop controller to perform capacitor voltage optimization control on a target capacitor voltage reference value and a capacitor voltage of each module acquired in advance, to obtain a first module current component corresponding to each fault self-clearing submodule in the hybrid MMC;

[0103] In an embodiment of the invention, the target capacitor voltage reference value and the pre-acquired capacitor voltages of each module are respectively input into the active outer loop controller for capacitor voltage optimization control to obtain the first module current component corresponding to each fault self-clearing submodule in the hybrid MMC. The active outer loop controller includes a first difference operator and a first PI controller connected in sequence.

[0104] It should be noted that when the hybrid MMC operates normally, the active input reference value and the pre-acquired active power of each module are input into the active outer loop controller for optimization control.

[0105] S222, respectively using a reactive outer loop controller to perform reactive optimization control on a preset reactive reference value and a pre-acquired module reactive power, to obtain a second module current component corresponding to the fault self-clearing submodule;

[0106] In an embodiment of the invention, the preset reactive reference value and the pre-acquired module reactive power are respectively input into the reactive outer loop controller for reactive optimization control to obtain the second module current component corresponding to the fault self-clearing submodule. The reactive outer loop controller includes a second difference operator and a second PI controller connected in sequence.

[0107] S223 , respectively perform voltage stabilization optimization control on the first module current component and the second module current component associated with each fault self-clearing submodule through the inner loop controller to obtain voltage reference component parameters corresponding to each fault self-clearing submodule.

[0108] In the embodiment of the invention, the first module current component and the second module current component associated with each fault self-clearing submodule are respectively input into the inner loop controller for voltage stabilization optimization control to obtain the voltage reference component parameters corresponding to each fault self-clearing submodule.

[0109] S23, respectively performing fault optimization control on each voltage reference component parameter and each pre-acquired bridge arm DC current through the second controller to obtain an AC modulation instruction corresponding to each fault self-clearing submodule.

[0110] Further, the second controller includes a DC current controller, a circulating current suppressor and a fault ride-through controller, and S23 includes the following sub-steps:

[0111] S231, respectively performing current optimization control on a preset current reference value and a pre-acquired DC current of each bridge arm through a DC current controller to obtain a DC reference voltage corresponding to each fault self-clearing submodule;

[0112] In the embodiment of the invention, the preset current reference value and the pre-acquired DC current of each bridge arm are respectively input into the DC current controller for current optimization control to obtain the DC reference voltage corresponding to each fault self-clearing submodule.

[0113] It should be noted that, during normal operation, there is no need for a DC current controller to perform current optimization control, and DC voltage control is used to perform voltage optimization control.

[0114] S232, respectively using a circulating current suppressor to perform a circulating current suppression operation on the current-related quantities of each module acquired in advance, to obtain a circulating current reference voltage corresponding to each fault self-clearing submodule;

[0115] In the embodiment of the invention, the current-related quantities of each module acquired in advance are respectively input into the circulating current suppressor to perform the circulating current suppression operation, so as to obtain the circulating current reference voltage corresponding to each fault self-clearing submodule.

[0116] S233, respectively use the fault ride-through controller to perform fault optimization control on the voltage reference component parameters, the DC reference voltage and the circulating current reference voltage associated with the fault self-clearing submodules to obtain AC modulation instructions corresponding to each fault self-clearing submodule.

[0117] In the embodiment of the present invention, the voltage reference component parameters, DC reference voltage and circulating current reference voltage associated with the fault self-clearing submodules are respectively input into the fault ride-through controller for fault optimization control to obtain AC modulation instructions corresponding to each fault self-clearing submodule.

[0118] Step 204: Send each AC modulation instruction to the associated fault self-clearing submodule, so that each fault self-clearing submodule executes in response to the AC modulation instruction and outputs the AC modulation voltage after execution;

[0119] In the embodiment of the present invention, each AC modulation instruction is sent to the associated fault self-clearing submodule to output an AC modulation voltage, so that the fault self-clearing submodule voltage can be kept as stable as possible to ensure that the full-bridge submodule with the highest voltage does not have an overvoltage problem.

[0120] Step 205: acquiring the faulty DC line current of the hybrid MMC in real time, and determining whether the faulty DC line current is less than or equal to a preset fault clearing threshold;

[0121] In the embodiment of the present invention, the faulty DC line current of the hybrid MMC is obtained at the current moment, and it is determined whether the faulty DC line current is less than or equal to 0.

[0122] Step 206: When the faulty DC line current is greater than the fault clearing threshold, the process jumps to the step of determining the AC modulation instructions corresponding to each fault self-clearing submodule in the hybrid MMC according to the target capacitor voltage reference curve and the preset steady-state control model until the faulty DC line current is less than or equal to the fault clearing threshold.

[0123] In an embodiment of the present invention, when the faulty DC line current is greater than 0, the AC modulation instructions corresponding to each fault self-clearing submodule in the hybrid MMC at the current moment are determined according to the target capacitor voltage reference curve and the preset steady-state control model, and each AC modulation instruction is used to regulate the corresponding fault self-clearing submodule until the faulty DC line current is less than or equal to 0 (i.e., the fault is cleared).

[0124] In another embodiment of the present invention, after a fault is detected, refer to Figure 6 As shown, the active outer loop control is switched to the stator module capacitor voltage control (U cref ), the DC voltage control switches to constant DC current control, where the stator module capacitor voltage control is divided into the rated voltage stage and the full-bridge boost control stage:

[0125] Rated voltage stage: In this stage, the stator module capacitor voltage controls the capacitor voltage of all sub-modules to the rated value, that is, the sub-module capacitor voltage change is not actively intervened, and the full bridge will naturally increase the voltage according to the negative level of the input;

[0126] Full-bridge boost control stage: the reference value of the stator module capacitor voltage control is switched to the average value of the full-bridge sub-module voltage, and the full-bridge sub-module boost is controlled according to the target capacitor voltage reference curve to meet the fault ride-through voltage output requirements under the low-ratio full-bridge.

[0127] In the embodiment of the present invention, when a hybrid MMC fails, the preset capacitor voltage reference curve is limited by using steady-state operating parameters to obtain a target capacitor voltage reference curve, and then the fault self-clearing submodule in the hybrid MMC is regulated according to the target capacitor voltage reference curve and the preset steady-state control model, ensuring that the fault self-clearing submodule does not exceed the limit, overcoming the technical problem that the existing low-ratio full-bridge hybrid MMC control strategy will cause each full-bridge submodule in the MMC to share a higher voltage, easily generating overvoltage, and reducing the reliability of the operation of the hybrid MMC. Compared with the traditional hybrid MMC control strategy, the present invention regulates the capacitor voltage reference value during the fault period in real time through the target capacitor voltage reference curve, controls the submodule capacitor voltage within a safe range, avoids overvoltage in the full-bridge submodule, and improves the reliability of the operation of the hybrid MMC.

[0128] See also Figure 7 , Figure 7 This is a structural block diagram of a low-ratio full-bridge hybrid MMC fault ride-through control system provided in Embodiment 3 of the present invention.

[0129] The present invention provides a low-ratio full-bridge hybrid MMC fault ride-through control system, comprising:

[0130] The acquisition module 301 is used to obtain steady-state operating parameters of the hybrid MMC in response to the received fault ride-through control request, and control the bypass of the half-bridge submodule of the hybrid MMC;

[0131] A limit module 302 is used to perform limit processing on a preset capacitor voltage reference curve using steady-state operating parameters to obtain a target capacitor voltage reference curve;

[0132] The steady-state control module 303 is used to determine the AC modulation instructions corresponding to each fault self-clearing submodule in the hybrid MMC according to the target capacitor voltage reference curve and the preset steady-state control model;

[0133] The fault ride-through control module 304 is used to respectively use each AC modulation instruction to perform non-lockout fault ride-through control on the associated fault self-clearing submodule.

[0134] Furthermore, the steady-state operating parameters include the full-bridge ratio and the steady-state submodule capacitor voltage, and the limit module 302 includes:

[0135] A ratio submodule, used for performing ratio processing on a preset limit coefficient and a full-bridge ratio to obtain a first ratio;

[0136] A multiplication submodule, used for multiplying the first ratio by the capacitor voltage of the steady-state submodule to obtain a capacitor voltage limit value of the full-bridge submodule;

[0137] The limit submodule is used to perform limit processing on a preset capacitor voltage reference curve using a capacitor voltage limit to obtain a target capacitor voltage reference curve.

[0138] Furthermore, the steady-state control model includes a first controller and a second controller, and the steady-state control module 303 includes:

[0139] An extraction submodule, used to extract a target capacitor voltage reference value at a current moment from a target capacitor voltage reference curve at a current moment;

[0140] The first optimization control submodule is used to perform dual-loop optimization control on the target capacitor voltage reference value, the pre-acquired capacitor voltage of each module, and the reactive power of each module through the first controller, respectively, to obtain the voltage reference component parameters corresponding to each fault self-clearing submodule in the hybrid MMC;

[0141] The second optimization control submodule is used to perform fault optimization control on each voltage reference component parameter and each pre-acquired bridge arm DC current through the second controller to obtain AC modulation instructions corresponding to each fault self-clearing submodule.

[0142] Furthermore, the first controller includes an active outer loop controller, a reactive outer loop controller and an inner loop controller, and the first optimization control submodule includes:

[0143] A voltage optimization unit, used to respectively use an active outer loop controller to perform capacitor voltage optimization control on a target capacitor voltage reference value and the capacitor voltages of each module acquired in advance, and obtain a first module current component corresponding to each fault self-clearing submodule in the hybrid MMC;

[0144] A reactive power optimization unit, used to respectively use a reactive outer loop controller to perform reactive power optimization control on a preset reactive power reference value and a pre-acquired module reactive power, and obtain a second module current component corresponding to the fault self-clearing submodule;

[0145] The voltage stabilization optimization unit is used to perform voltage stabilization optimization control on the first module current component and the second module current component associated with each fault self-clearing submodule through an inner loop controller to obtain voltage reference component parameters corresponding to each fault self-clearing submodule.

[0146] Furthermore, the second controller includes a DC current controller, a circulating current suppressor and a fault ride-through controller, and the second optimization control submodule includes:

[0147] A current optimization unit, used to perform current optimization control on a preset current reference value and the pre-acquired DC current of each bridge arm through a DC current controller, to obtain a DC reference voltage corresponding to each fault self-clearing submodule;

[0148] The circulating current optimization unit is used to respectively use the circulating current suppressor to perform the circulating current suppression operation on the current related quantities of each module obtained in advance, so as to obtain the circulating current reference voltage corresponding to each fault self-clearing submodule;

[0149] The fault optimization unit is used to respectively use the fault ride-through controller to perform fault optimization control on the voltage reference component parameters, DC reference voltage and circulating current reference voltage associated with the fault self-clearing submodules, and obtain the AC modulation instructions corresponding to each fault self-clearing submodule.

[0150] Furthermore, the fault ride-through control module 304 includes:

[0151] A modulation unit, used to send each AC modulation instruction to the associated fault self-clearing submodule, so that each fault self-clearing submodule executes in response to the AC modulation instruction and outputs the AC modulation voltage after execution;

[0152] An analysis unit, used to obtain the faulty DC line current of the hybrid MMC in real time, and determine whether the faulty DC line current is less than or equal to a preset fault clearing threshold;

[0153] When the faulty DC line current is greater than the fault clearing threshold, the execution is jumped to the step of determining the AC modulation instructions corresponding to each fault self-clearing submodule in the hybrid MMC according to the target capacitor voltage reference curve and the preset steady-state control model until the faulty DC line current is less than or equal to the fault clearing threshold.

[0154] See also Figure 8 , Figure 8 This is a structural block diagram of an electronic device provided in Embodiment 4 of the present invention.

[0155] An electronic device according to an embodiment of the present invention comprises: a memory 401 and a processor 402, wherein the memory 402 stores a computer program; when the computer program is executed by the processor 402, the processor 402 executes a hybrid MMC fault ride-through control method of a low-ratio full-bridge as in any of the above embodiments.

[0156] The memory 401 may be an electronic memory such as a flash memory, an EEPROM (electrically erasable programmable read-only memory), an EPROM, a hard disk or a ROM. The memory 401 has a storage space 403 for a program code 413 for executing any method step in the above method. For example, the storage space 403 for the program code may include individual program codes 413 for implementing the various steps in the above method, respectively. These program codes may be read from or written to one or more computer program products. These computer program products include program code carriers such as a hard disk, a compact disk (CD), a memory card or a floppy disk. The program code may be compressed, for example, in an appropriate form. When these codes are run by a computing and processing device, the computing and processing device is caused to execute the various steps in the above-described method.

[0157] Embodiment 5 of the present invention further provides a computer-readable storage medium on which a computer program is stored. When the computer program is executed by a processor, the hybrid MMC fault ride-through control method of a low-ratio full-bridge as in any of the above embodiments is implemented.

[0158] Embodiment 6 of the present invention further provides a computer program product, which includes a computer program stored on a non-transitory computer-readable storage medium, and the computer program includes program instructions, wherein when the program instructions are executed by a computer, the computer executes a hybrid MMC fault-crossing control method for a low-ratio full-bridge as in any of the above embodiments.

[0159] Those skilled in the art can clearly understand that, for the convenience and brevity of description, the specific working processes of the systems, devices and units described above can refer to the corresponding processes in the aforementioned method embodiments and will not be repeated here.

[0160] In the several embodiments provided in the present application, it should be understood that the disclosed systems, devices and methods can be implemented in other ways. For example, the device embodiments described above are only schematic. For example, the division of units is only a logical function division. There may be other division methods in actual implementation. For example, multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be an indirect coupling or communication connection through some interfaces, devices or units, which can be electrical, mechanical or other forms.

[0161] The units described as separate components may or may not be physically separated, and the components shown as units may or may not be physical units, that is, they may be located in one place or distributed on multiple network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of this embodiment.

[0162] In addition, each functional unit in each embodiment of the present invention may be integrated into one processing unit, or each unit may exist physically separately, or two or more units may be integrated into one unit. The above-mentioned integrated unit may be implemented in the form of hardware or in the form of software functional units.

[0163] If the integrated unit is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present invention, in essence, or the part that contributes to the prior art, or all or part of the technical solution can be embodied in the form of a software product. The computer software product is stored in a storage medium, including several instructions for a computer device (which can be a personal computer, server, or network device, etc.) to perform all or part of the steps of the methods of each embodiment of the present invention. The aforementioned storage medium includes: U disk, mobile hard disk, read-only memory (ROM, Read-Only Memory), random access memory (RAM, Random Access Memory), disk or optical disk, etc. Various media that can store program codes.

[0164] The above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit the same. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that the technical solutions described in the aforementioned embodiments may still be modified, or some of the technical features may be replaced by equivalents. However, these modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims

1. A hybrid MMC fault ride-through control method for a low-ratio full-bridge, characterized in that: include: In response to the received fault ride-through control request, obtaining steady-state operating parameters of the hybrid MMC, and controlling the bypass of the half-bridge submodule of the hybrid MMC; The preset capacitor voltage reference curve is subjected to limit processing by using the steady-state operating condition parameters to obtain a target capacitor voltage reference curve; Determining, according to the target capacitor voltage reference curve and a preset steady-state control model, an AC modulation instruction corresponding to each fault self-clearing submodule in the hybrid MMC; Each of the AC modulation instructions is used to perform non-lockout fault ride-through control on the associated fault self-clearing submodule.

2. The hybrid MMC fault ride-through control method of low-ratio full-bridge according to claim 1, characterized in that: The steady-state operating parameters include a full-bridge ratio and a steady-state submodule capacitor voltage. The step of using the steady-state operating parameters to perform limit processing on a preset capacitor voltage reference curve to obtain a target capacitor voltage reference curve includes: Performing ratio processing on a preset limit coefficient and the full-bridge ratio to obtain a first ratio; The first ratio is multiplied by the steady-state submodule capacitor voltage to obtain a full-bridge submodule capacitor voltage limit; The capacitor voltage limit is used to perform limit processing on a preset capacitor voltage reference curve to obtain a target capacitor voltage reference curve.

3. The hybrid MMC fault ride-through control method of low-ratio full-bridge according to claim 1, characterized in that: The steady-state control model includes a first controller and a second controller. The step of determining the AC modulation instructions corresponding to each fault self-clearing submodule in the hybrid MMC according to the target capacitor voltage reference curve and the preset steady-state control model includes: Extracting a target capacitor voltage reference value at the current moment from the target capacitor voltage reference curve according to the current moment; The target capacitor voltage reference value, the capacitor voltage of each module acquired in advance, and the reactive power of each module are respectively subjected to dual-loop optimization control by the first controller to obtain voltage reference component parameters corresponding to each fault self-clearing submodule in the hybrid MMC; The second controller performs fault optimization control on each of the voltage reference component parameters and each of the pre-acquired bridge arm DC currents to obtain an AC modulation instruction corresponding to each of the fault self-clearing submodules.

4. The hybrid MMC fault ride-through control method of low-ratio full-bridge according to claim 3 is characterized in that: The first controller includes an active outer loop controller, a reactive outer loop controller and an inner loop controller. The step of performing dual-loop optimization control on the target capacitor voltage reference value, the pre-acquired capacitor voltages of each module and the reactive power of each module through the first controller to obtain voltage reference component parameters corresponding to each fault self-clearing submodule in the hybrid MMC includes: respectively using the active outer loop controller to perform capacitor voltage optimization control on the target capacitor voltage reference value and the capacitor voltages of each module acquired in advance, to obtain the first module current component corresponding to each fault self-clearing submodule in the hybrid MMC; The reactive outer loop controller is used to perform reactive optimization control on a preset reactive reference value and a pre-acquired module reactive power, respectively, to obtain a second module current component corresponding to the fault self-clearing submodule; The inner loop controller is used to perform voltage stabilization optimization control on the first module current component and the second module current component associated with each of the fault self-clearing submodules, respectively, to obtain voltage reference component parameters corresponding to each of the fault self-clearing submodules.

5. The hybrid MMC fault ride-through control method of low-ratio full-bridge according to claim 3, characterized in that: The second controller includes a DC current controller, a circulating current suppressor and a fault ride-through controller. The steps of performing fault optimization control on each of the voltage reference component parameters and each of the pre-acquired bridge arm DC currents through the second controller to obtain an AC modulation instruction corresponding to each of the fault self-clearing submodules include: The DC current controller performs current optimization control on the preset current reference value and the pre-acquired DC current of each bridge arm respectively, so as to obtain the DC reference voltage corresponding to each fault self-clearing submodule; The circulating current suppressor is respectively used to perform a circulating current suppression operation on the current-related quantities of each module obtained in advance, so as to obtain a circulating current reference voltage corresponding to each fault self-clearing submodule; The fault-ride-through controller is respectively used to perform fault optimization control on the voltage reference component parameters, the DC reference voltage and the circulating current reference voltage associated with the fault self-clearing submodules to obtain the AC modulation instructions corresponding to each of the fault self-clearing submodules.

6. The hybrid MMC fault ride-through control method of low-ratio full-bridge according to claim 1, characterized in that: The step of respectively using each of the AC modulation instructions to perform non-lockout fault ride-through control on the associated fault self-clearing submodules comprises: Sending each of the AC modulation instructions to the associated fault self-clearing submodules respectively, so that each of the fault self-clearing submodules executes in response to the AC modulation instructions and outputs the AC modulation voltage after execution; Acquire the faulty DC line current of the hybrid MMC in real time, and determine whether the faulty DC line current is less than or equal to a preset fault clearing threshold; When the fault DC line current is greater than the fault clearing threshold, the step of determining the AC modulation instructions corresponding to each fault self-clearing sub-module in the hybrid MMC according to the target capacitor voltage reference curve and the preset steady-state control model is jumped to execution until the fault DC line current is less than or equal to the fault clearing threshold.

7. A hybrid MMC fault ride-through control system with a low ratio full bridge, characterized in that: include: An acquisition module, configured to obtain steady-state operating parameters of the hybrid MMC in response to a received fault ride-through control request, and control a half-bridge submodule bypass of the hybrid MMC; A limit module, used to perform limit processing on a preset capacitor voltage reference curve using the steady-state operating condition parameters to obtain a target capacitor voltage reference curve; A steady-state control module, used to determine the AC modulation instructions corresponding to each fault self-clearing submodule in the hybrid MMC according to the target capacitor voltage reference curve and a preset steady-state control model; The fault ride-through control module is used to respectively use each of the AC modulation instructions to perform non-lockout fault ride-through control on the associated fault self-clearing submodules.

8. An electronic device, characterized in that: It comprises a memory and a processor, wherein a computer program is stored in the memory, and when the computer program is executed by the processor, the processor executes the steps of the hybrid MMC fault ride-through control method of a low-ratio full-bridge as described in any one of claims 1-6.

9. A computer-readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed, the hybrid MMC fault ride-through control method of the low-ratio full bridge as described in any one of claims 1 to 6 is implemented.

10. A computer program product, characterized in that The computer program product comprises a computer program stored on a non-transitory computer-readable storage medium, wherein the computer program comprises program instructions, wherein when the program instructions are executed by a computer, the computer is caused to execute the hybrid MMC fault ride-through control method for a low-ratio full bridge as described in any one of claims 1-6.

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