CT detector chip, pixel arrangement method of chip and CT scanning method

By implementing sparse arrangement strategy and cubic spline interpolation method on the CT detector chip, the problem of large data volume and difficult to take into account in CT scans is solved, and the effects of reducing data volume, improving processing efficiency and maintaining image quality are achieved.

CN119421516APending Publication Date: 2025-02-11NANOVISION TECHNOLOGY (BEIJING) CO LTD

Patent Information

Application Number
CN202411131521.0
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-08-18
Publication Date
2025-02-11

AI Technical Summary

Technical Problem

In CT scanning, it is difficult for the prior art to reduce the amount of projected data while maintaining image reconstruction quality, improve data processing efficiency and detector performance.

Method used

By implementing a sparse arrangement strategy of spaced rows on the CT detector chip, the amount of projected data is reduced and more complex functional circuits are designed at the blank pixel locations. At the same time, cubic spline interpolation method is used to complete sparse data to ensure the quality of image reconstruction.

Benefits of technology

It significantly reduces the amount of projected data, shortens data transmission time, reduces the complexity and cost of circuit design, improves chip performance, and ensures image reconstruction quality.

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Abstract

The invention discloses a CT detector chip, a pixel arrangement method of the chip and a CT scanning method. The CT detector chip comprises a substrate, the substrate is provided with M rows of pixel areas, and each row of pixel areas comprises N pixel positions; two rows of detector modules are respectively arranged in the first row of pixel areas and the Mth row of pixel areas, and the other rows of detector modules are uniformly arranged in the second row to the (M-1) th row of pixel areas at intervals of one row of pixel areas; the circuit transmission grid electrode is arranged on the substrate, is electrically connected with the plurality of rows of detector modules and is used for controlling the on-off of a circuit of each row of detector modules; and the data reader is arranged on the substrate, is electrically connected with the plurality of rows of detector modules and is used for reading the electric signals. According to the method, the detector modules of the CT detector chip are sparsely arranged, so that the projection data volume is reduced, and the transmission time of the projection data is shortened; moreover, a more complex circuit can be designed at the blank pixel position of the chip, so that the performance of the chip is improved.
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Description

Technical Field

[0001] The present invention relates to a CT detector chip, and also to a pixel arrangement method of the CT detector chip and a CT scanning method using the CT detector chip, belonging to the technical field of medical devices. Background Art

[0002] Computed tomography (CT) is a high-precision X-ray imaging technology that reconstructs the tomographic image of an object by collecting X-ray projection data from different angles. In a CT system, the detector is a key component responsible for collecting X-ray signals and converting them into visible light or electrical signals to generate images. A typical CT detector contains a scintillator, a photoelectric sensor, and a signal readout system, which work together to achieve signal conversion and image generation.

[0003] When designing a CT detector, pixel size and arrangement density need to be considered. Smaller pixel size and tighter arrangement can improve the spatial resolution of the image, but it will also increase the cost of the photoelectric sensor and the complexity of the circuit design. In the Chinese invention patent with patent number ZL 201911330156.5, a pixel arrangement method for a CT detector is disclosed, which reduces costs by adjusting the row spacing - the center area is tightly arranged and the edge area is sparsely arranged - but this may sacrifice spatial resolution to a certain extent, especially when scanning with a large pitch.

[0004] For CT scans that pursue high-resolution imaging, the industry urgently needs a pixel arrangement method that can reduce the amount of projection data while maintaining the quality of image reconstruction. Summary of the invention

[0005] The primary technical problem to be solved by the present invention is to provide a CT detector chip.

[0006] Another technical problem to be solved by the present invention is to provide a pixel arrangement method for a CT detector chip.

[0007] Another technical problem to be solved by the present invention is to provide a CT scanning method using the CT detector chip.

[0008] In order to achieve the above object, the present invention adopts the following technical solutions:

[0009] According to a first aspect of an embodiment of the present invention, there is provided a CT detector chip, comprising:

[0010] A substrate, wherein the substrate has M rows of pixel areas, each row of the pixel areas includes N pixel bits, and M and N are both positive integers;

[0011] A plurality of rows of detector modules, each row of the detector modules comprises N detector units, and one row of the detector modules is arranged in a row of the pixel regions, so that the N detector units are respectively arranged at the N pixel positions; wherein two rows of the detector modules are respectively arranged in the first row of the pixel regions and the Mth row of the pixel regions, and the remaining rows of the detector modules are uniformly arranged in the second row of the pixel regions to the M-1th row of the pixel regions with each alternate row of the pixel regions;

[0012] A circuit transmission gate is disposed on the substrate and is electrically connected to the multiple rows of detector modules respectively, so as to control the on-off of the circuit of each row of the detector modules;

[0013] The data reader is arranged on the substrate and is electrically connected to the multiple rows of detector modules respectively for reading electrical signals.

[0014] Preferably, if M is an even number, the detector modules are arranged in M / 2+1 rows, and one row of the detector modules is arranged in all even-numbered pixel regions starting from the 2nd row, and no detector modules are arranged in odd-numbered pixel regions.

[0015] Preferably, if M is an odd number, the detector modules are arranged in (M+1) / 2 rows, and one row of the detector modules is arranged in all odd-numbered pixel regions starting from the 2nd row, and no detector modules are arranged in even-numbered pixel regions.

[0016] Preferably, between the second row of pixel regions to the Mth row of pixel regions, a blank area is formed between two adjacent rows of the detector modules, and a functional circuit is disposed in the blank area.

[0017] Preferably, the detector unit comprises:

[0018] A scintillator, disposed in the pixel region, for converting X-rays into visible light photons;

[0019] a photodiode, disposed in the pixel region and connected to the scintillator, for converting the visible light photons into electrical signals;

[0020] An amplifier is connected to the photodiode and is used to amplify the electrical signal.

[0021] According to a second aspect of an embodiment of the present invention, a pixel arrangement method of a CT detector chip is provided, comprising the following steps:

[0022] Providing a substrate, wherein the substrate has M rows of pixel areas, each row of the pixel areas includes N pixel bits, and M and N are both positive integers;

[0023] Arrange two rows of detector modules in the first row of pixel areas and the Mth row of pixel areas respectively, and evenly arrange the remaining rows of detector modules in the second row of pixel areas to the M-1th row of pixel areas with one row of pixel areas between them; wherein each row of the detector modules includes N detector units, and one row of the detector modules is arranged in one row of the pixel areas, so that the N detector units are respectively arranged at the N pixel positions;

[0024] The circuit transmission gate is arranged on the substrate and is electrically connected to the multiple rows of the detector modules respectively, so as to control the on-off of the circuit of each row of pixel areas;

[0025] The data reader is arranged on the substrate and is electrically connected to the multiple rows of detector modules respectively for reading the electrical signal.

[0026] Preferably, if M is an even number, the detector modules are arranged in M / 2+1 rows, and one row of the detector modules is arranged in all even-numbered pixel regions starting from the 2nd row, and no detector modules are arranged in odd-numbered pixel regions.

[0027] Preferably, if M is an odd number, the number of photodiodes is (M+1) / 2 groups, and starting from the 2nd row, a row of the detector modules is set in all odd-numbered pixel regions, and no detector modules are set in even-numbered pixel regions.

[0028] According to a third aspect of an embodiment of the present invention, a CT scanning method using the above CT detector chip is provided, comprising the following steps:

[0029] Control the X-rays to continuously irradiate the CT detector chip;

[0030] The CT detector chip is controlled to collect data in alternate lines through the circuit transmission grid;

[0031] Read data through the data reader to obtain sparse data;

[0032] Using an interpolation method to complete the data of missing rows in the sparse data to obtain complete data;

[0033] Performing data correction on the complete data to obtain corrected data;

[0034] Image reconstruction is performed based on the correction data to obtain a final CT scan image.

[0035] Preferably, the interpolation method is used to complete the data of the missing rows in the sparse data to obtain complete data, specifically including:

[0036] Based on the sparse data, obtaining any column of sparse pixel values;

[0037] Based on the sparse pixel values ​​of the column, a cubic spline interpolation function corresponding to the column is formed by fitting;

[0038] Based on the cubic spline interpolation function of the column, the missing pixel values ​​in the sparse pixel values ​​of the column are calculated, and the missing pixel values ​​are interpolated into the corresponding pixel positions to obtain the complete pixel values ​​of the column;

[0039] The above process is repeated until the interpolation process of each column of sparse pixel values ​​is completed, thereby obtaining complete data.

[0040] Compared with the prior art, the present invention successfully reduces the required amount of projection data by about half by implementing a sparse arrangement strategy of alternate rows on the CT detector chip, significantly shortens the data transmission time, and reduces the complexity and cost of circuit design. In addition, the blank pixel positions generated by the sparse arrangement on the CT detector chip provide space for designing more complex functional circuits, further improving the overall performance of the chip. By adopting the cubic spline interpolation method, the present invention can complete the missing pixel data in the sparse data, ensuring that the image reconstruction quality is not affected. The actual test results verify the effectiveness of the technology. The deviation between the interpolated CT image and the true value is extremely small, and the spatial resolution and low-density resolution have not been degraded, proving that the present invention improves data processing efficiency and detector performance while maintaining image quality. BRIEF DESCRIPTION OF THE DRAWINGS

[0041] Figure 1 A schematic structural diagram of a CT detector chip provided in the first embodiment of the present invention;

[0042] Figure 2 A flowchart of a pixel arrangement method of a CT detector chip provided in accordance with the second embodiment of the present invention;

[0043] Figure 3 A flow chart of a CT scanning method provided in the third embodiment of the present invention;

[0044] Figure 4 Schematic diagram of interpolation positions of even-numbered row pixel regions in the third embodiment of the present invention;

[0045] Figure 5 Schematic diagram of interpolation positions of odd-numbered row pixel regions in the third embodiment of the present invention;

[0046] Figure 6 It is a schematic diagram of linear interpolation of the local projection of the shoulder position of the body membrane in the third embodiment of the present invention;

[0047] Figure 7 This is a schematic diagram of a third embodiment of the present invention, in which a local projection of the shoulder position of the body membrane is subjected to cubic spline interpolation;

[0048] Figure 8 This is a comparative analysis diagram of image reconstruction using the CT scanning method provided by the third embodiment of the present invention. DETAILED DESCRIPTION

[0049] The technical content of the present invention is described in detail below with reference to the accompanying drawings and specific embodiments.

[0050] The core concept of the embodiment of the present invention is to reduce the amount of projection data by sparsely arranging the detector modules of the CT detector chip, thereby shortening the transmission time of the projection data. In addition, from the perspective of detector chip design, this method can also design more complex circuits at blank pixel positions to improve chip performance.

[0051] In addition, in order to ensure the reconstruction quality of the CT image, a specific interpolation method is used in cooperation with the CT detector chip in the embodiment of the present invention, so as to achieve the same image effect as the chip with a normal arrangement.

[0052] First embodiment

[0053] like Figure 1 As shown, a CT detector chip provided by the first embodiment of the present invention includes a substrate 1, a multi-row detector module 2, a circuit transmission gate 3 and a data reader 4. The substrate 1 provides a stable support and conductive environment for the internal components of the CT detector; the multi-row detector modules 2 are sparsely arranged on the substrate 1, and are used to convert X-rays into electrical signals; the circuit transmission gate 3 is arranged on the substrate 1 and is electrically connected to the multi-row detector modules 2, and is used to control the on and off of each row of detector modules 2; the data reader 4 is arranged on the substrate 1 and is electrically connected to the multi-row detector modules 2, and is used to read the electrical signals and output data.

[0054] Specifically, in this embodiment, the substrate 1 serves as the basic structure of the detector, providing stable support for components such as the photodiode array and the scintillator array, and generally has excellent conductivity, which can ensure the normal operation of the detector's internal circuit. In addition, during the CT scanning process, the detector needs to withstand a certain amount of heat, and the substrate material needs to have good thermal stability to ensure the long-term stable operation of the detector. Therefore, preferably, semiconductor materials such as single crystal silicon or amorphous silicon are used as the substrate 1. Figure 1 As shown, in this embodiment, the substrate 1 has M rows of pixel regions 11 , each row of pixel regions 10 includes N pixel locations 111 , and both M and N are positive integers.

[0055] like Figure 1As shown, each row of detector modules 2 includes N detector units 21, and a row of detector modules 2 is arranged in a row of pixel areas 11, so that the N detector units 21 are respectively arranged at N pixel positions 111. In this embodiment, the detector unit 21 includes a scintillator 211, a photodiode 212 and an amplifier 213. Among them, the scintillator 211 is arranged in the pixel area 111. When the X-ray irradiates the scintillator 211, the molecules or atoms of the scintillator 211 are excited, and when de-excited, visible light photons with a longer wavelength are emitted. The photodiode 212 is arranged in the pixel area 111 and connected to the scintillator 211, and is used to convert visible light photons into electrical signals. The amplifier 213 is connected to the photodiode 212, and is used to amplify the electrical signal for data collection.

[0056] When specifically arranging pixels, first, two rows of detector modules 2 are arranged in the first row of pixel areas 11 and the Mth row of pixel areas 11, respectively, that is, one row of detector modules 2 is required for each of the first row and the last row. Then, the remaining rows of detector modules 2 are evenly arranged in the second row of pixel areas to the M-1th row of pixel areas with each alternate row of pixel areas. It can be understood that there are two arrangements here:

[0057] The first case: M is an even number, then there are M / 2+1 rows of detector modules, and starting from the 2nd row, one row of detector modules is set in all even-numbered pixel areas, and no detector modules are set in odd-numbered pixel areas.

[0058] For example, if M=10, then 10 / 2+1=6 rows of detector modules are needed. In specific settings, firstly, a row of detector modules 2 is arranged in the first row and the tenth row; then, a row of detector modules 2 is arranged in the order of 2, 4, 6, and 8, and correspondingly, the pixel areas of the 3rd, 5th, and 7th rows are used as blank areas 12.

[0059] The second case: M is an odd number, then the number of detector modules 2 is (M+1) / 2 rows, and starting from the 2nd row, one row of detector modules 2 is set in all odd-numbered pixel areas, and no detector modules 2 are set in even-numbered pixel areas.

[0060] For example, if M=9, then the detector modules need a total of (9+1) / 2=5 rows. In the specific setting, firstly, the first row and the ninth row are each arranged with a row of detector modules 2; then, the detector modules 2 are arranged in the order of 3, 5, and 7 respectively, and accordingly, the pixel areas of the 2nd, 4th, 6th, and 8th rows are used as the blank areas 12.

[0061] like Figure 1As shown, in this embodiment, the circuit transmission gate 3 is disposed on the substrate 1 and is electrically connected to the multiple rows of detector modules 2, respectively, for controlling the on-off of the circuit of each row of detector modules 2. It can be understood that when the X-ray irradiates the scintillator 211, the circuit transmission gate 3 controls the on-off of the circuit of each row of detector modules 2, thereby converting the X-ray into an amplified electrical signal.

[0062] like Figure 1 As shown, in this embodiment, the data reader 4 is disposed on the substrate 1 and is electrically connected to the multiple rows of detector modules 2, respectively, for reading the amplified electrical signals. Specifically, when the X-rays irradiate the scintillator 211, the circuits of each row of detector modules 2 are turned on, so that each detector unit 21 converts the X-rays into the amplified electrical signals. Accordingly, the data reader 4 can read the amplified electrical signals of each detector unit 21, thereby outputting sparse data (e.g., pixel array).

[0063] In addition, in the above embodiment, preferably, after the arrangement of multiple rows of detector modules 2 is completed, a blank area 12 is formed between the second row of pixel areas to the Mth row of pixel areas and between two adjacent rows of detector modules, and a variety of functional circuits can be placed in the blank area 12, thereby improving the overall performance of the detector chip.

[0064] It can be understood that by utilizing the arrangement of multiple rows of detector modules 2 in the first embodiment of the present invention, the number of pixels required to be collected is nearly halved. Therefore, the amount of projection data generated during CT scanning is also halved accordingly, which helps to shorten the data transmission time.

[0065] Second embodiment

[0066] like Figure 2 As shown, based on the above first embodiment, the second embodiment of the present invention provides a pixel arrangement method of a CT detector chip, which specifically includes steps S1 to S5:

[0067] S1: providing a substrate 1.

[0068] In this embodiment, the substrate 1 has M rows of pixel regions, each row of pixel regions includes N pixel locations, and M and N are both positive integers.

[0069] S2: Arrange multiple rows of detector modules 2 sparsely.

[0070] Specifically, first, two rows of detector modules 2 are arranged in the first row of pixel areas 11 and the Mth row of pixel areas 11. Then, the remaining rows of detector modules 2 are evenly arranged in the second row of pixel areas to the M-1th row of pixel areas with each alternate row of pixel areas.

[0071] When M is an even number, the detector modules are M / 2+1 rows, and one row of detector modules is set in all even-numbered pixel regions starting from the 2nd row, and no detector modules are set in the odd-numbered pixel regions. When M is an odd number, the detector modules 2 are (M+1) / 2 rows, and one row of detector modules 2 is set in all odd-numbered pixel regions starting from the 2nd row, and no detector modules 2 are set in the even-numbered pixel regions.

[0072] S3: The circuit transmission gate 3 is arranged on the substrate 1 and is electrically connected to the multiple rows of detector modules 2 respectively, so as to control the on-off of the circuit of each row of pixel areas.

[0073] S4: The data reader 4 is arranged on the substrate 1 and is electrically connected to the multiple rows of detector modules 2 respectively for reading electrical signals.

[0074] Third embodiment

[0075] like Figure 3 As shown, based on the above first embodiment, the third embodiment of the present invention provides a CT scanning method, which specifically includes steps S10 to S60:

[0076] S10: Control the X-rays to continuously irradiate the CT detector chip.

[0077] S20: Control the CT detector chip to collect data in alternate lines through the circuit transmission gate.

[0078] S30: Read data through a data reader to obtain sparse data.

[0079] S40: Use an interpolation method to complete the data of missing rows in the sparse data to obtain complete data.

[0080] Specifically, it includes steps S401 to S404:

[0081] S401: Based on the sparse data, obtain any column of sparse pixel values;

[0082] For example: After sparse arrangement of alternate row pixels, each retained row is i1, i2, i4, i6...i M-2 、i M Assume that Pixel(i,j) represents the pixel in the i-th row and j-th column, i∈[1,2,4,6,…,M-2,M], j∈[1,2,3,4,…,N-1,N].

[0083] S402: Based on the sparse pixel values ​​of the column, a cubic spline interpolation function corresponding to the column is fitted;

[0084] For this column of sparse pixel values, the cubic spline interpolation function is obtained using Pixel(1,j), Pixel(2,j), Pixel(4,j), Pixel(6,j), …, Pixel(M-2,j), Pixel(M,j), a total of M / 2+1 data: F(x,y)=interpolate(Pixel(i,j), i∈[1,2,4,6,…,M-2,M], j∈[1,2,3,4,…,N-1,N]).

[0085] S403: Calculate the missing pixel values ​​in the sparse pixel values ​​of the column based on the cubic spline interpolation function of the column, and interpolate into corresponding pixel positions to obtain complete pixel values ​​of the column;

[0086] Specifically, Figure 4 As shown, after the cubic spline interpolation function F(x,y) corresponding to the column of sparse pixel values ​​is determined based on step S402, the missing pixel value Pixel(i',j') of the column is Pixel(i',j') = F(i',j'); wherein, i'∈[3,5,…,M-3,M-1], j∈[1,2,3,4,…,N-1,N].

[0087] S404: Repeat the above process S401 to S403 until the interpolation process of each column of sparse pixel values ​​is completed, thereby obtaining complete data.

[0088] Understandably, Figure 4 Only the interpolation position when M is an even number is shown in FIG. 1 . When M is an odd number, the interpolation position is as follows: Figure 5 shown.

[0089] S50: Performing data correction on the complete data to obtain corrected data.

[0090] S60: Perform image reconstruction based on the correction data to obtain a final CT scan image.

[0091] Figure 6 The results of linear interpolation are shown. The figures are all local projections of a certain part of the shoulder of the body membrane. The upper, middle and lower figures respectively represent the sparse arrangement of pixels in rows and pixels in intervals, the sparse arrangement of pixels in rows and pixels in intervals, and the difference between the upper and middle figures. From the difference between the upper and middle figures, it can be seen that there is a difference in the transition area between bone and soft tissue. Figure 7 The results of cubic spline interpolation are shown. From the difference graphs of the upper and middle figures, the difference between the transition area between bone and soft tissue disappears, and the difference graphs are all white noise, which is in line with the expected effect. It can be considered that the projection images before and after using cubic spline interpolation are equivalent.

[0092] In one embodiment of the present invention, more than 1,000 CT medical projection images were actually tested. The test projection images included water models, catphan models, and various parts of the real human body (head, chest, abdomen, etc.). The deviation between the interpolated pixel value and the real pixel value was within ±2%, and there was no difference in tissue structure visible to the naked eye. Using the interpolated projection image reconstruction, from the reconstructed image, the deviation between the interpolated pixel value and the real pixel value was about ±1HU, and the spatial resolution and low-density resolution did not degrade. Taking the reconstruction result of the catphan500 model line pair layer as an example, the reconstruction result is as follows: Figure 8 As shown. Among them, Figure 8 The left is the data reconstruction without sparse arrangement of alternate row pixels; Figure 8 The middle one is the reconstructed image after the data of sparsely arranged pixels in alternate rows are interpolated and completed; Figure 8 The right is the difference between the left and middle images. Figure 8 It can be observed that the CT value changes before and after interpolation are within 1HU, and the high-score results are not degraded.

[0093] In summary, the embodiment of the present invention uses the sparse arrangement of alternate row pixels in combination with the cubic spline interpolation method to achieve the image effect before sparse arrangement, but the amount of data transmitted is only about 1 / 2 of that before sparse arrangement, which can shorten the transmission time of projection data. In addition, more functional circuits can be arranged in the blank row pixel area of ​​the detector chip, which is convenient for improving chip performance or developing additional detector functions.

[0094] It should be noted that the above embodiments are only examples, and the technical solutions of the various embodiments can be combined, all within the protection scope of the present invention.

[0095] It should be noted that the term "formation" in the present invention means that it can be obtained by one of a variety of processes and is not limited to the processes listed in the embodiments. The order of steps in the present invention can be changed according to actual needs, the order of steps can be changed, and serial processing can also be changed to parallel processing, which is not limited to the order of steps listed in the embodiments.

[0096] It should be understood that the terms "upper", "lower", "horizontal", etc. indicate orientations or positional relationships based on the orientations or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be understood as a limitation on the present invention.

[0097] In addition, the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features defined as "first" and "second" may explicitly or implicitly include one or more of the features. In the description of the present invention, the meaning of "plurality" is two or more, unless otherwise clearly and specifically defined.

[0098] The CT detector chip, the pixel arrangement method of the chip and the CT scanning method provided by the present invention are described in detail above. For those skilled in the art, any obvious changes made to it without departing from the essence of the present invention will constitute an infringement of the patent right of the present invention and will bear corresponding legal liabilities.

Claims

1. A CT detector chip, characterized in that include: A substrate, wherein the substrate has M rows of pixel areas, each row of the pixel areas includes N pixel positions, and M and N are both positive integers; A plurality of rows of detector modules, each row of the detector modules comprises N detector units, and one row of the detector modules is arranged in a row of the pixel regions, so that the N detector units are respectively arranged at the N pixel positions; wherein two rows of the detector modules are respectively arranged in the first row of the pixel regions and the Mth row of the pixel regions, and the remaining rows of the detector modules are uniformly arranged in the second row of the pixel regions to the M-1th row of the pixel regions with each alternate row of the pixel regions; A circuit transmission gate is disposed on the substrate and is electrically connected to the multiple rows of detector modules respectively, so as to control the on-off of the circuit of each row of the detector modules; The data reader is arranged on the substrate and is electrically connected to the multiple rows of detector modules respectively for reading electrical signals.

2. The CT detector chip according to claim 1, characterized in that: If M is an even number, the detector modules are arranged in M / 2+1 rows, and one row of the detector modules is arranged in all even-numbered pixel regions starting from the 2nd row, and no detector modules are arranged in odd-numbered pixel regions.

3. The CT detector chip according to claim 1, characterized in that: If M is an odd number, the detector modules are arranged in (M+1) / 2 rows, and one row of the detector modules is arranged in all odd-numbered pixel regions starting from the 2nd row, and no detector modules are arranged in even-numbered pixel regions.

4. The CT detector chip according to claim 1, characterized in that: Between the second row of pixel areas to the Mth row of pixel areas, a blank area is formed between two adjacent rows of the detector modules, and a functional circuit is arranged in the blank area.

5. The CT detector chip according to claim 1, characterized in that The detector unit comprises: A scintillator, disposed in the pixel region, for converting X-rays into visible light photons; a photodiode, disposed in the pixel region and connected to the scintillator, for converting the visible light photons into electrical signals; An amplifier is connected to the photodiode and is used to amplify the electrical signal.

6. A pixel arrangement method for a CT detector chip, characterized in that The steps include: Providing a substrate, wherein the substrate has M rows of pixel areas, each row of the pixel areas includes N pixel bits, and M and N are both positive integers; Arrange two rows of detector modules in the first row of pixel areas and the Mth row of pixel areas respectively, and evenly arrange the remaining rows of detector modules in the second row of pixel areas to the M-1th row of pixel areas with one row of pixel areas between them; wherein each row of the detector modules includes N detector units, and one row of the detector modules is arranged in one row of the pixel areas, so that the N detector units are respectively arranged at the N pixel positions; The circuit transmission gate is arranged on the substrate and is electrically connected to the multiple rows of the detector modules respectively, so as to control the on-off of the circuit of each row of pixel areas; The data reader is arranged on the substrate and is electrically connected to the multiple rows of detector modules respectively for reading the electrical signal.

7. The pixel arrangement method according to claim 6, wherein: If M is an even number, the number of detector modules is M / 2+1 rows, and starting from the 2nd row, one row of the detector modules is set in all even-numbered pixel regions, and no detector modules are set in odd-numbered pixel regions.

8. The pixel arrangement method according to claim 6, wherein: If M is an odd number, the number of photodiodes is (M+1) / 2 groups, and starting from the 2nd row, a row of the detector modules is set in all odd-numbered pixel regions, and no detector modules are set in even-numbered pixel regions.

9. A CT scanning method using the CT detector chip according to any one of claims 1 to 5, characterized in that The steps include: Control the X-rays to continuously irradiate the CT detector chip; The CT detector chip is controlled to collect data in alternate lines through the circuit transmission grid; Read data through the data reader to obtain sparse data; Using an interpolation method to complete the data of missing rows in the sparse data to obtain complete data; Performing data correction on the complete data to obtain corrected data; Image reconstruction is performed based on the correction data to obtain a final CT scan image.

10. The CT scanning method according to claim 9, characterized in that An interpolation method is used to complete the data of missing rows in the sparse data to obtain complete data, specifically including: Based on the sparse data, obtaining any column of sparse pixel values; Based on the sparse pixel values ​​of the column, a cubic spline interpolation function corresponding to the column is formed by fitting; Based on the cubic spline interpolation function of the column, the missing pixel values ​​in the sparse pixel values ​​of the column are calculated, and the missing pixel values ​​are interpolated into the corresponding pixel positions to obtain the complete pixel values ​​of the column; The above process is repeated until the interpolation process of each column of sparse pixel values ​​is completed, thereby obtaining complete data.

Citation Information

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