Electronic device including die disposed between first substrate and second substrate

By installing a die between the substrates of the electronic devices, the performance bottlenecks of electronic devices in thermal management and electrical signal transmission in the prior art are solved, and more efficient electrical signal transmission and thermal management are achieved, reducing inductance losses.

CN119422249APending Publication Date: 2025-02-11MICROCHIP TECH CALDICOT LTD
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Patent Information

Application Number
CN202380048802.7
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Priority Date
2023-07-03
Filing Date
2023-11-16
Publication Date
2025-02-11

AI Technical Summary

Technical Problem

Existing electronic devices such as power modules have performance bottlenecks in thermal management and electrical signal transmission, especially when high power connections, conventional electrical isolation layers and connectors sacrifice current in exchange for thermal management.

Method used

Improvements in electrical and thermal flow are achieved by mounting a die between the first substrate and the second substrate including an electrically conductive and thermally conductive structure. This arrangement may omit or eliminate various structures in conventional power modules such as lead joints, additional traces or dedicated power terminals, thereby providing a power module with low loop inductance.

Benefits of technology

By optimizing the conductive path and heat transfer structure, the design improves the electrical signal transmission efficiency and thermal management capabilities of electronic devices, reduces inductance losses, and improves overall performance.

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Abstract

The invention provides an electronic device. The electronic device includes a die mounted between a first substrate and a second substrate. The first substrate includes a first substrate die contact on a first side of the first substrate and a first substrate terminal contact on a second side of the first substrate opposite the first side, the first substrate terminal contact being electrically and thermally connected to the first substrate die contact. The second substrate includes a second substrate die contact on a first side of the second substrate and a second substrate terminal contact on a second side of the second substrate opposite the first side, the second substrate terminal contact being electrically and thermally connected to the second substrate die contact. The die includes a first die element conductively connected to the first substrate die contact, and a second die element conductively connected to the second substrate die contact.
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Description

[0001] Related patent applications

[0002] This patent application claims priority to commonly owned U.S. Provisional Patent Application No. 63 / 427,065, filed on November 21, 2022, the entire contents of which are hereby incorporated by reference for all purposes. Technical Field

[0003] The present disclosure relates to electronic devices, and more particularly to an electronic device (eg, a power module) including a die arranged between a first substrate and a second substrate. Background Art

[0004] Conventional electronic devices that include heat-generating electronic devices (e.g., dies), such as power modules (or "power packages") that include one or more metal-oxide-semiconductor field effect transistors (power MOSFETs), typically rely on the use of a ceramic substrate or other isolation layer to provide electrical isolation between the heat-generating electronic devices and a heat sink. In certain conventional devices, to avoid physical interference with such thermal management structures, busbars used to provide electrical connections to corresponding electronic devices in the device are typically located spaced apart from such electronic devices and electrically connected to the electronic devices via copper tracks or traces, wire bonds, lead frame leads, or other conductive connections. However, locating busbar connections away from the electronic devices typically creates an inherent performance bottleneck (due to high inductance / loss). Such bottlenecks are caused by the complex electrical paths required to transmit signals to and from the devices. For example, some conventional electronic devices include a power MOSFET mounted on a ceramic substrate that electrically isolates the power MOSFET from a heat sink in a vertical plane. The power MOSFET is electrically connected using wire bonds, ribbon bonds, clamps, substrate tracks / traces, spacers, multiple solder connections, and / or power terminal busbars / lead frames. The power signal travels along copper traces on a first side (usually the top side) of the substrate before connecting to dedicated power terminals that enable connection to external busbars or cables. Thus, conventional devices offer electrical performance at the expense of thermal performance, and vice versa.

[0005] Furthermore, conventional electronic devices (eg, power modules) that include wire bond connections between a substrate and the electronic device may fail at the wire bond connections, such as in power modules that are subject to severe cycling requirements, such as in motor control and power generation applications.

[0006] Other conventional electronic devices (e.g., power modules) use other electrical isolation layers (i.e., in addition to ceramic), or layers added between the heat generating electronic device and the heat sink. For example, some devices include silicone fiberglass pads for electrical isolation. However, regardless of the material or structure provided for electrical isolation, conventional devices (e.g., power modules) typically rely on dedicated terminals / connectors for high power connections between the electronic device and the associated source and load, which may sacrifice current flow in exchange for thermal management.

[0007] Improved electronic devices (eg, power modules) are needed, for example, to provide efficient heat transfer and electrical signal transmission between included electronic devices (eg, power dies) and external electronic devices (eg, power sources and / or loads). Summary of the invention

[0008] As disclosed herein, the electronic device (e.g., a power module) may include at least one die mounted or "sandwiched" between a first substrate and a second substrate including corresponding conductive structures, the arrangement providing, for example, improved electrical and thermal flow through the electronic device as compared to certain conventional power modules. The corresponding substrates (between which the die is mounted) may include electrically conductive and thermally conductive structures that facilitate heat transfer away from the die and transmission of electrical signals to and / or from the die. In some examples, by mounting the die between a pair of substrates that provide both electrical contact and thermal transfer, various structures of conventional power modules may be omitted or eliminated, such as certain wire bonds, additional traces, or dedicated power terminals or lead frames provided in certain conventional devices. Thus, some examples may provide a power module that exhibits low loop inductance as compared to certain conventional devices.

[0009] According to some examples, an electronic device may include a multi-layer substrate (e.g., a multi-layer PCB) that includes conductive structures (e.g., metal coins, inlays, and / or through-holes) to transfer heat and conduct electrical signals to an outer layer or external structure of the device. For example, a suitable conductive thermal intermediate layer can be used to transfer heat and electrical signals from a heat-generating die to a corresponding heat sink. In some examples, a dielectric layer is formed on a corresponding outer surface of a corresponding heat sink, wherein the heat sink coated with the dielectric layer can be cooled by a fluid-based cooling system.

[0010] The electronic devices disclosed herein may include any one or more types of dies mounted between a pair of substrates, such as at least one insulated gate bipolar transistor (IGBT), semiconductor thyristor, or vertical MOSFET. Some examples provide a power module including at least one power die (e.g., power MOSFET) mounted between a pair of substrates (e.g., multilayer substrates) that provide electrical connections to the at least one power die and facilitate heat transfer away from the at least one power die. In some examples, a gate driver may be mounted on a respective substrate and directly connected to a respective gate of a respective power die.

[0011] In some examples, electronic devices as disclosed herein (i.e., comprising at least one die mounted between a pair of substrates) may be arranged in various circuit topologies, such as, but not limited to, a half-bridge topology, an H-bridge topology, a single-phase inverter topology, a three-phase inverter topology, a neutral point clamped (NPC) topology, a mixed voltage NPC (MNPC), or an active NPC (ANPC) topology.

[0012] Example electronic devices (e.g., power modules) as disclosed herein may be used in a variety of applications, such as, but not limited to, for electrification, transportation (e.g., electric vehicles (EV), EV charging, ships, airplanes, or trains), and power infrastructure (e.g., grid management or energy generation).

[0013] One aspect provides an electronic device, which includes a tube core installed between a first substrate and a second substrate. The tube core includes a first tube core element at a first side of the tube core and a second tube core element at a second side of the tube core opposite to the first side of the tube core. The first substrate includes a first substrate tube core contact on the first side of the first substrate and a first substrate terminal contact on the second side of the first substrate opposite to the first side of the first substrate, the first substrate tube core contact is electrically and thermally connected to the first tube core element, and the first substrate terminal contact is electrically and thermally connected to the first substrate tube core contact. The second substrate includes a second substrate tube core contact on the first side of the second substrate and a second substrate terminal contact on the second side of the second substrate opposite to the first side of the second substrate, the second substrate tube core contact is electrically and thermally connected to the second tube core element, and the second substrate terminal contact is electrically and thermally connected to the second substrate tube core contact.

[0014] One aspect provides an electronic device as in the preceding paragraph, wherein the first substrate, the die, and the second substrate together define a conductive path that allows current to be transferred from the first substrate terminal contact to the second substrate terminal contact through the first substrate, the die, and the second substrate during at least one operating mode of the die.

[0015] One aspect provides an electronic device as in one of the two preceding paragraphs, the electronic device comprising: a first substrate integrated conductive structure extending through the thickness of the first substrate to electrically and thermally connect the first substrate tube core contact with the first substrate terminal contact; and a second substrate integrated conductive structure extending through the thickness of the second substrate to electrically and thermally connect the second substrate tube core contact with the second substrate terminal contact.

[0016] One aspect provides an electronic device as in one of the three preceding paragraphs, wherein the first substrate comprises a first printed circuit board and the second substrate comprises a second printed circuit board.

[0017] One aspect provides an electronic device as in one of the first four paragraphs, wherein: the die includes a vertical transistor; the first die element includes a source of the vertical transistor; the second die element includes a drain of the vertical transistor; the first substrate die contact on the first side of the first substrate includes a source contact; and the second substrate die contact on the first side of the second substrate includes a drain contact.

[0018] One aspect provides an electronic device as in one of the first five paragraphs, wherein: the die includes a gate terminal of a vertical transistor; the first substrate includes a gate contact on a first side of the first substrate; the electronic device includes: a gate driver mounted on the first substrate and connected to the gate contact; and a gate driver control circuit mounted on the first substrate and connected to the gate driver.

[0019] One aspect provides an electronic device as in one of the preceding six paragraphs, comprising a first busbar electrically and thermally connected to a first substrate terminal contact and a second busbar electrically and thermally connected to a second substrate terminal contact.

[0020] One aspect provides an electronic device as in one of the preceding seven paragraphs, the electronic device comprising: a power source connected to a first bus; and a load connected to a second bus.

[0021] One aspect provides an electronic device as in one of the preceding eight paragraphs, wherein: the first busbar comprises a first combined busbar and a heat sink device; the second busbar comprises a second combined busbar and a heat sink device; the first fluid is thermally coupled to the first combined busbar and the heat sink device; and the second fluid is thermally coupled to the second combined busbar and the heat sink device.

[0022] In some examples, the first substrate, die, and second substrate collectively define a conductive path that allows current to be passed from the first substrate terminal contact to the second substrate terminal contact through the first substrate, die, and second substrate during at least one operating mode of the die.

[0023] In some examples, the electronic device includes: a first substrate integrated conductive structure that extends through the thickness of the first substrate to electrically and thermally connect the first substrate tube core contact with the first substrate terminal contact; and a second substrate integrated conductive structure that extends through the thickness of the second substrate to electrically and thermally connect the second substrate tube core contact with the second substrate terminal contact.

[0024] In some examples, the first substrate includes a first printed circuit board, and the second substrate includes a second printed circuit board.

[0025] In some examples, the die includes a vertical transistor, the first die element includes a source of the vertical transistor, the second die element includes a drain of the vertical transistor, the first substrate die contact on the first side of the first substrate includes a source contact, and the second substrate die contact on the first side of the second substrate includes a drain contact.

[0026] In some examples, the die includes a gate terminal of a vertical transistor, the first substrate includes a gate contact on a first side of the first substrate, and the electronic device includes a gate driver mounted on the first substrate and connected to the gate contact.

[0027] In some examples, the electronic device includes a gate driver control circuit mounted on the first substrate and connected to the gate driver.

[0028] In some examples, the electronic device includes a first busbar electrically and thermally connected to the first substrate terminal contact and a second busbar electrically and thermally connected to the second substrate terminal contact.

[0029] In some examples, the electronic device includes a power source connected to a first bus and a load connected to a second bus.

[0030] In some examples, the first busbar includes a first combined busbar and a heat sink component, and the second busbar includes a second combined busbar and a heat sink component.

[0031] In some examples, the electronic device includes a first fluid thermally coupled to a first combined busbar and heat sink device and a second fluid thermally coupled to a second combined busbar and heat sink device.

[0032] One aspect provides an electronic device, the electronic device comprising a first die and a second die mounted between a first substrate and a second substrate. The first die comprises a first transistor mounted in a first orientation, the first transistor comprising a first transistor source at a first side of the first die, a first transistor gate at the first side of the first die, and a first transistor drain at a second side of the first die. The second die comprises a second transistor mounted in a second orientation reversed relative to the first orientation, the second transistor comprising a second transistor source at the first side of the second die, a second transistor gate at the first side of the second die, and a second transistor drain at the second side of the second die. The first substrate includes: (a) a first substrate source contact, a first substrate gate contact and a first substrate drain contact on a first side of the first substrate, the first substrate source contact being connected to the first transistor source, the first substrate gate contact being connected to the first transistor gate, and the first substrate drain contact being connected to the second transistor drain; and (b) a first substrate first terminal contact and a first substrate second terminal contact on a second side of the first substrate opposite to the first side of the first substrate, the first substrate first terminal contact being conductively connected to the first substrate source contact, and the first substrate second terminal contact being conductively connected to the first substrate drain contact. The second substrate includes: (a) a second substrate source contact, a second substrate gate contact, and a second substrate drain contact on a first side of the second substrate, the second substrate source contact being connected to the second transistor source, the second substrate gate contact being connected to the second transistor gate, and the second substrate drain contact being connected to the first transistor drain; and (b) a second substrate terminal contact on a second side of the second substrate opposite to the first side of the second substrate, the second substrate terminal contact being conductively connected to the second substrate source contact and the second substrate drain contact.

[0033] One aspect provides an electronic device as in the preceding paragraph, wherein the first substrate comprises a first printed circuit board, and the second substrate comprises a second printed circuit board.

[0034] One aspect provides an electronic device as in one of the two preceding paragraphs, wherein the electronic device comprises an inverter.

[0035] One aspect provides an electronic device as in one of the three preceding paragraphs, the electronic device comprising a gate driver mounted on a first side of a first substrate and connected to a first substrate gate contact.

[0036] One aspect provides an electronic device as in one of the first four paragraphs, the electronic device comprising: a first busbar electrically and thermally connected to a first substrate first terminal contact; a second busbar electrically and thermally connected to the first substrate second terminal contact; and a third busbar electrically and thermally connected to the second substrate terminal contact.

[0037] One aspect provides an electronic device as in one of the first five paragraphs, the electronic device comprising: a power source connected to one of the first bus and the second bus; and a load connected to a third bus.

[0038] One aspect provides an electronic device as in one of the preceding six paragraphs, wherein: the first busbar comprises a first combined busbar and a heat sink device; and the second busbar comprises a second combined busbar and a heat sink device.

[0039] In some examples, the first substrate includes a first printed circuit board, and the second substrate includes a second printed circuit board.

[0040] In some examples, the electronic device includes an inverter.

[0041] In some examples, the electronic device includes a gate driver mounted on a first side of the first substrate and connected to the first substrate gate contact.

[0042] In some examples, the first busbar is electrically and thermally connected to the first substrate first terminal contact, the second busbar is electrically and thermally connected to the first substrate second terminal contact, and the third busbar is electrically and thermally connected to the second substrate terminal contact.

[0043] In some examples, the electronic device includes a power source connected to one of the first bus and the second bus, and a load connected to a third bus.

[0044] In some examples, the first busbar includes a first combined busbar and a heat sink component, and the second busbar includes a second combined busbar and a heat sink component.

[0045] One aspect provides an electronic device, the electronic device including a die arranged between a first substrate and a second substrate. The first substrate includes a first integrated conductive structure extending through the thickness of the first substrate, the first integrated conductive structure connecting a first substrate die contact on a first side of the first substrate to a first substrate terminal contact on a second side of the first substrate. The second substrate includes a second integrated conductive structure extending through the thickness of the second substrate, the second integrated conductive structure connecting a second substrate die contact on the first side of the second substrate to a second substrate terminal contact on the second side of the second substrate. The die includes a first side electrically and thermally coupled to the first substrate die contact on the first side of the first substrate, and a second side electrically and thermally coupled to the second substrate die contact on the first side of the second substrate.

[0046] One aspect provides an electronic device as in the preceding paragraph, wherein the first substrate, the die, and the second substrate together define a conductive path that allows current to be transferred from the first substrate terminal contact to the second substrate terminal contact through the first substrate, the die, and the second substrate during at least one operating mode of the die.

[0047] One aspect provides an electronic device as in one of the two preceding paragraphs, wherein the first substrate comprises a first printed circuit board and the second substrate comprises a second printed circuit board.

[0048] One aspect provides an electronic device as in one of the first three paragraphs, wherein a first integrated conductive structure extending through the thickness of a first substrate includes a metal inlay that: (a) is connected to a first substrate die contact on a first side of the first substrate through a set of first vias, and (b) is connected to a first terminal contact on a second side of the first substrate through a set of second vias.

[0049] In some examples, the first substrate, die, and second substrate collectively define a conductive path that allows current to be passed from the first substrate terminal contact to the second substrate terminal contact through the first substrate, die, and second substrate during at least one operating mode of the die.

[0050] In some examples, the first substrate includes a first printed circuit board, and the second substrate includes a second printed circuit board.

[0051] In some examples, a first integrated conductive structure extending through a thickness of a first substrate includes a metal inlay that is: (a) connected to a first substrate die contact on a first side of the first substrate through a set of first vias, and (b) connected to a first terminal contact on a second side of the first substrate through a set of second vias. BRIEF DESCRIPTION OF THE DRAWINGS

[0052] Example aspects of the present disclosure are described below in conjunction with the accompanying drawings, in which:

[0053] Figure 1 is a cross-sectional side view of an example electronic device including a die mounted between a first substrate and a second substrate;

[0054] Figure 2 is a cross-sectional side view of an example electronic device including a vertical MOSFET die mounted between a first substrate and a second substrate;

[0055] Figure 3 is a cross-sectional side view of an example power module including a pair of dies mounted between a first substrate and a second substrate;

[0056] Figure 4 Yes Figure 3 A cross-sectional side view of an example single-phase inverter of an example power module is shown;

[0057] FIG. 5A to FIG. 5D Various views of an example switch module including a first switch (including five first switch dies) and a second switch (including five second switch dies) arranged between a first substrate and a second substrate are shown; and

[0058] Fig. 6A and Figure 6B are various views of an example three-phase inverter module according to one example.

[0059] It should be understood that the reference numerals of any illustrative elements appearing in multiple different figures have the same meaning in the multiple figures, and references or discussions herein to any illustrative element in the context of any particular figure also apply to each other figure (if any) in which the same illustrative element is shown. DETAILED DESCRIPTION

[0060] Figure 1 1 is a cross-sectional side view of an example electronic device 100 including a power module 102. The power module 102 includes at least one die 104 mounted between a first substrate 106 and a second substrate 108. The illustrated example shows one die 104 mounted between the first substrate 106 and the second substrate 108; however, in some examples, multiple dies 104 may be mounted between the first substrate 106 and the second substrate 108 (e.g., Figure 2 , Figure 3 , Figure 4 , FIG. 5A to FIG. 5C as well as Fig. 6A to the example shown in FIG. 6C ).

[0061] The die 104 may include an IC die (chip) or other electronic device including a first die element 110 on a first side 104a of the die 104 and a second die element 112 on a second side 104b of the die 104 opposite the first side 104a. For example, the die 104 may include an insulated gate bipolar transistor (IGBT); a thyristor; a vertical MOSFET (e.g., a power MOSFET) formed of silicon, silicon carbide, gallium nitride, or other suitable materials, or other types of electronic devices. The first die element 110 and the second die element 112 may each include any electronic component of the die 104, or a terminal, bonding pad, or other conductive contact on the respective first side 104a or second side 104b of the die 104. In some examples, the first die element 110 and the second die element 112 may respectively include a source (or source contact), a drain (or drain contact), or a gate (or gate contact) of a MOSFET die, for example, as discussed below.

[0062] The first substrate 106 may include a first PCB or other substrate that includes and / or carries corresponding circuits or other electronic devices. In some examples, the first substrate 106 may be composed of a variety of laminate materials, such as polytetrafluoroethylene (PTFE), epoxy fiberglass (FR-4), bismaleimide triazine epoxy resin (BT-Epoxy), polyimide or polyetheretherketone (PEEK). The first substrate 106 may include a first substrate die contact 114 on a first side 106a of the first substrate 106 facing the tube core 104, and a first substrate terminal contact 116 on a second side 106b of the first substrate 106 opposite to the first side 106a of the first substrate 106 and away from the tube core 104. The first substrate terminal contact 116 may be electrically and thermally connected to the first substrate die contact 114 through the first substrate integrated conductive structure 118, and the first substrate die contact 114 may be electrically and thermally connected to the first die element 110, thereby electrically and thermally connecting the first substrate terminal contact 116 to the first die element 110. The first substrate terminal contact 116 may include a pad, a trace, or any other conductive structure.

[0063] The second substrate 108 may include a second PCB or other substrate that includes and / or carries corresponding circuits or other electronic devices. Similar to the first substrate 106, in some examples, the second substrate 108 may be composed of a variety of laminate materials, such as PTFE, epoxy fiberglass (FR-4), BT-Epoxy, polyimide, or PEEK. The second substrate 108 may include a second substrate die contact 120 on a first side 108a of the second substrate 108 facing the tube core 104, and a second substrate terminal contact 122 on a second side 108b of the second substrate 108 opposite to the first side 108a of the second substrate 108 and away from the tube core 104. The second substrate terminal contact 122 is electrically and thermally connected to the second substrate die contact 120 through the second substrate integrated conductive structure 124, and the second substrate die contact 120 can be electrically and thermally connected to the second tube core element 112, thereby electrically and thermally connecting the second substrate terminal contact 122 to the second tube core element 112. The second substrate terminal contact 122 may include a pad, a trace, or any other conductive structure.

[0064] First substrate integrated conductive structure 118 and second substrate integrated conductive structure 124 may include any one or more conductive elements, respectively. In some examples, first substrate 106 and second substrate 108 may be configured as respective multi-layer substrates, wherein first substrate integrated conductive structure 118 and second substrate integrated conductive structure 124 include respective conductive elements formed in respective multiple layers of first substrate 106 and second substrate 108.

[0065] As a non-limiting example, the first substrate integrated conductive structure 118 may include a multi-layer structure including a metal inlay 130 that is: (a) connected to the first substrate die contact 114 through a set of first vias 132, and (b) connected to the first substrate terminal contact 116 through a set of second vias 134. Similarly, the second substrate integrated conductive structure 124 may include a multi-layer structure including a metal inlay 140 that is: (a) connected to the second substrate die contact 120 through a set of first vias 142, and (b) connected to the second substrate terminal contact 122 through a set of second vias 144. In some examples, the metal inlays 130 and 140 may include copper coins, copper blocks, or other metal elements integrally formed in the respective first and second substrates 106 and 108, respectively.

[0066] In other examples (e.g., as discussed below) Figure 5D As shown in FIG. 1 , the first substrate-integrated conductive structure 118 and / or the second substrate-integrated conductive structure 124 may include a single integral conductive element, such as a copper block.

[0067] In some examples, the first substrate 106, the die 104, and the second substrate 108 collectively define a conductive path CP that allows current (e.g., an electrical signal) to be transmitted from the first substrate terminal contact 116 to the second substrate terminal contact 122 (or vice versa) through the first substrate 106, the die 104, and the second substrate 108 during at least one operating mode of the die 104, at least in some operating states of the die 104. For example, in examples where the die 104 includes a transistor (e.g., a MOSFET), the conductive path CP can allow current to be transmitted from the first substrate terminal contact 116 to the second substrate terminal contact 122 (or vice versa) in an "on" state of the transistor but not in an "off" state of the transistor.

[0068] In some examples, the electronic device 100 may optionally include corresponding elements or devices mounted or otherwise coupled to the power module 102, for example, at the first substrate terminal contact 116 and / or the second substrate terminal contact 122. For example, the electronic device 100 may optionally include: a first bus bar 150, which is electrically and thermally connected to the first substrate terminal contact 116; and a second bus bar 152, which is electrically and thermally connected to the second substrate terminal contact 122. As used herein, a bus bar refers to a rigid metal rod or similar structure that carries current.

[0069] In some examples, the first busbar 150 may be a first combined busbar and heat sink device 150 to both (a) carry current to or from the die 104 (through the first substrate 106) and (b) carry heat away from the die 104 (through the first substrate 106), and the second busbar 152 may be a second combined busbar and heat sink device 152 to both (a) carry current to or from the die 104 (through the second substrate 108) and (b) carry heat away from the die 104 (through the first substrate 106). For example, the first combined busbar and heat sink device 150 may include a busbar 154 including a dielectric coating 156, and the second combined busbar and heat sink device 152 may include a busbar 160 having a dielectric coating 162, for example, as disclosed in co-pending U.S. patent application Ser. No. 17 / 976,943 ("the '943 application"), the contents of which are incorporated herein by reference.

[0070] In some examples, the respective bus bars 154 and 160 may include copper, aluminum, silver, gold, a copper alloy, an aluminum alloy, a silver alloy, or a gold alloy, and the respective dielectric coatings 156 and 162 may include a polymer, a ceramic, an epoxy, polyphenylene sulfide (PPS), a liquid crystal polymer (LCP), polytetrafluoroethylene (PTFE), polyparaxylene, polyetheretherketone (PEEK), or a combination including PEEK and polyparaxylene.

[0071] In some examples, the electronic device 100 may also optionally include a first fluid 170 thermally coupled to the first combined busbar and heat sink device 150 and a second fluid 172 thermally coupled to the second combined busbar and heat sink device 152, for example, as disclosed in the '943 application.

[0072] Figure 2 200 includes a power module 202 that includes a MOSFET die 204 mounted between a first substrate 206 and a second substrate 208. The illustrated example shows one MOSFET die 204 mounted between the first substrate 206 and the second substrate 208; however, in some examples, multiple MOSFET dies 204 may be mounted between the first substrate 206 and the second substrate 208 (e.g., Figure 3 , Figure 4 , FIG. 5A to FIG. 5C as well as Fig. 6A to the example shown in FIG. 6C ).

[0073] In this example, the MOSFET die 204 includes a drain (or drain contact) 210 on a first side 204a of the MOSFET die 204, and a source (or source contact) 211 and a gate (or gate contact) 212 on a second side 204b of the MOSFET die 204 opposite the first side 204a.

[0074] The first substrate 206 may include a first PCB or other substrate including and / or carrying corresponding circuits or other electronic devices. The first substrate 206 may include a first substrate drain contact 214 on a first side 206a of the first substrate 206 facing the MOSFET die 204, and a drain terminal contact 216 on a second side 206b of the first substrate 206 opposite to the first side 206a of the first substrate 206 and away from the MOSFET die 204. The drain terminal contact 216 may be electrically and thermally connected to the first substrate drain contact 214 through an integrated drain contact structure 218, and the first substrate drain contact 214 may be electrically and thermally connected to the drain 210, thereby electrically and thermally connecting the drain terminal contact 216 to the drain 210.

[0075] The second substrate 208 may include a second PCB or other substrate including and / or carrying corresponding circuits or other electronic devices. The second substrate 208 may include a second substrate source contact 220a and a second substrate gate contact 220b on a first side 208a of the second substrate 208 facing the MOSFET die 204, and a source terminal contact 222a on a second side 208b of the second substrate 208 opposite to the first side 208a of the second substrate 208 and away from the MOSFET die 204. The source terminal contact 222a may be electrically and thermally connected to the second substrate source contact 220a through an integrated source contact structure 224a, and the second substrate source contact 220a may be electrically and thermally connected to the source 211, thereby electrically and thermally connecting the source terminal contact 222a to the source 211.

[0076] The integrated drain contact structure 218 and the integrated source contact structure 224a may each include any one or more conductive elements. As a non-limiting example, the integrated drain contact structure 218 may include a multi-layer structure including a metal inlay 230 that: (a) is connected to the first substrate drain contact 214 through a set of first vias 232, and (b) is connected to the drain terminal contact 216 through a set of second vias 234. Similarly, the integrated source contact structure 224a may include a multi-layer structure including a metal inlay 240a that: (a) is connected to the second substrate source contact 220a through a set of first vias 242a, and (b) is connected to the source terminal contact 222a through a set of second vias 244a.

[0077] In some examples, the first substrate 206, the MOSFET die 204, and the second substrate 208 collectively define a first conductive path CP1 that allows: (a) current (e.g., an electrical signal) to be transmitted from the drain terminal contact 216 to the source terminal contact 222a (or vice versa) through the first substrate 206, the MOSFET die 204, and the second substrate 208 during at least one operating mode of the die 204, for example, at least in the "on" state of the die 204, and (b) heat to be transferred away from the die 204, for example, to the drain terminal contact 216 and the source terminal contact 222a.

[0078] In some examples, the electronic device 200 can optionally include respective conductive elements coupled to the drain terminal contact 216 and the source terminal contact 222a. For example, the electronic device 200 can optionally include a first bus bar 250 electrically and thermally connected to the drain terminal contact 216, and a second bus bar 252 electrically and thermally connected to the source terminal contact 222a, for example, as described above with reference to Figure 1 Busbars 150 and 152 are shown as discussed above.

[0079] In some examples, the first busbar 250 and the second busbar 252 can each include a combined busbar and heat sink device to both (a) convey current to or from the MOSFET die 204 and (b) convey heat away from the MOSFET die 204. For example, the first busbar 250 can be a first combined busbar and heat sink device 250, and the second busbar 252 can be a second combined busbar and heat sink device 252. The first combined busbar and heat sink device 250 and the second combined busbar and heat sink device 252 can each include a busbar including a dielectric coating, for example, as disclosed in the '943 application. In some examples, the electronic device 200 can also optionally include a first fluid 270 thermally coupled to the first combined busbar and heat sink device 250, and a second fluid 27a thermally coupled to the combined busbar and heat sink device 252, for example, as disclosed in the '943 application. The first fluid 270 and the second fluid 272 can include the same fluid or different fluids.

[0080] In some examples, the gate 212 can be connected to a gate driver circuit 260 mounted on the first side 208a of the second substrate 208 (e.g., via the second substrate gate contact 220b) or mounted on the second side 208b of the second substrate 208 (e.g., via an optional integrated gate contact structure 224b formed in the second substrate 208 and an optional second substrate gate contact 222b formed on the second side 208b of the second substrate 208). Alternatively, the gate 212 can be connected to a gate driver connector (mounted on the first side 208a or the second side 208b of the second substrate 208), thereby allowing an external gate driver circuit (e.g., provided separately from the structure of the power module 202) to be connected to the gate 212.

[0081] Figure 3 3 is a cross-sectional side view of an example power module 300, which includes a first die 304 and a second die 306 mounted between a first substrate 308 and a second substrate 310. The illustrated example shows two dies (first die 304 and second die 306); however, the power module 300 may include any number of dies; for example, the power module 300 may include a switching device including five dies, for example, as described below with reference to Figure 4 , FIG. 5A to FIG. 5C as well as Fig. 6A to the example switching device shown in FIG6C ).

[0082] exist Figure 3In the example shown, the first die 304 includes a first transistor (e.g., a first MOSFET) mounted in a first orientation (in this example, a "face up" orientation), and the second die 306 includes a second transistor (e.g., a second MOSFET) mounted in a second orientation (in this example, a "face down" orientation) that is reversed relative to the first orientation (the face up orientation) of the first die 304. According to the face up orientation of the first die 304, the first transistor includes a first transistor source 312 and a first transistor gate 314 at a first side of the first die 304, and a first transistor drain 316 at a second side of the first die 304. Figure 3 In the example orientation shown, the first side of the first die 304 is facing upward, and the second side of the first die 304 is facing downward, however this is not meant to be limiting in any way.

[0083] Furthermore, the second transistor includes a second transistor source 320 and a second transistor gate 322 at a first side of the second die 306, and a second transistor drain 324 at a second side of the second die 306, according to the face-down orientation of the second die 306. Figure 3 In the example orientation shown, the first side of the second die 306 faces downward, and the second side of the second die 306 faces upward.

[0084] The first substrate 308 may include a first PCB or other substrate that includes and / or carries corresponding circuits or other electronic devices. The first substrate 308 may be made into a multilayer structure, for example, including a conductive wiring structure formed therein. The first substrate 308 may include a first substrate source contact 330, a first substrate gate contact 332, and a first substrate drain contact 334 on a first side 308a of the first substrate 308 (facing the first tube core 304 and the second tube core 306); and a first substrate first terminal contact 336 and a first substrate second terminal contact 338 on a second side 308b of the first substrate 308 (away from the first tube core 304 and the second tube core 306). The first substrate source contact 330 is electrically and thermally connected to the first transistor source 312 (e.g., through a corresponding solder connection 326), the first substrate gate contact 332 is electrically and thermally connected to the first transistor gate 314 (e.g., through a corresponding solder connection 326), and the first substrate drain contact 334 is electrically and thermally connected to the second transistor drain 324 (e.g., through a corresponding solder connection 326).

[0085] The first substrate first terminal contact 336 is electrically and thermally connected to the first substrate source contact 330 through the integrated contact structure 340, and the first substrate second terminal contact 338 is electrically and thermally connected to the first substrate drain contact 334 through the integrated contact structure 342. The integrated contact structures 340 and 342 may include respective multi-layer conductive structures, e.g., as described above with respect to the example integrated conductive structures 118, 124, 218, 224a, and 224b.

[0086] The second substrate 310 may include a second PCB or other substrate, which includes and / or carries corresponding circuits or other electronic devices. The second substrate 310 may be made into a multilayer structure, for example, including a conductive wiring structure formed therein. The second substrate 310 may include a second substrate source contact 344, a second substrate gate contact 346, and a second substrate drain contact 348 on a first side 310a of the second substrate 310 (facing the first tube core 304 and the second tube core 306); and a second substrate terminal contact 350 on a second side 310b of the second substrate 310 (away from the first tube core 304 and the second tube core 306). The second substrate source contact 344 is electrically and thermally connected to the second transistor source 320 (e.g., through a corresponding solder connection 326), the second substrate gate contact 346 is electrically and thermally connected to the second transistor gate 322 (e.g., through a corresponding solder connection 326), and the second substrate drain contact 348 is electrically and thermally connected to the first transistor drain 316 (e.g., through a corresponding solder connection 326). The second substrate terminal contact 350 is electrically and thermally connected to both (a) the second substrate source contact 344 and (b) the second substrate drain contact 348 through an integrated contact structure 352, which may include a multi-layer conductive structure, such as described above with respect to the example integrated conductive structures 118, 124, 218, 224a, and 224b.

[0087] The first substrate 308, the first tube core 304 and the second substrate 310 jointly define a first conductive path CP1, which allows: (a) at least when the first tube core 304 is in the "on" state, current (for example, an electrical signal) to be transmitted between the first substrate first terminal contact 336 and the second substrate terminal contact 350 through the first substrate 308, the first tube core 304 and the second substrate 310; and (b) heat transfer away from the first tube core 304, for example, to the first substrate first terminal contact 336 and the second substrate terminal contact 350.

[0088] Similarly, the first substrate 308, the second tube core 364 and the second substrate 310 jointly define a second conductive path CP2, which allows: (a) current to be transmitted between the first substrate second terminal contact 338 and the second substrate terminal contact 350 through the first substrate 308, the second tube core 364 and the second substrate 310, at least in the "on" state of the second tube core 364; and (b) heat transfer away from the second tube core 364, for example, to the first substrate second terminal contact 338 and the second substrate terminal contact 350.

[0089] A molding compound or underfill 356 may be disposed between the first substrate 308 and the second substrate 310, for example, to encapsulate the first die 304 and the second die 306. In some examples, the molding compound or underfill 356 may include, for example, an epoxy polymer, an epoxy polymer with a filler (e.g., in the form of an underfill, a filler, or a mass, but not limited thereto), or a silicone gel.

[0090] The power module 300 may include additional circuit elements associated with the operation of the first die 304 and the second die 306. For example, Figure 3 As shown, the power module 300 may include a gate driver, a gate driver control circuit, and additional circuits formed in, on, or mounted on a first substrate 308 and a second substrate 310. As shown, the power module 300 may include (a) a first gate driver circuit 360a mounted on a first side 308a of the first substrate 308 and connected to a first transistor gate 314 via a first substrate gate contact 332 formed on the first substrate 308, and (b) a second gate driver circuit 360b mounted on a first side 310a of the second substrate 308 and connected to a second transistor gate 322 via a first substrate gate contact 346 formed on the second substrate 310. In an example, the first gate driver circuit 360a may be soldered to the first substrate gate contact 332 and an additional conductive trace 364a via a corresponding first solder connection 362a, and the second gate driver circuit 360b may be soldered to the second substrate gate contact 346 and an additional conductive trace 364b via a corresponding second solder connection 362b.

[0091] In some examples, the power module 300 may further include a gate driver control circuit to control the corresponding first gate driver circuit 360a and the second gate driver circuit 360b. Figure 3As shown, the power module 300 may include (a) a first gate driver control circuit 366a mounted on the first substrate 308 and connected to the first gate driver circuit 360a (e.g., via traces formed on the first substrate 308 and / or extending through internal conductive structures of the first substrate 308), and (b) a second gate driver control circuit 366b mounted on the second substrate 310 and connected to the second gate driver circuit 360b (e.g., via traces formed on the second substrate 310 and / or extending through internal conductive structures of the first substrate 310). Alternatively, the power module 300 may include a PCB connector or other connector to connect to a separate gate driver control circuit (i.e., not mounted on the first substrate 308 or the second substrate 310) to control the respective first gate driver circuit 360a and the second gate driver circuit 360b. For example, Figure 3 An example first connector structure 368a is shown for connecting to a corresponding gate driver control circuit to control the first gate driver circuit 360a and an example second connector structure 368b is shown for connecting to a corresponding gate driver control circuit to control the second gate driver circuit 360b.

[0092] In some examples, electronic devices as disclosed herein (e.g., one or more instances of power module 300 discussed above) may be arranged in various circuit topologies, such as, but not limited to, a half-bridge topology, an H-bridge topology, a single-phase inverter topology, a three-phase inverter topology, a neutral point clamped (NPC) topology, a mixed voltage NPC (MNPC), or an active NPC (ANPC) topology.

[0093] Figure 4 is a cross-sectional side view of an example single-phase inverter module 400 (also referred to as inverter 400 for convenience) including Figure 3 The example power module 300 shown and discussed above. As described above, the example power module 300 includes a pair of MOSFET dies (a first die 304 and a second die 306) arranged between a first substrate 308 and a second substrate 310, wherein the first die 304 is arranged in a face-up orientation and the second die 306 is arranged in a face-down orientation (i.e., inverted relative to the first die 304).

[0094] The inverter 400 includes a DC power source 402 connected to the first transistor source 312 and the second transistor drain 324, and a load 410 (e.g., a motor) connected to the first transistor drain 316 and the second transistor source 320 (i.e., connected to the second substrate terminal contact 350). In particular, the DC power source 402 may include (a) a DC+ terminal connected to the first substrate second terminal contact 338 (which is connected to the second transistor drain 324 via the integrated contact structure 342 and the first substrate source contact 334) through the first combined busbar / heatsink 422, and (b) a DC- terminal connected to the first substrate first terminal contact 336 (which is connected to the second transistor source 312 via the integrated contact structure 340 and the first substrate source contact 330) through the second combined busbar / heatsink 420. A load 410 (e.g., a motor) can be connected to a second substrate terminal contact 350 (which is (a) connected to the first transistor drain 316 via an integrated contact structure 352 and a second substrate drain contact 348, and (b) connected to the second transistor source 320 via an integrated contact structure 352 and a second substrate source contact 344) via a third combined busbar / heat sink 424.

[0095] In some examples, first combined busbar / heat sink 422, second combined busbar / heat sink 420, and third combined busbar / heat sink 424 may each include a busbar including a dielectric coating, for example, as disclosed in the '943 application. Figure 4 As shown, inverter 400 may include a first fluid 430 thermally coupled to a first combined busbar / heat sink 422, a second fluid 432 thermally coupled to a second combined busbar / heat sink 420, and a third fluid 434 thermally coupled to a third combined busbar / heat sink 424, for example, as disclosed in the '943 application.

[0096] FIG. 5A to FIG. 5D An example switch module 500 is shown, which includes: a first switch 502, which includes five first switch dies 504a-504e; and a second switch 506, which includes five second switch dies 508a-508e, wherein the first switch dies 504a-504e and the second switch dies 508a-508e are arranged between a first substrate 510 and a second substrate 512.

[0097] Figure 5A 1 and 12 are shown in a partially assembled state before mounting the first substrate 510 and the second substrate 512 to each other. In particular, Figure 5AThe first substrate 510 and the second substrate 512 are shown in a "face-up" orientation, wherein the first side 510a of the first substrate 510 and the first side 512a of the second substrate 512 are visible. As shown, the first switch dies 504a-504e (connected in parallel) are mounted on the first side 510a of the first substrate 510 along with the source contact 520 and the gate contact 522 to form a switch module 500 (such as FIG. 5B to FIG. 5D The first gate driver circuit 524 is connected to the gate contact 522. The first gate driver circuit 524 may include, for example, an ASIC chip, a capacitor, a gate resistor, a diode, and other circuit elements for driving the corresponding gates of the second switch dies 508a-508e via the corresponding gate contacts 522 (in the fully assembled state shown in FIG. FIG. 5B to FIG. 5D 5. The switch module 500 is shown in a fully assembled state).

[0098] The first switch dies 504a-504e may be mounted on corresponding drain contacts (not shown) formed on the first substrate 510. In the illustrated example, the first switch dies 504a-504e and the source contact 520 are conductively connected to an AC output terminal pad 526 integrated in the first substrate 510. The AC output terminal pad 526 may be exposed on the second side 510b of the first substrate 510, as shown in FIG. Figure 5C shown.

[0099] Similarly, second switch dies 508a-508e (connected in parallel) are mounted on the first side 512a of the second substrate 512 together with source contacts 530 and gate contacts 532 to contact the first switch dies 504a-504e in the fully assembled state of the switch module 500, and second gate driver circuits 534 are connected to the gate contacts 532. The second gate driver circuits 534 may include, for example, ASIC chips, capacitors, gate resistors, diodes, and other circuit elements for driving the respective gates of the first switch dies 504a-504e via the respective gate contacts 532 (in the embodiment of FIG. FIG. 5B to FIG. 5D 5. The switch module 500 is shown in a fully assembled state).

[0100] The second switch dies 508a-508e may be mounted on corresponding drain contacts (not shown) formed on the second substrate 512. In the illustrated example, the second switch dies 508a-508e are conductively connected to a DC+ terminal pad 536 integrated in the second substrate 512, and the source contact 530 is conductively connected to a DC- terminal pad 537 integrated in the second substrate 512. The DC+ terminal pad 536 and the DC- terminal pad 537 may be exposed on the second side 512b of the second substrate 512, as shown in FIG. Figure 5B Shown

[0101] In some examples, the respective gate contacts 522 are connected to the first gate driver circuit 524 via respective conductive traces 528 formed on the first substrate 510, and the respective gate contacts 532 are connected to the second gate driver circuit 534 via respective conductive traces 538 formed on the second substrate 512, thereby eliminating the need for wire bonds or off-module interconnects required in certain conventional devices.

[0102] Figure 5B 1 shows a top view of the switch module 500 in an assembled state, wherein the first side 510a of the first substrate 510 is mounted against the first side 512a of the second substrate 512. In particular, Figure 5B A first substrate 510 is shown oriented face-up and a second substrate 512 is oriented face-down (ie, from Figure 5A 10 is flipped over the face-up orientation shown), showing the second side 512b of the second substrate 512. In the assembled state, the respective first switch dies 504a-504e mounted on the first substrate 510 are connected to the source contact 530 and the gate contact 532 disposed on the second substrate 512 (e.g., by respective solder joints), and the respective second switch dies 508a-508e mounted on the second substrate 512 are connected to the source contact 520 and the gate contact 522 disposed on the first substrate 510 (e.g., by respective solder joints).

[0103] like Figure 5B As shown, DC+ terminal pad 536 and DC- terminal pad 537 are exposed on second side 512b of second substrate 512. DC+ terminal pad 540 is electrically and thermally connected to first switch dies 504a-504e, and DC- terminal pad 542 is electrically and thermally connected to second switch dies 508a-508e.

[0104] Figure 5C A bottom view of the switch module 500 in an assembled state is shown, showing the second side 510b of the first substrate 510. As shown, the AC output terminal pads 526 are exposed on the second side 510b of the first substrate 510. The AC output terminal pads 526 are electrically and thermally connected to the first switch dies 504a-504e and the second switch dies 508a-508e.

[0105] Figure 5D 5 is a cross-sectional side view of the switch module 500 in an assembled state, wherein respective electronic devices on the first substrate 510 are mounted to opposing electronic devices on the second substrate 512. In particular, Figure 5D Shown through Figure 5B5D-5D, which cuts through the first switch die 504c of the first switch 502 and the second switch die 508c of the second switch 506. As shown, the first switch die 504c is mounted to the AC output terminal pad 526 formed in the first substrate 510, the second switch die 508c is mounted to the DC+ output terminal pad 536 formed in the second substrate 512, and the corresponding source contact 530 is mounted to the DC- output terminal pad 537 formed in the second substrate 512. The first switch die 504c can be bonded to the corresponding source contact 530 disposed on the second substrate 512, for example, by solder bonding 550, and the second switch die 508c can be bonded to the corresponding source contact 520 disposed on the first substrate 510, for example, by solder bonding 550.

[0106] like Figure 5D As shown, the AC output terminal pad 526, the first switch die 504c, and the DC- output terminal pad 537 collectively define a first conductive path CP1 that allows heat transfer away from the first switch die 504c and conduction of current (e.g., electrical signals) to and / or from the first switch die 504c. In addition, the AC output terminal pad 526, the second switch die 508c, and the DC+ output terminal pad 536 collectively define a second conductive path CP2 that allows heat transfer away from the first switch die 508c and conduction of current (e.g., electrical signals) to and / or from the second switch die 508c.

[0107] Fig. 6A and Figure 6B Various views of an example three-phase inverter module 600 are shown according to one example. Fig. 6A A first side view (eg, top view) is shown showing the first substrate 610 including a DC+ power supply terminal pad 636 and a DC- power supply terminal pad 637 . Figure 6B A second side view (e.g., bottom view) is shown showing a second substrate 612 including three single-phase AC terminal pads 626a, 626b, and 626c (also referred to as P1, P2, and P3 terminals) for connecting to a three-phase AC load, such as a motor (not shown). A corresponding set of dies (e.g., defining one or more switches) can be connected between the assembled first substrate 610 and the second substrate 612, such as first switch dies 504a-504e defining the first switch 502 and second switch dies 504a-504e defining the second switch 506 similar to the example switch module 500 discussed above.

[0108] Although example embodiments have been described above, other modifications and embodiments may be made by this disclosure without departing from the spirit and scope of these embodiments.

Claims

1. An electronic device, comprising: A tube die is installed between the first substrate and the second substrate, and the tube die includes: a first die element at a first side of the die; a second die element at a second side of the die opposite the first side of the die; The first substrate comprises: a first substrate die contact on a first side of the first substrate, the first substrate die contact being electrically and thermally connected to the first die element; and a first substrate terminal contact on a second side of the first substrate opposite the first side of the first substrate, the first substrate terminal contact being electrically and thermally connected to the first substrate die contact; The second substrate comprises: a second substrate die contact on the first side of the second substrate, the second substrate die contact being electrically and thermally connected to the second die element; and A second substrate terminal contact on a second side of the second substrate opposite the first side of the second substrate, the second substrate terminal contact being electrically and thermally connected to the second substrate die contact.

2. The electronic device of claim 1 , wherein the first substrate, the die, and the second substrate together define a conductive path that allows current to be transferred from the first substrate terminal contact to the second substrate terminal contact through the first substrate, the die, and the second substrate during at least one operating mode of the die.

3. The electronic device according to any one of claims 1 to 2, comprising: a first substrate integrated conductive structure extending through a thickness of the first substrate to electrically and thermally connect the first substrate die contact with the first substrate terminal contact; as well as A second substrate integrated conductive structure extends through a thickness of the second substrate to electrically and thermally connect the second substrate die contact with the second substrate terminal contact. 4 . The electronic device according to claim 1 , wherein the first substrate comprises a first printed circuit board, and the second substrate comprises a second printed circuit board.

5. The electronic device according to any one of claims 1 to 4, wherein: The die includes a vertical transistor; The first die element includes a source of the vertical transistor; The second die element includes a drain of the vertical transistor; The first substrate die contact on the first side of the first substrate comprises a source contact; and The second substrate die contact on the first side of the second substrate includes a drain contact.

6. The electronic device according to claim 5, wherein: The die includes a gate terminal of the vertical transistor; the first substrate comprising a gate contact on the first side of the first substrate; The electronic device includes: a gate driver mounted on the first substrate and connected to the gate contact; and A gate driver control circuit is mounted on the first substrate and connected to the gate driver.

7. The electronic device according to any one of claims 1 to 6, comprising: a first bus bar electrically and thermally connected to the first substrate terminal contact; and A second bus bar is electrically and thermally connected to the second substrate terminal contact.

8. The electronic device according to claim 7, comprising: a power source connected to the first bus; and A load is connected to the second bus bar.

9. The electronic device according to claim 7, wherein: The first busbar includes a first combined busbar and a heat sink device; The second busbar includes a second combined busbar and a heat sink device; A first fluid is thermally coupled to the first combined busbar and the heat sink device; and A second fluid is thermally coupled to the second combined busbar and the heat sink device.

10. An electronic device, comprising: a first substrate; a second substrate; a first die comprising a first transistor mounted in a first orientation, the first transistor comprising a first transistor source at a first side of the first die, a first transistor gate at the first side of the first die, and a first transistor drain at a second side of the first die; and a second die comprising a second transistor mounted in a second orientation that is inverted relative to the first orientation, the second transistor comprising a second transistor source at a first side of the second die, a second transistor gate at the first side of the second die, and a second transistor drain at a second side of the second die; The first substrate comprises: a first substrate source contact, a first substrate gate contact, and a first substrate drain contact on a first side of the first substrate, the first substrate source contact connected to the first transistor source, the first substrate gate contact connected to the first transistor gate, and the first substrate drain contact connected to the second transistor drain; and a first substrate first terminal contact and a first substrate second terminal contact on a second side of the first substrate opposite the first side of the first substrate, the first substrate first terminal contact conductively connected to the first substrate source contact and the first substrate second terminal contact conductively connected to the first substrate drain contact; and The second substrate comprises: a second substrate source contact, a second substrate gate contact, and a second substrate drain contact on a first side of the second substrate, the second substrate source contact connected to the second transistor source, the second substrate gate contact connected to the second transistor gate, and the second substrate drain contact connected to the first transistor drain; and A second substrate terminal contact on a second side of the second substrate opposite the first side of the second substrate, the second substrate terminal contact conductively connected to the second substrate source contact and the second substrate drain contact. 11 . The electronic device of claim 10 , wherein the first substrate comprises a first printed circuit board, and the second substrate comprises a second printed circuit board.

12. The electronic device according to any one of claims 10 to 11, wherein the electronic device comprises an inverter.

13. The electronic device of any one of claims 10 to 12, comprising a gate driver mounted on the first side of the first substrate and connected to the first substrate gate contact.

14. The electronic device according to any one of claims 10 to 13, comprising: a first bus bar electrically and thermally connected to the first substrate first terminal contact; a second bus bar electrically and thermally connected to the first substrate second terminal contact; and A third bus bar is electrically and thermally connected to the second substrate terminal contact.

15. The electronic device according to claim 14, comprising: a power source connected to one of the first bus and the second bus; and A load is connected to the third bus bar.

16. The electronic device according to claim 14, wherein: The first busbar comprises a first combined busbar and a heat sink device; and The second busbar includes a second combined busbar and a heat sink device.

17. An electronic device, comprising: a first substrate comprising a first integrated conductive structure extending through a thickness of the first substrate, the first integrated conductive structure connecting a first substrate die contact on a first side of the first substrate to a first substrate terminal contact on a second side of the first substrate; a second substrate including a second integrated conductive structure extending through a thickness of the second substrate, the second integrated conductive structure connecting a second substrate die contact on a first side of the second substrate to a second substrate terminal contact on a second side of the second substrate; and A tube core is arranged between the first substrate and the second substrate, and the tube core has (a) a first side electrically and thermally coupled to the first substrate tube core contact on the first side of the first substrate, and (b) a second side electrically and thermally coupled to the second substrate tube core contact on the first side of the second substrate.

18. The electronic device of claim 17, wherein the first substrate, the die, and the second substrate together define a conductive path that allows current to be transferred from the first substrate terminal contact to the second substrate terminal contact through the first substrate, the die, and the second substrate during at least one operating mode of the die.

19. The electronic device according to any one of claims 17 to 18, wherein the first substrate comprises a first printed circuit board, and the second substrate comprises a second printed circuit board.

20. An electronic device according to any one of claims 17 to 19, wherein the first integrated conductive structure extending through the thickness of the first substrate includes a metal inlay, which is: (a) connected to the first substrate die contact on the first side of the first substrate through a set of first through holes, and (b) connected to the first terminal contact on the second side of the first substrate through a set of second through holes.

Citation Information

Patent Citations

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