Chip drawing force test fixture and chip drawing force test method

Abstract

The invention relates to a chip drawing force test fixture and a chip drawing force test method. The chip drawing force testing clamp comprises a supporting mechanism, a bonding plate and a connecting mechanism, the bonding plate is fixed to the supporting mechanism, the bonding plate comprises a first bonding face used for being in bonding fit with the first surface of a to-be-tested chip, and the orthographic projection of the first bonding face on the first surface can cover the first surface. One end of the connecting mechanism is provided with a second bonding surface used for being bonded and matched with the second surface of the chip to be tested, the orthographic projection of the second bonding surface on the second surface can cover the second surface, and the other end of the connecting mechanism is used for being connected to a universal testing machine. According to the chip drawing force test fixture and the chip drawing force test method, the drawing force test requirement of a large-size and high-density flip chip can be met, and the accuracy of the drawing force test of the flip chip is ensured.

Description

Technical Field

[0001] The present application relates to the technical field of chip pull-out force testing, and in particular to a chip pull-out force testing fixture and a chip pull-out force testing method. Background Art

[0002] With the continuous development of integrated circuit packaging, semiconductor chips have shifted from upright technology to flip-chip technology. The interconnection method between the chip and the packaging substrate has also gradually evolved from wire bonding to flip-chip solder joints and other forms. In order to improve the mechanical properties of the flip chip, after the chip and the packaging substrate are interconnected, bottom filler may be used to fill the gaps in the chip's ball grid array or bumps. In order to detect the mechanical properties of the flip chip, it is usually necessary to perform a pull-out force test on the chip after the flip chip is packaged. The basic principle of the chip pull-out force test is to apply a tensile force to the chip, observe the separation between the various structural layers in the chip, and record the force required for separation.

[0003] In the related technical structure, usually the chip is fixed with a fixture first, and then a tensile force is applied to the chip to complete the pull-out force test. However, with the increase in the number of bonding points per unit area of ​​the flip chip and the use of bottom filling glue, its pull-out force far exceeds the applicable range of the related technology. Continuing to use the related technology for testing will result in the inability to accurately obtain the specific pull-out force value, and it is even easy to cause the flip chip to partially break during the pull-out force test, affecting the test results. Summary of the invention

[0004] Based on this, it is necessary to provide a chip pull-out force test fixture and a chip pull-out force test method to improve the accuracy and applicability of flip chip pull-out force test.

[0005] On the one hand, the present application provides a chip pull-out force test fixture, comprising:

[0006] Support mechanism;

[0007] An adhesive plate, the adhesive plate being fixed to the supporting mechanism, the adhesive plate comprising a first adhesive surface for bonding with the first surface of the chip to be tested, the orthographic projection of the first adhesive surface on the first surface being able to cover the first surface;

[0008] A connecting mechanism, one end of which has a second bonding surface for bonding with the second surface of the chip to be tested, and the orthographic projection of the second bonding surface on the second surface can cover the second surface, and the other end of the connecting mechanism is used to connect to the universal testing machine.

[0009] The technical solution is further described below:

[0010] In one embodiment, the support mechanism comprises:

[0011] Base;

[0012] A cover plate is detachably connected to the base, a limiting space for accommodating the adhesive plate is formed between the cover plate and the base, and a clearance opening for avoiding the chip to be tested is formed through the cover plate.

[0013] In one embodiment, the base is provided with a threaded hole, the cover plate is provided with a through hole aligned with the threaded hole, the support mechanism further includes a threaded fastener, the threaded fastener is passed through the through hole and threadedly engaged with the threaded hole, and the screw head of the threaded fastener is limitedly engaged with the cover plate.

[0014] In one embodiment, the connecting mechanism comprises:

[0015] A connecting piece, one end surface of which forms the second bonding surface, and the other end of which is provided with a hanging ring;

[0016] A hook is connected to the lifting ring and is used to be connected to the universal testing machine.

[0017] In one embodiment, the connection mechanism includes at least two threaded positioning members, all of which are used to be threadedly connected to the universal testing machine in pairs, and all of which clamp the hook together.

[0018] In one embodiment, the area of ​​the first bonding surface is not less than three times the area of ​​the first surface; and / or,

[0019] The area of ​​the second bonding surface is 1.2 to 1.5 times the area of ​​the second surface; and / or,

[0020] The bonding board includes any one of a PCB board, a metal board and a ceramic board; and / or,

[0021] The bonding plate and the chip to be tested are bonded by colloid, and the connecting mechanism and the chip to be tested are bonded by colloid, and the colloid includes any one of epoxy structural adhesive and acrylate structural adhesive.

[0022] On the other hand, the present application also provides a chip pull-out force testing method, comprising the following steps:

[0023] Adhere the first adhesive surface of the adhesive plate to the first surface of the chip to be tested, and make the orthographic projection of the first adhesive surface on the first surface cover the first surface;

[0024] Adhere the second bonding surface of the connecting mechanism to the second surface of the chip to be tested, and make the orthographic projection of the second bonding surface on the second surface cover the second surface;

[0025] securing the adhesive plate to a support mechanism, and connecting the connecting mechanism to a universal testing machine;

[0026] Applying a tensile force to the connecting mechanism by the universal testing machine;

[0027] The variation curve of the pull-out force of the chip to be tested with the displacement of the output end of the universal testing machine is recorded to determine the maximum pull-out force and the fracture mode of the chip to be tested.

[0028] In one embodiment, before the step of bonding the first bonding surface of the bonding board to the first surface of the chip to be tested, the following steps are also included:

[0029] The first bonding surface and the first surface are polished to increase the surface roughness of the first bonding surface and the first surface.

[0030] In one embodiment, the step of bonding the first bonding surface of the bonding plate to the first surface of the chip to be tested and the step of bonding the second bonding surface of the connecting mechanism to the second surface of the chip to be tested specifically include the following steps:

[0031] A protective film is arranged on the side of the chip to be tested;

[0032] The first surface and the second surface of the chip to be tested are both coated with colloid;

[0033] attaching the first adhesive surface of the adhesive plate to the colloid on the first surface;

[0034] Adhere the second adhesive surface of the connecting mechanism to the colloid on the second surface;

[0035] solidifying the colloid;

[0036] The protective film is removed.

[0037] In one embodiment, the step of applying a tensile force to the connecting mechanism by the universal testing machine specifically includes the following steps:

[0038] Setting the stretching rate of the universal testing machine to 0.5 mm / min-10 mm / min;

[0039] The universal testing machine is made to continuously apply a tensile force to the connecting mechanism in a direction perpendicular to the second surface until the chip to be tested is broken or the tensile force reaches a preset test specified value.

[0040] In the chip pull-out force test fixture and chip pull-out force test method, by bonding the first adhesive surface of the adhesive plate to the first surface of the chip to be tested, connecting the second adhesive surface of the connecting mechanism to the second surface of the chip to be tested, and then fixing the adhesive plate to the support mechanism, the connecting mechanism is connected to the universal testing machine, and the universal testing machine applies a pulling force to the chip to be tested through the connecting mechanism, the pull-out force test of the chip to be tested can be realized. Compared with the traditional test method, the chip pull-out force test fixture of the present application can be used to connect the chip to be tested to the universal testing machine, and the universal testing machine can be used to apply a pulling force to the chip to be tested, which can increase the test range, improve the controllability of the force direction and force speed, and the test results have good repeatability, which can meet the pull-out force test requirements of large-size and high-density flip chips, and ensure the accuracy of the pull-out force test of flip chips. Furthermore, since the orthographic projection of the first bonding surface of the bonding plate on the first surface of the chip to be tested can cover the first surface, and the orthographic projection of the second bonding surface of the connecting mechanism on the second surface of the chip to be tested can cover the second surface, it is ensured that the bonding area between the bonding plate and the chip to be tested can cover the entire first surface of the chip to be tested, and the bonding area between the connecting mechanism and the chip to be tested can cover the entire second surface of the chip to be tested. This ensures that when the universal testing machine applies a tensile force to the chip to be tested, the first surface and the second surface of the chip to be tested are uniformly stressed, thereby avoiding the problem of local breakage of the chip to be tested caused by stress concentration and affecting the test results. BRIEF DESCRIPTION OF THE DRAWINGS

[0041] The drawings constituting a part of the present application are used to provide a further understanding of the present application. The illustrative embodiments of the present application and their descriptions are used to explain the present application and do not constitute an improper limitation on the present application.

[0042] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings required for use in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0043] In addition, the drawings are not drawn to a 1:1 scale, and the relative sizes of the various elements are drawn only as examples in the drawings and are not necessarily drawn according to the true scale.

[0044] FIG. 1 is a schematic diagram of a chip pull-out force testing fixture according to an embodiment of the present invention.

[0045] FIG. 2 is a schematic diagram showing the connection between an adhesive plate, a chip and a connector according to an embodiment of the present invention.

[0046] FIG. 3 is a flow chart of a chip pull-out force testing method according to an embodiment of the present invention.

[0047] Description of reference numerals:

[0048] 10. Support mechanism; 11. Base; 12. Cover plate; 121. Avoidance; 13. Threaded fastener; 14. Limiting space; 20. Adhesive plate; 21. First bonding surface; 30. Connecting mechanism; 31. Connector; 311. Hanging ring; 312. Second bonding surface; 32. Hook; 33. Threaded positioning member; 40. Universal testing machine; 50. Chip to be tested; 51. First surface; 52. Second surface; 60. Colloid. DETAILED DESCRIPTION

[0049] In order to make the above-mentioned purposes, features and advantages of the present application more obvious and easy to understand, the specific implementation methods of the present application are described in detail below in conjunction with the accompanying drawings. In the following description, many specific details are set forth to facilitate a full understanding of the present application. However, the present application can be implemented in many other ways different from those described herein, and those skilled in the art can make similar improvements without violating the connotation of the present application, so the present application is not limited by the specific embodiments disclosed below.

[0050] In the description of the present application, it should be understood that if the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside", "clockwise", "counterclockwise", "axial", "radial", "circumferential", etc. appear, the orientation or position relationship indicated by these terms is based on the orientation or position relationship shown in the accompanying drawings, which is only for the convenience of describing the present application and simplifying the description, and does not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation on the present application.

[0051] In addition, if the terms "first" or "second" appear, these terms are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Therefore, a feature defined as "first" or "second" may explicitly or implicitly include at least one of the features. In the description of this application, if the term "plurality" appears, the meaning of "plurality" is at least two, such as two, three, etc., unless otherwise clearly and specifically defined.

[0052] In this application, unless otherwise clearly specified and limited, if the terms "installed", "connected", "connected", "fixed" and the like appear, these terms should be understood in a broad sense. For example, it can be a fixed connection, a detachable connection, or an integrated connection; it can be a mechanical connection or an electrical connection; it can be a direct connection or an indirect connection through an intermediate medium, it can be the internal connection of two elements or the interaction relationship between two elements, unless otherwise clearly defined. For ordinary technicians in this field, the specific meanings of the above terms in this application can be understood according to the specific circumstances.

[0053] In the present application, unless otherwise clearly specified and limited, if there is a description that a first feature is "above" or "below" a second feature, etc., or similar descriptions appear, it may mean that the first and second features are in direct contact, or that the first and second features are in indirect contact through an intermediate medium. Moreover, the first feature being "above", "above" and "above" the second feature may mean that the first feature is directly above or obliquely above the second feature, or simply means that the first feature is higher in level than the second feature. The first feature being "below", "below" and "below" the second feature may mean that the first feature is directly below or obliquely below the second feature, or simply means that the first feature is lower in level than the second feature.

[0054] It should be noted that if an element is referred to as being "fixed to" or "disposed on" another element, it may be directly on the other element or there may be a central element. If an element is considered to be "connected to" another element, it may be directly connected to the other element or there may be a central element at the same time. If any, the terms "vertical", "horizontal", "upper", "lower", "left", "right" and similar expressions used in this application are for illustrative purposes only and do not represent the only implementation method.

[0055] An embodiment of the present application provides a chip pull-out force test fixture for holding a chip 50 to be tested during a pull-out force test, wherein the chip 50 to be tested may include a BGA flip chip, a solder bump flip chip, a copper pillar bump flip chip, or a hybrid bonded flip chip, etc., and the surface material of the chip 50 to be tested may be a bare silicon wafer, a metal shell, and a plastic packaging material, etc., and the chip pull-out force test fixture of the present application may be applicable to all of them.

[0056] Specifically, referring to FIG. 1 and FIG. 2 , a chip pull-out force test fixture of an embodiment includes a support mechanism 10, an adhesive plate 20 and a connecting mechanism 30. The adhesive plate 20 is fixed to the support mechanism 10. The adhesive plate 20 includes a first adhesive surface 21 for bonding with a first surface 51 of a chip to be tested 50, and the orthographic projection of the first adhesive surface 21 on the first surface 51 can cover the first surface 51. One end of the connecting mechanism 30 has a second adhesive surface 312 for bonding with a second surface 52 of the chip to be tested 50, and the orthographic projection of the second adhesive surface 312 on the second surface 52 can cover the second surface 52. The other end of the connecting mechanism 30 is used to connect to a universal testing machine 40. The first surface 51 and the second surface 52 of the chip to be tested 50 are two opposite surfaces on the chip to be tested 50. The universal testing machine 40 is a mechanical testing machine that can perform various tests such as tension, compression, bending and torsion.

[0057] In the chip pull-out force test fixture, by bonding the first adhesive surface 21 of the adhesive plate 20 to the first surface 51 of the chip to be tested 50, connecting the second adhesive surface 312 of the connection mechanism 30 to the second surface 52 of the chip to be tested 50, and then fixing the adhesive plate 20 to the support mechanism 10, the connection mechanism 30 is connected to the universal testing machine 40, and the universal testing machine 40 applies a pulling force to the chip to be tested 50 through the connection mechanism 30, the pull-out force test of the chip to be tested 50 can be realized. Compared with the traditional test method, the chip pull-out force test fixture of the present application can connect the chip to be tested 50 to the universal testing machine 40, and the universal testing machine 40 applies a pulling force to the chip to be tested 50, which can increase the test range, improve the controllability of the force direction and force speed, and the test result has good repeatability, which can meet the pull-out force test requirements of large-size and high-density flip chips, and ensure the accuracy of the pull-out force test of flip chips. Furthermore, since the orthographic projection of the first adhesive surface 21 of the adhesive plate 20 on the first surface 51 of the chip to be tested 50 can cover the first surface 51, and the orthographic projection of the second adhesive surface 312 of the connecting mechanism 30 on the second surface 52 of the chip to be tested 50 can cover the second surface 52, it is ensured that the adhesive area between the adhesive plate 20 and the chip to be tested can cover the entire first surface 51 of the chip to be tested, and the adhesive area between the connecting mechanism 30 and the chip to be tested can cover the entire second surface 52 of the chip to be tested. This ensures that when the universal testing machine 40 applies a tensile force to the chip to be tested 50, the first surface 51 and the second surface 52 of the chip to be tested 50 are uniformly stressed, thereby avoiding the problem of local breakage of the chip to be tested 50 due to stress concentration, which affects the test results.

[0058] Referring to Fig. 1, optionally, in one embodiment, the support mechanism 10 includes a base 11 and a cover plate 12, the cover plate 12 and the base 11 are detachably connected, a limited space 14 for accommodating the adhesive plate 20 is formed between the cover plate 12 and the base 11, and the cover plate 12 is provided with a bypass opening 121 for avoiding the chip to be tested 50. Specifically, after the adhesive plate 20 and the connecting mechanism 30 are respectively bonded to the first surface 51 and the second surface 52 of the chip to be tested 50, the adhesive plate 20 together with the chip to be tested 50 and the connecting mechanism 30 are placed on the base 11, and then the cover plate 12 is covered on the adhesive plate 20, so that the test chip and the connecting mechanism 30 pass through the bypass opening 121, and finally the cover plate 12 is fixed on the base 11, so that the adhesive plate 20 can be limited in the limited space 14.

[0059] Optionally, in one embodiment, the base 11 is provided with a threaded hole, the cover plate 12 is provided with a through hole aligned with the threaded hole, and the support mechanism 10 further includes a threaded fastener 13, the threaded fastener 13 is inserted into the through hole and threadedly matched with the threaded hole, and the screw head of the threaded fastener 13 is limitedly matched with the cover plate 12. The cover plate 12 is locked on the base 11 by the threaded fastener 13, so that the cover plate 12 can be easily disassembled and assembled. Exemplarily, in one embodiment, the cover plate 12 is provided with a plurality of through holes, each of which is arranged at intervals along the outer periphery of the avoidance opening 121, and each through hole is provided with a threaded fastener 13, and correspondingly, the base 11 is provided with a plurality of threaded holes, and each threaded fastener 13 is threadedly matched with each threaded hole one by one, thereby improving the connection stability between the cover plate 12 and the base 11. Exemplarily. The threaded fastener 13 can be a bolt.

[0060] Optionally, in one embodiment, the base 11 is an I-shaped structure. The I-shaped base 11 has good stability and can effectively save material costs.

[0061] Referring to FIG. 1 , optionally, in one embodiment, the connection mechanism 30 includes a connection member 31 and a hook 32, wherein one end surface of the connection member 31 forms a second bonding surface 312, and the other end of the connection member 31 is provided with a hanging ring 311. The hook 32 is hooked on the hanging ring, and the hook 32 is used to connect with the universal testing machine 40. Specifically, before the test, the connection member 31 is first bonded to the chip to be tested 50, and the hook 32 is fixed to the universal testing machine 40. During the test, the hook 32 is used to hook the hanging ring 311 on the connection member 31, and the universal testing machine 40 can apply a tensile force to the chip to be tested 50 through the hook 32 and the connection member 31.

[0062] Further, the connection mechanism 30 includes at least two threaded positioning members 33, all of which are used to be threadedly connected to the universal testing machine 40 in pairs, and all of the threaded positioning members 33 clamp the hook 32 together. Exemplarily, in one embodiment, the number of threaded positioning members 33 is four, two of which are arranged oppositely along the X-axis direction, and the other two threaded positioning members 33 are arranged oppositely along the Y-axis direction. The hook 32 is arranged between the four threaded positioning members 33, and one end of the four threaded positioning members 33 abuts against the hook 32 to clamp and fix the hook 32. In this way, by adjusting any two relative threaded positioning members 33, the position of the hook 32 can be adjusted in the relative direction of the two threaded positioning members 33, ensuring that the hook 32 can accurately hook the ring 311.

[0063] Optionally, in one embodiment, the area of ​​the first bonding surface 21 is not less than three times the area of ​​the first surface 51. In this way, while ensuring that the adhesive plate 20 can cover the first surface 51 of the chip to be tested 50, the contact area between the adhesive plate 20 and the cover plate 12 is increased, thereby improving the connection stability between the adhesive plate 20 and the support mechanism 10.

[0064] Optionally, in one embodiment, the area of ​​the second bonding surface 312 is 1.2 times to 1.5 times the area of ​​the second surface 52, for example, 1.2 times, 1.3 times, 1.4 times or 1.5 times, etc. Specifically, if the area of ​​the second bonding surface 312 is too small, the connection mechanism 30 cannot cover the second surface 52 of the chip to be tested 50, and if the area of ​​the second bonding surface 312 is too large, materials will be wasted. Therefore, by configuring the area of ​​the second bonding surface 312 to be 1.2 times to 1.5 times the area of ​​the second surface 52, while ensuring that the connection mechanism can cover the second surface 52 of the chip to be tested 50, the material cost of the connection mechanism 30 is reduced.

[0065] Optionally, in one embodiment, the adhesive plate 20 includes any one of a PCB board, a metal plate and a ceramic plate, which is not limited here.

[0066] Optionally, in one embodiment, the adhesive plate 20 and the chip to be tested 50 are bonded by a colloid 60, and the connecting mechanism 30 and the chip to be tested 50 are also bonded by a colloid 60, wherein the colloid 60 includes any one of epoxy structural adhesive and acrylate structural adhesive, which is not limited here.

[0067] Referring to FIG. 3 , in one embodiment, the present application further provides a chip pull-out force testing method. Specifically, the chip pull-out force testing method of one embodiment includes the following steps:

[0068] S110: Adhere the first adhesive surface 21 of the adhesive plate 20 to the first surface 51 of the chip to be tested 50, and make the orthographic projection of the first adhesive surface 21 on the first surface 51 cover the first surface 51;

[0069] S120: Adhere the second bonding surface 312 of the connection mechanism 30 to the second surface 52 of the chip to be tested 50, and make the orthographic projection of the second bonding surface 312 on the second surface 52 cover the second surface 52;

[0070] S130: fixing the adhesive plate 20 to the supporting mechanism 10, and connecting the connecting mechanism 30 to the universal testing machine 40;

[0071] S140: applying a tensile force to the connecting mechanism 30 through the universal testing machine 40;

[0072] S150: Record the variation curve of the pull-out force of the chip to be tested 50 with the displacement of the output end of the universal testing machine 40, and determine the maximum pull-out force and fracture mode of the chip to be tested 50.

[0073] The maximum pull-out force of the chip to be tested 50 is the maximum pull-out force in the pull-out force curve of the chip to be tested 50 versus the displacement of the output end of the universal testing machine 40, that is, the pull-out force value output by the universal testing machine 40 when the chip to be tested 50 is broken. The fracture modes of the chip to be tested 50 include chip fracture, separation of the UBM from the solder joint, separation of the solder joint from the substrate pad, peeling of the metal pad of the substrate, substrate rupture, and peeling of the adhesive.

[0074] In the chip pull-out force test method, the first adhesive surface 21 of the adhesive plate 20 is bonded to the first surface 51 of the chip to be tested 50, the second adhesive surface 312 of the connection mechanism 30 is connected to the second surface 52 of the chip to be tested 50, and then the adhesive plate 20 is fixed to the support mechanism 10, and the connection mechanism 30 is connected to the universal testing machine 40, and the universal testing machine 40 applies a pulling force to the chip to be tested 50 through the connection mechanism 30, so as to realize the pull-out force test of the chip to be tested 50. Compared with the traditional test method, the chip pull-out force test fixture of the present application can connect the chip to be tested 50 to the universal testing machine 40, and the universal testing machine 40 applies a pulling force to the chip to be tested 50, which can increase the test range, improve the controllability of the force direction and the force speed, and the test result has good repeatability, which can meet the pull-out force test requirements of large-size and high-density flip chips, and ensure the accuracy of the pull-out force test of flip chips. Furthermore, since the orthographic projection of the first adhesive surface 21 of the adhesive plate 20 on the first surface 51 of the chip to be tested 50 can cover the first surface 51, and the orthographic projection of the second adhesive surface 312 of the connecting mechanism 30 on the second surface 52 of the chip to be tested 50 can cover the second surface 52, it is ensured that the adhesive area between the adhesive plate 20 and the chip to be tested can cover the entire first surface 51 of the chip to be tested, and the adhesive area between the connecting mechanism 30 and the chip to be tested can cover the entire second surface 52 of the chip to be tested. This ensures that when the universal testing machine 40 applies a tensile force to the chip to be tested 50, the first surface 51 and the second surface 52 of the chip to be tested 50 are uniformly stressed, thereby avoiding the problem of local breakage of the chip to be tested 50 due to stress concentration, which affects the test results.

[0075] Optionally, in one embodiment, the following steps are further included before step S110:

[0076] S100 : grinding the first bonding surface 21 and the first surface 51 to increase the surface roughness of the first bonding surface 21 and the first surface 51 .

[0077] Specifically, the polishing method includes sandblasting, grinding, laser processing, chemical etching, etc. For example, 400-grit sandpaper is used to polish the first bonding surface 21 and the first surface 51. By polishing the first bonding surface 21 and the first surface 51, the surface roughness of the first bonding surface 21 and the first surface 51 can be increased, thereby improving the bonding stability of the first bonding surface 21 and the first surface 51. It should be noted that since the second surface 52 of the chip is usually provided with important electronic components, the second surface 52 does not need to be polished.

[0078] Optionally, in one embodiment, step S110 and step S120 specifically include the following steps:

[0079] S111: Paste a protective film around the side of the chip to be tested 50;

[0080] Specifically, the chip to be tested 50 is usually a multi-layer structure. By attaching a circle of protective film to the side of the chip to be tested 50, it is possible to prevent the colloid 60 from overflowing and entering between the structural layers of the chip to be tested 50 to affect the accuracy of the test results. Exemplarily, the protective film includes masking tape, double-sided tape, high-temperature tape, etc., which are not limited here.

[0081] S112: Coat the first surface 51 and the second surface 52 of the chip to be tested 50 with the colloid 60;

[0082] Specifically, the thickness of the colloid 60 on the first surface 51 and the second surface 52 can be controlled so that the overflow width after bonding is not less than 1 mm, thereby ensuring that the first surface 51 can be completely bonded to the bonding plate 20, and the second surface 52 can be completely bonded to the connecting mechanism 30, thereby ensuring that the first surface 51 and the second surface 52 are evenly stressed and avoiding stress concentration.

[0083] S113: attaching the first adhesive surface 21 of the adhesive plate 20 to the colloid 60 on the first surface 51;

[0084] S114: attaching the second adhesive surface of the connecting mechanism 30 to the colloid 60 on the second surface 52;

[0085] S115: curing colloid 60;

[0086] Exemplarily, the curing temperature of the colloid 60 is 25-75° C., and the curing time is 0.1 h-8 h, so as to ensure that the colloid 60 is completely cured and the bonding of the adhesive plate 20 , the chip to be tested 50 and the connector 31 is stable.

[0087] S116: Remove the protective film.

[0088] Optionally, in one embodiment, step S140 specifically includes the following steps:

[0089] S141: setting the stretching rate of the universal testing machine 40 to 0.5 mm / min-10 mm / min;

[0090] Specifically, if the stretching rate of the universal testing machine 40 is too fast, the chip to be tested 50 will be subjected to excessive instantaneous impact force in a short period of time, affecting the accuracy of the test structure. If the stretching rate is too slow, the test time will be too long, increasing the time cost. Therefore, by configuring the stretching rate of the universal testing machine 40 to 0.5mm / min-10mm / min, both the test accuracy and the test efficiency are guaranteed.

[0091] S142: The universal testing machine 40 continuously applies a tensile force to the connection mechanism 30 along a direction perpendicular to the second surface 52 of the chip to be tested 50 until the chip to be tested 50 is broken or the tensile force reaches a preset test specified value.

[0092] Specifically, when the chip 50 to be tested is broken, the tensile force value output by the universal testing machine 40 is the maximum pull-out force of the chip 50 to be tested. The "preset test specified value" refers to the value determined by the tester according to relevant operating specifications or work experience, and the value can be input into the universal testing machine 40 before the test.

[0093] The technical features of the above-described embodiments may be arbitrarily combined. To make the description concise, not all possible combinations of the technical features in the above-described embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0094] The above-described embodiments only express several implementation methods of the present application, and the descriptions thereof are relatively specific and detailed, but they cannot be construed as limiting the scope of the patent application. It should be pointed out that, for a person of ordinary skill in the art, several variations and improvements can be made without departing from the concept of the present application, and these all belong to the protection scope of the present application. Therefore, the protection scope of the patent application shall be subject to the attached claims.

Claims

1. A chip pull-out force test fixture, characterized in that: include: Support mechanism; An adhesive plate, the adhesive plate being fixed to the supporting mechanism, the adhesive plate comprising a first adhesive surface for bonding with the first surface of the chip to be tested, the orthographic projection of the first adhesive surface on the first surface being able to cover the first surface; A connecting mechanism, one end of which has a second bonding surface for bonding with the second surface of the chip to be tested, and the orthographic projection of the second bonding surface on the second surface can cover the second surface, and the other end of the connecting mechanism is used to connect to the universal testing machine.

2. The chip pull-out force test fixture according to claim 1, characterized in that: The supporting mechanism comprises: Base; A cover plate is detachably connected to the base, a limiting space for accommodating the adhesive plate is formed between the cover plate and the base, and a clearance opening for avoiding the chip to be tested is formed through the cover plate.

3. The chip pull-out force test fixture according to claim 2, characterized in that: The base is provided with a threaded hole, the cover plate is provided with a through hole aligned with the threaded hole, the support mechanism further comprises a threaded fastener, the threaded fastener is passed through the through hole and threadably engaged with the threaded hole, and the screw head of the threaded fastener is limitedly engaged with the cover plate.

4. The chip pull-out force test fixture according to claim 1, characterized in that: The connecting mechanism comprises: A connecting piece, one end surface of which forms the second bonding surface, and the other end of which is provided with a hanging ring; A hook is connected to the lifting ring and is used to be connected to the universal testing machine.

5. The chip pull-out force test fixture according to claim 4, characterized in that: The connection mechanism comprises at least two threaded positioning members, all of which are used to be threadedly connected to the universal testing machine in pairs, and all of which clamp the hook together.

6. The chip pull-out force test fixture according to claim 1, characterized in that: The area of ​​the first bonding surface is not less than three times the area of ​​the first surface; and / or, The area of ​​the second bonding surface is 1.2 to 1.5 times the area of ​​the second surface; and / or, The bonding board includes any one of a PCB board, a metal board and a ceramic board; and / or, The bonding plate and the chip to be tested are bonded by colloid, and the connecting mechanism and the chip to be tested are bonded by colloid, and the colloid includes any one of epoxy structural adhesive and acrylate structural adhesive.

7. A chip pull-out force testing method, characterized in that: The following steps are involved: Adhere the first adhesive surface of the adhesive plate to the first surface of the chip to be tested, and make the orthographic projection of the first adhesive surface on the first surface cover the first surface; Adhere the second bonding surface of the connecting mechanism to the second surface of the chip to be tested, and make the orthographic projection of the second bonding surface on the second surface cover the second surface; securing the adhesive plate to a support mechanism, and connecting the connecting mechanism to a universal testing machine; Applying a tensile force to the connecting mechanism by the universal testing machine; The variation curve of the pull-out force of the chip to be tested with the displacement of the output end of the universal testing machine is recorded to determine the maximum pull-out force and the fracture mode of the chip to be tested.

8. The chip pull-out force testing method according to claim 7, characterized in that: Before the step of bonding the first bonding surface of the bonding board to the first surface of the chip to be tested, the following steps are also included: The first bonding surface and the first surface are polished to increase the surface roughness of the first bonding surface and the first surface.

9. The chip pull-out force testing method according to claim 7, characterized in that: The step of bonding the first bonding surface of the bonding plate to the first surface of the chip to be tested and the step of bonding the second bonding surface of the connecting mechanism to the second surface of the chip to be tested specifically include the following steps: A protective film is arranged on the side of the chip to be tested; The first surface and the second surface of the chip to be tested are both coated with colloid; attaching the first adhesive surface of the adhesive plate to the colloid on the first surface; Adhere the second adhesive surface of the connecting mechanism to the colloid on the second surface; solidifying the colloid; The protective film is removed.

10. The chip pull-out force testing method according to claim 7, characterized in that: The step of applying a tensile force to the connecting mechanism by the universal testing machine specifically includes the following steps: Setting the stretching rate of the universal testing machine to 0.5 mm / min-10 mm / min; The universal testing machine is made to continuously apply a tensile force to the connecting mechanism in a direction perpendicular to the second surface until the chip to be tested is broken or the tensile force reaches a preset test specified value.

Images